JP5496960B2 - 拡張型hip生成システム及びアドバンスhip生成方法 - Google Patents
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Description
110 キャラクタ選択構成要素
120 キャラクタ・キャッシュ
130 アーク選択構成要素
140 アーク・キャッシュ
150 ワープ・フィールド適用(ワーピング)構成要素
160 ワープ部分領域選択構成要素
170 ワープ・フィールド・キャッシュ
180 人間対話証明(HIP)
190 HIP検証システム(任意選択)
200 HIP形成の例示的なパスウェイ
210 キャラクタ・プリレンダリング構成要素
230 キャラクタ・データベース
250 「予備」HIP(バイナリ)
240 アーク・データベース
220 アーク・プリレンダリング構成要素
260 ワープ・フィールド(キャッシュ内)
265 ワープ・フィールドの部分領域
270 (高分解度において)ワーピングされたHIP
280 ダウン・サンプリング構成要素
290 完成HIP
295 HIPカスタム化構成要素
300 HIPの生成を容易にする、例示的な方法
305 ブランクHIPの生成
320 許容キャラクタのリスト
325 初期のHIP
335 キャラクタ・キャッシュ(バイナリ)
345 変換されたキャラクタ
355 アーク・キャッシュ(バイナリ)
365 前景アークが追加されたHIP
375 アーク・キャッシュ(バイナリ)
385 背景アークが追加されたHIP
395 ワープ・キャッシュ(整数)
400 ワープされたHIP
405 ダウン・サンプリングされたHIP
420 前景/背景色、テクスチャなどが追加されたHIP
450,460,470 例示的なHIP
480,480 テクスチャ、色、および混色(color blending)を加えたHIP
710 好適な動作環境
714 プロセシング・ユニット
716 システム・メモリ
718 バス
720 揮発性
722 不揮発性
726 インターフェース
724 ディスク記憶装置
728 オペレーティング・システム
730 アプリケーション
732 モジュール
734 データ
736 入力装置(複数を含む)
738 インターフェース・ポート(複数を含む)
740 出力装置(複数を含む)
742 出力アダプタ
744 リモート・コンピュータ(複数を含む)
746 メモリ記憶装置
738 インターフェース・ポート(複数を含む)
748 ネットワーク・インターフェース
750 通信接続(複数を含む)
Claims (11)
- いくつかの数のキャラクタと、そのキャラクタと組み合わせたある量のクラッタとを備えるHIPシーケンスを生成する、キャラクタ・シーケンス生成構成要素と、 前記HIPシーケンスを、高分解能でバイナリ形態でワーピングして、それによってワーピングされたHIPシーケンスが白黒で現れるようにする、ワーピング構成要素と 前記HIPシーケンスを、それがワーピングされた後に1よりも大きい任意の係数を用いて低分解能のバイナリ形態にダウン・サンプリングする、ダウン・サンプリング構成要素と を備えることを特徴とする拡張型HIP生成システム。
- 前記HIPシーケンスにテクスチャを追加すること、前記HIPシーケンスの前記キャラクタおよび前記クラッタに色を追加すること、および前記HIPシーケンスの前記キャラクタおよび前記クラッタ以外の部分に色を追加することのうちの少なくとも1つを実行するカスタム化構成要素をさらに備えることを特徴とする請求項1に記載の拡張型HIP生成システム。
- 前記カスタム化構成要素は、前記HIP生成システムのクライアント側に常駐することを特徴とする請求項2に記載の拡張型HIP生成システム。
- ダウン・サンプリングされたHIPシーケンスは、グレー・スケールの形式であるとともに、それがワーピングされた後の前記HIPシーケンスよりもサイズが小さいことを特徴とする請求項3に記載の拡張型HIP生成システム。
- 前記ダウン・サンプリングされたHIPシーケンスは、エイリアス除去されていることを特徴とする請求項4に記載の拡張型HIP生成システム。
- 前記ダウン・サンプリングはバイ・キュービックであることを特徴とする請求項3に記載の拡張型HIP生成システム。
- 前記ワーピング構成要素は、 グラフィック処理ユニット(GPU)と、 32ビットプロセッサ上の64ビットまたは128ビットの単一命令多重データ(SIMD)オペレーションの少なくとも1つとのうちの少なくとも一方を備え、 前記オペレーションは、マルチメディア拡張(MMX)命令セット、ストリーミングSIMD拡張(SSE)命令セット、またはストリーミングSIMD拡張2(SSE2)命令セットの少なくとも1つを介して提供されることを特徴とする請求項1に記載の拡張型HIP生成システム。
- 任意の量のクラッタと組み合わせた任意の数のキャラクタを備えるキャラクタ・シーケンスを生成すること、および グラフィクス処理ユニット(GPU)と、 マルチメディア拡張(MMX)命令セット、ストリーミングSIMD拡張(SSE)命令セット、またはストリーミングSIMD2拡張(SSE2)命令セットの少なくとも1つを介して提供される、32ビット・プロセッサ上の64ビットまたは128ビットの単一命令多重データ(SIMD)動作の少なくとも1つとのうちの少なくとも一方を使用してHIPシーケンスをワーピングすること、 前記HIPシーケンスを、それがワーピングされた後に1よりも大きい任意の係数でダウン・サンプリングすること を備えることを特徴とするアドバンスHIP生成方法。
- 任意の数のキャラクタおよび任意の数のアークを選択してHIPシーケンスを形成すること、 前記HIPシーケンスをワーピングして配信および使用のためのHIP画像を生じさせること、 前記HIPシーケンスを、それがワーピングされた後に1よりも大きい任意の係数でダウン・サンプリングすること、 前記HIP画像を、少なくとも部分的にはテクスチャおよび/または色の少なくとも一方を追加することによってカスタム化して、前記HIP画像の外見を充実させること を備えることを特徴とするアドバンスHIP生成方法。
- 部分的には低ディスクレパシー乱数(low discrepancy quasi−random numbers)の使用に基づいて、前記アークを前記キャラクタと無作為に組み合わせることをさらに備えることを特徴とする請求項9に記載のアドバンスHIP生成方法。
- 前記HIP画像のカスタム化はクライアントによって実行されることを特徴とする請求項9に記載のアドバンスHIP生成方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/815,086 US7505946B2 (en) | 2004-03-31 | 2004-03-31 | High performance content alteration architecture and techniques |
US10/815,086 | 2004-03-31 |
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JP2005091878A Division JP4801364B2 (ja) | 2004-03-31 | 2005-03-28 | 高性能コンテンツ変更アーキテクチャおよび技法 |
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Publication Number | Publication Date |
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JP2011216114A JP2011216114A (ja) | 2011-10-27 |
JP5496960B2 true JP5496960B2 (ja) | 2014-05-21 |
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JP2005091878A Active JP4801364B2 (ja) | 2004-03-31 | 2005-03-28 | 高性能コンテンツ変更アーキテクチャおよび技法 |
JP2011154058A Active JP5496960B2 (ja) | 2004-03-31 | 2011-07-12 | 拡張型hip生成システム及びアドバンスhip生成方法 |
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JP2005091878A Active JP4801364B2 (ja) | 2004-03-31 | 2005-03-28 | 高性能コンテンツ変更アーキテクチャおよび技法 |
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US (2) | US7505946B2 (ja) |
EP (1) | EP1585009B1 (ja) |
JP (2) | JP4801364B2 (ja) |
KR (1) | KR101130373B1 (ja) |
CN (1) | CN1677306A (ja) |
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