JP5494036B2 - Amplitude modulation circuit and amplitude modulation method - Google Patents

Description

  The present invention relates to an amplitude modulation circuit and an amplitude modulation method, for example, an amplitude modulation circuit and an amplitude modulation method mounted on a wireless transmitter using a band such as a medium wave band or a short wave band.

  An amplitude modulation circuit mounted on a radio transmitter using a band such as a medium wave band or a short wave band is known.

  FIG. 8 is a diagram illustrating a configuration of a related art amplitude modulation circuit.

  In FIG. 8, the amplitude modulation circuit 100 includes a high-frequency oscillator 1, a distributor 2, equal output voltage amplifiers 3-1 to 3-n (n is an integer of 2 or more), and binary voltage amplifiers 4-1 to 4-. m (m is an integer of 2 or more), a power source 5, a power source 6, an output transformer 7, a filter 8, an A / D conversion circuit 9, an amplifier fine tuning circuit 10, and an A / D conversion circuit 11 , An adder circuit 12 and a modulation encoder 13. Hereinafter, the equal output voltage amplifiers 3-1 to 3-n are simply referred to as amplifiers 3-1 to 3-n, and the binary voltage amplifiers 4-1 to 4-m are simply referred to as amplifiers 4-1 to 4-m. Called.

  The amplitude modulation circuit 100 receives an analog audio signal S, an output setting bias voltage (hereinafter simply referred to as “bias voltage”) Vb, a power supply voltage V1, and a power supply voltage V2.

  The bias voltage is applied to the amplifiers 3-1 to 3-n and the amplifiers 4-1 to 4-m in a situation where the analog audio signal S is not input to the amplitude modulation circuit 100 (hereinafter referred to as “no audio signal situation”). This is information for determining how to operate. The power supply voltage V1 may also serve as the power supply voltage V2.

  The amplitude modulation circuit 100 controls on / off of the amplifiers 3-1 to 3-n and the amplifiers 4-1 to 4-m based on the analog audio signal S, the bias voltage Vb, and the power supply voltage V1.

  The high frequency oscillator 1 outputs a carrier wave signal used in the amplitude modulation circuit 100.

  The distributor 2 distributes the carrier wave signal from the high frequency oscillator 1 to the amplifiers 3-1 to 3-n and the amplifiers 4-1 to 4-m.

  When the amplifier 3-p (p = 1, 2,..., N) is turned on, it outputs voltages having the same output level. For example, when the amplifier 3-p is turned on, the amplifier 3-p outputs a voltage obtained by multiplying the voltage amplitude of the carrier signal by A (A is a positive number of 1 or more). Note that A decreases as the power supply voltage V1 decreases and increases as the power supply voltage V1 increases.

When the amplifier 4-q (q = 1, 2,..., M) is turned on, it outputs a voltage obtained by multiplying the voltage amplitude of the carrier signal by D (D = A / (2 ^q )).

  The amplifier 3-p and the amplifier 4-q are turned on / off according to the signal from the modulation encoder 13. The signal from the modulation encoder 13 will be described later.

  The output transformer 7 adds the voltages output from the amplifiers in the on state among the amplifiers 3-p and 4-q to generate an output signal. The output transformer 7 outputs the output signal through the filter 8. The signal output from the filter 8 is an analog signal.

  When the analog audio signal S is received, the A / D conversion circuit 9 converts the analog audio signal S into a binary multi-bit digital signal.

  The amplifier fine adjustment circuit 10 receives the bias voltage Vb and the power supply voltage V1. The amplifier fine adjustment circuit 10 outputs an adjustment signal for controlling on / off of the amplifier 3-p and the amplifier 4-q based on the bias voltage Vb and the power supply voltage V1. The adjustment signal is an analog signal.

  For example, the amplifier fine tuning circuit 10 is determined by the bias voltage Vb so that the output level (output level from the filter 8) of the amplitude modulation circuit 100 in the no-sound state is constant even when the power supply voltage V1 varies. An adjustment signal for changing the number of the operated amplifiers 3-p and 4-q according to the magnitude of the power supply voltage V1 is output.

  For example, when the power supply voltage V1 rises, the amplifier fine adjustment circuit 10 decreases the number of operating units of the amplifier 3-p and the amplifier 4-q, and when the power supply voltage V1 falls, the amplifier fine adjustment circuit 10 Increase the number of operating units.

  The A / D conversion circuit 11 converts the adjustment signal (analog signal) from the amplifier fine adjustment circuit 10 into a binary multi-bit digital signal (digital value).

  The adder circuit 12 adds the digital signal from the A / D conversion circuit 9 and the digital signal from the A / D conversion circuit 11 and outputs the addition result (digital signal).

  The modulation encoder 13 generates a control signal for controlling on / off of the amplifier 3-p and the amplifier 4-q based on the digital signal from the adder circuit 12. Specifically, the modulation encoder 13 controls the on / off combination of the amplifier 3-p and the amplifier 4-q to change each time the value (digital time) indicated by the digital signal from the adder circuit 12 changes. Change the value that the signal represents.

  The modulation encoder 13 outputs a control signal to the amplifiers 3-1 to 3-n and the amplifiers 4-1 to 4-m.

  FIG. 9 shows the output of each amplifier in accordance with the amplitude of the analog audio signal S in a situation where six amplifiers 3-1 to 3-6 and three amplifiers 4-1 to 4-3 are used. FIG.

  In FIG. 9, at the time of no modulation (0%), the amplifiers 3-1 to 3-3 are turned on and the amplifiers 3-4 to 3-6 are turned off, and at the positive peak of 100% modulation (+ 100%) ), The modulation encoder 13 controls the control signal so that the amplifiers 3-1 to 3-6 are turned on and the amplifiers 3-1 to 3-6 are turned off at the negative peak time (−100%). Is generated.

  When the on / off response timing of the amplifier 3-p is different from the on / off response timing of the amplifier 4-q in a situation where the on / off of the amplifier 3-p and the amplifier 4-q is controlled according to a common control signal, the output of the amplitude modulation circuit 100 This causes a problem that the S / N (Signal to Noise) characteristic of the signal deteriorates.

  FIG. 10 is a diagram illustrating a situation where the S / N characteristic of the output of the amplitude modulation circuit 100 is deteriorated.

  FIG. 10A is a diagram showing an output signal from the output transformer 7 in a situation where the on-response timing of the amplifier 4-q is delayed from the off-response timing of the amplifier 3-p. In the example shown in FIG. 10A, the gap A is generated at a place where the output voltage gap should not be generated.

  FIG. 10B is a diagram showing an example in which the output signal from the output transformer 7 shown in FIG. 10A is converted into an analog signal by the filter 8. In FIG. 10B, the noise B is generated because the on / off response timing of the amplifier 4-q is delayed from the on / off response timing of the amplifier 3-p.

  FIG. 10C is a diagram showing an output signal from the output transformer 7 in a situation where the on-response timing of the amplifier 4-q is ahead of the off-response timing of the amplifier 3-p. In the example shown in FIG. 10C, the voltage from any one of the amplifiers 3-p is originally a place C where the voltage from any one of the amplifiers 3-p and the voltage from the amplifier 4-q should not overlap. And the voltage from the amplifier 4-q overlap.

  FIG. 10D is a diagram showing an example in which the output signal from the output transformer 7 shown in FIG. 10C is converted into an analog signal by the filter 8. In FIG. 10D, the noise D is generated because the on-response timing of the amplifier 4-q is ahead of the off-response timing of the amplifier 3-p.

  As shown in FIGS. 10A to 10D, noise is generated when any of the amplifiers 3-p is turned on or off, that is, when the control signal turns any of the amplifiers 3-p on or off. In other words, when the control signal indicates a value that turns on all of the amplifiers 4-q, the viewpoint is changed. Hereinafter, a value that causes the control signal to turn on or off any of the amplifiers 3-p or a value that causes the control signal to turn on any of the amplifiers 4-q is referred to as an “operation switching point”.

  As a situation in which the control signal indicates an operation switching point, for example, in the absence of a voice signal, the adjustment signal from the amplifier fine adjustment circuit 10 fluctuates with the fluctuation of the power supply voltage V1, and with the fluctuation of the adjustment signal, A situation where the control signal indicates an operation switching point is conceivable.

  In Patent Document 1, when a control signal (output of an A / D conversion circuit) indicates an operation switching point, a signal that is a source of the control signal is changed so that the control signal does not indicate an operation switching point. A changing amplitude modulation circuit is described.

  Patent Document 2 describes a digital AM radio transmitter that corrects a control signal so that the control signal does not indicate an operation switching point even when the power supply voltage fluctuates.

  In the digital AM radio transmitter described in Patent Document 2, the magnitude of the power supply voltage (hereinafter referred to as “correction target voltage”) when the control signal (output of the A / D conversion circuit) indicates the operation switching point is obtained in advance. It is done.

  In the digital AM radio transmitter described in Patent Document 2, when the power supply voltage becomes the correction target voltage, the measured value of the power supply voltage is changed so that the control signal does not indicate the operation switching point. The value is input to the A / D conversion circuit, and the A / D conversion circuit outputs a control signal corresponding to the changed power supply voltage.

JP 2007-336111 A JP 2001-251143 A

  In the amplitude modulation circuit described in Patent Document 1, since the control signal is corrected after the control signal indicates the operation switching point, there is a problem that a situation in which the control signal indicates the operation switching point occurs.

  In the digital AM radio transmitter described in Patent Document 2, it is possible to prevent a situation in which the control signal indicates an operation switching point, but there is a problem that a correction target voltage must be obtained in advance.

  Therefore, in the amplitude modulation circuit described in Patent Document 1 and the digital AM radio transmitter described in Patent Document 2, it is possible to prevent the control signal from indicating an operation switching point without obtaining the magnitude of the correction target voltage in advance. There was a problem that it could not be said.

  An object of the present invention is to provide an amplitude modulation circuit and an amplitude modulation method that solve the above-described problems.

  An amplitude modulation circuit according to the present invention includes a generation unit that generates a carrier wave, a plurality of amplification units that amplify the carrier wave, a conversion unit that converts an input analog audio signal into a digital signal, and the plurality of amplification units. An adjustment unit that outputs a digital value that determines a combination of on-amplification units that are turned on in a situation where the analog audio signal is no signal, and a combination of on-amplification units that are determined by the digital value are predetermined. In the case of a combination, a digital correction value that outputs a combination of on-amplifying means other than the predetermined combination is output, and the combination of on-amplifying means determined by the digital value is different from the predetermined combination Includes adding a correction unit that outputs the digital value, an output from the correction unit and an output from the conversion unit, and the amplification according to a result of the addition. Comprising a control means for controlling each of the on-off of the stage, and a synthesizing means for synthesizing and outputting an output of the amplifying means is turned on by the control means among the plurality of amplifying means.

  An amplitude modulation method according to the present invention is an amplitude modulation method in an amplitude modulation circuit including a plurality of amplification means for amplifying a carrier wave, wherein the carrier wave is generated, and an input analog audio signal is converted into a digital signal. And a conversion step for outputting, a adjusting step for outputting a digital value for determining a combination of on-amplifying means that is turned on when the analog audio signal is non-signal among the plurality of amplifying means, and a digital value When the combination of the on-amplifying means determined in this way is a predetermined combination, a digital correction value that makes the combination of the on-amplifying means a combination other than the predetermined combination is output, and the on-state determined by the digital value is output. When the combination of the amplification means is different from the predetermined combination, the correction step for outputting the digital value, the output in the correction step, and the change And a control step for controlling on / off of each of the amplifying means according to a result of the addition, and combining the outputs of the amplifying means turned on in the control step among the plurality of amplifying means. And a synthesis step for outputting.

  According to the present invention, it is possible to prevent the control signal from indicating the operation switching point without obtaining the magnitude of the correction target voltage in advance.

It is a figure which shows 100 A of amplitude modulation circuits of one Embodiment of this invention. It is the block diagram which showed the function of 1C of correction circuits. It is a figure for demonstrating operation | movement of the correction program execution function part 1C2. It is a figure showing allocation of the amplifier with respect to the bit of the binary multibit digital signal input into the modulation encoder. It is a figure for demonstrating operation | movement of 1 C of correction circuits. It is a figure for demonstrating operation | movement of 1 C of correction circuits. It is the figure which showed the correction circuit 1C. It is a figure showing the structure of the amplitude modulation circuit of related technology. It is a figure showing the share with respect to the output with respect to the output of an amplitude modulation circuit. It is a figure showing the noise which arises in the output of an amplitude modulation circuit.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram illustrating an amplitude modulation circuit 100A according to an embodiment of the present invention. The amplitude modulation circuit 100A is included in, for example, an amplitude modulation transmitter. In FIG. 1, the same components as those shown in FIG. 8 are denoted by the same reference numerals, and the description of the same components as those shown in FIG. 8 is omitted.

  In FIG. 1, an amplitude modulation circuit 100A is obtained by adding a correction circuit 1C to the amplitude modulation circuit 100 shown in FIG.

  The high frequency oscillator 1 and the distributor 2 are included in the generation unit 1A. Generation unit 1A can be generally referred to as generation means. The generation unit 1A generates a carrier wave (carrier wave signal).

  Amplifier 3-p and amplifier 4-q can generally be referred to as amplification means. Amplifier 3-p can be generally referred to as first amplification means. Amplifier 4-q can generally be referred to as second amplification means. The output level of the amplifier 3-p is larger than the output level of the amplifier 4-q.

  A / D conversion circuit 9 can be generally referred to as conversion means. The A / D conversion circuit 9 converts the input analog audio signal S into a digital signal and outputs it.

  The amplifier fine adjustment circuit 10 and the A / D conversion circuit 11 are included in the adjustment unit 1B. Adjustment unit 1B can be generally referred to as adjustment means. The adjustment unit 1B determines a combination of amplifiers (hereinafter referred to as “on amplifiers”) that are turned on in a situation where the analog audio signal S is no signal among the plurality of amplifiers (amplifiers 3-p and 4-q). Output digital values.

  Correction circuit 1C can be generally referred to as correction means.

  In the correction circuit 1C, the combination of the on-amplifier determined by the digital value from the adjustment unit 1B is a predetermined combination (a combination that deteriorates the S / N characteristic of the amplitude modulation circuit 100A as described above with reference to FIG. 10). In some cases, a digital correction value that outputs a combination other than the predetermined combination as the combination of the on-amplification units is output.

  The predetermined combination is a combination in which all of the amplifiers 4-q are turned on among the amplifiers 3-p and 4-q. Furthermore, the predetermined combination is a combination in which all of the amplifiers 4-q are turned on and at least one of the amplifiers 3-p is turned on among the amplifiers 3-p and 4-q.

  Further, when the combination of the on-amplifiers determined by the digital value from the adjustment unit 1B is different from the predetermined combination, the correction circuit 1C outputs the digital value from the adjustment unit 1B.

  The adding circuit 12 and the modulation encoder 13 are included in the control unit 1D. Control unit 1D can be generally referred to as control means. The control unit 1D adds the output from the correction circuit 1C and the output from the A / D conversion circuit 9, and controls on / off of each of the amplifier 3-p and the amplifier 4-q according to the result of the addition.

  The output transformer 7 and the filter 8 are included in the synthesis unit 1E. Combining section 1E can generally be referred to as combining means. The combining unit 1E combines and outputs the outputs of the amplifiers turned on by the control unit 1D among the amplifiers 3-p and 4-q.

  In the present embodiment, the adjustment unit 1B changes the digital value according to the magnitude of the power supply voltage V1 so that the output from the synthesis unit 1E is constant when the analog audio signal S is no signal. To do.

  Next, the operation will be described.

  The input analog audio signal S is converted into a binary multi-bit digital signal by the A / D conversion circuit 9.

  The power supply voltage V1 is input to the amplifier fine adjustment circuit 10 together with the bias voltage Vb. The amplifier fine adjustment circuit 10 reduces the number of operating amplifiers when the power supply voltage V1 is higher than the voltage required by the amplitude modulation circuit 100A, and the power supply voltage V1 is lower than the voltage required by the amplitude modulation circuit 100A. In this case, a function of keeping the output of the amplitude modulation circuit 100A constant by increasing the number of operating amplifiers is provided. The adjustment of the number of operating units at this time may occur at a point where the S / N characteristic deteriorates (see FIG. 10).

  The output of the amplifier fine adjustment circuit 10 is converted into a binary multi-bit digital signal by the A / D conversion circuit 11.

  The adder circuit 12 adds the output of the A / D conversion circuit 11 and the output of the A / D conversion circuit 9. A binary multi-bit digital signal indicating the addition result in the adder circuit 12 is input to the modulation encoder 13, and the modulation encoder 13 outputs the respective amplifiers 3-p and 4-q according to the addition result in the adder circuit 12. Control on / off.

  In the present embodiment, a correction circuit 1 </ b> C that corrects the output of the A / D conversion circuit 11 is provided between the A / D conversion circuit 11 and the addition circuit 12.

  In the correction circuit 1C, whether the combination of the on-amplifier determined by the output of the A / D conversion circuit 11 is a combination (predetermined combination) that deteriorates the S / N characteristic described with reference to FIG. It has a function of confirming and adjusting the output of the A / D conversion circuit 11 according to the result of the confirmation.

  When the digital signal from the A / D conversion circuit 11 is input to the correction circuit 1C, the digital signal from the A / D conversion circuit 11 is corrected according to the correction program recorded in the ROM in the correction circuit 1C.

  FIG. 2 is a block diagram illustrating the function of the correction circuit 1C. In FIG. 2, the correction circuit 1C includes a conversion function unit 1C1, a correction program execution function unit 1C2, and a conversion function unit 1C3.

  When the digital signal from the A / D conversion circuit 11 enters the correction circuit 1C, first, the digital signal is converted from a binary value to a decimal value by the conversion function unit 1C1. Subsequently, the decimal value is corrected by the correction program execution function unit 1C2. Subsequently, the result of correction by the correction program execution function unit 1C2 is converted from a decimal value to a binary value by the conversion function unit 1C3 and output.

  FIG. 3 is a diagram for explaining the operation of the correction program execution function unit 1C2 that executes the correction program, specifically, the relationship between the input and output of the correction program execution function unit 1C2. The decimal value input to the correction program execution function unit 1C2 is output with hysteresis as shown in FIG.

  In the present embodiment, the amplifier shown in FIG. 9 is used, and the amplifier is turned on and off with a 10-bit digital signal composed of bits numbered “0” to “9”. At this time, the number of bits allocated to the amplifier 4-q is set to the lower 3 bits as shown in FIG.

  From FIG. 4 and FIG. 9, the bit “2” and the bit “3” are the boundary where one of the amplifiers 3-p and the amplifier 4-1 is turned on / off. When the bit of the input signal number “2” is “1” in decimal, it is “4”. When the bit of the input signal number “3” is “1”, it is expressed in decimal. 8 ”. When the bit with the number “2” and the bit with the number “3” output “1” at the same time, that is, the point where the input signal is “12” in decimal is a point where the S / N characteristic deteriorates. .

  Similarly, when the number “2” bit and the number “4” bit are simultaneously “1” (decimal number “20”), the number “2” bit, the number “3” bit, and the number When the bits of “4” are simultaneously “1” (decimal number “28”), the S / N characteristic deterioration point.

  The correction program is a program that outputs a digital value with hysteresis so as to avoid this S / N characteristic deterioration point. The correction program execution function unit 1C2 performs the following calculation according to the correction program.

Output = input-1- (WD / 2) + WD-MOD (input-1, WD)... Correction (A)
Output = input-1 + (WD / 2) + WD-MOD (input-1, WD)... Correction (B)
Note that MOD (A, B) is a calculation for calculating the remainder when A is divided by B.

  WD is the number of power of 2 (the number of bits allocated to operate the amplifier 4-q + 1).

  In the situation where the correction program execution function unit 1C2 corrects the input value to the output value only by calculating the correction (A), the digital value from the A / D conversion circuit 11 fluctuates in the vicinity of the point indicated by the arrow in FIG. In this case, the output of the correction circuit 1C becomes unstable, which causes deterioration of the S / N characteristics.

  In this embodiment, in order to prevent this, two correction programs ("correction (A)" and "correction (B)" shown in FIG. 6) are prepared to provide hysteresis as shown in FIG. To do.

  When the digital value from the A / D conversion circuit 11 is adjusted at the point indicated by the arrow in FIG. 5 according to the correction (A), the S / N characteristic is deteriorated. At this time, the correction circuit 1C switches the correction program from correction (A) to the other correction (B) so as to adjust the output of the correction circuit 1C itself to be stable. Similarly, in the correction (B), an operation for switching to the correction (A) is performed.

  FIG. 7 shows the correction circuit 1C.

  In FIG. 7, the correction circuit 1C includes a no-voice signal detection circuit 1CA, a correction execution unit 1CB, a flip-flop (F / F) 1CC, and a comparator 1CD.

  The voice no signal detection circuit 1CA detects when the analog voice signal S is in a no signal state. For example, the audio no-signal detection circuit 1CA detects whether an analog audio signal S is input to the A / D conversion circuit 9, and if the analog audio signal S is not input to the A / D conversion circuit 9, the analog audio signal S is detected. It is detected that the signal S is in a no-signal state.

  The correction execution unit 1CB has the functions of the conversion function unit 1C1, the correction program execution function unit 1C2, and the conversion function unit 1C3 shown in FIG.

  The correction execution unit 1CB corrects the digital value from the A / D conversion circuit 11 while the audio no-signal detection circuit 1CA detects that the analog audio signal S is in the no-signal state (for example, A correction is performed according to A), and the corrected digital value is output to the adder circuit 12.

  The corrected digital value is delayed by one clock by the flip-flop 1CC. Further, the comparator 1CD compares the output from the correction execution unit 1CB with the output from the flop flop 1CC, and outputs the comparison result to the correction execution unit 1CB.

  When the comparison result indicates a mismatch, the correction execution unit 1CB stabilizes the output of the correction execution unit 1CB by switching the correction program from correction (A) to correction (B).

  Thus, the correction circuit 4 is realized with a simple circuit configuration, and the correction program automatically performs adjustment when correction is performed, and the adjustment can be easily performed.

  According to the present embodiment, when the combination of the on-amplifiers determined by the digital value from the adjustment unit 1B is a predetermined combination, the correction circuit 1C changes the combination of the on-amplifiers to a combination other than the predetermined combination. When the combination of the on-amplifier determined by the digital value from the adjustment unit 1B is different from the predetermined combination, the digital value is output.

  The control unit 1D adds the output from the correction circuit 1C and the output from the A / D conversion circuit 9, and controls on / off of each of the amplifier 3-p and the amplifier 4-q according to the result of the addition.

  Therefore, when there is no output from the A / D conversion circuit 9, that is, when the analog audio signal S is no signal, it is possible to prevent the on-amplifier combination from becoming a predetermined combination. Therefore, it is possible to prevent the S / N characteristic of the amplitude modulation circuit 100A from deteriorating due to the combination of the ON amplifiers being a predetermined combination. The predetermined combination is an on-amplifier combination in which the S / N characteristic of the amplitude modulation circuit 100A deteriorates.

  In this case, it is possible to prevent deterioration of the S / N characteristic of the amplitude modulation circuit 100A without obtaining in advance the value of the power supply voltage corresponding to the combination in which the S / N characteristic of the amplitude modulation circuit 100A deteriorates.

  In the present embodiment, a combination that turns on all of the amplifiers 4-p among the amplifiers 3-p and 4-q is used as the predetermined combination. As shown in FIG. 10, a combination in which all of the amplifiers 4-p are turned on is a combination of on-amplifiers in which the S / N characteristics of the amplitude modulation circuit 100A deteriorate. Therefore, it is possible to prevent the deterioration of the S / N characteristic of the amplitude modulation circuit 100A.

  Further, in the present embodiment, the output level of the amplifier 3-p and the amplifier 4-q varies depending on the magnitude of the power supply voltage V1, and the adjustment unit 1B is in a situation where the analog audio signal S is no signal. The digital value is changed according to the magnitude of the power supply voltage V1 so that the output from the synthesis unit 1E is constant.

  In this case, it is possible to prevent the S / N characteristic of the amplitude modulation circuit 100A from deteriorating while keeping the output from the synthesizing unit 1E constant when the analog audio signal S is no signal. That is, it is possible to suppress the deterioration of the signal-to-noise ratio (S / N characteristic) with respect to fluctuations in the power supply voltage supplied to the amplitude modulation circuit 100A.

  In the embodiment described above, the illustrated configuration and the calculation in the correction program are merely examples, and the present invention is not limited thereto.

DESCRIPTION OF SYMBOLS 100A Amplitude modulation circuit 1 High frequency oscillator 2 Divider 3-p Output voltage amplifier 4-q Binary voltage amplifier 5, 6 Power supply 7 Output transformer 8 Filter 9 A / D conversion circuit 10 Amplifier fine tuning circuit 11 A / D conversion circuit 12 Adder circuit 13 Modulation encoder 1A Generation unit 1B Adjustment unit 1C Correction circuit 1C1 Conversion function unit 1C2 Correction program execution function unit 1C3 Conversion function unit 1CA Audio non-signal detection circuit 1CB Correction execution unit 1CC Flip-flop 1CD Comparator 1D Control unit 1E Synthesis unit

Claims (6)

Generating means for generating a carrier wave;
A plurality of amplification means for amplifying the carrier;
Conversion means for converting the input analog audio signal into a digital signal and outputting it,
Adjusting means for outputting a digital value for determining a combination of on-amplifying means that is turned on in a situation where the analog audio signal is no signal among the plurality of amplifying means;
When the combination of the on-amplifying means determined by the digital value is a predetermined combination, a digital correction value that outputs a combination of the on-amplifying means other than the predetermined combination is output. If the determined combination of on-amplifying means is different from the predetermined combination, the correcting means for outputting the digital value;
A control unit that adds the output from the correction unit and the output from the conversion unit, and controls on / off of each of the amplification units according to a result of the addition;
An amplitude modulation circuit comprising: a combining unit configured to combine and output the outputs of the amplification units turned on by the control unit among the plurality of amplification units. The amplitude modulation circuit according to claim 1,
The plurality of amplifying means includes a first amplifying means and a second amplifying means having different on-off response characteristics,
The output level of the first amplifying means is greater than the output level of the second amplifying means;
The predetermined modulation is an amplitude modulation circuit that is a combination in which all of the second amplification means are turned on among the plurality of amplification means. The amplitude modulation circuit according to claim 1 or 2,
The amplification means varies in output level according to the magnitude of the power supply voltage,
The amplitude modulation circuit, wherein the adjustment unit changes the digital value according to the magnitude of the power supply voltage so that an output from the synthesis unit is constant in a situation where the analog audio signal is no signal. An amplitude modulation method in an amplitude modulation circuit including a plurality of amplification means for amplifying a carrier wave,
Generating to generate the carrier;
A conversion step of converting the input analog audio signal into a digital signal and outputting the digital signal;
An adjustment step of outputting a digital value that determines a combination of on-amplifying means that is turned on in a situation where the analog audio signal is no signal among the plurality of amplifying means;
When the combination of the on-amplifying means determined by the digital value is a predetermined combination, a digital correction value that outputs a combination of the on-amplifying means other than the predetermined combination is output. If the determined combination of on-amplifying means is different from the predetermined combination, a correction step for outputting the digital value;
A control step of adding the output in the correction step and the output in the conversion step, and controlling on / off of each of the amplification means according to the result of the addition;
An amplitude modulation method comprising: a synthesis step of synthesizing and outputting the outputs of the amplification units turned on in the control step among the plurality of amplification units. The amplitude modulation method according to claim 4.
The plurality of amplifying means includes a first amplifying means and a second amplifying means having different on-off response characteristics,
The output level of the first amplifying means is greater than the output level of the second amplifying means;
The predetermined modulation is an amplitude modulation method in which all of the second amplification means are turned on among the plurality of amplification means. The amplitude modulation method according to claim 4 or 5,
The amplification means varies in output level according to the magnitude of the power supply voltage,
In the adjustment step, the digital value is changed in accordance with the magnitude of the power supply voltage so that the output in the synthesis step in a situation where the analog audio signal is no signal is constant.

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