JP5489844B2 - Electronic equipment - Google Patents

Description

  The present invention relates to an electronic device, and more particularly to an electronic device in which a plurality of switching elements are arranged in a matrix.

  In an electronic device in which a plurality of switching elements are arranged in a matrix, particularly an electronic device in which a plurality of switching elements are arranged on an insulating substrate, the characteristics of the switching elements change or the switching elements are affected by static electricity. In order to prevent damage to the device, signal lines and scanning lines connected to the periphery of a plurality of switching elements arranged in a matrix are connected in common, which may generate large static electricity. It has been proposed to cut the peripheral portion where the common connection portion is provided at the stage of lowering (see Patent Document 1).

  On the other hand, it has also been proposed to provide a protective element such as a ring diode made of a thin film transistor between a signal line or a scanning line and a common connection wiring so that the peripheral portion is not cut (patent) Reference 2).

JP 2009-130273 A Special table 2004-538512

  However, the method of cutting the peripheral portion where the common connection portion is provided later is vulnerable to static electricity at the time of cutting. In addition, when the substrate is a glass substrate, the peripheral portion can be cut relatively easily. However, when a flexible substrate is used, it is difficult to cut the peripheral portion like the glass substrate, and static electricity is generated. It may occur even more than in the case of a glass substrate.

  On the other hand, in a method of providing a protection element such as a ring diode made of a thin film transistor between a signal line or a scanning line and a common connection wiring (see Patent Document 2), the protection element may become a load, and the design is complicated. There was a problem of becoming.

  A main object of the present invention is to provide an electronic device including an electrostatic countermeasure means that does not require cutting of a peripheral portion of a region where a plurality of switching elements are arranged and does not require a protective element in the peripheral portion. There is.

According to the present invention,
A plurality of scan lines;
A plurality of signal lines intersecting the plurality of scanning lines;
A plurality of switching elements respectively provided corresponding to intersections of the plurality of scanning lines and the plurality of signal lines;
The common wiring connected to the plurality of scanning lines and the plurality of signal lines outside the switching element arrangement region where the plurality of switching elements are arranged, the common resistance being made of a material having a variable specific resistance value And an electronic device including the wiring .

Preferably, the common wiring is made of a material whose specific resistance value is reversibly variable.

  Preferably, the material having a variable specific resistance value is a material whose specific resistance value is changed by irradiating the material with light or changing an environment in which the material exists.

Preferably, the material having a variable specific resistance value is irradiated by irradiation with light having a wavelength equal to or less than the wavelength of light having energy corresponding to the band gap of the material or exposure to a vacuum atmosphere of 10 ⁻⁴ Pa or less. It is a material that changes to a specific resistance value lower than the previous specific resistance value, and changes to a specific resistance value higher than the specific resistance value before exposure when exposed to air atmosphere, oxygen atmosphere, water vapor atmosphere or water.

  Preferably, the material having a variable specific resistance value is an oxide semiconductor.

  Preferably, the oxide semiconductor is an oxide of at least one element selected from the group consisting of In, Ga, and Zn.

  Preferably, the oxide semiconductor is an oxide containing In.

Preferably, the common wiring is covered with a film that does not transmit light having a wavelength equal to or less than a wavelength of light having energy corresponding to a band gap of the material having a variable specific resistance value.

Preferably, the material having a variable resistance value is an oxide of three kinds of elements of In, Ga, and Zn, and the common wiring is covered with a film that does not transmit light having a wavelength of 430 nm or less.

  Preferably, the switching element is a field effect transistor, the scanning line is connected to a gate of the field effect transistor, and the signal line is connected to one of a source and a drain of the field effect transistor.

  Preferably, the electronic device is an image display device.

  Preferably, the electronic device is an image detection device.

Moreover, according to the present invention,
A plurality of scan lines;
A plurality of signal lines intersecting the plurality of scanning lines;
A plurality of switching elements respectively provided corresponding to intersections of the plurality of scanning lines and the plurality of signal lines;
The common wiring connected to the plurality of scanning lines and the plurality of signal lines outside the switching element arrangement region where the plurality of switching elements are arranged, the common resistance being made of a material having a variable specific resistance value Forming a substrate comprising wiring; and
Reducing the resistance of the common wiring ;
An electronic device manufacturing method comprising:

Preferably, the common wiring is made of a material whose specific resistance value is reversibly variable.

  Preferably, the material having a variable specific resistance value is a material whose specific resistance value is changed by irradiating the material with light or changing an environment in which the material exists.

Preferably, the material having a variable specific resistance value is irradiated with light having a wavelength equal to or less than the wavelength of light having energy corresponding to the band gap of the material or exposed to a vacuum atmosphere of 10 ⁻⁴ Pa or less before irradiation. It is a material that changes to a specific resistance value lower than the specific resistance value, and changes to a specific resistance value higher than the specific resistance value before exposure when exposed to air atmosphere, oxygen atmosphere, water vapor atmosphere or water.

  Preferably, the material having a variable specific resistance value is an oxide semiconductor.

  Preferably, the oxide semiconductor is an oxide of at least one element selected from the group consisting of In, Ga, and Zn.

  Preferably, the oxide semiconductor is an oxide containing In.

Preferably, the step of reducing the resistance of the common wiring includes the step of irradiating the common line to the resistivity variable light having a wavelength less than the wavelength of light having an energy corresponding to the band gap of the material.

Preferably, the method further includes a step of mounting the substrate after the step of reducing the resistance of the common wiring .

Preferably, the common wiring after the step of reducing the resistance of the common wiring in the resistivity impervious to light having a wavelength less than the wavelength of light having an energy corresponding to the band gap of the variable material layer The method further includes a covering step.

Preferably, the resistivity variable material is an oxide of three kinds of the elements In, Ga and Zn, after the step of reducing the resistance of the common wiring, the common wiring, the light of a wavelength 430nm The method further includes a step of covering with a non-permeable film.

  Preferably, the switching element is a field effect transistor, the scanning line is connected to a gate of the field effect transistor, and the signal line is connected to one of a source and a drain of the field effect transistor.

  According to the present invention, there is provided an electronic device including an electrostatic countermeasure means that does not require cutting of a peripheral portion of a region where a plurality of switching elements are disposed and does not require a protective element in the peripheral portion.

It is the schematic for demonstrating the electronic device of preferable embodiment of this invention. It is a figure for demonstrating the other example of the pixel part of the electronic device of preferable embodiment of this invention. It is a figure for demonstrating the further another example of the pixel part of the electronic device of preferable embodiment of this invention. It is a schematic longitudinal cross-sectional view for demonstrating the structure of the pixel part of the electronic device of preferable embodiment of this invention. It is a X5-X5 line schematic longitudinal cross-sectional view of the C section of FIG. It is a X6-X6 line schematic longitudinal cross-sectional view of the A section of FIG. It is a X7-X7 line schematic longitudinal cross-sectional view of the B section of FIG. It is a figure for demonstrating the resistance value change by the light irradiation of an IGZO film. It is a schematic longitudinal cross-sectional view of the pixel part for demonstrating the manufacturing method of the electronic device of preferable embodiment of this invention. It is a schematic longitudinal cross-sectional view of the pixel part for demonstrating the manufacturing method of the electronic device of preferable embodiment of this invention. FIG. 5 is a schematic vertical sectional view taken along line X5-X5 in part C of FIG. 1 for describing a method for manufacturing an electronic device according to a preferred embodiment of the present invention. FIG. 5 is a schematic vertical sectional view taken along line X5-X5 in part C of FIG. 1 for describing a method for manufacturing an electronic device according to a preferred embodiment of the present invention. FIG. 6 is a schematic vertical sectional view taken along line X6-X6 of part A of FIG. 1 for illustrating a method for manufacturing an electronic device according to a preferred embodiment of the present invention. FIG. 6 is a schematic vertical sectional view taken along line X6-X6 of part A of FIG. 1 for illustrating a method for manufacturing an electronic device according to a preferred embodiment of the present invention. It is a X7-X7 line schematic longitudinal cross-sectional view of the B section of FIG. 1 for demonstrating the manufacturing method of the electronic device of preferable embodiment of this invention. It is a X7-X7 line schematic longitudinal cross-sectional view of the B section of FIG. 1 for demonstrating the manufacturing method of the electronic device of preferable embodiment of this invention.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
Referring to FIG. 1, an electronic device 1 according to a first preferred embodiment of the present invention includes a switching element arrangement region 20 in which a plurality of thin film transistors 40 as switching elements are arranged, and an outside of the switching element arrangement region 20. Common wiring 10 is provided. The electronic device 1 has a configuration in which light is converted into electric charges by an optical member 70 and stored in a storage capacitor 60 to generate a potential, and the thin film transistor 40 reads the potential as a switching element. When the optical member 70 is made of liquid crystal, electronic paper ink material, or the like, the storage capacitor 60 and the optical member 70 are arranged in parallel as shown in FIG. Even when the optical member 70 is a member that requires a drive current such as an electroluminescence member, the storage capacitor 60 and the optical member 70 are basically arranged in series and parallel. That is, as shown in FIG. 3, an optical member 70 such as an electroluminescence member and a driving transistor 90 are connected in series between a power supply line Vdd and a ground potential 82, and the gate electrode 92 and the drain of the driving transistor 90 are connected. A storage capacitor 60 is provided between the electrodes, and a thin film transistor 40 serving as a switching element is connected between the storage capacitor 60 arranged in parallel and the gate electrode 92 and the signal line 12.

  Referring to FIG. 1 again, a plurality of scanning lines 14 are arranged in parallel to each other in the row direction (lateral direction on the paper surface), and a plurality of signal lines 12 are arranged in parallel to each other in the column direction (vertical direction on the paper surface). . The plurality of scanning lines 14 and the plurality of signal lines 12 are connected to the common wiring 10 outside the switching element arrangement region 20.

  The plurality of scanning lines 14 and the plurality of signal lines 12 intersect each other at a plurality of intersections 16, and each pixel unit 30 is arranged corresponding to each intersection 16. Each pixel unit 30 includes a thin film transistor 40, an optical member 70, and a storage capacitor 60.

  Gate electrodes 42 of the plurality of thin film transistors 40 arranged in each row are connected to the scanning lines 14 in each row. The drain electrodes 54 of the plurality of thin film transistors 40 arranged in each column are connected to the signal lines 12 in each column. The source electrode 52 of the thin film transistor 40 is connected to the storage capacitor upper electrode 66 of the storage capacitor 60 and the pixel electrode 68 of the optical member 70. The storage capacitor lower electrode 62 of the storage capacitor 60 is connected to the ground potential 82.

  Next, each pixel unit 30 will be described with reference to FIG.

  A storage capacitor 60 and a thin film transistor 40 are provided on the surface of the substrate 110. The storage capacitor 60 is constituted by a storage capacitor upper electrode 66, a storage capacitor lower electrode 62, and a dielectric layer 114 (the dielectric layer 114 also functions as an insulating film) between these electrodes.

  The thin film transistor 40 includes a gate electrode 42, a dielectric layer 114 provided so as to cover the gate electrode 42, and an active layer 46 provided on the gate electrode 42 and on both sides of the gate electrode 42 through the dielectric layer 114. , A protective layer 48 provided directly above the gate electrode 42 of the active layer 46, and a source electrode 52 and a drain electrode 54 provided on both sides of the gate electrode 42, respectively. The width of the protective layer 48 is smaller than the width of the gate electrode 42, and the source electrode 52 and the drain electrode 54 are connected to the active layer 46 on both sides of the protective layer 48. An end 53 of the source electrode 52 and an end 55 of the drain electrode 54 are provided extending on the active layer 46.

  The source electrode 52, the drain electrode 54, and the storage capacitor upper electrode 66 are formed of the same wiring layer 120, and the source electrode 52 and the storage capacitor upper electrode 66 are connected. The gate electrode 42 and the storage capacitor lower electrode 62 are also formed of the same wiring layer 112.

  An interlayer insulating film 122 is provided on the storage capacitor 60 and the thin film transistor 40. A contact hole 94 is provided in the interlayer insulating film 122 on the storage capacitor upper electrode 66. A pixel electrode 68 is provided on the interlayer insulating film 122. The charge collection electrode 68 is connected to the storage capacitor upper electrode 66 through the contact hole 94.

A counter electrode 84 is provided facing the switching element arrangement region 20 (see FIG. 1). Each pixel electrode 68, the optical member layer 126, and the counter electrode 84 constitute each optical member 70 for each pixel. The common wiring 10 (see FIG. 1) is provided outside the counter electrode 84 in plan view.

  If a material capable of controlling transmission and reflection of light such as liquid crystal is disposed as the optical member layer 126 between the pixel electrode 30 and the counter electrode 84, the electronic device 1 has a configuration as shown in FIG. If an electroluminescent material or the like is arranged and the electronic device 1 functions as an image display device such as a device, the electronic device 1 functions as an image display device such as an electroluminescence display device with the configuration shown in FIG. If an electronic powder fluid or the like is disposed, the electronic device 1 functions as an image display device such as electronic paper. In these cases, for example, the voltage and current applied to each pixel electrode 68 are individually controlled by the thin film transistor 40, and the electric field between each pixel electrode 68 and the counter electrode 84 is controlled for each pixel to control display. Do.

  If a photoelectric conversion layer that converts light into electric charge is disposed as the optical member layer 126 between the pixel electrode 68 and the counter electrode, the electronic device 1 functions as an image detection device or the like. In that case, for example, the configuration is as shown in FIG. 1, a predetermined potential difference is given between the plurality of pixel electrodes 68 and the counter electrode, and the generated charges are read out through the thin film transistor 40 for each pixel. Obtain detected image information. Furthermore, if a scintillator capable of converting radiation such as X-rays into visible light or the like is provided, it can be used as an indirect conversion type radiation imaging apparatus.

  Referring to FIG. 5, the common wiring 10 is formed on the dielectric layer 114 on the substrate 110. The common wiring 10 is covered with a protective film 130. FIG. 5 is an enlarged partial schematic cross-sectional view of a portion C in FIG. 1, but a portion D in FIG. 1 has the same structure.

  Referring to FIG. 6, at the intersection of the signal line 12 and the common line 10, the common line 10 is provided on the dielectric layer 114 on the substrate 110, and the end of the signal line 12 is on the common line 10. Is provided. The common wiring 10 is covered with a protective film 130 via the signal line 12. The signal line 12 is formed of the same wiring layer 120 as the source electrode 52 and the drain electrode 54, and is connected to the drain electrode 54.

  Referring to FIG. 7, at the intersection of the scanning line 14 and the common wiring 10, the scanning line 14 is provided on the substrate 110, and the dielectric layer 114 is provided on the scanning line 14. The common wiring 10 is provided on the dielectric layer 114. The common wiring 10 and the scanning line 14 are connected by a connecting portion 55. One end of the connecting portion 55 is connected to the scanning line 14 via a contact hole 115 provided in the dielectric layer 114, and the other end of the connecting portion 55 is provided on the common wiring 10. The common wiring 10 is covered with a protective film 130 via the connection portion 55. The connection portion 55 is formed of the same wiring layer 120 as the source electrode 52 and the drain electrode 54. The scanning line 14 is formed of the same wiring layer 112 as the gate electrode 42, and is connected to the gate electrode 42.

  As described above, the gate electrode 42 is connected to the scanning line 14, and the scanning line 14 is connected to the common wiring 10 through the connection portion 55, and the common wiring 10 is connected to the signal line 12. Is connected to the drain electrode 54, the gate electrode 42 is connected to the drain electrode 54 through the common wiring 10.

In this embodiment, IGZO (In-Ga-Zn-Oxide) which is a kind of oxide semiconductor is used for the active layer 46 and the common wiring 10 of the thin film transistor 40. As shown in FIG. 8 , IGZO has an insulating property (10 × 10 ¹⁰ Ωcm) by irradiation with light having a wavelength equal to or less than the wavelength of light having energy corresponding to the band gap of IGZO, preferably light having a wavelength of 430 nm or less. The resistivity changes from conductivity (order of 10) to 10 × 10 ² Ωcm, and is exposed to an atmosphere where there is an air atmosphere, oxygen atmosphere, water vapor atmosphere or water, or is left for a long time. , A material whose specific resistance value changes from conductivity (in the order of 10 × 10 ² Ωcm) to insulation (in the order of 10 × 10 ¹⁰ Ωcm). This change from conductivity to insulation and change from insulation to conductivity is reversible. In this way, IGZO is a material whose specific resistance value is changed by irradiating light to IGZO or changing the atmosphere in which IGZO exists. FIG. 8 is a diagram showing a change in resistance of IGZO due to light irradiation, and shows a change in resistance when the wavelength of light to be irradiated is 360 to 460 nm and the number of incident photons is 1 × 10 ¹⁵ photons / cm ^2. ing.

  Further, the protective film 130 (see FIGS. 3, 4, and 5) covering the common wiring 10 is a film that does not transmit light having a wavelength equal to or less than the wavelength of light having energy corresponding to the band gap of IGZO. It is a film that does not transmit light having a wavelength of 430 nm or less. The protective film 130 is composed of an organic film or an inorganic film, and after all the steps are completed, the protective film 130 can be covered with the common wiring so as not to be exposed to light. In addition, after all the steps are completed, it can be dealt with by preventing the case from being exposed to light during mounting. Actually, since the signal line 12 or the connecting portion 55 is on the common wiring 10 on the common wiring 10, the light from above is considerably attenuated after the wiring. For this reason, since the contact portion is likely to have a high resistance, light may be irradiated from below the substrate 110 as an ESD countermeasure.

  Next, a method for manufacturing the electronic device 1 according to the present embodiment will be described.

  As shown in FIG. 9A, FIG. 11A, FIG. 13A, and FIG. 15A, first, a glass substrate that is an insulating substrate is used as the substrate 110, and sputtering is performed on the substrate 110. Thus, the wiring layer 112 is formed. Thereafter, the gate electrode 42, the storage capacitor lower electrode 62, and the scanning line 14 are formed by processing into a desired shape by a photolithography technique and an etching technique. As the electrode material of the wiring layer 112, for example, a metal such as Mo, Al, Ti, Cu, or Ta, an alloy such as Al—Nd, an oxide conductive film such as InSnO, or a multilayer film thereof is preferably used.

Next, as shown in FIGS. 9B, 11B, 13B, and 15B, the dielectric layer 114, the active layer 46, and the protective film 48 are formed. The dielectric layer 114 was formed by depositing SiO ₂ by sputtering, the active layer 46 was formed by depositing IGZO by sputtering, and the protective film 48 was also formed by sputtering.

  Thereafter, as shown in FIGS. 9 (c), 11 (c), 13 (c), and 15 (c), the protective film 48 and the active layer 46 are processed into a desired shape by a photolithography technique and an etching technique. Then, the active layer 46 and the protective film 48 of the thin film transistor 40 were formed, and the common wiring 10 was formed in the same layer as the active layer 46. Note that. The dielectric layer 114 was left without being processed.

  Next, contact holes 115 (see FIG. 15C) are formed in the dielectric layer 114 by a photolithography technique and an etching technique.

  The wiring layer 120 is formed by sputtering. Thereafter, as shown in FIGS. 10A, 12A, 14A, and 16A, the wiring layer 120 is processed into a desired shape by a photolithography technique and an etching technique. 40, the source electrode 52, the drain electrode 54, the storage capacitor upper electrode 66, the connection part between the drain electrode 54 and the storage capacitor upper electrode 66, the signal line 12 and the connection part 55 are formed.

  The signal line 12 is connected to the common wiring 10 (see FIGS. 6 and 14A). The connecting portion 55 is connected to the scanning line 14 and the common wiring 10 through a contact hole 115 provided in the dielectric layer 114 (see FIGS. 7 and 16A). In this way, the scanning line 14 is connected to the signal line 12 through the common wiring 10, the gate electrode 42 is connected to the scanning line 14, and the drain electrode 54 is connected to the signal line 12. The gate electrode 42 is connected to the drain electrode 54 through the common wiring 10.

  Thereafter, as shown in FIGS. 10B, 12B, 14B, and 16B, an interlayer insulating film 122 is formed, and a contact hole 94 is formed in the interlayer insulating film 122. A pixel electrode 68 is formed. Thereafter, the optical member layer 126 is sandwiched between the pixel electrode 68 and the counter electrode 84.

  Then, light is irradiated to the outside of the switching element arrangement region 20 and the counter electrode 84 to reduce the resistance of the common electrode 10.

  After that, mounting such as TAB terminal attachment is performed. Thereafter, the common electrode 10 is left in the atmosphere to increase the resistance. Thereafter, as shown in FIGS. 12C, 14C, and 16C, a protective film 130 that covers the common wiring 10 is formed.

  In the present embodiment, the gate electrode 42 is connected to the drain electrode 54 through the common wiring 10, and the common wiring 10 is made of IGZO, and is mounted with TAB attachment after irradiating light to reduce resistance. Is going. Static electricity is likely to occur mainly in the mounting process after the element process. Therefore, after the element is formed, only the peripheral portion is irradiated with light to reduce the resistance of the common wiring 10, so that static electricity can be easily released during subsequent mounting such as TAB attachment. In this case, the light irradiation may be performed from below the substrate. As a result, it is possible to prevent or suppress the characteristics of the thin film transistor 40 from changing or the thin film transistor 40 from being destroyed.

  In the present embodiment, after the mounting process, the common electrode 10 is increased in resistance by being left in the atmosphere. Therefore, it is not necessary to cut the common electrode 10, and it is possible to prevent the influence of static electricity at the time of cutting. Since it does not need to cut | disconnect, it can apply suitably also in the case of not only a glass substrate but a flexible substrate. Further, since there is no need to provide a protective element such as a diode, it is possible to prevent the protective element from becoming a load and complicating the design.

  Furthermore, since the protective film 130 covering the common wiring 10 is provided, it is possible to prevent the common wiring 10 from being irradiated with light and being reduced in resistance.

(Second Embodiment)
In the first embodiment, the common wiring 10 is formed using the active layer 46 of the thin film transistor 40. However, when the active layer 46 of the thin film transistor 40 is Si-based, IGZO or the like is used as the common wiring 10 after the element process is completed. The oxide semiconductor is formed by sputtering. Thereafter, before the TAB terminal mounting process, the common wiring 10 was irradiated with light to reduce its resistance, and then insulated and separated by being left in the atmosphere.

(Third embodiment)
In the present embodiment, the common wiring 10 is formed simultaneously with the pixel electrode 68. The pixel electrode 68 is formed of an oxide semiconductor such as IGZO, and the common wiring 10 is also formed of an oxide semiconductor such as IGZO. In the case of an oxide semiconductor, it is known that when it is put in a vacuum apparatus and is under a vacuum of 10 ⁻⁴ Pa or less, the resistance is reduced by removing moisture and attached oxygen from the surface. When the vacuum is used in the liquid crystal process and the organic EL process after the formation of the 68 and the common wiring 10, the pixel electrode 68 and the common wiring 10 are naturally reduced in resistance. Since the pixel portion 68 is shielded by the opposite substrate, the low resistance is maintained as it is. The peripheral common wiring 10 once goes into the atmosphere and thus has a high resistance. However, before mounting, the resistance is lowered by irradiating light to perform the TAB terminal mounting process, and then the resistance is increased in the atmosphere.

  In the above embodiment, IGZO is used as a material having a variable specific resistance value used for the common wiring 10, but an oxide semiconductor other than IGZO can also be used suitably. Preferably, as the oxide semiconductor, an oxide of at least one element selected from the group consisting of In, Ga, and Zn is used. Alternatively, an oxide containing In can be used as the oxide semiconductor.

  In order to reduce the resistance of the common wiring 10, it is preferable that light having energy corresponding to the band gap of a material (such as an oxide semiconductor such as IGZO) having a variable specific resistance value used for the common wiring 10. Irradiate light with a wavelength equal to or less than the wavelength of. After the resistance of the common wiring 10 is reduced and the mounting is completed, after the common wiring 10 is increased in resistance and insulated, a material (an oxide semiconductor such as IGZO) having a variable specific resistance value used for the common wiring 10 is used. It is preferable to prevent the common wiring 10 from being lowered in resistance by covering with a film that does not transmit light having a wavelength equal to or less than the wavelength of light having energy corresponding to the band gap.

  Among oxide semiconductors, oxides containing at least one kind of In (I), Ga (G), and Zn (Z), such as IGZO (In-Ga-Zn-Oxide) and IZO (In-Zn-Oxide) ) Is preferably used. When using IGZO (In-Ga-Zn-Oxide), the composition ratios of In (I), Ga (G), and Zn (Z) do not necessarily have to be integer ratios. When IZO (In-Zn-Oxide) is used, the composition ratio of In (I) and Zn (Z) does not necessarily need to be an integer ratio. It can be changed depending on the film forming conditions.

  While various typical embodiments of the present invention have been described above, the present invention is not limited to these embodiments. Accordingly, the scope of the invention is limited only by the following claims.

DESCRIPTION OF SYMBOLS 1 Electronic device 10 Common wiring 12 Signal line 14 Scanning line 16 Crossing point 20 Switching element arrangement | positioning area | region 30 Pixel part 40 Thin film transistor 42 Gate electrode 46 Active layer 48 Protection layer 52 Source electrode 54 Drain electrode 55 Connection part 60 Storage capacity 62 Storage capacity lower electrode 66 Storage capacitor upper electrode 68 Pixel electrode 70 Optical member 82 Ground potential 84 Counter electrode 94, 115 Contact hole 110 Substrate 112, 120 Wiring layer 114 Dielectric layer 122 Interlayer insulating film 126 Optical member layer 130 Protective film

Claims (24)

A plurality of scan lines;
A plurality of signal lines intersecting the plurality of scanning lines;
A plurality of switching elements respectively provided corresponding to intersections of the plurality of scanning lines and the plurality of signal lines;
The common wiring connected to the plurality of scanning lines and the plurality of signal lines outside the switching element arrangement region where the plurality of switching elements are arranged, the common resistance being made of a material having a variable specific resistance value electronic device comprising wiring and, a. The electronic device according to claim 1, wherein the common wiring is made of a material whose specific resistance value is reversibly variable.   The electronic device according to claim 1, wherein the material having a variable specific resistance value is a material whose specific resistance value is changed by irradiation of light to the material or change of an environment in which the material exists. The material having a variable specific resistance value is irradiated with light having a wavelength equal to or lower than the wavelength of light having energy corresponding to the band gap of the material or exposed to a vacuum atmosphere of 10 ⁻⁴ Pa or lower before the specific resistance value before irradiation. Any one of claims 1 to 3, which is a material that changes to a lower specific resistance value and changes to a specific resistance value higher than the specific resistance value before exposure when exposed to air atmosphere, oxygen atmosphere, water vapor atmosphere or water. The electronic device according to one item.   The electronic device according to claim 1, wherein the material having a variable specific resistance value is an oxide semiconductor.   The electronic device according to claim 5, wherein the oxide semiconductor is an oxide of at least one element selected from the group consisting of In, Ga, and Zn.   The electronic device according to claim 5, wherein the oxide semiconductor is an oxide containing In. The said common wiring is covered with the film | membrane which does not allow the light of the wavelength below the wavelength of the light which has the energy equivalent to the band gap of the material with which the said specific resistance value is variable to pass. The electronic device described. 9. The electron according to claim 8, wherein the material having a variable specific resistance value is an oxide of three elements of In, Ga, and Zn, and the common wiring is covered with a film that does not transmit light having a wavelength of 430 nm or less. apparatus.   The switching element is a field effect transistor, the scanning line is connected to a gate of the field effect transistor, and the signal line is connected to one of a source and a drain of the field effect transistor. The electronic device according to claim 9.   The electronic device according to claim 1, wherein the electronic device is an image display device.   The electronic device according to claim 1, wherein the electronic device is an image detection device. A plurality of scan lines;
A plurality of signal lines intersecting the plurality of scanning lines;
A plurality of switching elements respectively provided corresponding to intersections of the plurality of scanning lines and the plurality of signal lines;
The common wiring connected to the plurality of scanning lines and the plurality of signal lines outside the switching element arrangement region where the plurality of switching elements are arranged, the common resistance being made of a material having a variable specific resistance value Forming a substrate comprising wiring; and
Reducing the resistance of the common wiring ;
An electronic device manufacturing method comprising: 14. The method of manufacturing an electronic device according to claim 13, wherein the common wiring is made of a material whose specific resistance value is reversibly variable.   The method of manufacturing an electronic device according to claim 13 or 14, wherein the material having a variable specific resistance value is a material whose specific resistance value is changed by irradiating the material with light or changing an environment in which the material exists. . The material having a variable specific resistance value is irradiated with light having a wavelength equal to or lower than the wavelength of light having energy corresponding to the band gap of the material or exposed to a vacuum atmosphere of 10 ⁻⁴ Pa or lower before the specific resistance value before irradiation. The specific resistance value is changed to a lower specific resistance value, and when exposed to air atmosphere, oxygen atmosphere, water vapor atmosphere or water, the material changes to a specific resistance value higher than the specific resistance value before exposure. A method for manufacturing an electronic device according to one item.   The method for manufacturing an electronic device according to claim 13, wherein the material having a variable specific resistance value is an oxide semiconductor.   The method for manufacturing an electronic device according to claim 17, wherein the oxide semiconductor is an oxide of at least one element selected from the group consisting of In, Ga, and Zn.   The method for manufacturing an electronic device according to claim 17, wherein the oxide semiconductor is an oxide containing In. Wherein the step of reducing the resistance of the common wiring claim 13 comprising the step of irradiating the common line to the resistivity variable light having a wavelength less than the wavelength of light having an energy corresponding to the band gap of the material 20. A method for manufacturing an electronic device according to any one of 19 above. The method for manufacturing an electronic device according to claim 13, further comprising a step of mounting the substrate after the step of reducing the resistance of the common wiring . After the step of reducing the resistance of the common wiring , a step of covering the common wiring with a film that does not transmit light having a wavelength equal to or less than the wavelength of light having energy corresponding to a band gap of the material having a variable specific resistance value. Furthermore, the manufacturing method of the electronic device as described in any one of Claims 13-20. The resistivity variable material is an oxide of three kinds of the elements In, Ga and Zn, after the step of reducing the resistance of the common wiring, the common wiring, does not transmit light of a wavelength 430nm The method for manufacturing an electronic device according to any one of claims 17 to 21, further comprising a step of covering with a film.   The switching element is a field effect transistor, the scanning line is connected to a gate of the field effect transistor, and the signal line is connected to one of a source and a drain of the field effect transistor. 24. A method of manufacturing an electronic device according to any one of 23.

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