JP5482096B2 - Constant current generation circuit, integrated circuit device, and electronic device - Google Patents

Description

The present invention includes a constant current generating circuit, and Integrated Circuit device, an electronic instrument, and the like.

  Conventionally, a circuit called a bandgap reference circuit is known as a circuit that generates a reference voltage necessary for the operation of an analog circuit. As a prior art of this bandgap reference circuit, for example, there is a technique disclosed in Patent Document 1. Further, as a conventional technique of a circuit for generating a reference voltage by connecting N-type transistors having different threshold voltages in series, there is a technique disclosed in Patent Document 2, for example.

  In order to generate a constant current with little temperature variation using a bandgap reference circuit, for example, a method of providing a temperature-independent resistor as an external component of an IC (integrated circuit device) or a bandgap reference circuit is used as a base. A method of configuring a current generation circuit is conceivable.

  However, the technique using the resistance of the external parts has a problem that the number of parts increases and the cost increases. Moreover, the constant current generation circuit based on the bandgap reference circuit has the accuracy, but has a problem that the circuit scale becomes large.

Japanese Patent Laid-Open No. 2003-173212 JP-A-56-108258

According to some aspects of the present invention, the constant current generating circuit capable of generating a highly accurate constant current, it is possible to provide the Integrated Circuit device, an electronic instrument, and the like.

  One embodiment of the present invention is a work function difference voltage between a first transistor, a second transistor having a gate electrode conductivity different from that of the first transistor, and the first transistor and the second transistor. The work function difference voltage has a negative temperature characteristic, and the resistance value of the first resistor has a negative temperature characteristic, and the first resistance is applied with a voltage corresponding to the first resistance. The present invention relates to a constant current generation circuit that generates a constant current corresponding to the current flowing through the resistor.

  In one embodiment of the present invention, the first and second transistors have gate electrodes having different conductivities, whereby a work function difference voltage is generated. A voltage corresponding to the work function difference voltage (the work function difference voltage itself or an offset voltage including the work function difference voltage) is applied to the first resistor, and a constant current (first voltage) corresponding to the current flowing through the first resistor. Current mirror current of the current flowing through the resistor 1 or the current itself) is generated. In this case, the work function difference voltage has a negative temperature characteristic, and the resistance value of the first resistor has a negative temperature characteristic. Accordingly, when the temperature rises and the work function difference voltage decreases, the resistance value of the first resistor also decreases. When the temperature decreases and the work function difference voltage increases, the resistance value of the first resistor also increases. Therefore, the temperature dependence of the current flowing through the first resistor can be reduced, and a constant current with high accuracy can be generated.

  In one embodiment of the present invention, the first transistor, the second transistor is a first differential transistor, a differential portion provided as a second differential transistor, the first resistor, And an output unit having a drive transistor provided in series with one resistor, wherein a first differential input terminal of the differential unit is set to a first reference voltage, and the drive transistor and the first transistor A signal at a connection node to the resistor may be fed back to the second differential input terminal of the differential unit, and the drive transistor may be controlled by the output node of the differential unit.

  In this way, the signal at the connection node between the drive transistor and the first resistor is fed back to the differential section, and the drive transistor is controlled. Therefore, for example, even when there is a power supply voltage fluctuation or the like, feedback control is performed by the signal of the connection node, so that variation in constant current can be reduced.

  In the aspect of the invention, the differential unit may include a current source provided between the first transistor and the second transistor and a first power supply node, the first transistor, and the second transistor. A current mirror circuit provided between the first transistor and the second power supply node may be included.

  In this way, feedback control can be performed by the differential unit having the first and second transistors, the current source, and the current mirror circuit.

  In one embodiment of the present invention, the current source includes a depletion-type third transistor whose gate electrode is set to a second reference voltage, and the third transistor and the first power supply node. A second resistor may be included.

  In this way, a circuit for generating a reference voltage for generating a tail current of the current source can be eliminated, and the number of current paths can be reduced.

  In one embodiment of the present invention, the first transistor and the third transistor are depletion type N-type transistors, and the first reference voltage and the second reference voltage are the first power source and the second power source, respectively. It may be the voltage of the node.

  In this way, by applying the voltage of the first power supply node to the gate electrodes of the depletion-type N-type first and third transistors, it is possible to pass a current through these transistors.

  In one embodiment of the present invention, the threshold voltage of the third transistor may have a negative temperature characteristic, and the resistance value of the second resistor may have a positive temperature characteristic.

  In this way, the temperature dependence of the tail current flowing through the current source can be reduced.

  In the aspect of the invention, the first resistor may be a poly resistor formed by a polysilicon layer, the second resistor may be an N well resistor formed by an N well, and the N well resistor The first resistor that is the poly resistor may be laid out on the formation region of the second resistor that is.

  In this way, both the first resistor and the second resistor can be laid out using one region, so that the layout efficiency can be improved.

  In the aspect of the invention, the first resistor may include a plurality of resistance elements having different temperature characteristics.

  In this way, it is possible to obtain a temperature characteristic that cannot be obtained by a single resistance element as the temperature characteristic of the first resistor.

  In one aspect of the present invention, the first resistor includes a plurality of resistance units connected in series, and each resistance unit of the plurality of resistance units includes a resistance element and a switch element connected in parallel. The resistance value of the first resistor may be variably set by turning on / off the switch element of each resistor unit.

  In this way, it is possible to variably set the value of the generated constant current, or to adjust the variation of the constant current value.

  In the aspect of the invention, each of the resistance units includes a first resistance element and a second resistance element having a temperature characteristic different from that of the first resistance element, and the resistance value of the first resistance element. The resistance ratio of the resistance values of the second resistance elements may be set to the same ratio among the plurality of resistance units.

  By doing so, it becomes possible to realize both the variable setting and variation adjustment of the constant current value and the reduction of the temperature dependence of the constant current value.

  In one embodiment of the present invention, a constant voltage may be further generated by including a third resistor, and causing a current corresponding to a current flowing through the first resistor to flow through the third resistor.

  This makes it possible to generate a constant voltage using the current generated by the constant current generation circuit.

  In the aspect of the invention, the third resistor may include a plurality of resistance elements having different temperature characteristics.

  In this way, it is possible to obtain a temperature characteristic that cannot be obtained by a single resistor element as the temperature characteristic of the third resistor.

  In the aspect of the invention, the third resistor includes a plurality of resistance units connected in series, and each resistance unit of the plurality of resistance units includes a resistance element and a switch element connected in parallel. The resistance value of the third resistor may be variably set by turning on / off the switch element of each resistor unit, and the generated constant voltage may be variably set.

  In this way, it is possible to variably set the value of the generated constant voltage, or to adjust the variation of the constant voltage value.

  In the aspect of the invention, each of the resistance units includes a first resistance element and a second resistance element having a temperature characteristic different from that of the first resistance element, and the resistance value of the first resistance element. The resistance ratio of the resistance values of the second resistance elements may be set to the same ratio among the plurality of resistance units.

  In this way, it becomes possible to realize both the variable setting and variation adjustment of the constant voltage value and the reduction of the temperature dependence of the constant voltage value.

  Another aspect of the present invention includes a plurality of resistance units connected in series, and each resistance unit of the plurality of resistance units includes a resistance element and a switch element connected in parallel, and the switch of each resistance unit The resistance value is variably set by turning on and off the element, and each resistance unit includes a first resistance element and a second resistance element having a temperature characteristic different from that of the first resistance element, The resistance ratio between the resistance value of the first resistance element and the resistance value of the second resistance element is related to a resistance circuit set to the same ratio among the plurality of resistance units.

  According to another aspect of the present invention, the resistance circuit includes a plurality of resistance units connected in series. The resistance value is variably set by turning on / off the switching element connected in parallel with the resistance element in each resistance unit. Each resistance unit includes first and second resistance elements having different temperature characteristics, and the resistance ratio is set to the same ratio among the plurality of resistance units. As a result, variable setting of the resistance value, variation adjustment, and reduction of the temperature dependency of the resistance value can be realized at the same time.

  Another aspect of the invention relates to an integrated circuit device including any one of the constant current generation circuits described above.

  Another aspect of the present invention relates to an integrated circuit device including the resistor circuit described above.

  Another aspect of the invention relates to an electronic apparatus including the integrated circuit device described above.

The example of a fundamental structure of the constant current generation circuit of this embodiment. 2 is a configuration example of a constant current generation circuit according to the present embodiment. 3 is a detailed configuration example of a constant current generation circuit according to the present embodiment. The figure which shows the structural example of the current source used for the constant current generation circuit of this embodiment. Explanatory drawing of a work function difference voltage. Example of temperature characteristics of resistance value. The figure which shows the temperature dependence of each node of a constant current generation circuit. The structural example of the 1st comparative example of a constant current generation circuit. Comparison diagram of temperature dependence of constant current. The structural example of the 2nd comparative example of a constant current generation circuit. FIGS. 11A and 11B are comparison diagrams of temperature dependence of constant current. 12A and 12B are comparison diagrams of the temperature dependence of the tail current. FIGS. 13A and 13B are comparative diagrams of variations in tail current values. 14A and 14B show examples of the layout of resistors. FIGS. 15A to 15C are explanatory diagrams of a technique using resistance elements having different temperature characteristics. FIG. 16A and FIG. 16B are explanatory diagrams of a method of configuring a resistor with a plurality of resistor units. The structural example of the modification of this embodiment. 2 shows a configuration example of an integrated circuit device. Configuration example of an electronic device.

  Hereinafter, preferred embodiments of the present invention will be described in detail. The present embodiment described below does not unduly limit the contents of the present invention described in the claims, and all the configurations described in the present embodiment are indispensable as means for solving the present invention. Not necessarily.

1. Configuration FIG. 1 shows a principle configuration example of a constant current generation circuit (current generation circuit, reference current generation circuit) of the present embodiment.

  The constant current generation circuit of the present embodiment includes a first transistor TA1, a second transistor TA2, and a resistor RA1. Here, the transistor TA2 is a transistor having a different gate electrode conductivity from the transistor TA1. For example, when the gate electrode of the transistor TA1 is N-type, the gate electrode of the transistor TA2 is P-type. TA1 is, for example, a depletion type N-type transistor (NMOS transistor), and TA2 is, for example, an enhancement type N-type transistor. For example, the transistors TA1 and TA2 have the same substrate impurity concentration and channel impurity concentration, but have different gate electrode conductivity and different gate electrode impurity concentrations.

Specifically, the threshold voltage of the MOS transistor can be expressed as Vth = φ _MS −Q _SS / C _OX + 2φ _F + Q _D / C _OX . Here, φ _MS is a work function difference between the gate electrode and the substrate (P well), Q _SS is a fixed charge in the oxide film, C _OX is a capacity per unit area of the gate oxide film, and φ _F Is the Fermi level, and Q _D is the charge in the depletion layer. By setting the impurity concentration of the N-type gate electrode of the transistor TA1 and the impurity concentration of the P-type gate electrode of the transistor TA2, the threshold voltage of the transistor TA1 can be set to about −0.2 V to −0.5 V, for example. Can be set to about 0.5V to 0.8V, for example.

  In FIG. 1, a voltage (VWD itself or a voltage obtained from VWD) corresponding to the work function difference voltage VWD (threshold voltage difference) of the transistors TA1 and TA2 is applied to the first resistor RA1. For example, the voltage difference between both ends of the resistor RA1 is set to VWD. The constant current generation circuit of this embodiment generates a constant current IREF (the current mirror current of IA1 or IA1 itself) corresponding to the current IA1 flowing through the resistor RA1.

  In this case, the work function difference voltage VWD has a negative temperature characteristic, and the resistance value of the resistor RA1 has a negative temperature characteristic. Therefore, the temperature characteristic of the generated constant current (reference current) IREF can be brought close to a flat characteristic.

  For example, when the temperature (environment temperature) becomes high, the work function difference voltage VWD applied to the resistor RA1 decreases, and the resistance value of the resistor RA1 also decreases. Therefore, even when the temperature becomes high, the current IA1 flowing through the resistor RA1 is kept constant, and the temperature characteristic of the constant current IREF can be made flat.

  When the temperature becomes low, the work function difference voltage VWD applied to the resistor RA1 increases, and the resistance value of the resistor RA1 also increases. Therefore, even when the temperature is low, the current IA1 flowing through the resistor RA1 is kept constant, and the temperature characteristic of the constant current IREF can be made flat.

  Thus, according to the constant current generation circuit of the present embodiment, a constant current having a flat temperature characteristic can be generated with a simple configuration.

  That is, when performing such temperature compensation, a circuit element having a positive temperature characteristic and a circuit element having a negative temperature characteristic are prepared, and a flatness is obtained by canceling out the positive temperature characteristic and the negative temperature characteristic. A technique for obtaining temperature characteristics is common.

  On the other hand, in the present embodiment, the current value flowing through the resistor can be kept constant by increasing the resistance value when the applied voltage is increased and decreasing the resistance value when the applied voltage is decreased. Is focused on. Therefore, in this embodiment, as shown in FIG. 1, a work function difference voltage VWD having a negative temperature characteristic and a resistor RA1 having the same negative temperature characteristic are prepared. A constant current is generated by applying the work function difference voltage VWD to the resistor RA1. In this way, it is possible to obtain a constant current with a flat temperature characteristic as if the negative temperature characteristic of the work function difference voltage VWD and the negative temperature characteristic of the resistor RA1 are offset.

  FIG. 2 shows a detailed configuration example of the constant current generation circuit of this embodiment. The constant current generation circuit of FIG. 2 includes a differential unit DF and an output unit QB.

  In the differential section DF, transistors TA1 and TA2 are provided as first and second differential transistors. For example, the gate electrode of the transistor TA1 becomes a non-inverting input terminal (first differential input terminal in a broad sense) of the differential section DF, and the gate electrode of the transistor TA2 becomes an inverting input terminal (in a broad sense) of the differential section DF. Is a second differential input terminal).

  The output unit QB includes a resistor RA1 and a drive transistor TDR (PMOS transistor) provided in series with the resistor RA1. That is, the P-type driving transistor TDR and the resistor RA1 are provided in series between VDD and VSS.

  In FIG. 2, the non-inverting input terminal (first differential input terminal) of the differential section DF is set to the first reference voltage VRF1. The signal (voltage) at the connection node NA4 between the driving transistor TDR of the output unit QB and the resistor RA1 is fed back to the inverting input terminal (second differential input terminal) of the differential unit DF. The drive transistor TDR is controlled by the output node NA1 of the differential section DF. For example, the current IA1 flowing through the resistor RA1 is controlled by controlling the gate electrode of the driving transistor TDR by the output node NA1 of the differential section DF.

  According to the configuration of FIG. 2, a voltage corresponding to the work function difference voltage VWD is applied to the resistor RA1. Since the work function difference voltage VWD has negative temperature characteristics and the resistance value of the resistor RA1 also has negative temperature characteristics, the temperature dependence of the current IA1 flowing through the resistor RA1 can be reduced. Accordingly, it is possible to generate a constant current IREF having a flatter temperature characteristic.

  In the configuration of FIG. 2, the voltage at the node NA4 is fed back to the differential section DF, and the gate electrode of the drive transistor TDR is controlled. Therefore, for example, even when there is a power supply voltage fluctuation or a manufacturing process variation, the feedback control is performed by the signal of the node NA4, whereby the variation of the constant current IREF can be reduced.

  In FIG. 2, the non-inverting input terminal (positive terminal) of the differential section DF is a terminal whose voltage at the node NA4 increases as the terminal voltage increases. The inverting input terminal (negative electrode terminal) is a terminal at which the voltage at the node NA4 decreases as the terminal voltage increases.

  FIG. 3 shows a more detailed configuration example of the constant current generation circuit of this embodiment. In FIG. 3, the differential section DF includes a current source ISA, transistors TA1 and TA2 that are first and second differential transistors, and transistors TA4 and TA5 that form a current mirror circuit. Here, the current source ISA is provided between the transistors TA1 and TA2 and the VSS node (first power supply node in a broad sense). The transistors TA1 and TA2 have different gate electrode conductivities, and the difference between the threshold voltages of the transistors TA1 and TA2 becomes the work function difference voltage VWD. A current mirror circuit including P-type transistors TA4 and TA5 is provided between the transistors TA1 and TA2 and the VDD node (second power supply node in a broad sense).

  The output unit QB includes a drive transistor TDR and a resistor RA1 provided in series, and transistors TA6 and TA7 provided in series. A signal at the connection node NA4 between the driving transistor TDR and the resistor RA1 is input to the inverting input terminal (second differential input terminal) which is the gate electrode of the transistor TA2 of the differential section DF and fed back. The reference voltage VRF1 is set to the non-inverting input terminal (first differential input terminal) that is the gate electrode of the transistor TA1 of the differential section DF. Here, for example, VRF1 = VSS.

  The gate electrodes of the P-type transistors TDR and TA6 of the output unit QB are controlled by the signal of the output node NA1 between the transistors TA1 and TA4 of the differential unit DF. Here, the ratio of the current IA1 flowing through the resistor RA1 and the constant current IREF is set by setting the transistor ratio (W / L) of the transistors TDR and TA6.

  The N-type transistor TA7 has its gate and drain connected to the node NA5, and the bias voltage VBS from the node NA5 is supplied to each analog circuit of the integrated circuit device. Each analog circuit can obtain a constant current corresponding to the constant current IREF by using the bias voltage VBS.

  In the circuit of FIG. 3, the signal at the node NA4 is fed back to the gate electrode of the transistor TA2. Therefore, assuming that VRF1 = VSS = 0V, the gate electrode of the driving transistor TDR is feedback-controlled by the output node NA1 of the differential section DF so that the voltage of the node NA4 becomes the work function difference voltage VWD. Therefore, the constant current IREF with high accuracy can be generated even when the power supply voltage fluctuates.

  FIG. 4 is a diagram showing a specific configuration example of the current source ISA of FIG. In FIG. 4, the current source ISA includes a third transistor TA3 and a second resistor RA2. The transistor TA3 is a depletion type transistor (NMOS transistor) whose gate electrode is set to VSS (second reference voltage in a broad sense). The resistor RA2 is a resistor provided between the transistor TA3 and VSS (first power supply node).

  For example, when the tail current ITL flowing through TA3 decreases due to an increase in the threshold voltage of the transistor TA3, the voltage at the source node of TA3 decreases. When the voltage at the source node of TA3 is lowered, the voltage between the gate and source of TA3 is increased, so that the current flowing through TA3 is increased, whereby the tail current ITL flowing through TA3 is kept constant.

  On the other hand, when the tail current ITL flowing through TA3 increases due to a decrease in the threshold voltage of the transistor TA3, the voltage at the source node of TA3 increases. When the voltage at the source node of TA3 increases, the voltage between the gate and the source of TA3 decreases, so that the tail current ITL flowing through TA3 is reduced, and the tail current ITL flowing through TA3 is kept constant. .

  As described above, the current source ISA having the configuration shown in FIG. 4 has a configuration in which a current is generated in a self-contained manner to generate a voltage, and a negative feedback is applied in a circuit by the source resistor RA2 provided in the source. ing. Therefore, even when variations occur in the transistor TA3 and the resistor RA2, the variation in the generated tail current ITL is smaller than the variation in the TA3 and RA2, so that a stable tail current can be generated.

  In FIG. 4, the transistors TA1 and TA3 are depletion type N-type transistors. The first reference voltage set for the gate electrode of the transistor TA1 and the second reference voltage set for the gate electrode of the transistor TA3 are both set to the voltage VSS (voltage of the first power supply node, ground voltage). It has become. That is, since TA1 and TA3 are depletion type N-type transistors, a current flows even when VSS is set to the gate electrode. Therefore, it is only necessary to set the gate electrodes of the transistors TA1 and TA3 to VSS, and it is not necessary to separately provide a reference voltage generation circuit set for these gate electrodes, so that the number of current paths can be reduced. That is, since the number of current paths can be reduced by the number of current paths of the reference voltage generation circuit, power consumption can be reduced.

  As will be described later, the threshold voltage of the transistor TA3 has a negative temperature characteristic, and the resistance value of the resistor RA2 has a positive temperature characteristic. For example, the resistor RA2 is an N well resistor formed by an N well, and this N well resistor has a positive temperature characteristic. Therefore, when the temperature rises, the threshold voltage of the transistor TA3 decreases, while the resistance value of the resistor RA2 increases. Therefore, the tail current ITL flowing through the current source ISA is kept substantially constant. When the temperature decreases, the threshold voltage of the transistor TA3 increases while the resistance value of the resistor RA2 decreases. Therefore, the tail current ITL flowing through the current source ISA is kept substantially constant. Therefore, the temperature characteristic of the tail current ITL can be brought close to a flat characteristic.

  That is, only the configuration in which negative feedback is applied by the resistor RA2 cannot reduce the temperature variation, but the transistor TA3 has a negative temperature characteristic, while the resistor RA2 has a positive temperature characteristic, so that the temperature variation is reduced. Reduction can also be realized.

  FIG. 5 is a band diagram for explaining the work function difference voltage. As shown in FIG. 5, the difference between the work function of the N-type gate electrode and the P well of the transistor TA1 on the non-inverting input terminal side and the work function of the P-type gate electrode and the P well of the transistor TA2 on the inverting input terminal side. Becomes the work function difference voltage VWD.

  Note that the offset voltage between the non-inverting input terminal and the inverting input terminal of the differential section DF (the offset voltage between the first and second differential input terminals) is set other than the work function difference voltage as shown in FIG. May be. For example, the offset voltage may be set by changing the W / L ratio (current supply capability) of the transistor TA1 (first differential transistor) and the W / L ratio of the transistor TA2 (second differential transistor). . Alternatively, the offset voltage can be changed by making the W / L ratio of the first current mirror transistor TA4 constituting the current mirror circuit different from the W / L ratio of the second current mirror transistor TA5 constituting the current mirror circuit. May be set.

  If the W / L ratio (current supply capability) of the differential transistor and the current mirror transistor is set in addition to the work function difference voltage VWD, the voltage applied to the resistor RA1 can be finely adjusted. become. For example, when the work function difference voltage VWD is about 0.9 V and a voltage of 1 V is to be applied to the resistor RA1, a voltage of 0.1 V, which is the difference between 1.0 V and 0.9 V, is applied to the differential transistor. Or by adjusting the W / L ratio of the current mirror transistor to be different. This makes it possible to adjust the voltage applied to the resistor RA1 and adjust the constant current IREF.

  FIG. 6 is a diagram illustrating temperature characteristics of resistance values of various resistance elements. In FIG. 6, resistance elements RMRP, RPP, and RNP are poly resistors formed of a polysilicon layer. RMRP is a poly resistor having a sheet resistance value of about several K ohms, for example. RPP is a poly resistor doped with a P-type impurity, and RNP is a poly resistor doped with an N-type impurity. As shown in FIG. 6, the resistance values of these poly resistors become lower as the temperature rises and have negative temperature characteristics. In the present embodiment, a poly resistor having such a negative temperature characteristic is used as the resistor RA1 of the output unit QB. Specifically, for example, a resistance element RMRP close to the temperature characteristic of the work function difference voltage VWD is used as the resistor RA1.

  As shown in FIG. 6, the work function difference voltage VWD also has a negative temperature characteristic. Therefore, as described with reference to FIG. 1 and the like, by applying the work function difference voltage VWD having a negative temperature characteristic to the resistor RA1 having a negative temperature characteristic, the temperature characteristic of the current IA1 flowing through the resistor RA1 is changed. Can be flat. Specifically, for example, a resistance element having a temperature characteristic close to the temperature characteristic of the work function difference voltage VWD is used as the resistor RA1, and the work function difference voltage VWD is applied to the resistor RA1 by the circuits described with reference to FIGS. Is applied. As a result, the temperature characteristic of the constant current IREF generated by the constant current generation circuit can be made flat.

  FIG. 7 shows simulation results showing the temperature characteristics of the voltage levels of the nodes NA1, NA2 and NA4 of the constant current generation circuit of FIG. 4 and the temperature characteristics of the current IA1.

  As shown in FIG. 7, when the temperature rises, the voltage at the node NA1 rises. When the voltage at the node NA1 rises, the voltage at the node NA4 at the drain of the P-type drive transistor TDR into which the voltage at the NA1 is input to the gate electrode decreases as shown in FIG. That is, in the constant current generation circuit of FIG. 4, feedback control is performed so that the voltage of the node NA4 becomes equal to the voltage (offset voltage) corresponding to the work function difference voltage VWD. Since the work function difference voltage VWD has negative temperature characteristics as shown in FIG. 6, the voltage at the node NA4 corresponding to the work function difference voltage VWD has negative temperature characteristics. That is, when the temperature rises, the voltage at the node NA4 decreases. As shown in FIG. 6, the poly resistor constituting the resistor RA1 has a negative temperature characteristic, and the resistance value decreases as the temperature rises. Therefore, even if the temperature rises, the value of the current IA1 flowing through the resistor RA1 hardly changes as shown in FIG. 7, and a constant current having a flat temperature characteristic can be generated.

2. Comparison between the present embodiment and a comparative example FIG. 8 shows a first comparative example of the constant current generating circuit. This first comparative example is a constant current generating circuit based on a band gap reference circuit.

  In FIG. 8, the base-emitter voltages of the bipolar BP1 and BP2 are VBE1 and VBE2, and the voltage difference between them is ΔVBE = VBE1−VBE2. Then, in FIG. 8, VBE1 = I1 · R2 and I0 · R1 + VBE2 = I1 · R2 are established. Therefore, the constant current is expressed as IREF = I1 + I0 = VBE1 / R2 + ΔVBE / R1. Since VBE has a negative temperature characteristic and ΔVBE has a positive temperature characteristic, the temperature characteristic of the constant current IREF can be set flat to some extent by adjusting the resistance values of the resistors R1 and R2. It becomes possible. However, since the resistance values of R1 and R2 also have temperature characteristics, it is difficult to adjust the temperature characteristics of the constant current IREF as theoretically.

  FIG. 9 is a graph comparing the temperature dependence (temperature characteristics) of the constant current generated by the constant current generation circuit of FIG. 4 and the constant current generated by the comparative example of FIG. As is clear from FIG. 9, the constant current generation circuit of this embodiment can generate a constant current having a flatter temperature characteristic as compared with the comparative example of FIG. As is clear from the comparison between the present embodiment of FIG. 4 and the comparative example of FIG. 8, according to the present embodiment, a constant current generating circuit with higher accuracy is realized with a smaller circuit than the comparative example of FIG. it can.

  FIG. 10 shows a second comparative example of the constant current generation circuit. This second comparative example differs from the configuration of FIG. 4 in the configuration of the current source ISA. Note that the constant current generating circuit of the present invention may be configured as shown in FIG.

  In the comparative example of FIG. 10, the reference voltage VR is generated by the reference voltage generation circuit REFG configured by the transistors TG1 and TG2. The reference voltage VR is input to the gate electrode of the transistor TG3, thereby generating a tail current in the current source ISA.

  In the comparative example of FIG. 10, the number of current paths is increased compared to FIG. 4 by the amount of the current path of the current IRG in the reference voltage generation circuit REFG. Therefore, current consumption increases. On the other hand, the constant current generation circuit of FIG. 4 can reduce the number of current paths as compared with FIG.

  11A and 11B compare the temperature dependence and power supply voltage dependence of the constant current generated by the constant current generation circuit of FIG. 4 and the constant current generated by the comparative example of FIG. FIG. 12A and 12B compare the temperature dependence and power supply voltage dependence of the tail current generated by the constant current generation circuit of FIG. 4 and the tail current generated by the comparative example of FIG. FIG.

  11A to 12B, the resistor RA2 of the current source ISA in FIG. 4 is an N-well resistor having a positive temperature characteristic and a poly resistor having a flat temperature characteristic. Are shown in comparison.

  As shown in FIG. 12A, in the constant current generating circuit of FIG. 4 in which the current source ISA is configured by the depletion type transistor TA3 and the N-well resistor RA2, the temperature characteristic of the tail current ITL can be made almost flat. it can. Therefore, fluctuations in the tail current ITL due to temperature fluctuations can be suppressed.

  On the other hand, when a current source is configured as in the comparative example of FIG. 10, the temperature characteristics of the tail current ITL are not flat, and the tail current ITL also varies due to temperature variations. The same applies when the resistor RA2 is formed of a poly resistor.

  As shown in FIG. 12B, in the constant current generating circuit of FIG. 4 in which the current source ISA is configured by the depletion type transistor TA3 and the resistor RA2, the tail current ITL is made substantially constant even when the power supply voltage changes. I can keep it. Therefore, the fluctuation of the tail current ITL due to the fluctuation of the power supply voltage can be suppressed. The same applies to the case where the resistor RA2 is formed of a poly resistor.

  On the other hand, when a current source is configured as in the comparative example of FIG. 10, when the power supply voltage changes, the tail current ITL also changes. Therefore, fluctuations in the tail current ITL due to fluctuations in the power supply voltage cannot be suppressed, and the configuration in FIG. 4 is more advantageous in this respect.

  FIG. 13A is a histogram comparing the tail current generated by the constant current generating circuit of FIG. 4 with the tail current generated by the comparative example of FIG. In FIG. 13A, a histogram is created using the Monte Carlo method. FIG. 13B shows the average value, maximum value, minimum value, and variance of the tail current.

  As shown in FIG. 13A, according to the constant current generation circuit of FIG. 4, the tail due to variations in the manufacturing process such as variations in the threshold voltage of the transistors and variations in the gate length due to feedback due to resistance. Variations in current can be suppressed. Therefore, it is possible to generate a tail current with high accuracy.

3. Layout Arrangement FIGS. 14A and 14B show examples of resistor layout arrangement. FIG. 14A is a plan view, and FIG. 14B is a cross-sectional view.

  In FIG. 4, the resistor RA1 of the output unit QB is formed of a poly resistor having a negative temperature characteristic, while the resistor RA2 of the current source ISA of the differential unit DF is an N well resistor having a positive temperature characteristic. Form with. By doing so, it becomes possible to flatten the temperature characteristics of the constant current IREF and the tail current ITL of the current source ISA.

  On the other hand, in order to reduce the power consumption of the constant current generating circuit, it is necessary to reduce the current values of the currents ITL, IA1, and IREF flowing through the differential unit DF and the output unit QB, and to reduce these current values. Therefore, it is necessary to increase the resistance values of the resistors RA1 and RA2.

  However, if the resistance values of the resistors RA1 and RA2 are to be increased, the layout areas of the resistors RA1 and RA2 are increased, leading to an increase in the scale of the integrated circuit device.

  Therefore, in the present embodiment, the layout method shown in FIGS. 14A and 14B is adopted.

  That is, in FIG. 14A, the resistor RA1 in FIG. 4 is a poly resistor formed by a polysilicon layer, and the resistor RA2 is an N well resistor formed by an N well. Then, as shown in FIG. 14A, a resistor RA1 that is a poly resistor is laid out on the formation region of the resistor RA2 that is an N well resistor. In other words, the resistor RA2 that is an N-well resistor and the resistor RA1 that is a poly resistor are laid out so as to overlap in plan view.

  Specifically, in FIG. 14A, the resistor RA1 is composed of a plurality of poly resistor units. That is, a plurality of poly resistance units are arranged in a snake shape, and adjacent poly resistance units are connected via metal wiring and contacts. One end of the resistor RA1 becomes a tap TPP1, and the other end becomes a tap TPP2. Taking FIG. 4 as an example, node NA4 is connected to tap TPP1, and VSS is connected to tap TPP2.

  The resistor RA2 is composed of a plurality of N-well resistor units. That is, a plurality of N-well resistance units are arranged in a snake shape, and adjacent N-well resistance units are connected via metal wiring and contacts. One end of the resistor RA2 becomes a tap TPN1, and the other end becomes a tap TPN2. Taking FIG. 4 as an example, the source of the transistor TA3 is connected to the tap TPN1, and VSS is connected to the tap TPN2. Note that the layout of the poly resistors and the N well resistors is not limited to that shown in FIG. 14A, and various modifications can be made.

  In FIG. 14A, the poly resistance units are arranged so that the longitudinal direction thereof is in the lateral direction (first direction) with respect to the paper surface, and the N well resistance units are arranged with the longitudinal direction perpendicular to the paper surface. It arrange | positions so that it may become a direction (2nd direction orthogonal to a 1st direction). In this way, the tap TPP1 and TPP2 take-out location and the taps TPN1 and TPN2 take-out location can be made different, so that the signal wiring layout can be simplified and made more efficient.

  14A and 14B, both the resistors RA1 and RA2 can be laid out using one region of the integrated circuit device. Therefore, the layout efficiency can be improved and the area of the integrated circuit device can be reduced.

  14A and 14B, since two resistors RA1 and RA2 can be arranged in one region, even if the layout area of each resistor is increased in order to increase the resistance value of each resistor, The increase in the overall layout area can be minimized. Therefore, it is easy to reduce the power consumption of the circuit by increasing the resistance value of each resistor.

  In particular, in the present embodiment, attention is paid to the point that if the resistor RA2 is formed of an N-well resistor, another circuit element can be laid out thereon. In the circuit of FIG. 4, both a negative temperature characteristic resistor RA1 and a positive temperature characteristic resistor RA2 are required. Therefore, the positive temperature characteristic resistor RA2 is realized by an N well resistor, the negative temperature characteristic resistor RA1 is realized by a poly resistor, and a poly resistor is formed on the N well resistor, thereby reducing the layout area. Achieving compactness.

  In this case, if the N-well resistor and the poly resistor are laid out in the same place, the resistance value of the other resistor may be changed by the voltage from one resistor. However, the accuracy of the N-well resistor is not emphasized, and it is sufficient that the resistance value is high. Therefore, the resistance value fluctuation due to the voltage from the poly resistor is not a problem. On the other hand, when the resistance value of the poly resistor is increased, the resistance of the resistance value due to the voltage from the upper and lower elements becomes more susceptible. However, since the voltage applied to the N-well resistor RA2 in FIG. 4 is close to 0V, there is an advantage that the adverse effect on the poly resistor is not so problematic.

4). Configuration of Resistance When a constant current having a flat temperature characteristic is generated by applying a work function difference voltage VWD having a negative temperature characteristic to a resistor RA1 having a negative temperature characteristic, the negative temperature characteristic of the work function difference voltage VWD It is desirable to make the negative temperature characteristic of the resistor RA1 as close as possible. In some cases, a constant current having a positive temperature characteristic in which the current value increases as the temperature rises may be required.

  Therefore, the resistor RA1 may be configured to include a plurality of resistance elements having different temperature characteristics. For example, in FIG. 15A, the resistor RA1 is configured by connecting resistance elements RMRP and RNP in series. As shown in FIG. 6, the temperature characteristics of the resistance elements RMRP and RNP are different from each other.

  If the resistor RA1 is composed of the resistor elements RMRP and RNP having different temperature characteristics, it becomes possible to obtain temperature characteristics that cannot be obtained by each of the resistor elements RMRP and RNP. As a result, the temperature characteristics of the generated constant current can be made flatter, or a constant current having a positive temperature characteristic or a negative temperature characteristic can be generated.

  In FIG. 15A, the resistance elements RMRP and RNP are blended at a blend ratio of 1: 1, but for example, as shown in FIG. 15B, the resistance elements RMRP and RNP are blended at a blend ratio of 2: 1. May be. That is, the blend ratio of the resistance value of the resistance element is arbitrary. 15A and 15B show an example in which the resistor RA1 is configured by two types of resistance elements. As shown in FIG. 15C, the resistor RA1 is configured by three or more types of resistance elements. May be configured.

  As shown in FIG. 16A, the resistor RA1 may include a plurality of resistor units RU1 to RU4 connected in series. In FIG. 16A, each resistance unit of RU1 to RU4 includes a resistance element RMRP and a switch element SW connected in parallel. The resistance value of the resistor RA1 is variably set by turning on / off the switch element SW of each resistor unit. As a result, it is possible to variably set the value of the constant current to be generated, or to adjust variations in the constant current value due to manufacturing process fluctuations. The number of resistance units is not limited to four and is arbitrary.

  For example, when the constant current value is variably set, the switch element SW of each resistance unit of RU1 to RU4 may be set to on or off by a signal from a control circuit (not shown). Alternatively, based on a signal from an initial value setting circuit such as a fuse circuit or a nonvolatile memory, the switch element SW of each resistance unit may be set to ON or OFF. In this way, it is possible to adjust the variation in the constant current value caused by the manufacturing process variation.

  Further, as shown in FIG. 16B, the first resistance element RMRP and the second resistance element RNP having a temperature characteristic different from that of the first resistance element RMRP are provided in each resistance unit of RU1 to RU4. May be. In this case, it is desirable to set the resistance ratio between the resistance value of the first resistance element RMRP and the resistance value of the second resistance element RNP to the same ratio among the plurality of resistance units RU1 to RU4. For example, in FIG. 16B, the resistance ratio of the resistance values of RMRP and RNP is set to be 2: 1.

  In this way, even when the entire resistance value of the resistor RA1 is changed by turning on or off the switch element SW of each resistor unit, the temperature characteristic of the resistor RA1 as a whole remains unchanged. It becomes fixed. Accordingly, it is possible to realize both variable setting and variation adjustment of the resistance value of RA1 and stable temperature characteristics of the resistance value of RA1, and variable setting of variation of the constant current value and variation adjustment and temperature dependence of the constant current value. The reduction of sex can be achieved at the same time.

  For example, in FIG. 16B, the state where the switch elements SW of all the resistance units RU1 to RU4 are set to OFF is the first setting state, and the state where only the switch element SW of RU4 is set to ON is the first setting state. 2 is set. When the resistance value of each resistance unit is R, the resistance value in the first setting state is 4R, the resistance value in the second setting state is 3R, and the resistance value of RA1 is variably set. Also in this case, the overall blend ratio of the resistance elements RMRP and RNP in the first setting state is 2 to 1, and the overall blend ratio of the resistance elements RMRP and RNP in the second setting state is also Two to one. Therefore, the temperature characteristic of the resistance value in the first setting state and the temperature characteristic of the resistance value in the second setting state can be made the same, and the variable setting of the resistance value of the resistor RA1 and the variation adjustment and the resistance of the RA1 can be adjusted. It is possible to achieve both temperature characteristics with stable values.

  Note that the configuration method of the resistance element having a fixed resistance ratio as shown in FIG. 16B is not limited to the resistance of the constant current generation circuit as described in this embodiment, and is applied to the resistance of various circuits. it can. The resistance ratio is not limited to 2 to 1 as shown in FIG. 16B, and the number of resistance elements in each resistance unit may be three or more.

5. Generation of Constant Voltage FIG. 17 shows a configuration example of a modification of the present embodiment. FIG. 17 differs from FIG. 4 in that the output unit QB further includes a third resistor RA3 in FIG. 17, and the constant voltage VREG is further increased by flowing a current IA2 corresponding to the current IA1 flowing in the resistor RA1 to the resistor RA3. It is a point to generate.

  Specifically, the output unit QB includes a transistor TA8 and a resistor RA3 provided in series between VDD and VSS. The gate electrode of the P-type transistor TA8 is controlled by the output node NA1 of the differential section DF.

  According to this configuration, the constant current IA2 set by the W / L ratio of the transistors TDR and TA8 flows through the resistor RA3. As a result, when the current value of IA2 is I2 and the resistance value of RA3 is R3, a constant voltage of VREG = I2 × R3 is output to the output node NA6. Therefore, not only the constant current IREF but also the constant voltage VREG can be supplied to each analog circuit of the integrated circuit device. In particular, by making the resistor RA3 a variable resistor, the constant voltage VREG having various voltage values can be supplied to each analog circuit of the integrated circuit device.

  Also, the resistor RA3 of FIG. 17 may be configured to include a plurality of resistor elements having different temperature characteristics as described in FIGS. 15A to 15C, similarly to the resistor RA2. For example, the resistor RA3 may be configured by connecting resistance elements RMRP and RNP having different temperature characteristics in series, or by connecting RMRP, RPP, and RNP in series.

  Alternatively, as shown in FIG. 16A, the resistor RA3 may include a plurality of resistor units RU1 to RU4 connected in series. In this case, each resistance unit has a resistance element RMRP and a switch element SW connected in parallel. The resistance value of the resistor RA3 is variably set by turning on / off the switch elements of the respective resistance units RU1 to RU4, and the generated constant voltage is variably set. In this way, the constant voltage VREG having various voltage values can be supplied to each analog circuit of the integrated circuit device. Note that when a plurality of constant voltages are supplied, a plurality of circuits including the transistor TA8 and the resistor RA3 may be provided.

  Further, as shown in FIG. 16B, each resistance unit constituting the resistor RA3 may include a first resistance element RMRP and a second resistance element RNP having a temperature characteristic different from that of the RMRP. The resistance ratio between the resistance value of the resistance element RMRP and the resistance value of the resistance element RNP is set to the same ratio among the plurality of resistance units RU1 to RU4. In this way, it is possible to achieve both variable setting and variation adjustment of the resistance value of the resistor RA3 and stable temperature characteristics of the resistance value of the RA3.

6). Integrated Circuit Device Next, an example of an integrated circuit device to which the constant current generating circuit of this embodiment is applied will be described. FIG. 18 shows a configuration example when the integrated circuit device is an RF wireless communication IC. The integrated circuit device includes a reception circuit 30, a demodulation circuit 36, a transmission circuit 40, a modulation circuit 46, a clock generation circuit 48, a control circuit 50, and a constant current generation circuit 60.

  The receiving circuit 30 includes a low noise amplifier LNA, a mixer 32, and a filter unit 34. The low noise amplifier LNA performs processing for amplifying an RF reception signal input from the antenna ANT with low noise. The mixer 32 performs a down conversion by performing a mixing process of the amplified received signal and the local signal (local frequency signal) from the clock generation circuit 48. The filter unit 34 performs a filtering process on the received signal after the down conversion. Specifically, the filter unit 34 performs bandpass filter processing realized by a complex filter or the like, and extracts a baseband signal while performing image removal.

  The demodulation circuit 36 performs demodulation processing based on the signal from the reception circuit 30. For example, demodulation processing of a signal modulated by FSK (frequency shift keying) is performed on the transmission side, and the demodulated reception signal is output to the control circuit 50.

  The modulation circuit 46 performs modulation processing on the transmission signal from the control circuit 50. For example, the transmission signal is modulated by FSK, and the modulated transmission signal is output to the transmission circuit 40. Then, the transmission circuit 40 outputs the transmission signal amplified by the power amplifier PA to the antenna ANT.

  The clock generation circuit 48 includes a PLL circuit configured by a VCO (voltage controlled oscillator) or the like, and generates various clock signals, local signals to the mixer 32, and the like.

  The control circuit 50 (logic circuit) performs overall control of the integrated circuit device, digital processing in the baseband, and the like. The control circuit 50 includes, for example, a link layer circuit 52 and a host I / F (interface) 54, and executes link layer protocol processing, interface processing with an external host, and the like.

  The constant current generation circuit 60 is the constant current generation circuit according to the present embodiment described with reference to FIGS. 1 to 4 and the like. In contrast, a constant current is supplied. Each analog circuit performs various types of analog processing such as signal amplification processing, signal detection processing, or signal filtering processing, using the supplied constant current.

  In this way, each analog circuit can perform analog processing using the constant current having a stable temperature characteristic generated by the constant current generation circuit 60 of the present embodiment, so that the characteristics of the analog processing are improved. Can be planned. If the configuration of FIG. 4 is employed as the constant current generation circuit 60, for example, the number of current paths can be reduced, so that power consumption during standby can be minimized.

  Note that the integrated circuit device to which the constant current generation circuit of this embodiment is applied is not limited to the wireless communication IC as shown in FIG. 18, and can be applied to various types of integrated circuit devices. For example, the present invention can be applied to a detection device that detects a desired signal from a sensor signal from a sensor. Examples of such a detection device include a device that detects a physical quantity such as angular velocity information and acceleration information using a vibrator.

7). Electronic Device FIG. 19 shows a configuration example of an electronic device including the integrated circuit device 310 of this embodiment. The electronic device includes an antenna ANT, an integrated circuit device 310, a host 320, a detection device 330, a sensor 340, and a power supply unit 350. Note that the electronic apparatus according to the present embodiment is not limited to the configuration shown in FIG. Various modifications such as addition of) are possible.

  The integrated circuit device 310 is a wireless circuit device realized with a circuit configuration as shown in FIG. 18, and performs a signal reception process from the antenna ANT and a signal transmission process to the antenna ANT. The host 320 controls the entire electronic device, and controls the integrated circuit device 310 and the detection device 330. The detection device 330 performs various detection processes (physical quantity detection processes) based on sensor signals from the sensor 340 (physical quantity transducer). For example, processing for detecting a desired signal from the sensor signal is performed, and the digital data after A / D conversion is output to the host 320. The sensor 340 is, for example, a smoke sensor, an optical sensor, a human sensor, a pressure sensor, a biological sensor, a gyro sensor, or the like. The power supply unit 350 supplies power to the integrated circuit device 310, the host 320, the detection device 330, and the like.

  Although the present embodiment has been described in detail as described above, it will be easily understood by those skilled in the art that many modifications can be made without departing from the novel matters and effects of the present invention. Accordingly, all such modifications are intended to be included in the scope of the present invention. For example, in the specification or the drawings, it is described at least once together with different terms having a broader meaning or the same meaning (first differential input terminal, second differential input terminal, first power supply node, second power supply node, etc.). The terminology used (non-inverting input terminal, inverting input terminal, VSS node, VDD node, etc.) can be replaced with the different terminology anywhere in the specification or the drawings. The configurations and operations of the constant current generation circuit, the integrated circuit device, and the electronic device are not limited to those described in this embodiment, and various modifications can be made.

TA1, TA2 first and second transistors, TDR drive transistors,
RA1, RA2, RA3 First, second, third resistor, ISA current source,
DF differential section, QB output section, RMRP, RNP, RPP resistance element,
RU1-RU4 resistance unit,
30 receiving circuit, 32 mixer, 34 filter section,
36 demodulation circuit, 40 transmission circuit, 46 modulation circuit, 48 clock generation circuit,
50 control circuit, 52 link layer circuit, 54 host I / F, 60 constant current generation circuit,
310 integrated circuit device, 320 host, 330 detection device,
340 sensor, 350 power supply

Claims (11)

A first transistor and a second transistor having a different gate electrode conductivity from the first transistor are provided as a first differential transistor and a second differential transistor, and a first differential input is provided. A differential section having a terminal and a second differential input terminal;
An output unit including a first resistor to which a voltage corresponding to a work function difference voltage between the first transistor and the second transistor is applied; and a driving transistor provided in series with the first resistor. Including
The output unit is
The resistance value of the first resistor has a negative temperature characteristic;
Generating a constant current corresponding to the current flowing through the first resistor ;
A signal at a connection node between the driving transistor and the first resistor is fed back to the second differential input terminal,
The driving transistor is controlled by an output node of the differential unit,
The differential unit is
The work function difference voltage has a negative temperature characteristic;
The first differential input terminal is set to a first reference voltage;
A current source provided between the first transistor and the second transistor and a first power supply node;
A current mirror circuit provided between the first transistor and the second transistor and a second power supply node;
The current source is
A depletion type third transistor whose gate electrode is set to the second reference voltage;
A second resistor provided between the third transistor and the first power supply node;
The threshold voltage of the third transistor has a negative temperature characteristic,
The resistance value of the second resistor has a positive temperature characteristic,
The first resistor is a poly resistor formed by a polysilicon layer;
The second resistor is an N well resistor formed by an N well,
The constant current generating circuit, wherein the first resistor, which is the poly resistor, is laid out on the formation region of the second resistor, which is the N well resistor . In claim 1 ,
The first transistor and the third transistor are depletion type N-type transistors,
The constant current generation circuit, wherein the first reference voltage and the second reference voltage are voltages of the first power supply node. In claim 1 or 2 ,
The constant current generation circuit, wherein the first resistor includes a plurality of resistance elements having different temperature characteristics. In any one of Claims 1 thru | or 3 ,
The first resistor includes a plurality of resistance units connected in series,
Each resistance unit of the plurality of resistance units has a resistance element and a switch element connected in parallel,
A constant current generating circuit, wherein a resistance value of the first resistor is variably set by turning on / off a switch element of each resistor unit. In claim 4 ,
Each of the resistance units includes a first resistance element and a second resistance element having a temperature characteristic different from that of the first resistance element,
A constant current generation circuit, wherein a resistance ratio of a resistance value of the first resistance element and a resistance value of the second resistance element is set to the same ratio among the plurality of resistance units. In any one of Claims 1 thru | or 5 ,
Including a third resistor;
A constant current generating circuit, wherein a constant voltage is further generated by causing a current corresponding to a current flowing through the first resistor to flow through the third resistor. In claim 6 ,
The constant current generation circuit, wherein the third resistor includes a plurality of resistance elements having different temperature characteristics. In claim 6 or 7 ,
The third resistor includes a plurality of resistance units connected in series,
Each resistance unit of the plurality of resistance units has a resistance element and a switch element connected in parallel,
A constant current generation circuit, wherein the resistance value of the third resistor is variably set by turning on and off the switch element of each resistance unit, and the generated constant voltage is variably set. In claim 8 ,
Each of the resistance units includes a first resistance element and a second resistance element having a temperature characteristic different from that of the first resistance element,
A constant current generation circuit, wherein a resistance ratio of a resistance value of the first resistance element and a resistance value of the second resistance element is set to the same ratio among the plurality of resistance units. Integrated circuit device which comprises a constant current generating circuit according to any one of claims 1 to 9. An electronic apparatus comprising the integrated circuit device according to claim 10 .

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