JP5460005B2 - Liquid crystal display device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a liquid crystal display device in which signal lines are formed in a display area, and relates to a technique for eliminating light leakage that occurs due to the formation of signal lines.

  Since a liquid crystal display device is a flat display device having excellent characteristics such as thinness, light weight, and low power consumption, it is a mobile device such as a so-called PDA or a mobile phone, a display unit of a personal computer, and a liquid crystal television. It is used for a wide range of applications.

  The liquid crystal display device includes a liquid crystal display panel having a structure in which a liquid crystal layer is sandwiched between a pair of display panel substrates, that is, an array substrate and a counter substrate, and is selected for each pixel between the array substrate and the counter substrate. In addition, the liquid crystal layer is controlled by applying a voltage to display an image. Here, for example, in an active matrix liquid crystal display panel, thin film transistors (TFTs) are formed as switching elements using amorphous silicon or polysilicon semiconductor on an array substrate, and pixel electrodes and scanning lines connected to the switching elements. , Signal lines and the like are formed. On the other hand, a counter electrode made of indium tin oxide (ITO) or the like, a color filter, or the like is formed on the counter substrate.

  The liquid crystal display device having the above-described configuration has problems such as circuit delay and insufficient writing due to the integration of the drive circuit, and a reduction in resistance of wiring such as signal lines is required. Therefore, in general, the thickness of the wiring such as a signal line is increased, and thereby the resistance of the wiring is reduced. However, when the thickness of the wiring is increased, a wiring step is formed, which may cause various problems.

Therefore, a technique for eliminating a step due to wiring has been proposed (see, for example, Patent Document 1). In the invention described in Patent Document 1, wirings with partially different thicknesses are formed without increasing the number of processes using a gray-tone exposure technique, and wirings are formed at portions where electrical wirings such as scanning lines and signal lines intersect. The steps are reduced. In the invention described in Patent Document 1, by reducing the wiring step, the step coverage of the insulating film is improved, and defects such as a short circuit or disconnection between the wirings are reduced. Further, since the gate insulating film can be made thinner than before, the ON current of the thin film transistor increases.
JP 2002-190598 A

  By the way, in a liquid crystal display device, a flattening film, a pixel electrode (ITO), a liquid crystal alignment film, etc. are laminated on a signal line. If the signal line is made thicker for the purpose of reducing resistance, light leakage will occur. Has become a problem. When light leakage occurs, there arises a problem that the contrast of the liquid crystal display device is lowered. Such a problem of light leakage cannot be avoided by forming wirings partially different in thickness as described in Patent Document 1, and a new countermeasure is awaited.

  The present invention has been proposed in view of the above-described conventional situation, and provides a liquid crystal display device capable of suppressing light leakage caused by signal lines and improving contrast. With the goal.

In order to achieve the above-described object, the liquid crystal display device of the present invention has a liquid crystal layer sandwiched between an array substrate and a counter substrate, and switching elements are formed on the array substrate corresponding to each pixel. A liquid crystal display device in which a signal line connected to an element is formed, wherein the signal line is covered with a planarizing film in a pixel region, and a pixel electrode and an alignment film are further formed thereon. The inclination angle θ1 of the side wall along the length direction of the line is not less than 40 ° and not more than 75 °, and the relationship with the inclination angle θ2 of the side wall along the length direction of the signal line in the peripheral circuit region is θ1 <θ2. It is characterized by being in a relationship. In the present invention, the inclination angle θ2 is preferably less than 90 °.
In the method for manufacturing a liquid crystal display device of the present invention, a liquid crystal layer is sandwiched between an array substrate and a counter substrate, switching elements are formed on the array substrate corresponding to the respective pixels, and signals connected to these switching elements A method of manufacturing a liquid crystal display device in which lines are formed, wherein a pixel region of the signal line is covered with a planarizing film by adjusting exposure conditions for etching, and further a pixel electrode and an alignment thereon The inclination angle θ1 of the side wall along the length direction of the signal line on which the film is formed is set to 40 ° to 75 °, and the relationship with the inclination angle θ2 of the side wall along the length direction of the signal line in the peripheral circuit region Is characterized in that θ1 <θ2. In the present invention, the inclination angle θ2 is preferably less than 90 °.

  As a result of various studies conducted by the present inventors, it has been found that one of the causes of the light leakage is the influence of the reflected light reflected by the side wall of the signal line. For example, with the integration of the drive circuit, there are problems such as circuit delay and insufficient writing, and a reduction in the resistance of the signal line is required. In contrast, in general, the resistance is reduced by increasing the thickness of the signal line. In the signal line, the integration angle of the circuit increases the inclination angle of the side wall of the signal line (becomes perpendicular), and the signal line increases in thickness due to the low resistance. Reflected light at the end face (side wall) of the glass increases. This reflected light causes light leakage and reduces the contrast of the liquid crystal display device.

  Based on such knowledge, in the present invention, the inclination angle θ1 of the signal line side wall in the pixel region is reduced, and the inclination angle θ2 of the signal line side wall in the peripheral circuit region is increased. The light leakage becomes a problem in the pixel region. By reducing the inclination angle θ1 of the side wall of the signal line in this region, the reflected light on the side wall of the signal line is reduced and the light leakage is suppressed. On the other hand, in the peripheral circuit region, it is not necessary to consider light leakage. By increasing the inclination angle θ2 of the side wall of the signal line in this region, it becomes possible to proceed with circuit integration and reduce the area of the peripheral circuit. Is done.

  According to the present invention, light leakage due to signal lines can be eliminated in the pixel region, and the contrast of the liquid crystal display device can be improved. In the peripheral circuit region, the signal line thickness can be made sufficiently thick as necessary, and the inclination angle of the side wall of the signal line can be made nearly vertical so that the resistance is reduced and the integration is high. The area of the peripheral circuit can be reduced.

  Hereinafter, a liquid crystal display device to which the present invention is applied will be described in detail with reference to the drawings.

  First, a schematic configuration of the liquid crystal display device will be described. As shown in FIG. 1, the liquid crystal display device includes a liquid crystal display panel 1 including an array substrate 2 and a counter substrate 3, and a liquid crystal layer between the array substrate 2 and the counter substrate 3 is placed on the array substrate 2. An image is displayed by driving the formed thin film transistor (pixel transistor) as a switching element.

  Here, in the display region H that is a display unit, pixel electrodes are formed in a matrix corresponding to each pixel on the array substrate 2, and scanning lines are formed along the row direction of the pixel electrodes. A signal line is formed along the line. Further, the pixel transistor is formed at the intersection of each scanning line and signal line.

  On the other hand, in the peripheral area of the array substrate 2 (the frame area of the liquid crystal display panel 1), a signal line drive circuit 4 that supplies drive signals to the signal lines arrayed on the array substrate 2 and a drive signal is supplied to the scanning lines. A driving circuit such as the scanning line driving circuit 5 is formed. These drive circuits are composed of a plurality of thin film transistors and wirings connected to these thin film transistors.

  FIG. 2 shows an example of a schematic circuit structure of the liquid crystal display device. As described above, the liquid crystal display device includes the liquid crystal display panel 1, and further includes an external control circuit 11 that controls the liquid crystal display panel 1. The liquid crystal display panel 1 has a structure in which the liquid crystal layer LQ is held between a pair of display panel substrates, that is, the array substrate 2 and the counter substrate 3, and the external control circuit 11 is connected to the liquid crystal display panel 1 in this example. Arranged on a separate circuit board.

The array substrate 2 includes m × n pixel electrodes PE arranged in a matrix, m scanning lines Y (Y1 to Ym) formed along a row of the plurality of pixel electrodes PE, and each pixel electrode PE. Mxn composed of, for example, N-channel polysilicon thin-film transistors, which are arranged in the vicinity of intersections of n signal lines X (X1 to Xn), signal lines X1 to Xn, and scanning lines Y1 to Ym formed along the columns of Each pixel switch 12, an auxiliary capacitance line CS arranged in parallel to the scanning lines Y1 to Ym and capacitively coupled to the pixel electrodes PE in the corresponding rows, a scanning line driving circuit 5 for driving the scanning lines Y1 to Ym, and a signal line X1 ˜Xn, and a plurality of external connection pads OLB used for connection between the external control circuit 11 and the array substrate 2.

  The counter substrate 3 includes a single counter electrode CE that is arranged to face the m × n pixel electrodes PE and is set to the common potential Vcom. This common potential Vcom is also applied to the auxiliary capacitance line CS, for example.

The external control circuit 11 receives a digital video signal and a synchronization signal supplied from a processing circuit such as a mobile device, and generates a pixel display signal Vpix, a vertical scanning control signal YCT, and a horizontal scanning control signal XCT. The vertical scanning control signal YCT is supplied to the scanning line driving circuit 5 , and the horizontal scanning control signal XCT is supplied to the signal line driving circuit 4 together with the display signal Vpix. The scanning line driving circuit 5 is controlled by the vertical scanning control signal YCT so as to sequentially supply the scanning signal to the scanning lines Y1 to Ym every vertical scanning (frame) period. The signal line driving circuit 4 performs serial-parallel conversion on the digital video signal input in one horizontal scanning period (1H) driven by the scanning signal, and further converts the display signal Vpix converted from digital to analog into the signal lines X1 to X1 in analog form. It is controlled by a horizontal scanning control signal XCT so as to be supplied to Xn.

In this liquid crystal display device, the liquid crystal layer LQ is partitioned into m × n display pixels PX corresponding to the m × n pixel electrodes PE, and each display pixel PX includes two adjacent scanning lines Y and two. Between the two adjacent signal lines X. The display screen is constituted by these m × n display pixels PX. As shown in FIGS. 1 and 2, the scanning line driving circuit 5 and the signal line driving circuit 4 are arranged outside the m × n display pixels PX, and the plurality of external connection pads OLB are arranged on the periphery of the array substrate 2. Be placed. The signal line driving circuit 4 is disposed inside these external connection pads OLB. Each pixel switch 12 samples the display signal Vpix from the corresponding signal line X in response to the scanning signal from the corresponding scanning line Y and applies it to the corresponding pixel electrode PE, and the potential of the pixel electrode PE and the potential of the counter electrode CE. The light transmittance of the corresponding display pixel PX is controlled on the basis of the potential difference between them.

  In the liquid crystal display device having the above-described configuration, problems such as circuit delay and insufficient writing may occur with the integration of the drive circuit, and it is required to reduce the resistance of the signal lines X1 to Xn as much as possible. In order to reduce the resistance of the signal lines X1 to Xn, it is necessary to increase the film thickness of the signal lines X1 to Xn. However, if the film thickness of the signal lines X1 to Xn is increased, the backlight light is reflected by the side walls of the signal lines, and light leakage occurs.

  Therefore, in the liquid crystal display device of the present embodiment, the cross-sectional shape of the signal line in the pixel region is made to have a gradual inclination, thereby suppressing the reflection of the backlight light on the side wall and preventing the occurrence of light leakage.

  FIG. 3 shows a cross-sectional shape of the signal line 21 in the pixel region (a cross-sectional shape along the line aa in FIG. 2). The signal line 21 is formed on the array substrate 2 and is flattened by being covered with a flattening film 22, and further thereon, an ITO film 23 serving as the pixel electrode PE and a polyimide film 24 serving as an alignment film. Is formed. Here, the signal line 21 in the pixel region is formed so that the inclination angle θ1 of the side wall 21A becomes small, that is, the side wall 21A becomes a gentle inclined surface.

  FIG. 4A schematically shows the state of reflection of the backlight light when the inclination angle θ1 of the side wall 21A of the signal line 21 is increased (when the inclination of the side wall 21A is set to be nearly vertical). is there. On the other hand, FIG. 4B schematically shows the state of reflection of the backlight light when the inclination angle θ1 of the side wall 21A of the signal line 21 is reduced (when the inclination of the side wall 21A is made gentle). .

  When the inclination angle θ1 of the side wall 21A of the signal line 21 is large, as shown by the broken line arrow in FIG. 4A, the backlight light incident at a relatively near vertical angle is also reflected by the side wall 21A and is reflected by the side wall 21A. The amount of reflected light increases. On the other hand, when the inclination angle θ1 of the side wall 21A of the signal line 21 is small, as shown in FIG. 4B, only backlight light incident at a wide angle (an angle close to horizontal) is reflected by the side wall 21A. The amount of reflected light is small. Therefore, by reducing the inclination angle θ1 of the side wall 21A of the signal line 21, light leakage due to reflection on the side wall 21A can be suppressed.

  In the pixel region, since the degree of wiring integration is not so required, the inclination angle θ1 of the side wall 21A in the signal line 21 is preferably as small as possible from the viewpoint of reflection, and at least the side wall of the signal line in the peripheral circuit region. It is necessary to make it smaller than the inclination angle θ2. As a specific angle, the inclination angle θ1 of the side wall 21A is preferably 75 ° or less. By setting the inclination angle θ1 to 75 ° or less, light leakage due to reflection can be sufficiently suppressed.

  On the other hand, as shown in FIG. 5, with respect to the signal line 31 in the peripheral circuit region, it is preferable to increase the inclination angle θ2 of the side wall 31A of the signal line 31 as much as possible so that the degree of wiring integration can be improved. In order to improve the integration density of the wiring while reducing the resistance with the same film thickness, it is necessary to reduce the line width. However, if the inclination angle θ2 is reduced, the line width must be increased. As a specific angle, the inclination angle θ2 of the side wall 31A is preferably 90 ° or less.

  From the above, in the liquid crystal display device of the present embodiment, first, the inclination angle of the side wall of the signal line is different between the pixel region and the peripheral circuit region, and the inclination angle θ1 of the side wall 21A of the signal line 21 in the pixel region, The inclination angle θ2 of the side wall 31A of the signal line 31 in the peripheral circuit region needs to have a relationship of θ1 <θ2. In addition, the inclination angle θ1 of the side wall 21A of the signal line 21 in the pixel region is preferably 75 ° or less, and the inclination angle θ2 of the side wall 31A of the signal line 31 in the peripheral circuit region is 90 ° or less. Preferably there is.

  With such a setting, a decrease in contrast due to light leakage can be prevented in the pixel region, and an area in the peripheral circuit region can be reduced by circuit integration.

  Actually, a liquid crystal display device having a conventional structure (a liquid crystal display device in which the inclination angle θ1 of the side wall of the signal line in the pixel region is 85 °) and a liquid crystal display device in this embodiment (the inclination angle θ1 of the side wall of the signal line in the pixel region are When the contrast value was compared with a liquid crystal display device of 40 °), the contrast value was 680 in the liquid crystal display device of the conventional structure, whereas the contrast value was 750 in the liquid crystal display device of the present embodiment. In the liquid crystal display device of the embodiment, a significant improvement in contrast was observed. FIG. 6A shows a viewing angle of a liquid crystal display device having a conventional structure, and FIG. 6B shows a viewing angle of the liquid crystal display device of this embodiment. As is clear from comparison of these drawings, the liquid crystal display device of the conventional structure has a particularly narrow left-right viewing angle, whereas the liquid crystal display device of the present embodiment has also greatly improved the viewing angle.

  In order to set the inclination angle θ1 of the side wall 21A of the signal line 21 in the pixel region and the inclination angle θ2 of the side wall 31A of the signal line 31 in the peripheral circuit region as different inclination angles as described above, for example, the signal line 21, What is necessary is just to change the exposure conditions of the resist pattern formed when patterning 31 by an etching.

When the signal lines 21 and 31 are etched using the photolithography technique, a resist pattern is formed according to the wiring pattern, and etching is performed using this as a mask. At this time, for example, using a halftone mask, the exposure amount when forming a resist pattern corresponding to the signal line 21 in the pixel region and the exposure when forming a resist pattern corresponding to the signal line 31 in the peripheral circuit region. By changing the amount, the inclination angle of the side walls of the signal lines 21 and 31 to be etched can be changed. By increasing the exposure in case of forming a resist pattern, the inclination angle of the sidewall of the lines formed by etching grayed increases. Conversely, by reducing the exposure in case of forming a resist pattern, the inclination angle of the sidewall of the lines formed by etching grayed decreases.

  In the above-described embodiment, the inclination angle of the side wall is changed between the pixel region and the peripheral circuit region for the signal line, but the same setting can be made for other wirings, for example, gate lines. Even when the resistance of the wiring is lowered and the film thickness of the gate line is increased, light leakage may occur for the same reason as in the case of the signal line. In such a case, the inclination angle of the side wall of the gate line in the pixel region may be made smaller than the inclination angle of the side wall of the gate line in the peripheral circuit region.

It is a perspective view which shows schematic structure of a liquid crystal display panel. It is a circuit diagram which shows an example of the drive circuit of an array board | substrate. FIG. 3 shows a cross-sectional shape of a signal line in a pixel region, and is a schematic cross-sectional view taken along the line aa in FIG. 2. (A) is sectional drawing which shows typically the mode of reflection when the inclination angle of the side wall of a signal line is large, (b) is a schematic view of the state of reflection when the inclination angle of the side wall of a signal line is small. It is sectional drawing shown. It is typical sectional drawing which shows the cross-sectional shape of the signal wire | line of a peripheral circuit area | region. (A) is a figure which shows the viewing angle characteristic of the liquid crystal display device of the conventional structure (the liquid crystal display device whose inclination angle (theta) 1 of the side wall of the signal line | wire of a pixel area is 85 degrees), (b) is the liquid crystal of this embodiment. It is a figure which shows the viewing angle characteristic of a display apparatus (The liquid crystal display device whose inclination | tilt angle (theta) 1 of the side wall of the signal wire | line of a pixel area is 40 degrees).

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Liquid crystal display panel, 2 Array substrate, 3 Opposite substrate, 4 Signal line drive circuit, 5 Scan line drive circuit, 11 External control circuit, 12 Pixel switch, 21, 31 Signal line, 21A, 31A Side wall

Claims (4)

A liquid crystal display device in which a liquid crystal layer is sandwiched between an array substrate and a counter substrate, switching elements are formed corresponding to each pixel on the array substrate, and signal lines connected to these switching elements are formed. Among the signal lines, the inclination angle θ1 of the side wall along the length direction of the signal line that is covered with the planarizing film in the pixel region and further has the pixel electrode and the alignment film formed thereon is 40 ° or more. A liquid crystal display device, wherein the relationship is 75 ° or less and the relationship between the inclination angle θ2 of the side walls along the length direction of the signal line in the peripheral circuit region is θ1 <θ2. 2. The liquid crystal display device according to claim 1, wherein the tilt angle [theta] 2 is less than 90 [deg .]. Manufacture of a liquid crystal display device in which a liquid crystal layer is sandwiched between an array substrate and a counter substrate, switching elements are formed corresponding to each pixel on the array substrate, and signal lines connected to these switching elements are formed A method of adjusting the etching exposure condition to adjust the length of a signal line of the signal line that is covered with a planarizing film in a pixel region and further has a pixel electrode and an alignment film formed thereon. The inclination angle θ1 of the side wall along the direction is set to 40 ° or more and 75 ° or less, and the relationship with the inclination angle θ2 of the side wall along the length direction of the signal line in the peripheral circuit region is set to a relationship of θ1 <θ2. A method for manufacturing a liquid crystal display device. 4. The method of manufacturing a liquid crystal display device according to claim 3, wherein the tilt angle [theta] 2 is less than 90 [deg.].

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