JP5454342B2 - Memory management method of image processing apparatus, program, and image processing apparatus - Google Patents

Description

  The present invention relates to a memory management method, a program, and an image processing apparatus for an image processing apparatus.

  An image forming apparatus that performs image formation (printing) based on data input performs interpreter processing for generating bitmap image data from input data, such as analysis processing and rasterization processing. In the interpreter process, the data before and after the process is expanded in the memory.

Data that can be input to the image forming apparatus is not limited to image data, and various electronic document data such as a data file described in PS (PostScript), PDF (Portable Document Format), and XPS (XML Paper Specification) are used. be able to.
In recent years, the addition of new formats such as the above-mentioned XPS and version upgrades of PS and PDF have been carried out, and the capacity of data input to image forming apparatuses has increased accordingly. For this reason, the memory capacity required for the interpreter processing of the image forming apparatus is also increasing.

  As a method for increasing the memory capacity of the image forming apparatus, there is an increase in memory. However, the addition of the memory increases the cost of the image forming apparatus. On the other hand, due to intensifying price competition in the market of image forming apparatuses, image forming apparatuses are required to reduce costs. For this reason, a technique for efficiently utilizing the memory is required.

  As a technique for efficiently using a memory, there is a fragmentation elimination process (hereinafter simply referred to as a fragmentation elimination process) of a free area of a memory (for example, Patent Document 1, Patent Document 2, etc.). Defragmentation processing integrates free areas (fragmented free areas) created between multiple data stored in memory into large free areas, and stores new data in the large free areas It is a process that makes it possible.

JP-A-11-213107 JP 2002-116748 A

However, in the conventional fragmentation elimination processing such as Patent Document 1 and Patent Document 2, the free area of the memory is fragmented immediately after the free areas are integrated.
FIGS. 25A and 25B show an example of fragmentation of free space that occurs after fragmentation elimination processing according to the prior art. FIG. 25A shows an example of the state of the memory immediately after the fragmentation elimination process, and FIG. 25B shows an example of fragmentation of the free area of the memory that occurs after the fragmentation elimination process.
As shown in FIG. 25A, the storage area of the memory having the free area E1 integrated by the fragmentation elimination processing is a storage area of the memory storing a plurality of data (for example, the storage of FIG. 25A). There are regions D1, D2). Thereafter, since the used data is deleted, empty areas E2 and E3 are generated in the storage areas D1 and D2, as shown in FIG.
Although not shown, new data generated thereafter is stored in the empty areas E2 and E3, but the capacity of the new data does not necessarily match the empty capacity of the empty areas E2 and E3. For this reason, some of the empty areas E2 and E3 may remain as fragmented empty areas.
As described above, after the fragmentation process is canceled, fragmentation of the free area of the memory occurs again immediately.

  An object of the present invention is to suppress fragmentation of a free area of a memory.

According to a first aspect of the present invention, there is provided a memory management method for an image processing apparatus, comprising: a step of storing data in a memory; and a control unit that manages a deletion order of data stored in the memory, the data stored in the memory possess a step of rearranging, based on the deletion order of the data, and wherein, when sorting the data is first deleted when performing defragmentation process The data is arranged in a storage area continuous with the free area of the memory .

According to a second aspect of the present invention, there is provided a memory management method for an image processing apparatus , wherein the memory stores data, the control unit manages the deletion order of the data stored in the memory, and new data is stored in the memory. Reordering the data stored in the memory every time the data is stored in the memory based on the deletion order of the data, and when the control unit rearranges the data, It is arranged in a storage area that is continuous with an empty area of the memory.

The invention of claim 3 is a memory management method for an image processing apparatus according to claim 1 or 2, wherein, when sorting the data, the data according to deletion order ordinal of the data It arrange | positions in a continuous storage area, It is characterized by the above-mentioned.

  The invention according to claim 4 is the memory management method for the image processing apparatus according to any one of claims 1 to 3, wherein the control unit individually deletes data according to the type of the data. When the order is managed and the data is rearranged, the data is rearranged for each type of data based on the deletion order of the individually managed data.

  A fifth aspect of the present invention is the memory management method for an image processing apparatus according to any one of the first to fourth aspects, wherein the data includes data managed in units of fixed length blocks. It is characterized by.

  A sixth aspect of the present invention is the memory management method for an image processing apparatus according to any one of the first to fifth aspects, wherein the data includes data managed in units of variable-length blocks. It is characterized by.

According to a seventh aspect of the present invention, there is provided a program according to a seventh aspect of the present invention, comprising: storing a data in a memory of the computer; managing a deletion order of the data stored in the memory; Means for rearranging the data stored in the memory based on the deletion order of the data, and arranging the data to be deleted first in a storage area continuous with the free area of the memory when the data is rearranged It is characterized by functioning as.

According to an eighth aspect of the present invention, there is provided a program for managing a computer, means for storing data in a memory of the computer, a deletion order of data stored in the memory, and each time new data is stored in the memory. The data stored in the memory is rearranged based on the deletion order of the data, and when the data is rearranged, the first deleted data is arranged in a storage area continuous with the free area of the memory , It is made to function .

The invention of claim 9 is a program according to claim 7 or 8, when sorting the data, and wherein the placing the data in a contiguous storage area according deletion order ordinal of the data To do.

The invention according to claim 10 is the program according to any one of claims 7 to 9 , wherein the deletion order of data is individually managed according to the type of the data, and the data is rearranged. The data is rearranged for each type of data based on the deletion order of individually managed data.

The invention according to claim 11 is the program according to any one of claims 7 to 10 , wherein the data includes data managed in units of a fixed-length block.

A twelfth aspect of the present invention is the program according to any one of the seventh to eleventh aspects, wherein the data includes data managed in units of variable length blocks.

An image processing apparatus according to a thirteenth aspect of the present invention manages a memory for storing data and a deletion order of the data stored in the memory, and performs the fragmentation elimination processing of the free area of the memory. A control unit that rearranges the data stored in the data based on the deletion order of the data, and the control unit continues the data to be deleted first with an empty area of the memory when the data is rearranged It is arranged in a storage area .
An image processing apparatus according to a fourteenth aspect of the present invention manages a memory for storing data and a deletion order of the data stored in the memory, and stores new data in the memory each time it is stored in the memory. A control unit that rearranges the data that has been deleted based on the deletion order of the data, and the control unit, when rearranging the data, stores the data that is deleted first and the free space of the memory It arrange | positions at the feature.
A fifteenth aspect of the invention is the image processing device according to the thirteenth or fourteenth aspect, wherein the control unit rearranges the data in a continuous storage area according to the deletion order of the data. It is characterized by arranging.
The invention according to claim 16 is the image processing apparatus according to any one of claims 13 to 15, wherein the control unit manages the deletion order of the data individually according to the type of the data. When the data is rearranged, the data is rearranged for each type of the data based on the deletion order of the individually managed data.
The invention according to claim 17 is the image processing apparatus according to any one of claims 13 to 16, wherein the data includes data managed in units of a fixed-length block. .
The invention according to claim 18 is the image processing apparatus according to any one of claims 13 to 17, wherein the data includes data managed in units of variable length blocks. .

  According to the present invention, fragmentation of an empty area of a memory can be suppressed.

1 is a block diagram of an image forming apparatus 1. FIG. 2 is a diagram showing an outline of image processing performed in the image forming apparatus 1. FIG. 3 is an image diagram showing an example of storage contents of a RAM 12. FIG. It is a figure explaining the flow of the data management by a memory management table. FIG. 4A is a diagram illustrating an example of data that can be divided into fixed-length blocks. FIG. 4B is a diagram illustrating an example of a correspondence between a label indicating data before division, a retention period of the data, a component of the data, a storage position of the component, a data storage range, and a scan completion position. . FIG. 4C is a diagram illustrating an example in which associated registration data is registered in the memory management table. It is a figure explaining the flow of the data management by a memory management table. FIG. 5A is a diagram illustrating an example in which data “having the retention period is FB” is registered above the data “having the retention period is DL” already registered on the memory management table. FIG. 5B shows that when two “holding period is FB” data is registered above the “holding period is DL” data, the “holding period is DL” data is further added above the “holding period is DL” data. It is a figure which shows not adding the data whose "holding period is FB". FIG. 5C is a diagram illustrating an example in which registration data is deleted from the memory management table. An outline of the fragmentation elimination processing for the DL / FB storage area is shown. It is the image figure which showed the storage area of RAM12 in a fragmentation elimination process. FIG. 7A shows a storage area of the RAM 12 before the fragmentation elimination process. FIG. 7B is a diagram illustrating an example of a result of the storage range calculation process. FIG. 7C is a diagram illustrating an example of a set of memory blocks. It is the image figure which showed the storage area of RAM12 in a fragmentation elimination process. FIG. 8A is a diagram illustrating processing for handling the divided data N1 as replacement target data. FIG. 8B is a diagram illustrating a data storage range of the divided data of the replacement target data BI. FIG. 8C illustrates an example of a set of memory blocks different from the memory blocks illustrated in FIG. It is the image figure which showed the storage area of RAM12 in a fragmentation elimination process. FIG. 9A is a diagram illustrating a process of replacing the divided data N2 with the replacement target data N1. FIG. 9B shows deletion of DL and FB divided data existing at an address before data to be deleted first, among DL and FB stored in the DL / FB storage area after repeated processing. FIG. It is the image figure which showed the storage area of RAM12 in a fragmentation elimination process. FIG. 10A is a diagram illustrating a position change image of the compressed data and the free area accompanying the shift of the compressed data. FIG. 10B is a diagram illustrating a shift completion state of the compressed data. FIG. 10C is a diagram illustrating a position change image of the compressed data accompanying the rearrangement of the compressed data to be deleted last. FIG. 10D is a diagram illustrating a relocation completion state of the compressed data to be deleted last. It is the image figure which showed the storage area of RAM12 in a fragmentation elimination process. FIG. 11A is a diagram showing a position change image of the compressed data and the free area accompanying the shift of the compressed data after the rearrangement of the compressed data to be deleted last is completed. FIG. 11B is a diagram illustrating a state where the compressed data shift is completed after the rearrangement of the compressed data to be deleted last is completed. FIG. 11C is a diagram illustrating a position change image of the compressed data accompanying the rearrangement of the compressed data to be deleted second from the end. FIG. 10D is a diagram illustrating a relocation completion state of the compressed data to be deleted second from the end. It is a figure which shows the memory area of RAM12 after completion | finish of a fragmentation elimination process. It is a figure which shows an example of the data deletion in RAM12 after a fragmentation elimination process. It is a flowchart which shows the outline of the process from receiving data to performing printing. It is a flowchart which shows the flow of the analysis process shown to step S2 of FIG. It is a flowchart which shows the flow of the rasterization process shown to step S3 of FIG. It is a flowchart which shows the flow of the compression process shown to FIG.14 S4. It is a flowchart which shows the flow of RAM open | release process shown to step S22 of FIG. 16, and step S34 of FIG. It is a flowchart which shows the flow of the fragmentation elimination process shown to step S33 of FIG. FIG. 20 is a flowchart showing a flow of DL / FB storage area fragmentation elimination processing shown in step S51 of FIG. 19. FIG. 20 is a flowchart showing a flow of compressed data storage area fragmentation elimination processing shown in step S52 of FIG. It is a flowchart which shows the flow of the memory | storage range calculation process shown to FIG.20 S61 and FIG.21 S71. FIG. 21 is a flowchart showing a flow of DL / FB position rearrangement processing shown in step S62 of FIG. 20. FIG. It is a flowchart which shows the flow of the compression data position rearrangement process shown to step S72 of FIG. It is explanatory drawing which shows an example of the fragmentation of the empty area which arises after the fragmentation elimination process by a prior art. FIG. 25A is a diagram illustrating an example of the state of the memory immediately after the fragmentation elimination processing. FIG. 25B is a diagram illustrating an example of fragmentation of an empty area of a memory that has occurred after the fragmentation elimination processing.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the drawings.
Examples of the image processing apparatus according to the present invention include, but are not limited to, an image processing apparatus mounted on an image forming apparatus such as a printer, a copying machine, a facsimile machine, or a multifunction machine thereof.

FIG. 1 shows a block diagram of the image forming apparatus 1.
The image forming apparatus 1 includes a CPU 11, a RAM 12, a ROM 13, a storage unit 14, an interface 15, an image forming unit 16, and an ASIC (Application Specific Integrated Circuit) 17, and these components are connected by a bus 18.

The CPU 11 cooperates with the program stored in the ROM 13 and controls the operation of the image forming apparatus 1 according to the program, data, and the like developed in the RAM 12.
The RAM 12 stores data expanded by the processing of the CPU 11, data temporarily generated by the processing, and the like.
The ROM 13 stores programs and data read by the CPU 11.

  The storage unit 14 stores programs and data read by the CPU 11. The storage unit 14 is a storage device that can rewrite programs, data, and the like. The storage unit 14 is configured by, for example, a flash memory, a hard disk drive, another rewritable storage device, or a combination of these storage devices.

  The interface 15 connects an external device and enables data transmission with the external device. Connection of external devices and data transmission via the interface 15 are not limited to wired / wireless, and regardless of conditions (for example, standards) relating to the protocol and other connection formats. In the present embodiment, the interface 15 includes a communication device such as a network interface card (NIC), and receives data from the external input device 3 through the line 2.

The image forming unit 16 performs image formation (printing) based on data input via the interface 15.
Examples of printing methods that can be employed in the image forming unit 16 include an electrophotographic method, an inkjet method, a thermal transfer method, and an offset. In the present embodiment, the image forming unit 16 has a configuration for performing image formation by an electrophotographic method.
The ASIC 17 is a circuit for performing a compression process to be described later.

FIG. 2 shows an outline of image processing performed in the image forming apparatus 1.
The data received by the interface 15 includes a page description language (hereinafter referred to as “PDL”).
The CPU 11 functions as the analysis unit 21 and the rasterizing unit 22 in cooperation with the program stored in the ROM 13 and performs image processing in cooperation with the ASIC 17.

  The analysis unit 21 performs an analysis process on the PDL and generates a display list (hereinafter, DL: Display List) that is intermediate language data. DL is generated in units of pages. The DL is stored in the RAM 12.

  The rasterizing unit 22 performs a rasterizing process on the DL to generate bitmap data. Bitmap data is generated in units of bands obtained by dividing one page into a plurality of bands. Bit-map bitmap data is stored in the RAM 12 as a frame buffer (hereinafter referred to as FB).

The ASIC 17 performs compression processing on the FB to generate compressed data. The compressed data is stored in the RAM 12.
After completing the generation of compressed data corresponding to one page of bitmap data, the image forming unit 16 reads the compressed data and prints it.

FIG. 3 shows an example of the contents stored in the RAM 12.
As shown in FIG. 3, the RAM 12 can store DL, FB, and compressed data. In the present embodiment, among the data stored in the RAM 12, the DL and FB can be managed by dividing one data into a plurality of fixed-length blocks. In FIG. 3, as an example, divided data obtained by dividing a part of DL1 into blocks of a fixed length is illustrated. The compressed data is not handled as data that can be divided into fixed-length blocks, and one piece of data is stored in a continuous storage area.
In this embodiment, the compressed data is stored closer to the start address side of the storage area of the RAM 12, and DL and FB are stored closer to the end address side of the storage area of the RAM 12. Hereinafter, the storage area of the RAM 12 on which compressed data is stored is referred to as a compressed data storage area, and the storage area of the RAM 12 in which DL and FB are stored is referred to as a DL / FB storage area.

The CPU 11 manages various data stored in the RAM 12 in cooperation with a program stored in the ROM 13.
The CPU 11 generates a memory management table and manages DL, FB, and compressed data stored in the RAM 12.
Hereinafter, the flow of data management by the memory management table will be described with reference to FIGS. 4 (A) to (C) and FIGS. 5 (A) to (C).

As shown in FIG. 4A, the CPU 11 divides data that can be divided into fixed-length blocks, and generates divided data.
As shown in FIGS. 4B and 4C, the CPU 11 displays a label indicating data before division, a retention period of the data, a component of the data, a storage position of the component, a data storage range, and a scan completion position. Are registered in the memory management table.

The label indicating the data before division is information indicating the data before division of the divided data. As an example, in FIGS. 4B and 4C and FIGS. 5A to 5C, one letter alphabet such as “A”, “B”, and “C” is shown.
The data retention period is information indicating a period during which data corresponding to a label indicating data before division is retained on the RAM 12. In the present embodiment, DL, FB, and compressed data each have a predetermined retention period, and the retention period can be distinguished by the type of data. As an example, in FIGS. 4B and 4C and FIGS. 5A to 5C, the retention period is indicated by the file type such as “DL” and “FB”.
The data component is information indicating divided data constituting data corresponding to a label indicating data before division. In the example of FIG. 4A, the FB having the label “A” is configured by the divided data divided into fixed-length blocks “A1”, “A2”, and “A3”. ), “A1, A2, A3” are registered as components of the FB having the label “A”.
The storage position of the component is information indicating a memory address on the RAM 12 in which each divided data is stored.

  The data storage range is information indicating a range of memory addresses in which each divided data is stored. The scanning completion position indicates the end address of the data storage range located last on the memory address in the data storage range.

In the memory management tables illustrated in FIGS. 4C and 5A to 5C, the data registered on the upper side ends the holding period earlier, and the data corresponding to the registered data is stored in the RAM 12. Deleted from.
As shown in FIG. 5A, in the present embodiment, the data “retention period is FB” on the memory management table is already stored in the memory management table “retention period is DL”. It is registered above the data. However, as shown in FIG. 5B, in the present embodiment, when two “holding period is FB” data is registered above the “holding period is DL” data in the memory management table, The data whose “retention period is FB” is not further added above the data whose “retention period is DL”.
The DL and FB registration order rules shown in FIGS. 5A and 5B are examples used in this embodiment, and other rules may be used.

  Data stored in the RAM 12 (for example, DL / FB, etc.) that are managed by the memory management table are deleted from the RAM 12 when the respective holding periods end. Based on the retention period of each data registered in the memory management table, the CPU 11 deletes data that has reached the end of the retention period from the data stored in the RAM 12. The registration data on the memory management table corresponding to the data deleted from the RAM 12 is deleted from the memory management table as shown in FIG.

  In FIGS. 4A to 4C, FIGS. 5A to 5C, and the description thereof, the DL and FB memory management tables are described, but compressed data is also managed in the same manner. The DL and FB memory management tables and the compressed data memory management tables are generated and managed separately. For compressed data, there is no rearrangement rule in the registration order as shown in FIGS. 5A and 5B and the description thereof.

Next, the fragmentation elimination processing of the RAM 12 in this embodiment will be described.
The CPU 11 rearranges the DL, FB, and compressed data of the RAM 12 whose free capacity is fragmented, and integrates the free area of the RAM 12 into one continuous storage area.
FIG. 6 shows an outline of the fragmentation elimination processing for the DL / FB storage area.
As described above, the DL / FB stored in the RAM 12 is stored near the end address side of the storage area of the RAM 12, but in some cases, an empty area (for example, the empty area E shown in FIG. May occur.

Prior to the fragmentation elimination process, the CPU 11 performs a storage range calculation process. The storage range calculation process is a process of calculating a storage area range (storage range) of the RAM 12 necessary when each data managed by the memory management table is stored in a continuous storage area. For example, when the storage range calculation process is performed for the DL / FB storage area M1 including the free area E shown in FIG. 6, the continuous storage range M2 is calculated from the end address side of the storage area of the RAM 12 without including the free area E. Is done.
Similarly, when the storage range calculation process is performed for the compressed data storage area, a continuous storage range is calculated from the top address side of the storage area of the RAM 12 without including an empty area.

Then, the CPU 11 performs position rearrangement processing. The position rearrangement process is a process of rearranging each piece of data managed by the memory management table based on the data deletion order. In the present embodiment, the CPU 11 arranges each piece of data managed by each memory management table in a continuous storage area according to the data deletion order.
For example, when the DL and FB stored in the DL / FB storage area M1 shown in FIG. 6 are rearranged, each DL and FB is stored in a continuous storage area as shown in the storage area M3 after the rearrangement. The In the case of the example shown in FIG. 6, in the DL and FB memory management tables (hereinafter referred to as “DL / FB memory management table”), registration is performed in which the data retention period ends in the order of FB1, DL1, and DL2. Therefore, the data stored in the rearranged storage area M3 is arranged in the order of FB1, DL1, and DL2.

In performing the position rearrangement process, the CPU 11 arranges data to be deleted first in a storage area that is continuous with the free area of the RAM 12 after the fragmentation elimination process is completed. For example, in the example shown in FIG. 6, FB1 is data that is deleted first. FB1 is arranged in a storage area continuous with the empty area F of the RAM 12 after the position rearrangement process is completed.
Although FIG. 6 illustrates the DL / FB storage area M1, the position rearrangement process is performed on the compressed data storage area based on the same rule.

A detailed flow of the fragmentation elimination processing will be described with reference to FIGS. 7 to 12 are image diagrams showing the storage area of the RAM 12 in chronological order. 7 to 13, the DL, FB, and compressed data are shown by masking, and the empty area is shown by white. The compressed data is indicated by masking that is deeper than DL and FB.
When the fragmentation elimination process is performed on the RAM 12 illustrated in FIG. 7A, first, the CPU 11 performs a storage range calculation process as illustrated in FIG. 7B. The CPU 11 calculates the storage capacity of each data managed by each memory management table, and integrates the calculated storage capacity of the data for each memory management table. Here, the integration result calculated based on the DL / FB memory management table is used as the DL / FB storage range calculation result, and is calculated based on the compressed data memory management table (hereinafter referred to as “compressed data memory management table”). The obtained integration result is set as a compressed data storage range calculation result.
In FIG. 7B, the storage ranges calculated for each of the DL / FB storage area and the compressed data storage area are described with one figure, but it is not always necessary to calculate them simultaneously. For example, the storage range calculation process for the compressed data storage area may be performed after the storage range calculation process for the DL / FB storage area is completed, or vice versa. The storage range calculation processing of the DL / FB storage area and the compressed data storage area may be performed simultaneously.

Next, the CPU 11 performs DL / FB position rearrangement processing. The DL / FB position rearrangement process is a position rearrangement process for each data stored in the DL / FB storage area.
In the DL / FB position rearrangement process, as shown in FIG. 7C, the CPU 11 is a storage area included in the data storage range of data registered in the DL / FB memory management table and has a predetermined block length. Is set as a processing target.
Next, the CPU 11 performs a scanning process for determining whether or not divided data that needs to be rearranged is included in the set memory block. The divided data that needs to be rearranged is stored at that position when DL / FB is rearranged in the deletion order of each data based on the deletion order of DL / FB registered in the DL / FB memory management table. This is divided data that must not be handled.

As shown by “N1” in FIG. 8A, when the set memory block includes divided data that needs to be rearranged, the CPU 11 processes the divided data as replacement target data. I do. Data designated as replacement target data is stored in a predetermined work buffer. As the work buffer, a free area of the RAM 12, a storage area of the storage unit 14, and other dedicated storage devices can be used.
As shown in FIG. 8B, the CPU 11 acquires the data storage range of the divided data set as the replacement target data from the DL / FB memory management table. Then, as shown in FIG. 8C, the CPU 11 converts the DL / FB to each data based on the DL / FB deletion order registered in the DL / FB memory management table based on the acquired data storage range. A storage area of the RAM 12 that can store replacement target data when rearranged in the deletion order is determined and set as another memory block.
As illustrated in FIG. 9A, the CPU 11 performs a scanning process to extract divided data (“N2” illustrated in FIG. 9A) that needs to be rearranged in the other memory block, A process of replacing the replacement target data stored in the work buffer is performed. Then, the CPU 11 sets the extracted divided data as new replacement target data.

The CPU 11 repeats the above-described processing for designating replacement target data generated by the above-described memory block setting, scanning process, rearrangement, and rearrangement for new replacement target data. When these processes are repeated, there is no divided data that needs to be rearranged in a memory block that is finally set as another memory block.
Along with this repeated processing, the CPU 11 sets and updates the scan completion position and manages it. The scanning completion position is data for managing up to which memory block it is confirmed by scanning processing that “there is no divided data that needs to be rearranged in the memory block”. When there is no more divided data that needs to be rearranged, the scan completion position is “no divided data that needs to be rearranged in the memory block” for all areas in the DL / FB storage range. The state shown is (all storage area scan complete). When the entire storage area scan is completed, the CPU 11 exits the repetitive processing.
After exiting the repetitive processing, as shown in FIG. 9B, the CPU 11 addresses the data before the first deleted data out of the DL and FB stored in the DL / FB storage area after the repetitive processing. The remaining space of the divided data of DL and FB existing in the memory is deleted to secure a free space in the RAM 12. The DL / FB position rearrangement process is thus completed.

After completing the DL / FB position rearrangement process, the CPU 11 performs a compressed data position rearrangement process.
As shown in FIGS. 10A and 10B, the CPU 11 shifts the compressed data to a storage area continuous with DL and FB, and integrates the free area of the RAM 12 closer to the start address of the storage area.
Next, as shown in FIGS. 10C and 10D, the CPU 11 stores the compressed data to be deleted last in the RAM 12 based on the deletion order of the compressed data managed by the compressed data memory management table. Relocate to a continuous storage area from the start address of the free area.
After that, as shown in FIGS. 11A and 11B, compressed data other than the compressed data that has been rearranged, the compressed data that is located closer to the head address than the free space generated by the rearranged data Are shifted so as to fill the empty area caused by the rearranged data. As a result, the free area generated by the rearranged data is integrated with other free areas.

  Next, as shown in FIGS. 11C and 11D, the CPU 11 performs the second deletion from the last (see FIG. 11) based on the deletion order of the compression data managed by the compression data memory management table. 11 (C) and 11 (D) are rearranged in a storage area continuous with the storage area in which the compressed data to be deleted last is stored. Thereafter, the CPU 11 integrates the empty areas in the same manner as the processes shown in FIGS. 11A and 11B and the description thereof. Thereafter, the CPU 11 repeats the rearrangement and the integration of the empty areas until the rearrangement of the compressed data to be deleted first is completed. As shown in FIG. 12, when the rearrangement of the compressed data to be deleted first is completed and the compressed data to be deleted first is arranged in a storage area that is continuous with the free area of the RAM 12 after completion of the fragmentation elimination processing. The compressed data position rearrangement process is completed. Upon completion of the storage range calculation process, DL / FB position rearrangement process, and compressed data position rearrangement process, the CPU 11 ends the fragmentation elimination process.

FIG. 13 shows an example of data deletion in the RAM 12 after the fragmentation elimination processing.
As shown in FIG. 13, when the DL or FB to be deleted first or the compressed data to be deleted first is deleted from the RAM 12 after the fragmentation elimination processing, the compressed data storage area and the DL / FB storage area A free storage area that is continuous with the free space interposed between the two is released, so that one free space that is not fragmented is formed.
Furthermore, the DL or FB that is deleted thereafter is located in a storage area that is continuous with the empty area generated by the DL or FB deleted immediately before. Similarly, the compressed data to be deleted is located in a storage area that is continuous with the empty area generated by the compressed data deleted immediately before. As described above, the empty area generated by deleting each data subjected to the position rearrangement process does not cause fragmentation, and forms a continuous empty area.

Hereinafter, the processing flow of the image forming apparatus 1 will be described with reference to FIGS. 14 to 24.
FIG. 14 shows an outline of processing from data reception to printing.
When the image forming apparatus 1 receives the data (step S1), the image forming apparatus 1 performs printing through the analysis process (step S2), the rasterization process (step S3), and the compression process (step S4) (step S5).
After the process of step S5, the CPU 11 determines whether or not printing of all pages has been completed (step S6). When printing of all pages has not been completed (step S6: NO), the image forming apparatus 1 performs the processes of steps S2 to S5 again. When printing of all pages is completed (step S6: YES), the image forming apparatus 1 ends the process.

FIG. 15 shows the flow of the analysis process shown in step S2 of FIG.
The analysis unit 21 analyzes the PDL and generates a DL (step S11). Further, the analysis unit 21 determines whether or not analysis processing has been completed for all PDLs (step S12). If the analysis process has not been completed for all PDLs (step S12: NO), the process returns to step S11. When the analysis process is completed for all PDLs (step S12: YES), the process is exited.

FIG. 16 shows the flow of the rasterizing process shown in step S3 of FIG.
The rasterizing unit 22 performs a rasterizing process on the DL to generate an FB (step S21). The rasterizing unit 22 performs a RAM release process (step S22).
After the processing in steps S21 and S22, the rasterizing unit 22 determines whether or not the rasterizing processing has been completed for all DLs (step S23). If the rasterizing process has not been completed for all DLs (step S23: NO), the process returns to step S21. When the rasterizing process is completed for all the DLs (step S23: YES), the process is exited.

FIG. 17 shows the flow of the compression process shown in step S4 of FIG.
The ASIC 17 generates the compressed data by compressing the FB (step S31). Further, the CPU 11 determines whether or not the storage capacity of the RAM 12 is insufficient (memory shortage) as the FB generated in step S31 is stored in the RAM 12 (step S32). When the memory shortage occurs (step S32: YES), the CPU 11 performs a fragmentation elimination process (step S33).
After the process of step S33 or when no memory shortage has occurred in step S32 (step S32: NO), the CPU 11 performs a RAM release process (step S34).
After the process of step S33 or step S34, the CPU 11 determines whether or not the compression process has been completed for all the FBs (step S35). If the compression process has not been completed for all the FBs (step S35: NO), the process returns to step S31. When the compression process is completed for all the FBs (step S35: YES), the process is exited.

  In the flow of FIG. 15 to FIG. 17 and the description thereof, it is described that each processing is omitted when the processing for all PDL, DL, and FB is completed, but the analysis processing, rasterization processing, and compression processing can be performed in parallel. it can. That is, the rasterizing unit 22 can sequentially generate FBs from the generated DL. Further, the ASIC 17 can sequentially generate compressed data from the generated FB. The image forming unit 16 can print the page as soon as the compressed data for one page is available.

FIG. 18 shows the flow of the RAM release processing shown in step S22 of FIG. 16 and step S34 of FIG.
The CPU 11 determines whether there is data whose retention period has ended on the memory management table (step S41). If there is data whose retention period has ended on the memory management table (step S41: YES), the CPU 11 The completed data is deleted (step S42). After the process of step S42 or when there is no data whose retention period has ended on the memory management table in step S41 (step S41: NO), the process is exited.

  The RAM release process shown in step S22 of FIG. 16 and the RAM release process shown in step S34 of FIG. In the RAM release process shown in step S22 of FIG. 16, data deletion of the DL / FB storage area is performed, and in the RAM release process shown in step S34 of FIG. 17, data deletion of the compressed data storage area is executed.

FIG. 19 shows the flow of the fragmentation elimination process shown in step S33 of FIG.
The CPU 11 sequentially performs a DL / FB storage area fragmentation elimination process (step S51) and a compressed data storage area fragmentation elimination process (step S52).

FIG. 20 shows the flow of the DL / FB storage area fragmentation elimination processing shown in step S51 of FIG.
The CPU 11 sequentially performs a storage range calculation process (step S61) and a DL / FB position rearrangement process (step S62).
FIG. 21 shows the flow of the compressed data storage area fragmentation elimination process shown in step S52 of FIG.
The CPU 11 sequentially performs a storage range calculation process (step S71) and a compressed data position rearrangement process (step S72).

FIG. 22 shows the flow of the storage range calculation process shown in step S61 of FIG. 20 and step S71 of FIG.
The CPU 11 calculates the storage capacity of the data registered in the memory management table (step S81). The CPU 11 repeats the process of step S81 until the storage capacity of all data registered in the memory management table is calculated (step S82: NO). When the storage capacities of all data registered in the memory management table are calculated (step S82: YES), the calculated storage capacities are integrated to calculate a storage range (step S83).
In the storage range calculation process shown in step S61 of FIG. 20, the storage range calculation process is performed based on the DL / FB memory management table. In the storage range calculation process shown in step S71 of FIG. 21, the storage range calculation process is performed based on the compressed data memory management table.

FIG. 23 shows the flow of the DL / FB position rearrangement process shown in step S62 of FIG.
The CPU 11 sets a memory block, which is a storage area included in the data storage range of data registered in the DL / FB memory management table and has a predetermined block length, as a processing target. (Step S91). Next, the CPU 11 performs a scanning process, and determines whether or not divided data that needs to be rearranged is included in the set memory block (step S92). When the set memory block does not include divided data that needs to be rearranged (step S92: NO), the CPU 11 includes divided data that needs to be rearranged according to the determination in step S92. The scan completion position is updated according to the memory block that is found not to exist (step S93).

  If the set memory block includes divided data that needs to be rearranged (step S92: YES), the CPU 11 determines whether there is already replacement target data in the work buffer (step S94). . When there is no replacement target data in the work buffer (step S94: NO), the divided data determined to need to be rearranged in step S92 is designated as replacement target data (step S95). Then, the CPU 11 stores a storage area of the RAM 12 in which the replacement target data can be stored when the DL / FB is rearranged in the order of deletion of each data based on the data storage range of the divided data set as the replacement target data. Set as another memory block (step S96).

  After the process of step S96, the CPU 11 determines whether or not the scanning process has been completed for the set memory block after the setting (step S97). If the scanning process has not been completed (step S97: NO), the process returns to step S92.

  If it is determined in step S94 that there is already replacement target data in the work buffer (step S94: YES), the CPU 11 determines that the replacement target data is the divided data determined as the divided data that needs to be rearranged in step S92. Replace (step S98). Thereafter, the CPU 11 performs the process of step S96.

  CPU11 performs determination of step S97 also after the process of step S93. If it is determined in step S97 that the scan processing for the set memory block has been completed (step S97: YES), the CPU 11 determines whether or not the scan completion position indicates completion of scanning of all storage areas (step S99). . If the scan completion position does not indicate that the entire storage area scan is complete (step S99: NO), the CPU 11 sets another memory block that has not completed the scanning process based on the scan completion position (step S100), and step S92. Perform the process. When the scan completion position indicates completion of scanning of all the storage areas (step S99: YES), the CPU 11 precedes the data to be deleted first among the DL and FB stored in the DL / FB storage area after repeated processing. The DL and FB split data existing at the address is deleted (step S101), and the process ends.

FIG. 24 shows the flow of the compressed data position rearrangement process shown in step S72 of FIG.
The CPU 11 shifts the compressed data that has not been rearranged to a storage area continuous with DL and FB (step S111), and integrates the free area of the RAM 12 closer to the top address of the storage area.
Next, based on the compressed data deletion order managed by the compressed data memory management table, the CPU 11 assigns the compressed data that has been deleted last among the compressed data that has not been rearranged to the highest available area in the RAM 12. Rearrangement is performed in the storage area near the head address (step S112).
Thereafter, the CPU 11 determines whether or not the rearrangement of all the compressed data has been completed (step S113). If rearrangement of all the compressed data has not been completed (step S113: NO), the process returns to step S111. If the rearrangement of all the compressed data has been completed (step S113: YES), the process is terminated.

As described above, according to the present embodiment, the CPU 11 manages the deletion order of DL, FB, and compressed data stored in the RAM 12 by the memory management table. Then, the CPU 11 rearranges the DL, FB, and compressed data stored in the RAM 12 based on the deletion order of each data when performing the fragmentation elimination processing of the free area of the RAM 12.
For example, by rearranging each piece of data managed by the memory management table so as to be arranged in a continuous storage area in accordance with the data deletion order, the free area that accompanies the deletion of data is automatically integrated free area It becomes. Further, by arranging the DL or FB and the compressed data that are deleted first in a storage area that is continuous with the empty area of the RAM 12, an existing empty area in the RAM 12 and an empty area that is generated by deleting the data that is deleted first, Can be integrated into a continuous storage area. As described above, fragmentation of the free area of the RAM 12 caused by deletion of each data after the position rearrangement process can be suppressed, and the free area of the RAM 12 can be effectively used.

  Further, when rearranging the DL, FB, and compressed data, the CPU 11 arranges the DL or FB and compressed data that are deleted first in a storage area that is continuous with the free area of the RAM 12. As a result, the existing free area in the RAM 12 and the free area generated by deleting the DL, FB, and compressed data that are deleted first can be integrated into a continuous storage area. Therefore, it is possible to form a continuous free area that is not fragmented, to suppress fragmentation of the free area of the RAM 12 caused by deletion of each data after the position rearrangement process, and to effectively use the free area of the RAM 12.

Furthermore, the CPU 11 places each piece of data managed by the memory management table in a continuous storage area according to the data deletion order.
Thereby, DL and FB are stored in a continuous storage area in the order of deletion. For this reason, the free area generated when DL and FB are deleted becomes an automatically integrated free area. Also, the compressed data is stored in storage areas that are consecutive in the order of deletion, and the free areas that are generated as the compressed data are deleted are automatically integrated free areas. As described above, fragmentation of the free area of the RAM 12 caused by deletion of each data after the position rearrangement process can be suppressed, and the free area of the RAM 12 can be effectively used.

Further, the CPU 11 separately manages the DL / FB memory management table and the compressed data memory management table. In the position rearrangement process, the DL / FB position rearrangement process and the compressed data position are performed based on the memory management tables. Sorting process is performed.
As a result, data having different handling such as presence / absence of management in units of blocks and data deletion timing can be rearranged in the deletion order, and the free space generated by the deletion of each data can be easily managed.

Furthermore, DL and FB are divided into fixed-length block units.
By using fixed-length divided data, replacement target data can be made into fixed-length divided data units in the position rearrangement process. Therefore, it is possible to manage the capacity of data to be replaced by data rearrangement in units of fixed-length divided data. That is, since there is no change in the data size of the replacement target data, management becomes easy. Furthermore, the storage capacity of the work buffer can be set as a fixed-length divided data unit, which is easy to manage and does not require a surplus buffer that takes into account fluctuations in the data size of the data to be replaced. The work buffer required for processing can be minimized.

  The embodiment of the present invention should be considered that the embodiment disclosed this time is illustrative and not restrictive in all respects. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

Hereinafter, the modification of embodiment of this invention is illustrated.
For example, DL and / or FB may be divided by variable length blocks.
In this case, since the block length can be flexibly changed as compared with the fixed-length block, the DL and FB can be handled with a smaller number of divided data than the fixed-length block. By reducing the number of divided data, the amount of processing (mapping) for managing components for labels on the memory management table is reduced. Thereby, each data can be managed at a higher speed by the memory management table.
Both data managed in fixed-length block units and data managed in variable-length block units may be handled.

Data to be subjected to the position rearrangement process may be limited. For example, the data to be deleted first among DL and FB may only be rearranged to be arranged in a storage area continuous with the integrated empty area.
In this case, since the processing amount of the rearrangement process is reduced as compared with the case of rearranging all the data, the rearrangement process can be completed at high speed. In addition, since the empty area continues when the DL or FB to be deleted first is deleted, fragmentation of the empty area of the RAM 12 can be suppressed, and the empty area of the RAM 12 can be effectively used.
Similarly, only the rearrangement for arranging the data to be deleted first in the compressed data in the storage area that is continuous with the integrated empty area may be performed. Further, it is possible to perform only rearrangement for arranging the data to be deleted first and the data to be deleted first in DL and FB in a storage area continuous with the integrated empty area.
Further, the limitation target of the data to be rearranged is not limited to the data to be deleted first. For example, it is possible to set the first and second to first, and it is possible to arbitrarily set whether or not the third and subsequent data are to be limited.

Each time new data is stored in the RAM 12, the position rearrangement process of each data may be performed.
In this case, the data to be deleted is always stored in a storage area that is continuous with the free area due to the rearrangement associated with the defragmentation process, so that the free area of the RAM 12 is always an integrated free area. Thereby, the free area of the RAM 12 can be effectively used without causing fragmentation of the free area of the RAM 12.

In the position rearrangement process, the data to be deleted first need not be continuous with the free space in the existing RAM 12.
Even in this case, since the data is stored in the storage areas that are continuous in the deletion order, the empty areas that are generated as the data are deleted are automatically integrated empty areas. As a result, the free area of the RAM 12 can be effectively used without causing fragmentation of the free area of the RAM 12 that occurs after the position rearrangement process.

The above-described embodiments of the present invention and modifications thereof may be used in combination.
The positions of the DL / FB storage area and the compressed data storage area can be interchanged. Each data such as DL, FB, and compressed data, parameters handled in the memory management table, and the like are merely examples, and the present invention can be applied to management of other data.

In the above description, the example in which the ROM is used as the computer-readable medium of the program according to the present invention has been disclosed, but the present invention is not limited to this example. As other computer-readable media, a non-volatile memory such as a flash memory and a portable recording medium such as a CD-ROM can be applied.
Further, a carrier wave (carrier wave) is also applied to the present invention as a medium for providing program data according to the present invention via a communication line.

1 Image forming apparatus 2 Line 3 External input device 11 CPU
12 RAM
13 ROM
14 Storage Unit 15 Interface 16 Image Forming Unit 17 ASIC
18 Bus

Claims (18)

A memory storing data;
The control unit manages the deletion order of the data stored in the memory, and rearranges the data stored in the memory based on the deletion order of the data when performing the fragmentation elimination processing of the free area of the memory and the step, possess,
When the data is rearranged, the control unit arranges data to be deleted first in a storage area continuous with an empty area of the memory. A memory storing data;
A step of managing a deletion order of data stored in the memory, and rearranging the data stored in the memory based on the deletion order of the data each time new data is stored in the memory; Have
When the control unit rearranges the data, a memory management method of images processor you characterized by arranging the data to be removed first in a storage area which is continuous with the free space of the memory. When the control unit rearranges the data, a memory management method for an image processing apparatus according to claim 1 or 2, characterized in that placing the data into contiguous storage area according to deletion order mechanism of the data.   The control unit manages the deletion order of data individually according to the type of data, and when rearranging the data, the control unit stores the data for each type of data based on the deletion order of the individually managed data. The memory management method for an image processing apparatus according to claim 1, wherein rearranging is performed.   5. The memory management method for an image processing apparatus according to claim 1, wherein the data includes data managed in units of fixed-length blocks. 6.   6. The memory management method for an image processing apparatus according to claim 1, wherein the data includes data managed in units of variable length blocks. Computer
Means for storing data in a memory of the computer;
Said memory to manage the deletion order of the stored data, sorted by the data stored in the memory when performing defragmentation process free space of the memory in the deletion order of the data, the data Means for arranging data to be deleted first in a storage area contiguous with an empty area of the memory when rearranging ;
A program characterized by functioning as Computer
Means for storing data in a memory of the computer;
The deletion order of the data stored in the memory is managed, and each time new data is stored in the memory, the data stored in the memory is rearranged based on the deletion order of the data, and the data is rearranged. Means for arranging data to be deleted first in a storage area that is continuous with an empty area of the memory ,
Features and to pulp programs that function as. Wherein the data to sort a program according to claim 7 or 8, wherein the placing the data in a contiguous storage area according deletion order mechanism of the data. According to the data type, the data deletion order is individually managed, and when the data is rearranged, the data is rearranged for each data type based on the individually managed data deletion order. The program according to any one of claims 7 to 9 . The program according to any one of claims 7 to 10 , wherein the data includes data managed in units of fixed-length blocks. The program according to any one of claims 7 to 11 , wherein the data includes data managed in units of variable-length blocks. A memory for storing data;
A controller that manages the deletion order of the data stored in the memory and rearranges the data stored in the memory based on the deletion order of the data when performing the fragmentation elimination processing of the free area of the memory; equipped with a,
The control unit, when rearranging the data, arranges data to be deleted first in a storage area continuous with an empty area of the memory . A memory for storing data;
A controller that manages the deletion order of the data stored in the memory and rearranges the data stored in the memory based on the deletion order of the data each time new data is stored in the memory. ,
The control unit, when rearranging the data, arranges data to be deleted first in a storage area continuous with an empty area of the memory. The image processing apparatus according to claim 13 or 14, wherein when the data is rearranged, the control unit arranges the data in a continuous storage area according to a deletion order of the data. The control unit manages the deletion order of data individually according to the type of data, and when rearranging the data, the control unit stores the data for each type of data based on the deletion order of the individually managed data. The image processing apparatus according to claim 13, wherein rearrangement is performed. The image processing apparatus according to claim 13, wherein the data includes data managed in units of fixed-length blocks. The image processing apparatus according to claim 13, wherein the data includes data managed in units of variable-length blocks.

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