JP5444624B2 - Inspection system, inspection backplane, inspection method and manufacturing method - Google Patents

Description

  The present invention relates to an inspection system for inspecting each module of an m-layer module having m (m is an integer of 2 or more) modules operating in synchronization with each other, an inspection backplane used for inspection of the module, The present invention relates to a module inspection method and an m-duplex module manufacturing method.

  As a computer that provides high reliability, there is a fault-tolerant computer (hereinafter abbreviated as “FT computer”) (see, for example, Patent Document 1). Such an FT computer is often used as a high availability server of a client server system.

  In the FT computer, modules are duplicated or multiplexed. Each module constituting the FT computer includes a CPU (central processing unit) having the same hardware configuration. All CPUs receive synchronized clock signals and are given the same data at the same timing. Thus, the CPU subsystem of each module always performs the same operation if it is normal. In this way, a state where a plurality of CPUs perform exactly the same operation is called a lock step operation.

FIG. 10 shows a schematic configuration of the FT computer. As shown in FIG. 10, the FT computer 100 includes modules 1 ₁ , 1 ₂ , a housing 2, and a backplane 3. Modules 1 ₁ and 1 ₂ are substrates on which various chips such as a CPU are mounted and wirings for connecting these chips are provided. The modules 1 ₁ and 1 ₂ are stored in the housing 2 and are connected to the backplane 3 by connectors (not shown). The backplane 3 is provided with wiring for transmitting and receiving signals between modules.

Module 1 ₁ includes a CPU 11 _1, the FT control circuit 12 _1, and a comparator 13 _1. Further, the module 1 ₂ includes a CPU 11 _2, and the FT control circuit 12 _2, and a comparator 13 _2.

The CPU 11 ₁ implements the function of the module 11 ₁ by executing a program stored in a memory (not shown) in accordance with a clock signal input from a clock source (not shown). FT control circuit 12 ₁ performs data transmission and reception with the CPU 11 _1, which constantly monitors the CPU 11 ₁ of operation. FT control circuit 12 _1, a signal corresponding to CPU 11 ₁ of the processing result, and outputs as a comparison signal for comparing duplex operation with other modules 1 _2. The comparison signal is output to the comparator 13 _1, and is also output to the backplane 3. Comparison signal inputted to the backplane 3, is further input to the module 1 _2, finally, it is input to a comparator 13 ₂ of the module 1 _2.

On the other hand, CPU 11 ₂ in accordance with a clock signal having the same frequency as that input to the CPU 11 _1, by executing a program stored in a memory (not shown), to implement the functions of the module 1 _2. FT control circuit 12 ₂ performs data transmission and reception with the CPU 11 _2, constantly monitors the CPU 11 ₂ of the operation. FT control circuit 12 _2, a signal corresponding to the CPU 11 ₂ of the processing result, and outputs as a comparison signal for comparing duplex operation with other modules 1 _1. The comparison signal is output to the comparator 13 ₂ is also output to the backplane 3. Comparison signal inputted to the backplane 3, is further input to the module 1 _1, are finally input to a comparator 13 ₁ of module 1 _1.

Thus, the comparator 13 _1, 13 _2, for comparison module 1 _1, 1 ₂ of the duplex operation, the comparison signal of the module itself, and the comparison signal from the other modules is inputted Yes. Comparators 13 ₁ and 13 ₂ compare both input signals and output a signal indicating whether or not both signals match. Therefore, by referring to the outputs of the comparators 13 ₁ and 13 ₂ , it can be confirmed whether or not the modules 1 ₁ and 1 ₂ are operating normally. The output signals of the comparators 13 ₁ and 13 ₂ are input to the FT control circuits 12 ₁ and 12 ₂ and used for checking the duplex operation.

JP 2006-172391 A

  As described above, in the FT computer, each multiplexed module needs to perform the same operation and always output the same processing result. Therefore, in the manufacturing process of the FT computer, in the inspection before shipping after manufacturing each module, the output of the comparator provided in each module is referred to check whether each module is operating normally. ing.

  However, with such an inspection method, only modules for one FT computer (two modules in the case of a duplex module) can be inspected at a time. This is not preferable from the viewpoint of manufacturing efficiency of the apparatus.

  In addition, if only the output signals of two modules can be compared at a time, it cannot be determined which module is defective, and it takes time to determine whether each module is good or bad. End up.

  The present invention has been made in view of the above circumstances, and provides an inspection system, an inspection backplane, an inspection method, and a manufacturing method that can improve the manufacturing efficiency of an FT computer.

In order to achieve the above object, an inspection system according to a first aspect of the present invention inspects each module of a fault tolerant computer having m (m is an integer of 2 or more) modules operating in synchronization. In the inspection system, the number of simultaneous connections of the modules is n, which is greater than m, and includes a backplane for inputting the output signals of the connected modules, and the backplane receives output signals from different modules. It is a comparison part which inputs and compares, Comprising: The combination of the module to compare is provided with at least n-1 comparison parts respectively characterized by the above-mentioned.

The test backplane according to the second aspect of the present invention is a test backplane used for testing each module of a fault-tolerant computer having m modules (m is an integer of 2 or more) operating in synchronization. in plane, the number of simultaneous connections the module is a n-number more than m, a connecting portion for inputting the output signal of the connected the module, the output signal from the module differ connected to the connecting portion A comparison unit that performs input and comparison, and includes at least n-1 comparison units each having a different combination of modules to be compared.

The inspection method according to the third aspect of the present invention is an inspection method for inspecting each module of a fault-tolerant computer having m modules (m is an integer of 2 or more) operating in synchronism. Provided in the backplane for inputting and comparing the output signals from the different modules with the first step of inputting the output signals of the modules to the backplane simultaneously connected to the n modules A second step of comparing output signals from different modules using at least one comparator having different combinations of modules to be compared, and a comparison result of each of the comparators; And a third step of displaying using.

Manufacturing method according to a fourth aspect of the present invention is the manufacturing method (the m an integer greater than or equal to 2) m which operates in synchronization to produce a fault-tolerant computer having a number of modules, the fault tolerant computer a process of manufacturing the modules that constitute the, using the inspection method of the present invention, an inspection step of inspecting the n-number of each module more than m, using a pre-SL module inspected in the inspection process And assembling the fault tolerant computer .

  According to the present invention, the manufacturing efficiency of the FT computer can be improved.

<< First Embodiment >>
Next, a first embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a schematic configuration of an inspection system 50 according to the present embodiment. The inspection system 50 is a system for inspecting each module of a duplex module having a plurality of modules operating in synchronization with each other, for example, each module 1 ₁ , 1 ₂ of the data processing apparatus 100 shown in FIG. As illustrated in FIG. 1, the inspection system 50 includes a backplane 30 as an inspection backplane.

The backplane 30 is provided with _four connection portions 21 _{1 to} 21 ₄ (so-called slots). Accordingly, the backplane 30 includes four modules 1 ₁ to 1 ₄ having the same hardware configuration, i.e. duplex module 2 car module, at the same time can be connected via a connector (not shown) of each module It has become.

Configuration of the module 1 ₁ to 1 ₄ are as described above. Signal corresponding to CPU 11 ₁ to 11 ₄ of the processing results, i.e. comparison signal for comparing duplex operation with other modules 1 ₂ are connected from each of the FT controller 12 ₁ to 12 _4, the connecting portion 21 is input to the backplane 30 via a ₁ to 21 _4. In this embodiment, it is assumed that this output signal is an 8-bit data signal.

The backplane 30 is further provided with _three comparators 22 _{1 to} 22 ₃ as comparison units.

The comparator 22 ₁ receives the comparison signal from the module 1 _1, a comparison signal of module 1 _2, and outputs a signal indicating whether or not they match. The comparator 22 ₂ receives the comparison signal from the module 1 _1, the comparison signal of the module 1 _3, and outputs a signal indicating whether or not they match. Comparator 22 ₃ inputs a comparison signal from the module 1 _1, the comparison signal of the module 1 _4, and outputs a signal indicating whether or not they match.

The comparators 22 _{1 to} 22 ₃ , for example, output a low level signal if the values of both input signals match, and output a high level signal if the values of both signals differ. Output signals of the comparators 22 _{1 to} 22 ₃ are output from the backplane 30 and input to the display device 40. The display device 40 displays these output signals.

FIG. 2 shows the relationship between the output signals of the comparators 22 _{1 to} 22 ₃ and the defective modules. As shown in FIG. 2, when the outputs of all the comparators 22 _{1 to} 22 ₃ are at a high level (H), there is a high possibility that the module ₁₁ is defective. Further, the output of the comparator 22 ₁ is at a high level, if the remaining comparators 22 _2, 22 ₃ of the output is at the low level (L), it indicates that the module 1 ₂ is defective. The output of the comparator 22 ₂ is at high level, if the output of the remaining comparators 22 _1, 22 ₃ is at a low level, it indicates that the module 1 ₃ is defective. The output of comparator 22 ₃ is at high level, if the output of the remaining comparators 22 _1, 22 ₂ is at a low level, it indicates that the module 1 ₄ is defective.

Further, if the outputs of the comparators 22 ₁ and 22 ₂ are at a high level and the output of the comparator 22 ₃ is at a low level, this indicates that the modules 1 ₂ and 1 ₃ are defective. The output of comparator 22 _2, 22 ₃ is at a high level, if the output of the comparator 22 ₁ is at a low level, it indicates that the module 1 _3, 1 ₄ is defective. The output of the comparator 22 _1, 22 ₃ is at a high level, if the output of the comparator 22 ₂ is at a low level, it indicates that the module 1 _2, 1 ₄ is defective. Furthermore, outputs of all the comparators 22 ₁ to 22 _3, when a low level, it is all the modules 1 ₁ to 1 ₄ are shown to be normal.

Next, the operation of the inspection system 50 according to the present embodiment will be described. FIG. 3 shows a timing chart of various signals. First, the uppermost signal indicates a clock signal (system clock) input to the CPUs 11 _{1 to} 11 ₄ . The lower four signals indicate the outputs of the FT control circuits 12 _{1 to} 12 ₄ , and the lower three signals indicate the outputs of the comparators 22 _{1 to} 22 ₃ .

The CPUs 11 _{1 to} 11 ₄ operate synchronously according to this system clock. The FT control circuits 12 _{1 to} 12 ₄ latch the output signals of the CPUs 11 _{1 to} 11 ₄ at the rising edge of the clock signal and output them to the backplane 3. The outputs of the FT control circuits 12 _{1 to} 12 ₄ shown in FIG. 2 indicate the signals. There is a slight delay between the outputs of the CPUs 11 _{1 to} 11 ₄ and the FT control circuits 12 _{1 to} 12 ₄ , but as long as the CPUs 11 _{1 to} 11 ₄ operate in the same way, the FT control circuits 12 _{1 to} 12 12. The output of ₄ will always match.

However, before and after the rise of the sixth cycle from the left of the system clock, the output of the FT control circuits 12 _{1 to} 12 ₃ is 55 in hexadecimal, whereas the output of the FT control circuit 12 ₄ is 16 The decimal number is 5F. At this point, the output of the comparator 22 _3, changes from low level to high level, and remains its output is held at a high level after.

The output waveforms of the comparators 22 _{1 to} 22 ₃ are displayed on the display device 40. Comparator becomes 22 ₃ output only the high level, that the output of the comparator 22 _1, 22 ₂ is at low level, referring to FIG. 2 shows that the module 1 ₄ is defective . Examiner sees the output waveform of the comparator 22 _{1-22 3} displayed on the display unit 40 determines only the module 1 ₄ is defective. That is, the inspector can determine whether the module is good or bad by looking at the display device 40.

<< Second Embodiment >>
Next, a second embodiment of the present invention will be described. FIG. 4 shows the configuration of the inspection system 51 according to the present embodiment. As shown in FIG. 4, the inspection system 51 is provided with an inspection backplane 31. The backplane 31 is different from the inspection system 50 according to the first embodiment in that display units 23 ₁ to 23 ₃ are newly provided.

The display unit 23 ₁ displays the output of the comparator 22 ₁ , the display unit 23 ₂ displays the output of the comparator 22 ₂ , and the display unit 23 ₃ displays the output of the comparator 22 ₃ . As the display units 23 ₁ to 23 ₃ , for example, light emitting diodes can be used. For example, the display units 23 ₁ to 23 ₃ may be turned off when the outputs of the comparators 22 _{1 to} 22 ₃ are at a low level and turned on when the outputs are at a high level. Further, the light emitting diode may be turned on when the outputs of the comparators 22 _{1 to} 22 ₃ are at a low level, and the light emitting diode may be blinked when the output is at a high level. Further, for example, as the display units 23 ₁ to 23 ₃ , two types of light emitting diodes of green and red are prepared, respectively, and when the outputs of the comparators 22 _{1 to} 22 ₃ are at low level, the green light emitting diode is turned on, In this case, the red light emitting diode may be turned on.

  According to the present embodiment, the inspector can check the inspection result of each module without using the display device 40. As a result, the cost required for the inspection can be reduced and the space required for the inspection can be reduced.

<< Third Embodiment >>
Next, a third embodiment of the present invention will be described. FIG. 5 shows a configuration of the inspection system 52 according to the present embodiment. As shown in FIG. 5, the inspection system 52 is provided with an inspection backplane 32. Backplane 32, the comparator 22 _3, and the comparison signal from the module 1 _3, receives the comparison signal of the module 1 _4, the point that outputs a signal indicating whether or not they match, This is different from the backplanes 30 and 31 according to the above embodiments.

FIG. 6 shows the relationship between the output signals of the comparators 22 _{1 to} 22 ₃ and the defective module in this embodiment. As shown in FIG. 6, when the outputs of all the comparators 22 _{1 to} 22 ₃ are at a high level, it is highly possible that the modules 1 ₁ and 1 ₃ are defective. Further, the output of the comparator 22 ₁ is at the high level, when the output of the remaining comparator 22 _2, 22 ₃ is at a low level, it indicates that the module 1 ₂ is defective. The case where the output of the comparator 22 ₂ is at a high level and the outputs of the remaining comparators 22 ₁ and 22 ₃ are at a low level cannot be considered. The output of comparator 22 ₃ is at the high level, when the output of the remaining comparators 22 _1, 22 ₂ is at a low level, it indicates that the module 1 ₄ is defective.

Further, when the outputs of the comparators 22 ₁ and 22 ₂ are at a high level and the output of the comparator 22 ₃ is at a low level, this indicates that the module ₁₁ is defective. The output of comparator 22 _2, 22 ₃ is at the high level, when the output of the comparator 22 ₁ is at a low level, it indicates that the module 1 ₃ is defective. The output of the comparator 22 _1, 22 ₃ is at the high level, when the output of the comparator 22 ₂ is at a low level, it indicates that the module 1 _2, 1 ₄ is defective. Furthermore, outputs of all the comparators 22 ₁ to 22 _3, when a low level, it is all the modules 1 ₁ to 1 ₄ are shown to be normal.

Thus, various combinations can be adopted as the combination of the two signals input to the comparators 22 _{1 to} 22 _n . However, the output signal of the module 1 ₁ to 1 ₄ that is input, it is always necessary to be input to one of the comparators.

  However, as can be seen from a comparison between FIG. 2 and FIG. 6, the combination of defective modules that can be detected by wiring any one module to be input to all the comparators as in the inspection system of FIG. The number of will increase.

<< Fourth Embodiment >>
Next, a fourth embodiment of the present invention will be described. FIG. 7 shows a configuration of the inspection system 53 according to the present embodiment. This inspection system 53 is a generalization of the inspection system 53 according to each of the above-described embodiments. This inspection system 53 is not limited to a duplex module, but includes each module of a triple or higher multiplexed module. This inspection system can also be applied to inspection.

As shown in FIG. 7, the inspection system 53 is provided with a backplane 33 for inspection. The inspection backplane 33, n-number of modules 1 ₁ to 1 _n and simultaneously connectable connecting portion 21 ₁ through 21 _n for receiving the output signal of the connected modules 1 ₁ to 1 _n are provided . n is an integer greater than the number m of multiplexed modules.

The test backplane 33 is provided with at least n−1 comparators 22 _{1 to} 22 _n−1 connected to the connecting portions 21 _{1 to} 21 _n for comparing two output signals from different modules. It has been. The wiring between the connecting portions 21 _{1 to} 21 _n and the comparators 22 _{1 to} 22 _n-1 is not particularly shown, but the output signals of the modules 1 ₁ to 1 _n are input to at least one comparator. The combination of the two modules corresponding to the input output signal is different for each comparator. As a result, similar to the above embodiments, the modules 11 ₁ to 1 _n can be inspected based on the outputs of the comparators 22 _{1 to} 22 _n−1 .

<< Fifth Embodiment >>
Next, a fifth embodiment of the present invention will be described. FIG. 8 schematically shows a schematic configuration of the inspection system 54 according to the present embodiment. In the inspection systems 50 to 53 according to the above embodiments, n−1 comparators that are smaller by 1 than the number n of connected modules are provided, but the backplane 34 of the inspection system 54 according to the present embodiment is provided. Are provided with n sets of n-1 comparators 22. That is, (n−1) × n comparators are provided.

In the inspection system 54 according to the present embodiment, the number of comparators is large, and the wiring inside the backplane 34 is complicated. Therefore, in FIG. 8, the modules ₁₁ to 1 _n and the back plane 34 are illustrated separately from each other and the connection portion is not illustrated in order to prevent the drawing from being complicated. However, in this embodiment as well, the modules 1 ₁ to 1 _n are connected to the backplane 34 via the connection portions 21 _{1 to} 21 _n as in the above embodiments.

  In this inspection system 54, output signal comparison results for all combinations of the two modules can be obtained. As a result, a defective module can be determined more accurately.

<< Sixth Embodiment >>
Next, a sixth embodiment of the present invention will be described. In the present embodiment, a method for manufacturing a multiplexing module will be described.

FIG. 9 shows a flowchart of a method of manufacturing an FT computer (for example, the FT computer of FIG. 10) as a duplex or multiplexed module. As shown in FIG. 9, first, in step 201 as a manufacturing process, each module is manufactured. After each module is manufactured, in step 203 as an inspection process, each module 1 _k (k = 1 to n) is inspected using the inspection systems 50 to 54 according to the above embodiments.

More specifically, in this step 203, the examiner, the n modules 1 ₁ to 1 _n, connected to the backplane of the inspection system according to the above embodiments. When the power of the inspection system is turned on, when the modules 1 ₁ to 1 _n connected to the backplane start to operate, their output signals are input to the backplane (first process) ). The input output signals are input to at least n-1 comparators in the backplane (second step). Then, the comparison result of each comparator is displayed on the display unit or an external display device in the backplane (third step), the module 1 ₁ to 1 _n are examined on the basis of the display results.

  In the next step 205 as an assembly process, the multiplexing module is assembled. The m modules determined to be good in step 205 are connected to the multiplexing module backplane (for example, the backplane 3 in FIG. 10), and the casing (for example, the casing 2 in FIG. 10) is connected. ) And the assembly of the multiplexing module is completed.

  In each of the above-described embodiments, the number n of modules connected to the backplane for inspection is set to be larger than the number m of multiplexed modules. However, in order to improve the efficiency of the manufacturing method, the first and second As shown in the embodiment, it is desirable that the number n (FIG. 8) of connection of the backplane for inspection is a multiple of the multiplexing number m of the multiplexing module. In this way, if all the modules are determined to be good in one inspection process, it is possible to assemble the multiplexed module using all the modules as they are without leaving a remainder. is there.

  As described above in detail, according to each of the above-described embodiments, in the inspection system for inspecting each module of the m-stack module having a plurality of modules operating in synchronization with each other, n modules larger than m are simultaneously used. It has a connectable backplane. The backplane is provided with at least n-1 comparators for inputting and comparing output signals from different modules and different combinations of modules to be compared. In this way, n modules larger than m, that is, the number of modules equal to or more than one multiplexed module can be inspected at a time, so that the efficiency of module inspection is improved. The manufacturing efficiency of the multiplexing module can be increased.

  Further, according to each of the above embodiments, comparison results of at least n−1 different combinations can be obtained for the output signals of n modules. As a result, when the comparison result of one of the comparators is an output signal mismatch, the comparison result of the other comparator can be taken into account. Can be specified with high accuracy.

Further, according to the second, third, and fourth embodiments, the backplanes 31, 32, and 33 further include the display units 23 ₁ to 23 ₃ that display the comparison results of the comparators 22 _{1 to} 22 _3. Is provided. This eliminates the need to provide a special display device for displaying the comparison results of the comparators 22 _{1 to} 22 ₃ , so that each module can be inspected at low cost and in a small space.

  Further, according to the first, second, and third embodiments, the number n of simultaneous connection of modules is a multiple of m. As a result, a plurality of modules can be inspected at a time, so that the inspection efficiency of each module can be improved.

  Further, according to the first, second, third, and fourth embodiments, the number of comparators provided in the backplanes 30, 31, 32, and 33 is n-1. n-1 is the minimum number of comparators required to test n modules at a time. Since the number of comparators is minimized, the inspection system can be downsized and the manufacturing cost of the inspection system can be reduced.

  Further, according to the first and second embodiments, an output signal from a specific module is input to all n−1 comparators. In this way, the number of combinations of defective modules that can be detected with respect to the number of comparators can be maximized, so that defective modules can be easily identified.

  Further, according to the fifth embodiment, since the comparators are prepared for all combinations of modules, the number of comparison results corresponding to each module can be maximized without any deviation. As a result, the defective module can be identified more reliably.

  Further, according to the sixth embodiment, since more modules than one can be inspected at a time in the inspection process of each module, the manufacturing efficiency of the multiplexed module can be increased.

In each of the above embodiments, the module to be inspected is a module having the same configuration as the modules 1 ₁ and 1 ₂ shown in FIG. 10, but the module targeted by the present invention is limited to this module. Of course not. The present invention is applicable to a plurality of modules that always operate in the same manner.

  Of course, the inspection system according to each of the above embodiments may include a housing for protecting each module.

It is a functional block diagram showing a schematic structure of an inspection system concerning a 1st embodiment of the present invention. It is a table which shows the relationship between the output of the comparator in the inspection system of FIG. 1, and a defective module. It is a timing chart which shows operation | movement of the test | inspection system of FIG. It is a functional block diagram which shows the schematic structure of the test | inspection system which concerns on the 2nd Embodiment of this invention. It is a functional block diagram which shows the schematic structure of the test | inspection system which concerns on the 3rd Embodiment of this invention. 6 is a table showing a relationship between an output of a comparator and a defective module in the inspection system of FIG. 5. It is a functional block diagram which shows the schematic structure of the test | inspection system which concerns on the 4th Embodiment of this invention. It is a functional block diagram which shows typically the schematic structure of the test | inspection system which concerns on the 5th Embodiment of this invention. 10 is a flowchart illustrating a method for manufacturing a multiplexing module according to a sixth embodiment of the present invention. It is a figure which shows the structure of a fault tolerant computer.

Explanation of symbols

1 ₁ to 1 _n Module 2 Case 3 Backplane 11 _{1 to} 11 _n CPU
12 _{1 to} 12 _n FT control circuits 13 ₁ and 13 ₂ comparators 21 _{1 to} 21 _n connection units 22 _{1 to} 22 _n−1 , 22 comparators 23 ₁ to 23 _n−1 display units 30, 31, 32, 33, 34 Backplane 40 Display device 50, 51, 52, 53, 54 Inspection system 100 FT computer

Claims (12)

In an inspection system for inspecting each module of a fault tolerant computer having m modules (m is an integer of 2 or more) operating in synchronization,
The number of simultaneous connections of the modules is n more than m, and the module includes a backplane for inputting the output signals of the connected modules.
The backplane is
An inspection system comprising: a comparison unit that inputs and compares output signals from different modules, and includes at least n-1 comparison units each having a different combination of modules to be compared.   The inspection system according to claim 1, further comprising a display unit that displays a comparison result of each of the comparison units.   The inspection system according to claim 1, wherein the number n of simultaneous connections with the module is a multiple of m. The number of the comparison parts is
The inspection system according to claim 1, wherein the number is n−1.   The inspection system according to claim 4, wherein an output signal from any one of the n modules is input to n−1 comparison units. In an inspection backplane used for inspecting each module of a fault tolerant computer having m modules (m is an integer of 2 or more) operating synchronously,
The number of simultaneous connections of the modules is n greater than m, and a connection unit for inputting an output signal of the connected modules;
A comparison unit that inputs and compares output signals from different modules connected to the connection unit, and includes at least n-1 comparison units each having a different combination of modules to be compared; Backplane for inspection.   The inspection backplane according to claim 6, further comprising a display unit that displays a comparison result of each of the comparison units.   The backplane for inspection according to claim 6 or 7, wherein the number n of simultaneous connections with the module is a multiple of m. The number of the comparison parts is
The inspection backplane according to claim 6, wherein the number is n−1.   10. The inspection backplane according to claim 9, wherein an output signal from any one of the n modules is input to n−1 comparators. 11. In an inspection method for inspecting each module of a fault-tolerant computer having m modules (m is an integer of 2 or more) operating synchronously,
a first step of inputting an output signal of each module to a backplane simultaneously connected with n modules greater than m; and
Comparators provided on the backplane for inputting and comparing output signals from different modules, wherein at least one comparator with a different combination of modules to be compared is used, A second step of comparing the output signals;
And a third step of displaying a comparison result of each comparator using a display device. In a manufacturing method for manufacturing a fault-tolerant computer having m modules (m is an integer of 2 or more) operating in synchronization,
A manufacturing process for manufacturing each module constituting the fault tolerant computer ;
An inspection step of inspecting each of n modules greater than m using the inspection method according to claim 11;
An assembling step of assembling the fault-tolerant computer using the module inspected in the inspecting step.

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