JP5434510B2 - Circuit board, image display apparatus, circuit board manufacturing method, and image display apparatus manufacturing method - Google Patents

Description

  The present invention relates to a circuit board, an image display device, a circuit board manufacturing method, and an image display device manufacturing method.

  Conventionally, a photolithography method is used when manufacturing a circuit board used for a semiconductor element or an electronic circuit. However, the photolithography method requires an expensive apparatus such as an exposure apparatus, and is also manufactured. This complicates the process and increases costs.

  Therefore, in order to reduce the manufacturing cost when manufacturing a circuit board, attention has been paid as printable electronics as a technique for forming electrodes, semiconductors, and insulators by a printing method. This printable electronics can perform film formation and patterning at the same time by using a printing device, and it has fewer steps and simple manufacturing equipment compared to the photolithography method which is a conventional semiconductor process technology. In addition, the equipment cost is low, and the electrode and the insulating film are printed only on necessary portions, so that the material use efficiency is high, and the circuit board can be manufactured at a low cost.

  On the other hand, it is necessary for printing technology to apply electrodes, semiconductors, and insulators as inks or pastes, and it is difficult to increase resolution due to surface tension of liquids such as inks and pastes and wettability with substrates, etc. Miniaturization is the biggest issue.

  For this reason, Patent Document 1 discloses a method in which nano-silver ink is dropped by an ink jet printing method using a wettability changing material whose critical surface tension is changed by applying energy. With this method, it is possible to easily form a fine pattern with simple equipment, and furthermore, it is possible to form a fine wiring of about several μm, and fine processing close to that formed by photolithography is performed. Can do.

  A thin film transistor (TFT) for driving a display element such as an electrophoretic element, a liquid crystal, or an organic EL is formed on the circuit board thus formed, and a display such as an electrophoretic element, a liquid crystal, or an organic EL is displayed. An image display device can be formed by combining elements.

  In the circuit board on which the TFT array is formed, a connection region is provided at the end of the wiring from which the electrode of the TFT is drawn in order to input and drive an electric signal to the TFT, and an external circuit board having an external driver IC is connected. There is a need. The configuration of such a connection part is a configuration in which a plurality of TFT wiring ends are grouped into blocks, and each block is connected to a connection terminal of a connection wiring such as an FPC (Flexible Printed Circuit). It has become.

  In Patent Document 2, the electrode wiring of the organic TFT is drawn out of the TFT array on the film substrate, and an interlayer insulating film having a through hole is provided at the end of the periodically arranged electrode wiring group. A method is disclosed in which the connection electrode wiring formed of the conductive paste and the wiring of the organic TFT are connected through this through hole and are electrically connected to the connection terminal of the external circuit board.

  Patent Document 3 discloses a technique of using screen printing as a method for forming an interlayer insulating film having a highly accurate via hole. An interlayer insulating film having fine via holes can be formed by screen printing by printing two or more different patterns in layers using insulating ink. Similarly, it is also possible to embed a conductive material in the through hole and form a pixel driving electrode by screen printing.

  By the way, in the method disclosed in Patent Document 1, when the connection region is formed by extremely fine wiring, the film thickness becomes thin, and when directly connected by FPC or the like, it is adjacent due to overlay deviation. There is a possibility that resistance for ensuring reliability cannot be obtained due to a short circuit of the wiring or mounting damage.

  Further, in the method disclosed in Patent Document 2, the through-hole portion formed by printing has a unique shape in which the cross-sectional shape is a mortar shape, and the conductive paste is easily filled locally. Since the connection electrode width is increased, adjacent wirings may be easily short-circuited.

  As described above, when a fine electrode pattern is used for the lead-out wiring of a TFT array using a wettability-changing material whose critical surface tension is changed by the application of energy and nano silver ink, high-definition electrode wiring is formed. Is extremely effective, but in the lead-out wiring portion of the interlayer insulating film formed thereon, the wiring formed by the conductive paste or the like is easily short-circuited, and the connection electrode for connecting to the connection terminal of the external circuit board Wiring formation may be difficult.

  In the case of Patent Document 1 and Patent Document 2, a case where screen printing is used as a printing method is described. Here, an off-contact screen printing method will be described with reference to FIG. In the off-contact screen printing method, a clearance (gap) is provided between the substrate 101 printed on the stage 100 and the screen plate 102. The screen plate 102 is formed by forming a screen (mesh) 105 on a screen fixing frame (outer frame) 104. A paste 106 is placed on the screen 105, and a rubber squeegee 107 is used to press downward. Printing is performed by scanning while applying. The downward pressure (squeegee pressure) applied to the squeegee 107 is set so that the screen 105 and the substrate 101 are in proper contact. The screen 105 is masked by an emulsion supported by a mesh, and paste is supplied onto the substrate 101 from an opening area where no emulsion is formed (opening area of the mask). The paste and the opening are in contact with each other in the opening area of the screen 105 by the squeegee 107, but the downward pressure applied by the squeegee 107 is released by the passage of the squeegee 107, so that an emulsion is formed. The screen 105 moves upward with the paste 108 left on the substrate 101 in the region corresponding to the unopened region.

  In such a printing method, the volume of the paste 108 remaining on the substrate 101 varies depending on the area of the opening region. That is, in the opening region having a small area, the film thickness of the paste 108 remaining on the substrate 101 tends to be thinner than that in the opening region having a large area. Further, if there is a space between the screen plate 102 and the substrate 101, the paste 108 has fluidity, so that the pattern of the paste 108 that is different from the pattern of the opening area where no emulsion is formed on the screen 105. May be formed, and in some cases, the formed pastes 108 may be connected to each other. Further, due to the surface tension and elasticity of the paste, the cross-sectional shape of the paste 108 becomes a smooth curved surface that is convex upward. Furthermore, the pattern may be wet spread or contract due to the wettability of the substrate 101.

  The present invention has been made in view of the above prior art, and uses a wettability changing material whose critical surface tension is changed by applying energy and nano silver ink, and a fine electrode pattern is used as a lead wire of a TFT array. Provided are a highly reliable circuit board, an image display device, a circuit board manufacturing method, and an image display device manufacturing method without causing short-circuiting of a wiring formed of a conductive paste or the like in a wiring portion even when used. It is for the purpose.

The present invention provides a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy on the substrate, and a region of the high surface energy state in the wettability changing layer. a first conductive layer comprising a plurality of regions formed in the wettability changing layer between a plurality of regions of the first conductive layer, an interlayer insulating film formed in a line shape, the first On the conductive layer, the interlayer insulating film formed in a dot shape, the interlayer insulating film formed in the line shape, and the first conductive layer in a region surrounded by the interlayer insulating film formed in the dot shape The second conductive layer is connected to a connection electrode of a flexible substrate for signal input / output in the second conductive layer.

Further, the present invention provides a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy on the substrate, and a region of the high surface energy state in the wettability changing layer. Formed on the first conductive layer composed of a plurality of regions formed on the wettability changing layer between the plurality of regions of the first conductive layer and on the first conductive layer at predetermined intervals an interlayer insulating film that is, without Rukoto is formed on the interlayer insulating film, and a second conductive layer formed on the first conductive layer, the second conductive layer, It is connected to a connection electrode of a flexible substrate for signal input / output.

  According to the present invention, the first conductive layer is formed in a line shape, and the pattern of the second conductive layer formed on the first conductive layer is the adjacent first first layer. Different patterns are formed on the conductive layer.

  In the invention, it is preferable that the interlayer insulating film contains a binder having an insulating filler and a resin material as a main component.

  Further, the present invention is characterized in that the second conductive layer is mainly composed of a binder having fine particles made of a conductive material and a resin material.

  In addition, the present invention is characterized by including the circuit board described above and a display element.

  Further, the invention is characterized in that the pixel electrode formed in the display element and the second conductive layer are formed of the same material.

  According to the present invention, in the case where an interlayer insulating film is also formed on the first conductive layer of the circuit board, the first opening that becomes a region where the interlayer insulating film is not formed, and the display The second opening for connecting the pixel electrode and the electronic circuit for driving the pixel electrode in the element has substantially the same size.

Further, the present invention provides a wettability changing layer forming step of forming a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy to the substrate, and the wettability Energy is applied to the change layer, and a plurality of regions to which the energy is applied are used as a high surface energy region, and a first conductive layer including a plurality of regions is formed on the plurality of high surface energy regions. a first conductive layer forming step of, an interlayer insulating film forming step of forming an interlayer insulating film on the wettability variable layer between a plurality of regions of the first conductive layer, formed on the interlayer insulating film And a second conductive layer forming step of forming a second conductive layer in a region where the interlayer insulating film is not formed on the first conductive layer.

Further, the present invention provides a wettability changing layer forming step of forming a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy to the substrate, and the wettability Energy is applied to the change layer, and a plurality of regions to which the energy is applied are used as a high surface energy region, and a first conductive layer including a plurality of regions is formed on the plurality of high surface energy regions. A first conductive layer forming step, a first interlayer insulating film forming step of forming an interlayer insulating film in a line shape on the wettability changing layer between a plurality of regions of the first conductive layer, A second interlayer insulating film forming step of forming an interlayer insulating film in the form of dots at a predetermined interval on one conductive layer; and a second region in the area where the interlayer insulating film is not formed on the first conductive layer. Conductivity And having a second conductive layer forming step of forming a.

  In the invention, it is preferable that the interlayer insulating film is formed by a screen printing method.

  Further, the present invention is characterized in that the second conductive layer is formed by a screen printing method.

  In the second conductive layer, the second conductive layer is connected to a connection electrode on a flexible substrate for signal input / output, and the first conductive layer is interposed through the second conductive layer. The connection electrode is connected immediately above.

  Further, the present invention includes the above-described method for manufacturing a circuit board, wherein an electronic circuit for driving a display element is formed on the substrate, and the display element is driven. The pixel electrode is formed together with the second conductive layer in the second conductive layer forming step.

  According to the present invention, even in the case where a fine electrode pattern is used for a lead-out wiring of a TFT array using a wettability changing material whose critical surface tension changes with application of energy and nano silver ink, the wiring portion has conductivity. It is possible to provide a highly reliable circuit board, image display device, circuit board manufacturing method, and image display device manufacturing method without causing a short circuit in a wiring formed of paste or the like.

Illustration of screen printing method Top view of the circuit board in the first embodiment Sectional drawing of the circuit board in 1st Embodiment Process drawing (1) of the manufacturing method of the circuit board in 1st Embodiment Process drawing (2) of the manufacturing method of the circuit board in 1st Embodiment Top view of another circuit board according to the first embodiment (1) Top view of another circuit board according to the first embodiment (2) Top view of another circuit board according to the first embodiment (3) Top view of a circuit board in the second embodiment Sectional drawing of the circuit board in 2nd Embodiment Process drawing of the manufacturing method of the circuit board in 2nd Embodiment Process drawing of the manufacturing method of the circuit board in the comparative example 1 Explanatory drawing of the manufacturing method of the circuit board in the comparative example 1 Top view of circuit board in Comparative Example 1 Process drawing (1) of the manufacturing method of the organic TFT circuit board in Example 3 Process drawing (2) of the manufacturing method of the organic TFT circuit board in Example 3 Top view of organic TFT circuit board in Example 3 Structure diagram of image display device in embodiment 4 (1) Structure diagram of image display device in embodiment 4 (2)

  The form for implementing this invention is demonstrated below.

[First Embodiment]
A first embodiment will be described. The circuit board in the present embodiment will be described based on FIGS. 3 is a cross-sectional view taken along broken line 3A-3B in FIG. In the circuit board in the present embodiment, the wettability changing layer 12 containing a material that changes from a low surface energy state to a high surface energy state by applying energy to the surface of the substrate 11 is formed. The first conductive layer 13 formed on the region having the high surface energy state in the change layer 12, the interlayer insulating film 14 in which a through hole is formed on the first conductive layer 13, and the through hole in the interlayer insulating film 14 The second conductive layer 15 is formed on the substrate. In the circuit board according to the present embodiment, the second conductive layer 15 is discretely formed on the first conductive layer 13.

  Next, a circuit board manufacturing method according to the present embodiment will be described with reference to FIGS.

  First, as shown in FIG. 4A, the wettability changing layer 12 is formed on the substrate 11.

  Examples of the substrate used for the substrate 11 include a glass substrate, a SUS substrate, a semiconductor substrate such as an Si wafer, an inorganic substrate made of an inorganic material, a film substrate formed of an organic material, and the like. There is no particular limitation as long as an array, a display element, or the like can be formed. The film substrate is preferable from the viewpoint of light weight and robustness. Specifically, a polyimide (PI) substrate, a polyethersulfone (PES) substrate, a polyethylene terephthalate (PET) substrate, a polyethylene naphthalate (PEN) substrate, a polycarbonate ( PC) substrate, acrylic resin substrate, polyolefin substrate and the like can be used. In selecting a substrate to be the substrate 11, it is necessary to select in consideration of chemical resistance by the ink material to be used and heat resistance such as deformation / degeneration by heat treatment.

  The wettability changing layer 12 contains a material that changes from a low surface energy state to a high surface energy state by applying energy. That is, the wettability changing layer 12 contains a material whose critical surface tension (also referred to as surface free energy) is changed by applying energy such as heat, ultraviolet rays, electron beams, and plasma.

  In the wettability changing layer 12, energy is applied so that a region where the first conductive layer 13 is formed is in a high surface energy state. As the energy to be applied, ultraviolet rays and electron beams are particularly preferable from the viewpoint of forming a fine pattern. Further, in the case of an electron beam, if the wettability changing layer 12 is an organic material, it may be damaged and the insulating properties may be lowered, and a vacuum device is required, which tends to reduce the throughput. However, in the case of ultraviolet rays, even when the wettability changing layer 12 is made of an organic material, there is little possibility that the insulating property is lowered because it does not cause damage, and exposure in the atmosphere is possible. Particularly, it is preferable because of its high throughput.

  When energy is applied by ultraviolet irradiation, the wettability changing layer 12 is preferably a polymer material for a printing method for producing a device at low cost, and further, the side chain has photosensitivity and is hydrophobic. A polymer material having a functional group is preferred. By having a hydrophobic group in the side chain, a film with low surface free energy can be formed in a state where no ultraviolet ray is irradiated. This is because it decomposes and a high surface free energy region is formed, so that the contrast between the lyophilic liquid and the liquid repellent can be increased. In the present application, the lyophilic means that the liquid applied on the wettability changing layer easily spreads and the liquid repellency means that the liquid formed on the wettability changing layer is easily repelled. . Therefore, when the liquid applied to the wettability changing layer is water, the lyophilic means hydrophilic and the liquid repellent means water repellent.

  In this embodiment, the material whose critical surface tension changes is a rigid structure even if it is cut to some extent by ultraviolet rays. Therefore, by using polyimide with good filling properties for the main chain, the moisture absorption is so high. In addition, since the insulating property is good, more reliable wiring can be formed. Examples of the polyimide include a thermosetting polyimide generated by a dehydration condensation reaction by heating polyamic acid and a soluble polyimide soluble in a solvent. The soluble polyimide can form the wettability changing layer 12 by applying a coating solution dissolved in a solvent and volatilizing the solvent at a low temperature of less than 200 ° C. On the other hand, since the reaction does not occur unless the thermosetting polyimide is heated to such an extent that a dehydration condensation reaction occurs, it is generally necessary to increase the temperature to 200 ° C. or higher. Either thermosetting polyimide or soluble polyimide can be used depending on the application or process. Polyimide has a hygroscopicity of about 2%, but has a high insulating property and is stable, and can control wettability with high reliability.

  In the present embodiment, the wettability changing layer 12 preferably has a thickness of 30 nm to 3 μm, and more preferably 50 nm to 1 μm. When the thickness is less than 30 nm, sufficient functional characteristics as the wettability changing layer 12 may not be obtained. When the thickness is more than 3 μm, the shape of the surface deteriorates, and flatness and the like This is because there may be a problem.

  The wettability changing layer 12 can be formed by printing and baking by a printing method such as spin coating, spray coating, flexographic printing, ink jet printing, or die coating, thereby forming a wettability changing layer having a small surface energy.

  Next, as shown in FIG. 4B, ultraviolet rays are irradiated using a photomask 21 having an opening in a region where the first conductive layer 13 is formed. As a result, the wettability changing layer 12 in the region irradiated with ultraviolet rays changes to a high surface energy state. In this way, the low surface energy region 12 a and the high surface energy region 12 b are formed on the surface of the wettability changing layer 12.

  Next, as shown in FIG. 4C, a hydrophilic conductive ink is applied to the high surface energy region 12b of the wettability changing layer 12 and then baked, whereby the high surface of the wettability changing layer 12 is obtained. A first conductive layer 13 is formed on the energy region 12b.

  As a material constituting the first conductive layer 13, silver (Ag), gold (Au), copper (Cu), platinum (Pt), palladium (Pd), tungsten (W), nickel (Ni), tantalum ( Ta), bismuth (Bi), lead (Pd), indium (In), tin (Sn), zinc (Zn), titanium (Ti), aluminum (Al), or an alloy made of these materials, Alternatively, a hydrophilic conductive ink in which silver halide fine particles are dispersed, or a hydrophilic conductive ink made of a complex thereof can be used. In addition, hydrophilic conductive ink in which carbon nanotubes are dispersed, hydrophilic organic conductive ink such as PEDOT / PSS, polyaniline, and the like can be used. In particular, silver and copper are preferable because of their low resistance.

  Examples of the method for applying a liquid containing a conductive material such as conductive ink to the surface of the wettability changing layer 12 include spin coating, dip coating, screen printing, offset printing, and ink jet method. In particular, the inkjet method is preferable because it can supply small droplets and can be easily affected by the surface energy in the wettability changing layer 12. Furthermore, since the material utilization efficiency is extremely high in the ink jet method, a circuit board can be manufactured at a low cost.

  FIG. 5A shows a top view of the first conductive layer 13 formed on the high surface energy region 12b of the wettability changing layer 12 in this way.

  Next, as shown in FIG. 5B, a line-shaped interlayer insulating film 14a is formed between the first conductive layers 13 by a printing method.

Next, as shown in FIG. 5C, dot- like interlayer insulating films 14b and 14c are formed on and around the first conductive layer 13. The interlayer insulating film 14 includes a line-shaped interlayer insulating film 14a and dot-shaped interlayer insulating films 14b and 14c, and the line-shaped interlayer insulating film 14a and the dot-shaped interlayer insulating films 14b and 14c. Thus, the interlayer insulating film 14 having an opening is formed. The opening is for electrically connecting the first conductive layer 13 and the second conductive layer 15 as will be described later. Note that the dot-shaped interlayer insulating film 14c in the large area formed in the wettability changing layer 12 tends to have a thin film thickness in the peripheral portion, and therefore the dot-shaped interlayer insulating film 14b may be formed to overlap. preferable.

  Next, as shown in FIG. 5D, the second conductive layer 15 is formed in the region where the first conductive layer 13 is exposed in the opening of the interlayer insulating film 14. The second conductive layer 15 is preferably a printing method from the viewpoint of cost. In particular, a screen printing method is preferable from the viewpoint that a thick film can be formed and the throughput is high. Therefore, the 2nd conductive layer 15 is formed with the pixel electrode in a display part not shown using a conductive paste.

  Next, as shown in FIG. 5E, the FPC board 16 is connected using an AFC (Anisotropic Conductive Film) (not shown).

  In the circuit board according to the present embodiment, as shown in FIG. 3, since the second conductive layer 15 is formed on the interlayer insulating film 14, the space portion between the screen printing plate and the interlayer insulating film 14 is formed. Since the conductive paste for forming the second conductive layer 15 does not enter the electrode, a pattern that causes a short circuit between the electrodes is not formed. Further, a relatively large opening is required to ensure sufficient connection with the FPC board 16, but the opening formed in the interlayer insulating film is the opening of the through hole in the display portion formed inside. Since the area of the second conductive layer 15 is greatly different from the area of the pixel electrode in the display portion, it is difficult to set printing conditions for forming both simultaneously when forming by screen printing. is there.

  However, in the present embodiment, the second conductive layer 15 is discretely formed in the openings of the interlayer insulating film 14, so that the paste discharge amount can be made uniform in screen printing, and the printing conditions can be changed. Easy to set. In the present embodiment, since the FPC board 16 is connected on the first conductive layer 13 via the second conductive layer 15, it can be reliably connected even in the connection using the ACF. .

  In the screen printing, the pattern formed by the paste viscosity, pattern size, printing conditions, etc. may be formed in a rectangular shape or a circular shape, but like the circuit board in the present embodiment, As long as the second conductive layer 15 is formed discretely, the same effect can be obtained regardless of the shape, regardless of the shape of the pattern.

  Further, as shown in FIG. 6, the second conductive layers 15 are arranged in different patterns for each adjacent first conductive layer 13, thereby separating the second conductive layers 15 from each other. Since it can be formed, it is easy to obtain more electrical insulation, and it is possible to secure a wide margin for printing conditions in screen printing.

  Further, as shown in FIGS. 7 and 8, the region where the second conductive layer 15 is formed is not limited to a substantially square or a substantially circular shape, and is configured to be a substantially rectangular or substantially oval shape. May be. In this case, considering the screen printing conditions, the aspect ratio magnification is preferably 4 times or less.

  As the insulating paste for forming the interlayer insulating film, an inorganic filler or a material obtained by dissolving and dispersing an organic filler and a resin binder with an appropriate solvent is used. Inorganic fillers are particularly preferred because they are easy to control the particle size and shape and are excellent in heat resistance and durability. The inorganic filler needs to be an insulator, and it is preferable to use a general oxide, nitride or the like. The filler diameter (particle diameter) is optimal depending on the desired film thickness and resolution, but is preferably 1 μm or less, and is submicron (500 nm or less) when a fine pattern is formed. It is preferable. Further, by mixing fillers having different particle diameters, the insulating paste can have thixotropic properties and can be optimized for the use of patterns and screen meshes to be used.

  The resin binder has a function of supporting the filler, and an appropriate resin can be selected based on necessary characteristics and solubility of a solvent for forming an ink. Examples of the resin binder include polyvinyl alcohol resin, polyvinyl acetal resin, polyvinyl butyral resin, ethyl cellulose resin, methyl cellulose resin, acrylic resin, epoxy resin, phenol resin, and the like. The mixing ratio of the filler, binder and solvent can be optimized according to the printing conditions and the film thickness to be formed. The viscosity of the insulating paste can be optimized according to the shape of the pattern to be formed, but is preferably 50 Pa · s to 300 Pa · s. When the viscosity is too low, patterning failure occurs due to printing failure during screen printing or the flow of paste after printing, and when the viscosity is too high, peeling failure between the screen and the substrate occurs.

  The conductive paste used for the second conductive layer 15 is preferably a paste obtained by melting and dispersing a conductive filler and a resin binder in a solvent. As the conductor filler, fine particles of metal, alloy, metalloid, or conductive compound are used. The particle diameter of the fine particles can be optimized in accordance with the printing performance and pattern shape in the same manner as the insulating paste, but is preferably 1 μm or less, more preferably 500 nm or less. As for the resin binder, various resin materials can be used as in the case of the insulating paste. However, it is a requirement that the resin binder be a conductive material by contacting the fillers after drying the solvent. In addition, since the conductive paste can shrink the binder not only by drying but also by heat treatment, for example, a material that shrinks at a high temperature such as a thermosetting resin can be used. The viscosity of the conductive paste can be optimized according to the shape of the second conductive layer 15 to be formed, but is preferably 50 Pa · s to 300 Pa · s. When the viscosity is too low, patterning failure occurs due to printing failure during screen printing or the flow of paste after printing, and when the viscosity is too high, peeling failure between the screen and the substrate occurs. The thickness of the second conductive layer 15 to be formed needs to be optimized from the electrical characteristics, but is preferably in the range of 1 μm to 20 μm.

[Second Embodiment]
Next, a second embodiment will be described. In the present embodiment, unlike the first embodiment, the line-shaped interlayer insulating film 14a and the dot-shaped interlayer insulating film are formed without forming the dot-shaped interlayer insulating film 14b on the first conductive layer 13. After forming 14c, the second conductive layer 15 is formed in a line shape or a dot shape on the first conductive layer 13.

  In the present embodiment, as shown in FIGS. 9 and 10, the second conductive layer 15 may be formed immediately above the formed first conductive layer 13. In this case, it is not necessary to form the dot-like interlayer insulating film 14 b on the first conductive layer 13. 10 is a cross-sectional view taken along the broken line 10A-10B in FIG.

  Next, a method for forming a circuit board in the present embodiment will be described.

  FIG. 11A shows a top view of the first conductive layer 13 formed on the high surface energy region 12 b of the wettability changing layer 12.

  Next, as shown in FIG. 11B, a line-shaped interlayer insulating film 14a is formed between the first conductive layers 13 by a printing method.

Next, as shown in FIG. 11C, a dot- like interlayer insulating film 14c is formed on and around the first conductive layer 13. The interlayer insulating film 14 is composed of a line-shaped interlayer insulating film 14a and a dot-shaped interlayer insulating film 14c, and an interlayer insulating film having a line-shaped opening on the first conductive layer 13. 14 is formed. The opening is for electrically connecting the first conductive layer 13 and the second conductive layer 15 as will be described later.

  Next, as shown in FIG. 11D, the second conductive layer 15 is formed in the region where the first conductive layer 13 is exposed in the opening of the interlayer insulating film 14. The second conductive layer 15 is preferably a printing method from the viewpoint of cost. In particular, a screen printing method is preferable from the viewpoint that a thick film can be formed and the throughput is high. Therefore, the 2nd conductive layer 15 is formed with the pixel electrode in a display part not shown using a conductive paste.

  Next, as shown in FIG. 11E, the FPC board 16 is connected using an AFC (Anisotropic Conductive Film) (not shown).

  The contents other than those described above are the same as those in the first embodiment.

  Next, examples in the embodiment of the present invention will be described.

Example 1
Example 1 will be described. Example 1 is based on the first embodiment.

  As shown in FIG. 4A, a wettability changing layer 12 is formed on a glass substrate to be a substrate 11 subjected to wet cleaning. Specifically, a NMP solution of a thermosetting polyimide having a hydrophobic group in the side chain was spin-coated at a rotation speed of 1500 rpm, prebaked in an oven at 100 ° C. in a nitrogen atmosphere, and then at 200 ° C. in nitrogen. Post-baking is performed for 1 hour in an oven to form the wettability changing layer 12 having a thickness of about 100 nm. At this time, the surface of the wettability changing layer 12 is in a low surface energy state due to polyimide having a hydrophobic side chain.

Next, as shown in FIG. 4B, ultraviolet light (ultra-high pressure mercury lamp) having a wavelength of 300 nm or less is applied to the wettability changing layer 12 using a photomask having an opening corresponding to the wiring pattern. Irradiation is performed to form a region irradiated with ultraviolet light and a region not irradiated with light on the same film surface. In the wettability changing layer 12, a high surface energy region 12b irradiated with ultraviolet rays and a low surface energy region 12a not irradiated with ultraviolet rays are formed. The amount of ultraviolet irradiation applied was 8 J / cm ² . In this embodiment, the exposure is performed by a contact method or a proximity method using an exposure apparatus for liquid crystal. In contact-type exposure, although the resolution of the pattern is high, the wettability changing layer 12 and the photomask need to be brought into close contact with each other, and the surface of the photomask becomes soiled. Need to be cleaned. On the other hand, the proximity system is suitable for mass production although the wettability changing layer 12 and the photomask are not in contact with each other and the resolution may be somewhat lowered. In this embodiment, a photomask having a wiring pitch of 100 μm, a line width of 60 μm, a wiring interval (space) of 40 μm, and 100 wirings forming one block is used as the photomask.

  Next, as shown in FIG. 4 (c), a metal fine particle dispersion (nanometal ink) in which Ag particles having a particle size of about 30 nm are dispersed in an aqueous solvent is ejected by an ink jet method and selected on a high surface energy region. Was granted. In the case of the ink jet method, the metal fine particle dispersion liquid composed of relatively expensive Ag fine particles can be selectively supplied to the region where the first conductive layer 13 is formed. The utilization efficiency is also high, and the number of process steps can be reduced. Therefore, a circuit board can be formed at low cost. As nano-metal ink, water-based fine metal particle dispersion is used, so that it spreads over the entire high surface energy region and forms a fine pattern without depending on the size of the droplets supplied by the inkjet method. can do. After that, pre-baking is performed in an oven at 100 ° C. in the atmosphere, and further post-baking is performed in an oven at 200 ° C. for 1 hour in the atmosphere. The wiring pitch is 100 μm, the line width is 60 μm, and the wiring interval (space). A first conductive layer 13 having a thickness of 40 μm, a thickness of 150 nm, and 100 wirings forming one block was formed.

  Next, an interlayer insulating film 14 is formed. First, an insulating paste is produced. Specifically, it was prepared by uniformly dispersing silica fine particles in a resin in which a phenol resin was dissolved in ethylene glycol. Silica fine particles had a diameter of about 200 nm and were dispersed by kneading using a three-roll mill. Then, the viscosity was adjusted to 80 Pa · s by adding ethylene glycol, and an insulating paste was produced. In the produced insulating paste, the mass ratio of the resin binder, the silica fine particles and the solvent was analyzed, and the resin binder :: silica fine particles: solvent = 30: 40: 30.

  The interlayer insulating film 14 was formed by laminating a line-shaped interlayer insulating film 14a and dot-shaped interlayer insulating films 14b and 14c. Therefore, two types of screen plates for forming the interlayer insulating film 14 are used, one corresponding to the line-shaped interlayer insulating film 14a and one corresponding to the dot-shaped interlayer insulating films 14b and 14c. It was. For the screen plate, a polyester mesh is bonded to an aluminum die-cast plate frame (inner size 450 mm) with an outer dimension of 550 mm square, and then a stainless steel mesh is bonded to the square with 400 mm, and then the polyester mesh on the stainless mesh is removed. This produced a screen printing plate.

  The polyester mesh needs to be elastically deformed within the range of applied stress, and at the same time, preferably has a specification that can withstand high tension. Further, it is required to be a material that has elasticity and does not cause plastic deformation due to repeated expansion and contraction (a material that elastically deforms within the range of applied stress). Generally, a screen mesh of 360 mesh (360 per inch) can be used.

  A stainless mesh is pasted on the prepared polyester mesh. Since the stainless steel mesh has very little elastic deformation due to tension, unlike the polyester mesh, there is no pattern expansion / contraction due to tension, and a stable dimensional accuracy can be obtained. On the other hand, if a stress exceeding the limit is applied, plastic deformation occurs and the pattern shape is significantly deteriorated. Therefore, it is necessary to use a stainless steel wire having a material and thickness corresponding to high tension. In this example, a plate was produced using Asada mesh stainless steel mesh. The wire diameter was 19 μm, and the mesh density was 500 / inch. At this time, the warp direction of the mesh was inclined by 30 ° with respect to the plate frame and pasted together. This is to obtain a more uniform pattern by preventing moire caused by the period of the pattern to be printed and the mesh period.

  A screen mask can be obtained by coating a photosensitive emulsion on the screen mesh, exposing the shielding portion to ultraviolet light, and washing away the unexposed portion.

  As shown in FIG. 5C, the interlayer insulating film 14 was formed using the screen manufactured by the above-described method and the insulating paste. As a printing apparatus for performing screen printing, a screen printer MT-550 manufactured by Microtec was used. As the squeegee, a flat squeegee made of urethane rubber was used, and the angle between the screen surface and the squeegee was set to 70 °. Further, the distance (clearance) between the substrate 11 and the lower surface of the screen was set to 1.5 mm, and the squeegee scanning speed was set to 40 mm / s for printing. First, as shown in FIG. 5B, a line-shaped interlayer insulating film 14a is printed, and then heat treatment at 100 ° C. is performed to volatilize the solvent component, and as shown in FIG. The dot-like interlayer insulating films 14b and 14c are printed. Thereafter, a heat treatment was performed at 100 ° C. for 120 minutes, thereby forming an interlayer insulating film in which a through hole as an opening was formed. The shape of the through hole to be formed was substantially rectangular, and openings having a size of about 40 × 40 μm were formed at a pitch of 100 μm.

  Next, as shown in FIG. 5D, the pixel electrode and the second conductive layer 15 were formed on the formed interlayer insulating film. The screen is manufactured by the same method as that for the interlayer insulating film 14. The produced screen is for forming the pixel electrode and the second conductive layer 15. In the region for forming the second conductive layer 15, an opening having a size of about 50 × 50 μm is 100 μm. It is formed with a pitch.

  The conductive paste used for forming the second conductive layer 15 was a thermosetting silver paste. The printing method is substantially the same as that for forming the interlayer insulating film 14, and after the conductive paste is printed, heat treatment is performed at 100 ° C. for 60 minutes, and the produced second conductive layer 15 has a substantially rectangular shape. Seven second conductive layers 15 having a connection area length of 700 μm with a pitch of about 60 × 60 μm having a pitch of 100 μm were formed.

  Thereafter, as shown in FIG. 5E, the FPC board 16 is connected.

  When the second conductive layer 15 was observed with an optical microscope, it was confirmed that each electrode was formed uniformly and at the same time, there was no omission or contact with an adjacent electrode. Further, when the probe was brought into contact between the first conductive layer 13 and the second conductive layer 15, conduction was confirmed. Furthermore, in a pattern composed of 100 blocks, a voltage of 40 V was applied between the first conductive layers 13 between adjacent ones, and the current value was measured. Was very small and almost completely insulated.

  According to the present example described above, by applying energy to the substrate in the present embodiment, a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state and a high surface energy state are obtained. The first conductive layer 13 formed in the region (high surface energy region), the interlayer insulating film 14 separating the first conductive layer 13, and the second conductive layer 15 discretely on the interlayer insulating film 14 are separated. It was confirmed that good patterning was possible and that the film was electrically insulated.

(Comparative Example 1)
Next, Comparative Example 1 will be described with reference to FIGS.

  First, as shown in FIG. 12A, energy is applied to a substrate having a wettability changing layer formed thereon to form a high surface energy region, and the high surface energy region is formed on the formed high surface energy region. A first conductive layer 113 is formed. The substrate is shown as the substrate 111 in FIG. 13, and the wettability changing layer is shown as the wettability changing layer 112 in FIG. The first conductive layer 112 to be formed has a wiring pitch of 100 μm, a line width of 60 μm, a wiring interval (space) of 40 μm, a film thickness of 150 μm, and 100 wirings in one block.

  Next, as illustrated in FIG. 12B, a line-shaped interlayer insulating film 114 a is formed between the first conductive layers 113. The line-shaped interlayer insulating film 114a is formed by a printing method, but the wettability changing layer in the region where the line-shaped interlayer insulating film 114a is formed is in a low surface energy state (becomes a low surface energy region). It is easy to repel the printed insulating paste.

  Next, as shown in FIG. 12C, an opening is formed in a region where the second conductive layer 115 is formed by forming a large dot-like interlayer insulating film 114b. When forming the line-shaped interlayer insulating film 114a and the large dot-shaped interlayer insulating film 114b, an insulating paste in which silica fine particles are uniformly dispersed in a resin solution in which a phenol resin is dissolved in ethylene glycol is used. Using. In the screen printing, the distance (clearance) between the substrate 111 and the lower surface of the screen was 1.5 mm, and the squeegee scanning speed was 40 mm / s. Then, the solvent component was volatilized by performing heat processing for 120 minutes at 100 degreeC. The shape of the through hole thus formed is 700 μm × 40 μm.

  Next, as shown in FIG. 12D, the second conductive layer 115 is formed by a screen printing method. At this time, the pixel electrode of the display portion is also formed at the same time. Specifically, a pattern was formed by screen printing using a thermosetting silver paste. The screen printing method is almost the same as that of the interlayer insulating film described above. The heat treatment was performed at 100 ° C. for 60 minutes. As a result, the second conductive layer 115 is formed such that the pitch between the electrodes of the second conductive layer 115 is 100 μm, the size is 1000 μm × 60 μm, and the length of the region connected to the FPC board 116 is 260 μm.

  Thereafter, as shown in FIG. 12E, the FPC board 116 is connected.

  In Comparative Example 1, when the second conductive layer 15 was observed with an optical microscope, pattern formation failure occurred at the end portion of the second conductive layer 115, and the contact between adjacent electrodes was 100 per block. Eight were confirmed.

  Further, when a probe was brought into contact between the first conductive layer 113 and the second conductive layer 115, conduction was confirmed. Further, when a voltage of 40 V was applied between the first conductive layers 113 between the adjacent electrodes and the current value was measured, a current value of 1 μA or more was measured between some of the adjacent electrodes. When three blocks were measured, 12 electrodes, 8 electrodes, and 16 electrodes were in contact with each other and short-circuited, which was electrically defective.

  The cause of the failure in Comparative Example 1 will be described. FIG. 13 is a cross-sectional view in the step of FIG. 12D. Specifically, in FIG. 12D, the cross-sectional view taken along the broken line 13A-13B is shown in FIG. 13A and the broken line 13C-13D is shown. FIG. 13B shows a cross-sectional view taken along the line, and FIG. 13C shows a cross-sectional view taken along the broken line 13E-13F.

  A second conductive layer 115 is formed on the interlayer insulating film 114 in the connection region with the FPC substrate 116 for connection to the external drive circuit shown in FIG. As described above, in the case where the second conductive layer 115 is formed over the interlayer insulating film 114, the unevenness of the second conductive layer 115 becomes significant, and the AFC is connected to the FPC board 116. It is suitable when using. However, as shown in FIG. 13A, the second conductive layer 115 is composed of a region formed on the first conductive layer 113 and a region formed on the interlayer insulating film 114. A space is formed between the first conductive layer 113 and the interlayer insulating film 114 and the screen plate.

  Specifically, as shown in FIG. 14, the adjacent second conductive layers 115 in the regions 121 and 122 surrounded by the broken line come into contact with each other, causing a short circuit, resulting in a failure. there is a possibility. This is a particular problem in Comparative Example 1 and can be avoided by optimizing printing conditions such as increasing the viscosity of the conductive paste and the squeegee scanning speed, but the manufacturing margin is extremely narrow. This will decrease the yield.

  Therefore, in Comparative Example 1, it is considered that the electrodes contact each other and become defective.

(Example 2)
Next, Example 2 will be described. Example 2 is based on the first embodiment. In this example, the first conductive layer 13 was formed by the same method as in Example 1 as shown in FIG. The formed first conductive layer 13 has a wiring pitch of 100 μm, a line width of 60 μm, an electrode interval (space) of 40 μm, a film thickness of 150 μm, and 100 electrodes in one block. It is what.

  Next, as shown in FIG. 8, the pitch between the adjacent first conductive layers 13 remains 100 μm, and the pitch between the adjacent second conductive layers 15 is 200 μm, so Two conductive layers 15 are formed.

  At this time, silica fine particles are formed in a resin solution in which a phenol resin is dissolved in ethylene glycol as an insulating paste so that the shape of the through hole formed in the interlayer insulating film 14 is 80 μm × 40 μm (pitch 200 μm side is 80 μm). By using a uniformly dispersed film, a line-shaped interlayer insulating film 14a and dot-shaped interlayer insulating films 14b and 14c are formed, thereby forming an interlayer insulating film 14 having an opening. When screen printing was performed, the distance between the substrate and the lower surface of the screen (clearance) was 1.5 mm, and the squeegee scanning speed was 40 mm / s. The heat treatment conditions are as follows: after the line-shaped interlayer insulating film 14a is printed, heat treatment is performed at 100 ° C., and after the dot-shaped interlayer insulating films 14b and 14c are printed, the heat treatment is performed at 100 ° C. for 120 minutes. The solvent component was volatilized.

  Next, a second conductive layer 15 was formed by screen printing using a thermosetting silver paste. The screen printing conditions were the same as in the case of the interlayer insulating film 14, and the heat treatment conditions were performed at 100 ° C. for 60 minutes. The pitch of the adjacent second conductive layers 15 is 100 μm, the pitch of the second conductive layers 15 having the same pattern is 200 μm, the size of the second conductive layers 15 is about 100 μm × 60 μm, and the FPC board 16 The connection area length was set to 800 μm.

  When the second conductive layer 15 was observed with an optical microscope, it was confirmed that each electrode was formed uniformly and at the same time, there was no omission or contact with an adjacent electrode. Further, when the probe was brought into contact between the first conductive layer 13 and the second conductive layer 15, conduction was confirmed. Furthermore, in a pattern composed of 100 blocks, a voltage of 40 V was applied between the first conductive layers 13 between adjacent ones, and the current value was measured. Was very small and almost completely insulated.

(Example 3)
Example 3 is an organic TFT circuit substrate having a bottom gate structure. A method for manufacturing an organic TFT circuit substrate having a bottom gate structure will be described with reference to FIGS. FIG. 15 is a cross-sectional view, and FIG. 16 is a top view. The pitch of the TFT is 127 μm, and the pitch of the connection part with the FPC is 100 μm.

As shown in FIGS. 15 (a) and 16 (a), as in Example 1, a NMP solution of polyimide having a hydrophobic group in the side chain was applied onto a glass substrate 50 by spin coating, and the film thickness was 50 nm. The wettability changing layer 51 was formed. Next, using a photomask (not shown), ultraviolet rays (ultra-high pressure mercury lamp) having a wavelength of 300 n or less are irradiated so that the irradiation amount is 8 J / cm ^2, and a high surface energy region is formed on the wettability changing layer 51. Formed. Further, a metal fine particle dispersion liquid made of Ag fine particles is discharged to a high surface energy region by an ink jet method and baked at 180 ° C. to form a gate electrode 52 and a selection line 52a having an electrode width of 40 μm and a film thickness of 100 nm. At this time, as shown in FIG. 17, in the selection line connection block 71 formed around the region 70 where the display element is formed, the first conductive layer (not shown) is formed with a pitch of 127 μm and a line width of 60 μm. To do.

On top of this, a polyimide solution and a polyimide NMP mixed solution having a hydrophobic group in the side chain are applied by spin coating, baked at 180 ° C., and a wettability changing layer 53 having a thickness of 500 nm so as to cover the gate electrode 52. Formed. Next, using a photomask (not shown), ultraviolet rays (ultra-high pressure mercury lamp) having a wavelength of 300 n or less are irradiated so that the irradiation amount is 10 J / cm ^2, and high surface energy is formed on the wettability changing layer 53. The region is formed, and further, a metal fine particle dispersion liquid made of Ag fine particles is discharged to the formed high surface energy region by an ink jet method, and baked at 180 ° C., so that the source electrode 54, the drain electrode 55, and the newly synthesized 54a are Formed. At this time, as shown in FIG. 17, in the signal line connection block 72 formed around the region 70 where the display element is formed, the first conductive layer (not shown) is formed with a pitch of 127 μm and a line width of 60 μm. To do.

  Next, a channel is formed between the source electrode 54 and the drain electrode 55 by applying a coating solution in which triarylamine, which is an organic semiconductor material represented by the formula shown in Chemical Formula 1, is dissolved in a xylene / mesitylene mixed solvent. Then, it was dropped by an inkjet method and dried at 120 ° C. to form an organic semiconductor layer 56 having a thickness of 30 nm, thereby forming an organic transistor. In this embodiment, the wettability changing layer 52 has a function as a gate insulating film.

形成された有機トランジスタの特性を評価したところ、１２７μｍピッチの電極のパターン特性は良好であり、オンオフ比は５桁以上あり、４×１０^−３ｃｍ^２／Ｖｓの電界効果移動度を有する有機トランジスタを得ることができる。また、ゲート電極５２、ソース電極５４及びドレイン電極５５の密着性は良好であり、スクリーン印刷により、低コストで微細配線が可能な電子デバイスを作製することができる。

When the characteristics of the formed organic transistor were evaluated, the pattern characteristics of the 127 μm pitch electrode were good, the on / off ratio was 5 digits or more, and the field effect mobility was 4 × 10 ⁻³ cm ² / Vs. Can be obtained. In addition, the adhesion of the gate electrode 52, the source electrode 54, and the drain electrode 55 is good, and an electronic device capable of fine wiring at low cost can be manufactured by screen printing.

  Here, as the material for forming the semiconductor layer 56, the high molecular organic semiconductor material shown in Chemical Formula 1 was used, but organic semiconductor materials such as CdSe, CdTe, and Si, and organic low materials such as pentacene, anthracene, tetracene, and phthalocyanine were used. Molecules, polyacetylene conductive polymers, polyparaphenylene and derivatives thereof, polyphenylene conductive polymers such as polyphenylene vinylene and derivatives thereof, polypyrrole and derivatives thereof, polythiophene and derivatives thereof, and heterocyclic conductives such as polyfuran and derivatives thereof Organic semiconductors such as ionic conductive polymers such as ionic polymers, polyaniline and derivatives thereof can be used. In particular, an organic semiconductor is preferable because it can be manufactured at a low cost by a printing method.

  Next, as shown in FIG. 16B, an interlayer insulating film 58 having a through hole 57 is formed. As described above, the interlayer insulating film 58 is formed by a screen printing method or the like. The through hole 57 is formed on the drain electrode 55.

  Next, as shown in FIG. 16C, the pixel electrode 59 is formed so as to fill the formed through hole 57. Thereby, the drain electrode 55 and the pixel electrode 59 are connected.

  FIG. 15B is a cross-sectional view of this state. At this time, in the selection line connection block 71 shown in FIG. 17, a connection portion for connecting to the FPC board 73 is formed at the same time. In the selection line connection block 71, discrete second conductive layers between adjacent ones are alternately arranged. Specifically, as in the first and second embodiments, an interlayer insulating film having a through hole is formed by a line-shaped interlayer insulating film and a dot-shaped interlayer insulating film. The shape of the through hole 57 in the region 70 where the display element to be formed is formed is 25 μm × 35 μm and the pitch is 127 μm. The shape of the through hole for forming the second conductive layer is 25 μm × 35 μm, the pitch along the lead line is 100 μm, and the pitch in the direction perpendicular to the lead line is 127 μm.

  As the insulating paste, a resin solution in which a phenol resin is dissolved in ethylene glycol is used and silica fine particles are uniformly dispersed. The distance (clearance) between the substrate 50 and the lower surface of the screen is 1.5 mm, and the scanning speed of the squeegee is high. By forming at 40 mm / s, the interlayer insulating film 58 having an opening was printed. Since the size of the through hole formed in this way and the size of the through hole in the region 70 where the display element is formed are substantially equal, and the pitch of the formed through hole is also substantially the same, the printed pattern is large. There is no difference. For this reason, it was possible to print an interlayer insulating film in which through holes were formed satisfactorily. The heat treatment conditions for the printed interlayer insulation film are as follows. After printing the line-shaped interlayer insulation film, heat treatment is performed at 100 ° C., and after the dot-like interlayer insulation film is printed, the heat treatment is performed at 100 ° C. for 120 minutes. By performing, the solvent component was volatilized. Thereby, an interlayer insulating film 58 having a through hole was formed.

  Next, the pixel electrode 59 in the region 70 where the display element is to be formed and the second conductive layer in the selection line connection block 71 were formed on the formed interlayer insulating film 58 using a thermosetting silver paste. . As the method for forming the pixel electrode 59 and the second conductive layer, pattern formation is performed by screen printing using silver paste in the same manner as in the case of the interlayer insulating film, and then heat treatment is performed at 100 ° C. for 60 minutes. Formed by. The openings of the screen plate for forming the pixel electrode 59 in the region 70 where the display element is formed are formed at 60 μm × 60 μm and the pitch of 127 μm, and the shape of the opening for forming the second conductive layer is also 60 μm × It was formed at 60 μm and a pitch of 127 μm. The second conductive layer has a pitch in the direction along the lead line of 100 μm and a pitch in the direction perpendicular to the lead line of 127 μm. The size of the second conductive layer to be formed is about 75 μm × 75 μm, and the pitch in the lead-out direction is 127 μm, so that it is well separated. The connection area length, which is the width of the region connected to the FPC board, is about 635 μm.

  When the formation state of the second conductive layer was observed with an optical microscope, it was confirmed that each electrode was formed uniformly and at the same time, there was no omission or contact with an adjacent electrode. Further, when the probe was brought into contact between the first conductive layer and the second conductive layer in the selection line connection block 71 and the signal line connection block 72, conduction was confirmed. Furthermore, when a voltage of 40 V was applied between the first conductive layers between adjacent ones and the current value was measured, the amount of current was 10 pA or less, and the leakage current between adjacent electrodes was extremely small and almost completely insulated. It was confirmed.

  As shown in FIG. 17, FPC boards 73 and 74 are connected to the selection line connection block 71 and the signal line connection block 72, respectively.

Example 4
Example 4 is an image display device manufactured using the organic TFT circuit substrate in Example 3.

  Specifically, as shown in FIG. 18, an electrophoretic display element 61 and an upper substrate 63 on which a counter electrode 62 is formed are laminated on the organic TFT circuit substrate shown in FIG. 15B. The electrophoretic display element 61 is a microcapsule in which white particles made of negatively charged titanium oxide and black particles made of positively charged carbon black are dispersed with a dispersion liquid. The electrophoretic display element 61 is coated on the surface of the upper substrate 63 where the counter electrode 62 is formed by applying a coating solution in which an aqueous solution is mixed with a polyvinyl alcohol (PVA) binder to form a layer made of microcapsules and a PVA binder. An electrophoretic display sheet substrate is formed. The counter electrode 62 and the upper substrate 63 are made of a transparent material. For this reason, the counter electrode 62 is made of a transparent electrode such as ITO having transparency and conductivity. The thus formed electrophoretic display sheet substrate is bonded onto the organic TFT circuit substrate so that the upper substrate 63 side is the outermost surface.

  After that, as shown in FIG. 19, the electrode surface 74a of the FPC board 74 provided with the driver IC and the second conductive layer 15a in the signal line connection block 72 in the organic TFT circuit board are heated using AFC. They were connected by crimping. Similarly, the electrode surface of the FPC board 73 provided with the driver IC and the second conductive layer in the selection line connection block 71 in the organic TFT circuit board were connected by thermocompression bonding using AFC. The thermocompression bonding conditions were performed at a temperature of 200 ° C. and applying a load of 1.5 MPa. A scanning signal driver IC was connected to the selection line 52 a connected to the gate electrode 52, and a data signal driver IC was connected to the signal line 54 a connected to the source electrode 54. When display was performed on the electrophoretic display device at the voltage Vpp = 30 V and the selection line voltage Vpp = 30 V in the signal line 54a, an image with sufficient contrast and resolution could be obtained.

  As mentioned above, although the form which concerns on implementation of this invention was demonstrated, the said content does not limit the content of invention, and it does not deviate from the range described in the claim, but various in the embodiment mentioned above. It is possible to add variations and substitutions.

11 Substrate 12 Wetting Change Layer 13 First Conductive Layer 14 Interlayer Insulating Film 14a Line Interlayer Insulating Film 14b Dot Interlayer Insulating Film 14c Dot Interlayer Insulating Film 15 Second Conductive Layer 16 FPC Substrate

JP-A-2005-310962 JP 2007-123665 A JP 2007-95783 A

Claims (14)

On the substrate, a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy;
A first conductive layer comprising a plurality of regions formed on a region of a high surface energy state in the wettability changing layer;
An interlayer insulating film formed in a line shape on the wettability changing layer between a plurality of regions of the first conductive layer;
An interlayer insulating film formed in a dot shape on the first conductive layer;
A second conductive layer formed on the first conductive layer in a region surrounded by the line-shaped interlayer insulating film and the dot-shaped interlayer insulating film ;
And the second conductive layer is connected to a connection electrode of a flexible substrate for signal input / output. On the substrate, a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy;
A first conductive layer comprising a plurality of regions formed on a region of a high surface energy state in the wettability changing layer;
An interlayer insulating film formed on the wettability changing layer between the plurality of regions of the first conductive layer and on the first conductive layer at a predetermined interval;
Without Rukoto is formed on the interlayer insulating film, a second conductive layer formed on the first conductive layer,
And the second conductive layer is connected to a connection electrode of a flexible substrate for signal input / output. The first conductive layer is formed in a line shape,
3. The pattern of the second conductive layer formed on the first conductive layer is different from each other on the adjacent first conductive layer. 4. Circuit board.   The circuit board according to claim 1, wherein the interlayer insulating film contains a binder having an insulating filler and a resin material as a main component.   5. The circuit board according to claim 1, wherein the second conductive layer is mainly composed of a binder having fine particles made of a conductive material and a resin material. A circuit board according to any one of claims 1 to 5;
An image display device comprising: a display element.   The image display device according to claim 6, wherein the pixel electrode formed in the display element and the second conductive layer are formed of the same material. In the case where an interlayer insulating film is also formed on the first conductive layer of the circuit board, a first opening serving as a region where the interlayer insulating film is not formed,
The image according to claim 7, wherein the second opening for connecting the pixel electrode and the electronic circuit for driving the pixel electrode in the display element has substantially the same size. Display device. On the substrate, a wettability changing layer forming step of forming a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy;
An energy application step of applying energy to the wettability changing layer and setting a plurality of the energy-applied regions as high surface energy regions;
A first conductive layer forming step of forming a first conductive layer comprising a plurality of regions on the plurality of high surface energy regions;
An interlayer insulating film forming step of forming an interlayer insulating film on the wettability changing layer between the plurality of regions of the first conductive layer;
A second conductive layer forming step of forming a second conductive layer in a region where the interlayer insulating film is not formed on the first conductive layer without being formed on the interlayer insulating film;
A method of manufacturing a circuit board, comprising: On the substrate, a wettability changing layer forming step of forming a wettability changing layer containing a material that changes from a low surface energy state to a high surface energy state by applying energy;
An energy application step of applying energy to the wettability changing layer and setting a plurality of the energy-applied regions as high surface energy regions;
A first conductive layer forming step of forming a first conductive layer comprising a plurality of regions on the plurality of high surface energy regions;
A first interlayer insulating film forming step of forming an interlayer insulating film in a line shape on the wettability changing layer between a plurality of regions of the first conductive layer;
A second interlayer insulating film forming step of forming an interlayer insulating film in the form of dots at predetermined intervals on the first conductive layer;
A second conductive layer forming step of forming a second conductive layer in a region where the interlayer insulating film is not formed on the first conductive layer;
A method of manufacturing a circuit board, comprising:   11. The method for manufacturing a circuit board according to claim 9, wherein the interlayer insulating film is formed by a screen printing method.   12. The method for manufacturing a circuit board according to claim 9, wherein the second conductive layer is formed by a screen printing method.   The second conductive layer is connected to a connection electrode on a flexible substrate for signal input / output, and the connection electrode is directly above the first conductive layer via the second conductive layer. The method for manufacturing a circuit board according to claim 9, wherein the circuit board is connected. A method for manufacturing a circuit board according to any one of claims 9 to 13, comprising:
An electronic circuit for driving the display element is formed on the substrate,
The pixel electrode for driving the display element is formed together with the second conductive layer in the second conductive layer forming step.

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