JP5429848B2 - Organic field effect transistor - Google Patents

Description

  The present invention relates to an organic field effect transistor in which a source electrode and a drain electrode are provided on a substrate, and an organic semiconductor layer is provided on the substrate, the source electrode, and the drain electrode.

As this type of organic field effect transistor (OFET), there are various forms as shown in the cited documents 1 to 4, all of which have their own merits and demerits.
In order to overcome the disadvantages inherent in both the top contact structure (TC) and the bottom contact structure (BC) and to locally control the in-plane orientation of the organic semiconductor layer, the inventor disclosed in Patent Document 4 The invention shown is proposed.
In the present invention, a bottom contact structure is provided in which a source electrode and a drain electrode (S / D) are embedded in an insulating layer. By adopting the bottom contact structure, the OFET exhibits excellent device characteristics such as higher mobility and lower threshold voltage in both the BC and TC structures (see Non-Patent Document 1).
In the present invention, this is caused by a smooth and flattened structure or a concave bent line of the insulating layer. The flatness between the smooth S / D electrode and the insulating layer greatly improves organic semiconductor growth in that region. The concave bent line leads to selective growth of organic crystals (graphoepitaxy). In other words, they enhance the charge injection capability from the source electrode to the organic semiconductor layer and improve the charge transport in the conduction channel.
However, in a bottom contact type OFET having a bottom gate structure, it is almost impossible to embed an S / D electrode in an ultra-thin insulating layer (typical thickness is 10 nm or less).
It has an ultra-thin gate insulating layer such as a self-assembled monolayer (see Non-Patent Document 2) and a large gate capacitance, and therefore it is possible to obtain a low operating voltage. Furthermore, the top gate structure is widely used in mature inorganic FETs such as Si FETs. Therefore, realization of the high performance OFET is strongly desired.
JP2007-042852 JP2007-227907 JP 2008-205284 A JP 2008-041914 A Xu, et al., Adv. Mater. 19, 371 (2007); Appl. Phys. Lett. 90, 223512 (2007); Thin Solid Films 516, 2776 (2008) Klauk, et al., Nature 445, 745 (2007)

  In view of such circumstances, the present invention has an object to provide a structure that solves the above-described problems.

The organic field effect transistor of the invention 1 includes a source electrode and a drain electrode provided on a substrate, an organic semiconductor layer provided on the substrate, the source electrode and the drain electrode, and a gate on the organic semiconductor layer. An organic field effect transistor in which an insulating film and a gate electrode are formed, and a source electrode and a drain electrode are embedded in a substrate ,
The substrate is formed with recesses at the respective locations where the source electrode and the drain electrode are disposed, and the source electrode and the drain electrode are disposed within the recess, and both side walls of the recess open toward the top. The organic semiconductor layer is provided so as to include a region formed between inclined surfaces formed on both side walls of the recess and side walls of the source electrode and the drain electrode. It is characterized by comprising.

With the configuration as described above, the above-described problem has been solved.
Specifically, in the case of the top gate structure / bottom contact architecture in which the S / D electrode is embedded in the substrate, as compared with the bottom gate / bottom contact type OFET in which the S / D electrode is embedded in the insulating layer, the insulation An ultra-thin gate insulating layer can be used as the layer. Thereby, there is an advantage that all the advantages of the ultra-thin gate insulating layer can be utilized.
Furthermore, compared to a normal top gate / bottom contact OFET, the growth of the organic semiconductor on the structured substrate is caused by the presence of the inclined surface of the recess, as well as the embedded S / D electrode and the top surface of the substrate. It is improved by the coplanarity. In this way, an improved carrier injection into the organic semiconductor from the source, there is an advantage that the trap density is decreased at the interface between the organic semiconductor and the gate insulating layer.

The present invention relates to an improvement in an organic field effect transistor in which a source electrode and a drain electrode are provided on a substrate, and an organic semiconductor layer is provided on the substrate, the source electrode, and the drain electrode.
Regarding the materials and shapes of these constituent parts, it has been clarified that various kinds of materials can be used not only from the cited references but also from various known materials.
Therefore, based on the gist of the present invention, the following examples can be easily modified based on known examples, and these are also included in the scope of the present invention.
The substrate is a source electrode, a drain electrode, an organic semiconductor layer, a gate insulating film, a base for forming the gate electrode, and is not limited. For example, silicon, glass, or a plastic film is preferably used. Can do.
The source electrode can apply an electric field to the drain electrode to inject carriers into the organic semiconductor layer, and the drain electrode can apply an electric field to the source electrode to transfer carriers from the organic semiconductor layer. Can be made to flow. The same source electrode and drain electrode can be adopted in the configuration and are not limited as long as they have conductivity, but Au, Pt, Al, Cu, Cr or a laminate of these may be used. It can be used suitably. The thicknesses of the source electrode and the drain electrode are not limited, but are preferably in the range of 1 nm to 1 μm, for example, and more preferably in the range of 10 nm to 100 nm.
The organic semiconductor layer is a layer having a function of adjusting a current flowing between the source electrode and the drain electrode by a voltage applied by the gate electrode, and is not limited to, for example, pentacene, C ₆₀ , phthalocyanine Such as low molecules and polymers such as P3HT and MEH-PPV can be suitably used. Note that the organic semiconductor layer according to this embodiment is formed so as to cover the source electrode, the drain electrode, and the region between the source electrode and the drain electrode on the substrate.
The gate insulating layer is formed on the organic semiconductor layer. The gate insulating layer is a film having a function of insulating the formed organic semiconductor layer and the gate electrode, and is not limited as long as it has insulating properties. molecular _{layer, SiO 2, SiN x, Al} 2 O 3, Ta 2 O 5, Ba x Sr 1-x TiO 3 (BST) inorganic insulating material such as, or PVA, PVP, preferably an organic insulating material such as PMMA Can be used.
The gate electrode can induce carriers in the organic semiconductor layer by applying a voltage, and is not limited as long as it has conductivity. For example, Au, Pt, Al, Cu, Cr Or what laminated | stacked these two or more can be used suitably. The thickness of the gate electrode is not limited, but is preferably in the range of 1 nm to 1 μm, for example, and more preferably in the range of 10 nm to 100 nm.
Note that the source electrode and the drain electrode are formed so as to overlap with the gate electrode with the gate insulating film interposed therebetween. By doing in this way, a gate electrode can be made to correspond to the whole channel region between a source electrode and a drain electrode, and the induction | guidance | derivation of the carrier in an organic-semiconductor layer can be performed reliably.
And the space | interval (inside-inside space | interval) of the recessed part on the board | substrate which installs these both electrodes is equivalent to the length of a channel. This length can be reduced to a few nanometers.

In this embodiment, a top gate / bottom contact type OFET having the structure shown in FIG. 1 is illustrated.
In FIG. 1, a substrate (1), a gate insulating film (2), a gate electrode (3), an organic semiconductor (4), a source electrode (5), and a drain electrode (6) are shown. The groove-like recesses (9) and (10) formed in the substrate (1) are for embedding the source electrode (5) and the drain electrode (6).
The structure of the gate electrode (3) reduces the parasitic capacitance between the gate electrode (3) and the source electrode (5) and the parasitic capacitance between the gate electrode (3) and the drain electrode (6).
The left and right side walls (9a), (9b), (10a), and (10b) of the recesses (9) and (10) are inclined with respect to the bottom surface so that the intervals are increased upward.
Hereinafter, a method of embedding both electrodes (5) and (6) in the substrate (1) will be described in detail. (See Figure 2)
<Step 1>
A clean substrate (1) is prepared (FIG. 2a).
In this example, a silicon (001) substrate having a thickness of 500 μm was used after being cleaned by an ultrasonic cleaning method (acetone + methanol).
<Step 2>
Pattern the photoresist on the substrate (1) using conventional lithography (FIG. 2b).
The substrate (1) is mounted on a lithographic apparatus, and a photoresist layer (20) is formed on the surface thereof in a pattern that releases portions corresponding to the recesses (9) and (10).
As an example, in order to form the source / drain electrodes (9) and (10), the photoresist was patterned using a photomask with a channel length of 10 μm.
<Step 3>
A portion of the region on the substrate (1) that is not protected by the photoresist layer (20) is etched (FIG. 2c).
As the etching method, dry etching (reactive ion etching method) is used, and etching is performed until the depth corresponding to the recesses (9) and (10) becomes 30 nm, so that the recesses (9) and (10) are formed on the substrate. It formed on the surface of (1).
The method of forming the recesses in the substrate is not limited. For example, when the substrate is an inorganic insulator, a chemical etching method or a reactive ion etching method is used. When the substrate is an organic insulator, a precise mold is used. Thus, a molding method that can form a taper at the same time as forming the recess by embossing the semi-molten insulating film can be suitably used. Note that treatment by chemical etching on an inorganic insulator is more desirable because a gentle taper can be spontaneously formed using an isotropic etching action. A well-known method can be employed for the etching process, and the etching process is not limited.
<Step 4>
A conductive material constituting the S / D electrode is deposited on the recesses (9) and (10) and the photoresist layer (20) (FIG. 2d).
As the conductive material, gold / chrome was used and deposited on the recesses (9) and (10) and the photoresist layer (20) by a vacuum deposition method.
In addition, although not limited thereto, in this means, it is desirable that the height of the source electrode and the drain electrode is substantially the same as the height of the substrate. Thereby, the flatness of the organic semiconductor layer can be ensured, and the injection barrier and the contact resistance can be reduced. Here, “substantially the same” is a concept that includes not only the completely same but also an error range.
<Step 5>
The photoresist layer (20) and the conductive material deposited thereon are removed and the substrate (1) is washed (FIG. 2e).
The photoresist layer (20) was removed as an NMP solution, and then the surface of the substrate (1) was cleaned by an ultrasonic cleaning method using an acetone + methanol solution.
<Step 6>
An organic semiconductor layer (4) is formed on the substrate (1) (FIG. 2f).
An organic semiconductor layer (4) having a thickness of 40 nm and made of pentanecene was formed by vacuum deposition.
A method for forming the organic semiconductor layer is not limited, and for example, a vacuum deposition method, a molecular beam deposition method, an ink jet method, and a spin coating method can be used.
<Step 7>
An insulating layer (2) is formed on the organic semiconductor layer (4) and the surface of the substrate (1) (FIG. 2g).
An insulating layer (2) made of SiO ₂ and having a thickness of 50 nm was formed by sputtering deposition.
The formation of the gate insulating film is not limited as long as the gate insulating film can be formed. For example, when the gate insulating film is an inorganic insulator, a sputtering method can be suitably used. When the gate insulating film is an organic insulator, a spin coating method can be suitably used. .
<Step 8>
A gate electrode (3) is formed on the insulating layer (2) (FIG. 2h).
A gate electrode (3) made of aluminum and having a thickness of 30 nm was formed by vacuum deposition.
Although formation of a gate electrode is not necessarily limited as long as a gate electrode can be formed, For example, a vacuum evaporation method and sputtering method can be used conveniently.

  Organic semiconductor growth on the structured substrate was improved due to the presence of the recessed fold line (tilted surface) and the coplanarity of the embedded S / D electrode and the top surface of the substrate. Thereby, the carrier injection from the source to the organic semiconductor was improved, and the mobility was improved.

BRIEF DESCRIPTION OF THE DRAWINGS It is the schematic which shows the top gate / bottom contact type OFET of an Example, (a) is a front view, (b) is a partially cutaway perspective view, (c) is an enlarged front view which shows the structure of a recessed part. It is a schematic front view which shows the manufacturing procedure of OFET of FIG.

Explanation of symbols

(1) Substrate (2) Gate insulating film (insulating layer)
(3) Gate electrode (4) Organic semiconductor layer (5) Source electrode (6) Drain electrode (9) (10) Groove-shaped recess (9a) (9b) (10a) (10b) Left and right side walls (20) Photoresist layer

Claims (1)

Source and drain electrodes are provided on the substrate, these substrates, Ri Na and an organic semiconductor layer is provided over the source electrode and the drain electrode, further a gate insulating film and a gate electrode on the organic semiconductor layer is formed an organic field-effect transistor,
The source and drain electrodes are embedded in a substrate ;
The substrate is formed with recesses at the respective locations where the source electrode and the drain electrode are disposed, and the source electrode and the drain electrode are disposed within the recess, and both side walls of the recess open toward the top. Is inclined with respect to the bottom surface,
An organic field effect characterized in that the organic semiconductor layer is provided including a region formed between inclined surfaces formed on both side walls of the recess and side walls of the source electrode and the drain electrode. Transistor.