JP2008205284A - Organic field effect transistor and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To dramatically improve electric properties in an organic semiconductor layer by reducing a carrier trap to effectively influence transistor characteristics in an organic FET. <P>SOLUTION: The production manufacturing method for an organic field effect transistor comprising on a substrate 11 a gate electrode 14, a gate insulating film 15, a source electrode 12, a drain electrode 13 and an organic semiconductor layer 16 disposed at least in a channel region 17 between the source electrode 12 and the drain electrode 13 comprises a step of forming the organic semiconductor layer 16 with a film thickness distribution of 30% or lower with respect to a film thickness in the central part of the channel region 17 by applying a solution including an organic semiconductor compound on at least a channel forming region in the substrate 11 and drying. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an organic field effect transistor and a method for manufacturing the same. More specifically, the present invention relates to an organic field effect transistor including an organic semiconductor layer having high uniformity in molecular orientation and a method for manufacturing the same.

  In recent years, an IC technique using an organic field effect transistor (hereinafter sometimes referred to as an organic FET) using an organic semiconductor has been proposed. The main advantage of this technology is its simple manufacturing method and compatibility with flexible substrates. These advantages can be expected for use in low-cost IC technology and are suitable for applications such as smart cards, RF tags, displays, and the like.

  Some organic FETs have a gate electrode, a gate insulating film, source / drain electrodes, and an organic semiconductor layer on a substrate 1 (see, for example, Patent Document 1). In this organic FET, a gate electrode is formed on a part of a substrate, the gate electrode and the substrate are covered with a gate insulating film, and source / drain electrodes are formed on the gate insulating film so as to sandwich a region corresponding to the gate electrode. The source / drain electrodes and the gate insulating film are covered with an organic semiconductor layer.

  By the way, when the organic semiconductor layer is made of a low molecular weight organic semiconductor compound represented by pentacene (hereinafter abbreviated as a low molecular weight compound), the film is formed by a vacuum deposition method because of poor solubility. Often. On the other hand, a high molecular organic semiconductor compound (hereinafter abbreviated as a high molecular compound) has high solubility, and specifically, fluorene bithiophene represented by poly (3-hexylthiophene) (P3HT) and F8T2. Copolymers, poly (phenylene vinylene), etc. are superior in solubility compared to low molecular weight compounds and can be formed by a printing method, so that an organic FET is manufactured at low cost under atmospheric pressure. be able to.

In the case of coating film formation by a printing method, a film in which an organic semiconductor compound is dissolved in a solvent is applied and dried. In the process of evaporating and evaporating the solvent, the droplet into which the solution is dropped is formed into a film from the peripheral edge side where evaporation is fastest because evaporation at the peripheral edge is faster than evaporation at the central part. In the process of forming a film from the peripheral side, the droplet is not allowed to shrink (pinning phenomenon) and deforms, resulting in convection of solvent and solute toward the peripheral side. As a result, the solute concentrates on the peripheral edge where the droplets start to dry initially, and finally a ring-shaped film is formed (see coffee stain phenomenon: see Non-Patent Document 1). When such a phenomenon occurs, the film in which the droplets are dried has a film thickness unevenness in which the film thickness is thick at the peripheral portion and thin near the center portion. In some cases, the substrate is exposed in a portion where the film thickness is thin, and a portion without a film may be generated.
Unevenness of film thickness generated in the organic semiconductor layer leads to non-uniformity of carrier transfer efficiency, etc., and when a part without a film occurs, it leads to the carrier transfer being stopped, and the performance of the film and the device using the film is deteriorated. Cause.

  In addition to these problems, low molecular weight compounds generally have a strong cohesive force of the compounds themselves. Therefore, when a film is simply formed by a method such as an ink jet method, a dispenser method, or screen printing, a nucleus is formed by solvent evaporation. A large number of generations occur, and there is almost no uniformity and continuity as a film, in which aggregates of minute nuclei of submicron size are dispersed. In the case of high molecular compounds, strict ordering of molecular arrangement is not required compared to low molecular compounds, but when film thickness unevenness or discontinuous parts of the film occur as described above, field effect transfer Degradation of the temperature characteristics. Regardless of low molecular weight or high molecular weight, it is extremely important to ensure the uniformity of the thickness of the organic semiconductor layer in the organic FET.

  As a method for preventing the formation of a non-uniform film thickness due to the pinning phenomenon, there is a method of applying a droplet having a large surface free energy to a low surface free energy substrate. In this case, the pinning phenomenon does not occur, and the solute moves to the center of the droplet as the droplet is dried and gathers at one point without limit. However, this method is a state in which molecules are randomly assembled at one point, and it is impossible to ensure crystallinity and film continuity.

  In order to improve the transistor characteristics of organic FETs, the uniformity and continuity of the film of the organic semiconductor layer is improved, the order of the arrangement of organic molecules within the film is increased, and carrier hopping conduction can be performed as smoothly as possible. It is important to do so. In the organic semiconductor layer, when the film thickness is uneven, the voltage and carriers are concentrated locally, and when the fine aggregates are dispersed, the carriers cannot conduct between discontinuous microcrystals. Is impossible to express. In order to make carrier conduction smooth, it is necessary to produce a highly uniform film having uniform applied voltage and no interface between microcrystals serving as carrier traps or a disordered molecular arrangement.

Japanese Patent Application No. 2003-520882 Surface Science 24 (2), 90-97 2003.

As a result of intensive studies, the present inventors have reached the present invention by finding a method for effectively reducing the number of carrier traps that affect transistor characteristics and greatly improving the electrical properties in the organic semiconductor layer.
That is, when forming an organic semiconductor layer in an organic FET, the present invention forms a highly uniform film by controlling the shape of the coating solution, and as a result, improves the carrier transfer characteristics of the organic semiconductor layer, The main purpose is to maximize the semiconductor properties of the layer.

Thus, according to the present invention, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an organic semiconductor layer disposed at least in a channel region between the source electrode and the drain electrode are formed on a substrate. A method for manufacturing an organic field effect transistor comprising: a solution containing an organic semiconducting compound is applied to at least a channel formation region on the substrate and dried; An organic field effect transistor manufacturing method for forming the organic semiconductor layer within 30% is provided.
Moreover, according to another viewpoint of this invention, the organic field effect transistor manufactured with the manufacturing method of the said organic field effect transistor is provided.

  According to the present invention, an organic field effect transistor can be obtained in which carrier traps that effectively affect transistor characteristics are reduced, and electrical properties in the organic semiconductor layer are greatly improved.

  The organic field effect transistor manufacturing method of the present invention is disposed on a substrate in a gate electrode, a gate insulating film, a source electrode, a drain electrode, and at least a channel region between the source electrode and the drain electrode. A method of manufacturing an organic field effect transistor comprising an organic semiconductor layer, wherein a solution containing an organic semiconducting compound is applied to at least a channel formation region on the substrate and dried so that a film thickness distribution is at the center of the channel region. The organic semiconductor layer having a thickness of 30% or less is formed.

That is, in the present invention, when forming the organic semiconductor layer in the organic FET, the distribution of the evaporation rate of the droplets is suppressed by controlling the height difference of the droplets applied in the channel formation region, as described above. In addition, the film thickness distribution in the channel region is within 30% of the film thickness at the center of the channel region, and an organic semiconductor layer having good uniformity, continuity, and crystallinity is formed.
Here, the channel region in which the organic semiconductor layer is formed is a region between the source electrode and the drain electrode in the organic FET and effectively acting on carrier movement. The channel forming region means a region corresponding to between the source and drain electrodes before the organic semiconductor layer is formed or between these electrodes.

  In the present invention, a region to which a solution containing an organic semiconductor compound (hereinafter sometimes referred to as a solution or a droplet) is applied is limited to the channel formation region, but includes the channel formation region and its periphery. You may go out. Even if the applied droplets protrude from the channel formation region, the coating film formed outside the channel formation region can be ignored as a portion that does not affect carrier movement.

In the present invention, when droplets are dropped on at least the channel formation region on the substrate as described above and then dried to form the organic semiconductor layer, the evaporation rate of the droplets in the channel formation region is made uniform. As a specific method for this purpose, for example, as shown in FIG. 1, the relationship between the lowest height h1 and the highest height h2 of the droplet 16a in the channel formation region 17a is such that h1 is not 0 and h2 ( (Numerator) / h1 (denominator) is controlled to 2 or less. FIG. 1 shows a state in which droplets are dropped on the substrate in the manufacturing process of the bottom gate / bottom contact type organic FET.
Such a relationship between the lowest height h1 and the highest height h2 of the droplet is also applied to the manufacturing process of organic FETs having other structures as shown in FIGS. 2 to 4 show the state in which droplets are dropped on the substrate in the manufacturing process of bottom gate / top contact type, top gate / bottom contact type and other bottom gate / bottom contact type organic FETs, respectively. Yes. Details of various structures of the organic FET will be described later.

When h2 / h1 is larger than 2, an organic semiconductor layer having low uniformity, continuity, and crystallinity is formed due to a difference in the drying rate distribution of the droplets. Further, when h1 is 0, the organic semiconductor layer has a large film thickness unevenness in which the above-mentioned film thickness distribution exceeds 30%. In addition, the case where the lowest height h1 of the droplet is 0 means that the channel formation region is not partially filled with the droplet and exposed, or the droplet peripheral edge exists in the channel formation region. Is 0.
The height h1 is 1 to 3000 μm, preferably 1 to 2000 μm, and the height h2 is 1 to 6000 μm, preferably 1 to 4000 μm. With a droplet height of 6000 μm or more, when the semiconductor layer is formed with a size of 500 μm □, which is the upper limit of the substantial organic semiconductor element size, the film thickness of the semiconductor layer exceeds 500 nm in consideration of the solution concentration. In addition, it is not preferable to form a droplet having a height higher than 6000 μm in a 500 μm square size semiconductor formation region by the lyophilic / repellent patterning process because a stable state of the droplet cannot be maintained on the surface of the coating object.

The relationship between the height h1 and the height h2 (h1 ≠ 0, h2 / h1 ≦ 2) is controlled by the following methods (i) to (iii).
(I) The amount of droplets dropped onto the channel formation region is controlled. In this case, a predetermined amount of liquid droplets may be dropped from a single dropping position, or a predetermined amount of liquid may be dropped in multiple times (multi-stage dropping) while shifting the dropping position.
(Ii) The surface of the channel formation region is subjected to lyophilic patterning, or the periphery of the channel formation region is subjected to lyophobic patterning, and then the lyophilic patterning processed channel formation region or the inner side of the lyophobic patterning process is performed. A predetermined amount of droplets are dropped on the region. Here, the liquid repellent patterning process is a process in which the surface of an object to be coated is processed into a pattern with a liquid repellent fluorine-based or alkyl-based compound, and droplets are repelled in the area subjected to the liquid repellent patterning process. Not applied. In addition, the lyophilic patterning treatment is to treat the surface of an object to be coated with a lyophilic compound or by irradiating vacuum ultraviolet light with a wavelength of 100 to 200 nm into a pattern. The area improves the wettability of the droplets. In this way, it is possible to form a film by limiting the wettability of the droplets and limiting the applied droplets within a predetermined region. The compounds used for lyophilic / repellent patterning are resin compounds and silane coupling compounds, respectively.
(Iii) The bank or groove is formed around the channel formation region, and droplets are dropped on the inner channel formation region surrounded by the bank or groove to define the shape of the coating region.
The application of the droplets in the above (i) to (iii) onto the substrate can be performed using a dispenser.

In the present invention, the method for drying the droplets applied onto the substrate is preferably performed by heating the substrate from the viewpoint of the simplicity of the drying apparatus. In addition, the heating method using infrared lamp irradiation is not preferable because the semiconductor compound molecules are vibrated and excited to suppress crystallization.
The substrate heating temperature is suitably 60 to 250 ° C., and the droplet drying time is suitably 1 to 30 minutes.
Hereinafter, the organic FET having various structures and the manufacturing process thereof according to the present invention will be specifically described with reference to the drawings.

(Embodiment 1)
FIG. 5 shows a bottom gate / bottom contact type organic FET of the present invention, where (b) is a plan view, (a) is a cross-sectional view along line AA in (b), and (c) is B in (b). FIG.
The organic FET 10 is obtained by drying the droplet 16a in FIG. 1 to form the organic semiconductor layer 16, and includes a square substrate 11, a rectangular gate electrode 14 formed on the substrate 11, and a gate electrode. 14 and the gate insulating film 15 covering the substrate 11, the rectangular source electrode 12 and drain electrode 13 formed on the gate insulating film 15 at positions above the longitudinal ends of the gate electrode 14, and the source electrode 12 and drain electrode 13 and an organic semiconductor layer 16 that covers a wider area than the channel region 17 between them in a circular shape.
The center of the circular organic semiconductor layer 16 substantially coincides with the center of the channel region 17, and the film thickness T ₁ of the organic semiconductor layer 16 in the central portion of the channel region 17 is in the range of 50 to 500 nm. The peripheral edge outside the source / drain electrodes 12, 13 is slightly raised. The film thickness distribution in the channel region 17 is 35 to 65 nm when the film thickness T ₁ is 50 nm, and 350 to 650 nm when the film thickness T ₁ is 500 nm.

  When forming the organic semiconductor layer 16 in the organic FET 10, as shown in FIG. 1, the source / drain electrodes 12, 13 and the interelectrode electrodes are formed on the gate insulating film 15 having the source / drain electrodes 12, 13 formed on the surface. A droplet 16a is dropped in a circular shape over the channel forming region 17a and the periphery thereof. At this time, in the channel formation region 17a, the lowest height h1 of the droplet 16a is a position in contact with each of the electrodes 12 and 13, and the highest height h2 is the center position of the channel formation region. Using the method (ii), droplets can be dropped so that 0 <h2 / h1 ≦ 2. Note that by heating the substrate in advance before the droplet is dropped, the droplet dropped on the substrate is dried to form the organic semiconductor layer 16 shown in FIG.

(Embodiment 2)
FIG. 6 shows a bottom gate / top contact type organic FET of the present invention, where (b) is a plan view, (a) is a cross-sectional view taken along line AA in (b), and (c) is B in (b). FIG.
The organic FET 20 is obtained by drying the droplet 26a in FIG. 2 to form the organic semiconductor layer 26. The organic FET 20 has a square substrate 21, a rectangular gate electrode 24 formed on the substrate 21, and a gate electrode. 24 and the gate insulating film 25 covering the substrate 21, a circular organic semiconductor layer 26 formed so as to cover the upper position of the gate electrode 24 on the gate insulating film 25 in a wide range, and on the organic semiconductor layer 26 The gate electrode 24 includes a rectangular source electrode 22 and drain electrode 23 formed at positions above both longitudinal ends of the gate electrode 24.
The center of the circular organic semiconductor layer 26 substantially coincides with the center of the channel region 27 between the source / drain electrodes 22, 23, and the film thickness T ₂ of the organic semiconductor layer 26 in the central portion of the channel region 27 is Within the range of 50 to 500 nm, the peripheral edge outside the source / drain electrodes 22 and 23 is slightly raised. The film thickness distribution in the channel region 27 is 35 to 65 nm when the film thickness T ₂ is 50 nm, and 350 to 650 nm when the film thickness T ₂ is 500 nm.

  When forming the organic semiconductor layer 26 in the organic FET 20, as shown in FIG. 2, on the gate insulating film 25 where the source / drain electrode is not formed on the surface, it corresponds to the gate electrode 24 and a region extending around the gate electrode 24. A droplet 26a is dropped in a circular shape on the region. Reference numeral 27a in FIG. 6 is a channel formation region. In this case, in the channel formation region 27a, the lowest height h1 of the droplet 26a is the end position in the channel length direction, and the highest height h2 is the center position of the channel formation region. Using the method ii), it is possible to drop droplets so that 0 <h2 / h1 ≦ 2. Note that by heating the substrate in advance before the droplets are dropped, the droplets dropped on the substrate are dried to form the organic semiconductor layer 26 shown in FIG. Source / drain electrodes 22 and 23 are formed on both sides of the channel formation region 27a.

(Embodiment 3)
FIG. 7 shows a top gate / bottom contact type organic FET of the present invention, where (b) is a plan view, (a) is a cross-sectional view along line AA in (b), and (c) is B in (b). FIG.
The organic FET 30 is obtained by drying the droplet 36a in FIG. 3 to form the organic semiconductor layer 36, and has a square substrate 31, and rectangular source electrode 32 and drain electrode formed on the substrate 31. 33, an organic semiconductor layer 36 that covers a wider area than the source electrode 32 and drain electrode 33 and the channel region 37 between them, a gate insulating film 35 that covers the organic semiconductor layer 36 and the substrate 31, a gate Source / drain electrodes 32 and 33 on the insulating film 35 and a rectangular gate electrode 34 formed above the channel region 37 are provided.
The center of the circular organic semiconductor layer 36 substantially coincides with the center of the channel region 37, and the film thickness T ₃ of the organic semiconductor layer 36 in the central portion of the channel region 37 is in the range of 50 to 500 nm. The peripheral edge outside the source / drain electrodes 32 and 33 is slightly raised. The film thickness distribution in the channel region 37 is 35 to 65 nm when the film thickness T ₃ is 50 nm, and 350 to 650 nm when the film thickness T ₃ is 500 nm.

  When forming the organic semiconductor layer 36 in the organic FET 30, as shown in FIG. 3, the source / drain electrodes 32, 33 and the channel between the electrodes are formed on the substrate 31 on which the source / drain electrodes 32, 33 are formed. A droplet 36a is dropped in a circular shape over the formation region 37a and the periphery thereof. At this time, in the channel formation region 37a, the lowest height h1 of the droplet 36a is a position in contact with each of the electrodes 32 and 33, and the highest height h2 is the center position of the channel formation region, Using the method (ii), droplets can be dropped so that 0 <h2 / h1 ≦ 2. Note that, by heating the substrate in advance before the droplet is dropped, the droplet dropped on the substrate is dried to form the organic semiconductor layer 36 shown in FIG. A gate insulating film 35 is formed, and a gate electrode 34 is formed on the gate insulating film 35.

(Embodiment 4)
8 shows a bottom gate / bottom contact type organic FET of the present invention different from FIG. 5, wherein (b) is a plan view, (a) is a cross-sectional view along line AA in (b), and (c) is FIG. It is BB sectional drawing of (b).
The organic FET 40 is obtained by drying the droplet 46a in FIG. 4 to form the organic semiconductor layer 46. The organic FET 40 has a square substrate 41, a rectangular gate electrode 44 formed on the substrate 41, and a gate electrode. 44, a gate insulating film 45 covering the substrate 41, a rectangular source electrode 42 and drain electrode 43 formed on the gate insulating film 45 at positions above both longitudinal ends of the gate electrode 44, source / drain electrodes 42, 43 and a rectangular bank 48 surrounding the channel region 47 between them, and an organic semiconductor layer 46 formed in an inner region of the bank 48.
The bank 48 is a droplet reservoir made of resin or the like.
The organic semiconductor layer 46 has the same rectangular shape as the inner region of the bank 48, the center thereof substantially coincides with the center of the channel region 17, and the film thickness T ₄ of the organic semiconductor layer 46 in the central portion of the channel region 47 is 50. It is in the range of ˜500 nm, and its peripheral edge is slightly raised. The film thickness distribution in the channel region 47 is 35 to 65 nm when the film thickness T ₄ is 50 nm, and 350 to 650 nm when the film thickness T ₄ is 500 nm.

  When the organic semiconductor layer 46 in the organic FET 40 is formed, it is formed in advance so as to surround the source / drain electrodes 42 and 43 on the gate insulating film 45 and the channel forming region 47a between the electrodes as shown in FIG. A droplet 46 a is dropped so as to fill the inner region of the bank 48. At this time, in the channel formation region 47a, the lowest height h1 of the droplet 36a is a position in contact with each of the electrodes 42 and 43, and the highest height h2 is the center position of the channel formation region. The method can be used to drop droplets such that 0 <h2 / h1 ≦ 2. Note that by heating the substrate in advance before the droplets are dropped, the droplets dropped on the substrate are dried to form the organic semiconductor layer 46 shown in FIG.

In the present invention, the structure of the organic FET includes the above-mentioned bottom gate / bottom contact type structure, bottom gate / top contact type structure, and top gate / bottom contact type structure. From the viewpoint, a bottom gate / bottom contact type structure is particularly preferable.
4 and 8 exemplify the case where the bank 48 is formed on the gate insulating film 45 in the bottom gate / bottom contact type organic FET and the shape of the organic semiconductor layer 46 is controlled, the bank 48 is formed. A groove may be formed at a position to control the shape of the organic semiconductor layer.
Hereafter, each component of organic FET in this invention, a formation method, etc. are demonstrated.

<Organic semiconductor layer>
The organic semiconductor layer is made of an organic semiconductor compound.
The organic semiconductor compound preferably has an ionization potential of 4 eV or more and 6 eV or less. If the ionization potential is less than 4 eV, the material is easily oxidized and the stability of the material in the atmosphere may be poor. Conversely, if the ionization potential is greater than 6 eV, the carrier transfer efficiency may be reduced. A more preferable ionization potential is 4.2 to 5.8 eV. Here, the ionization potential can be measured by atmospheric photoelectron spectroscopy.

As an organic semiconductor compound, 3 to 10 oligoacenes having 3 to 10 benzene rings condensed, 3 to 10 oligothiophenes having 3 to 10 thiophene repeats, and 3 to 10 benzene repeats Examples thereof include oligophenylene having 3 to 10 rings, oligophenylene vinylene obtained by repeating 1 to 10 benzene and vinylene, oligophenylene thiophene compound obtained by repeating 1 to 10 benzene and thiophene, and derivatives thereof. Specific examples include anthracene (5.8 eV), naphthacene (5.7 eV), pentacene (5.2 eV), quarterthiophene (5.8 eV), sexithiophene (5.4 eV), and the like (in parentheses). Is the ionization potential. On the other hand, as derivatives, 1,2,3,4,6,11-hexapropylnaphthacene (5.7 eV), 6,13-bis (methylthio) pentacene (5.3 eV), α, ω-dihexyl group And thiophene (5.8 eV).
Further, fullerene compounds such as fullerene (C60) are also preferred.
The organic semiconducting compound may be a compound derived from a precursor thereof. The precursor may be any form of the above-described compound. Examples include 6,13-N-sulfinyl-acetamido-pentacene, N-sulfinyl-tertiary-butylcarbamate-pentacene, and 6,13-tetrachloro-phenylpentacene.
As the polymer compound, poly (alkylthiophene) such as poly (3-hexylthiophene), fluorene bithiophene copolymer such as F8T2, and poly (phenylene vinylene) are also preferable.

  In the present invention, the organic semiconductor layer can be formed by a coating method using a dispenser as described above. At this time, it is preferable to prepare a coating solution by mixing the organic semiconductor compound at a ratio of 0.05 to 0.5% by weight with respect to the solvent. If the mixing ratio of the organic semiconducting compound is less than 0.05% by weight, the number of compound molecules supplied to the film formation is too small to obtain a desired film thickness, while if it exceeds 0.5% by weight, the number of compound molecules This is not preferable because there are cases where it is difficult to control the nucleation due to too much. A more preferable mixing ratio of the organic semiconducting compound in the coating solution is 0.05 to 0.4% by weight.

  As a solvent used for the solution containing an organic semiconductor compound, a solvent having a high solubility and a solvent boiling point of the organic semiconductor compound is preferable. Specifically, a solvent that dissolves 0.1 mg or more of the organic semiconductor compound per 100 g of the solvent is preferable, and a solvent having a boiling point of 50 ° C. or more is preferable. For example, as a solvent, aromatic hydrocarbons such as benzene, toluene and p-xylene, aliphatic halogenated hydrocarbons such as chloroform, dichloroethylene, trichloroethylene, tetrachloroethylene and 1,2-dichloroethylene, chlorobenzene, o-dichlorobenzene, 1, Aromatic halogenated hydrocarbons such as 2,4-trichlorobenzene, anisole, aniline, dimethyl sulfoxide, dimethylformamide, hexane, decane, benzyl acetate, butyl carbitol, dipropylene glycol monomethyl ether, butyl carbitol, ethanol, etc. Can be mentioned.

<Board>
The substrate is not particularly limited as long as it is insulative, but is preferably a substrate with little dimensional change in the manufacturing stage of the organic FET. Specifically, a synthetic quartz substrate, a glass substrate, a plastic substrate, a silicon substrate, and the like can be given. In addition, when a substrate cost is reduced and a flexible device is obtained, a foldable plastic substrate is preferable, and examples thereof include a polyethersulfone substrate, a polyimide substrate, and a polyethylene terephthalate substrate.

<Gate electrode, source electrode and drain electrode>
The materials for the gate, source, and drain electrodes are not particularly limited, and any material known in the art can be used. Specifically, metals such as gold, platinum, silver, copper and aluminum; refractory metals such as titanium, tantalum and tungsten; silicides and polycides with refractory metals; p-type or n-type highly doped silicon; ITO, Examples thereof include conductive metal oxides such as NESA; conductive polymers such as PEDOT.
The film thickness of each electrode is not particularly limited, and can be appropriately adjusted to a film thickness (for example, 30 to 200 nm) usually used for a transistor.
These electrodes can be formed by methods such as vapor deposition, sputtering, and printing according to the electrode material.

  Although the source / drain electrodes are illustrated in FIGS. 1 to 8 as opposed to each other with a fixed distance (inter-channel distance) facing each other, they may be comb-shaped as shown in FIG. . That is, the source and drain electrodes 2 and 3 are formed in the same comb-teeth shape, and the source-side and drain-side comb teeth are arranged with a certain inter-channel distance to form a plurality of channel regions. You may do it.

<Gate insulation film>
The gate insulating film is not particularly limited, and a film of a material used in this field can be used. Specifically, an insulating film such as a silicon oxide film (thermal oxide film, low-temperature oxide film: LTO film, etc., high-temperature oxide film: HTO film), silicon nitride film, SOG film, etc .; PZT, PLZT, ferroelectric or antiferroelectric Dielectric film: SiOF-based film, SiOC-based film or CF-based film, HSQ (hydrogen silsesquioxane) -based film (inorganic), MSQ (methyl silsesquioxane) -based film, PAE (poly ylene ether) -based film, porous film formed by coating Examples thereof include low dielectric films such as system films, CF films, and porous films.
The film thickness of the gate insulating film is not particularly limited, and can be appropriately adjusted to a film thickness (for example, 50 to 500 nm) usually used for an organic field effect transistor.
In addition, the gate insulating film can be formed by a method such as vapor deposition, sputtering, or printing depending on the type.

<Bank>
The material of the bank is not particularly limited, for example, inorganic compound materials such as silicon oxide, silicon nitride, polysilicon, amorphous silicon, imide resin, phenol resin, urea resin, melamine resin, epoxy resin, silicon resin, urethane resin And organic materials such as methacrylic resin, fluororesin, vinyl resin, novolac resin, bisazide, quinone azide, and polystyrene.
The film thickness of a bank is not specifically limited, For example, it can adjust to 0.1-50 micrometers suitably.
Banks can be formed by sputtering or CVD when using inorganic compound materials, and by various coating methods such as spin coating, spray cord, roll coating, dip coating, etc. when using organic compound materials. . The pattern formation of the bank can be formed by photolithography.
The bank may be formed in a position that surrounds the periphery of the channel region and the source / drain electrodes in a frame shape without covering the surface, and the shape is not particularly limited, and may be any of a circular shape, a rectangular shape, or the like .
Further, the bank may be appropriately subjected to liquid repellent treatment by, for example, CF ₄ plasma treatment or the like.

(Example 1)
The bottom gate / bottom contact type organic FET shown in FIG. 5 was produced as follows.
First, chromium was vapor-deposited on the substrate 1 made of silicon to form a gate electrode 4 having a thickness of 50 nm.
Next, after depositing 300 nm of the gate insulating film 5 by sputtering of silicon oxide, vapor deposition was performed in the order of 10 nm of chromium and 40 nm of gold, and the source and drain electrodes 2 and 3 were formed by a normal lithography technique. At this time, the sizes of the source / drain electrodes 2 and 3 are both 20 μm × 500 μm rectangular, and the distance between the source / drain electrodes corresponding to the channel length is 50 μm. Chromium was inserted to increase gold adhesion.
Subsequently, the surface of the gate insulating film including the channel formation region of the obtained substrate (laminated body) was irradiated with vacuum ultraviolet light having a wavelength of 172 nm for 10 minutes to lyophilicize the surface of the gate insulating film.

  Next, 1, 2, 3, 4, 6, 11-hexapropyl naphthacene (HP naphthacene [CAS No. 18155-] is formed on the channel formation region on the surface of the gate insulating film of the substrate after lyophilic treatment heated to 60 ° C. 96]: Kanto Chemical Co., Ltd.) 0.1 wt% toluene solution was dropped at 100 pl using a dispenser (manufactured by Musashi Engineering Co., Ltd.) at 11 drops and 50 μm in multiple stages (see FIG. 1). By dropping in multiple stages, adjacent droplets are connected at the bottom to form one droplet 16a that completely covers the source / drain electrodes 2, 3 and the channel formation region. As shown in FIG. 1B, the surface of the gate insulating film 15 is subjected to the lyophilic process in the region where the circular droplets 16a as viewed in plan are present.

Immediately after the completion of the multi-stage dropping, the lowest height h1 and the highest height h2 of the droplet 16a in the channel forming region 17a were measured from the lateral direction of the substrate using a zoom lens. The height h1 was 100 μm, and the height h2 was 180 μm. Therefore, the relationship between the heights h1 and h2 is h2 / h1 = 1.8.
The droplets 16a on the substrate heated to 60 ° C. are dried for 5 minutes from the end of the multi-stage dropping, thereby forming an HP naphthacene film as the organic semiconductor film 16 as shown in FIG. 5, with a channel length of 50 μm and a channel width of 500 μm. An organic FET was prepared.
When the film thickness of the organic semiconductor layer 16 in the channel region 17 of this organic FET was measured using a step gauge measuring apparatus (manufactured by Nippon Beco Co., Ltd.), the film thickness at the center was 250 nm, and the thinnest part around this And 200 nm at the thickest part. Therefore, the film thickness distribution of the organic semiconductor layer 16 is ± 20% within 30% with respect to the film thickness (250 nm) at the center of the channel region, and the organic semiconductor layer 16 has a film thickness of 200 to 300 nm in the entire channel region. It was found that the film was grown uniformly.

Thereafter, the organic semiconductor layer 16 covering the surface of the source / drain electrodes 2 and 3 was scraped to make contact with the source / drain electrodes.
At a source voltage of −40V, the gate voltage was changed from −30V to −50V every −2V, and the current (Id) between the source / drain electrodes was measured. The field effect mobility μ determined from this was 4.7 × 10 ⁻² cm ² / Vs, and the on / off ratio was 5 digits, and good performance was obtained. Here, the on / off ratio is a ratio between the maximum value and the minimum value of Id in Id (source-drain current) -Vg (gate applied voltage) measurement for evaluating transistor characteristics. Further, XRD measurement was performed using an apparatus manufactured by Rigaku Corporation. As a result, sharp (001) and (002) diffractions were observed at 2θ = 6.9 ° (plane spacing d = 1.28 nm) and 13.8 ° (d = 0.64 nm). Thereby, it was found that the organic semiconductor layer 16 is a highly crystallized HP naphthacene.

(Comparative Example 1)
The organic semiconductor layer was formed under the same conditions as in Example 1 except that 7 droplets were dropped by shifting the droplet dropping position by 80 μm, thereby producing an organic FET. In addition, immediately after the dropping of the droplet, the height of the droplet was measured by the same method as in Example 1. As a result, the lowest height h1 was 60 μm and the highest height h2 was 140 μm. Therefore, the relationship between the heights h1 and h2 is h2 / h1≈2.3.
When the film thickness of the channel region in the organic semiconductor layer of this organic FET was measured by the same method as in Example 1, the film thickness at the center was 330 nm, the thinnest part around this was 20 nm, and the thickest part It was 400 nm. Therefore, the film thickness distribution of the organic semiconductor layer in the channel region is 39% exceeding 30% with respect to the film thickness of the central portion, and it was found that the film thickness unevenness is large.
Further, when the transistor characteristics of the organic FET were evaluated by the same method as in Example 1, μ = 7.1 × 10 ⁻³ cm ² / Vs, the on / off ratio = 4 digits, and the characteristics were lower than in Example 1. did. In the XRD measurement, only (001) diffraction was observed at 2θ = 6.9 ° (plane spacing d = 1.28 nm). Since (002) higher-order diffraction was not observed, it was found that the order of the molecular arrangement of the organic semiconductor layer was lower than that in Example 1.
From the results of Example 1 and Comparative Example 1, it was found that the uniformity of film thickness and crystallinity can be improved by controlling the height difference of the applied droplets, resulting in good transistor characteristics. did.

(Example 2)
Before forming the organic semiconductor layer, a substrate (stacked body) was produced in the same manner as in Example 1 except that the source / drain electrode size was a rectangular shape of 20 μm × 150 μm.
Subsequently, the obtained substrate was irradiated with vacuum ultraviolet light having a wavelength of 172 nm for 10 minutes to make the entire surface of the gate insulating film lyophilic. The lyophilic treated substrate was combined with 0.5 ml of (heptadecafluoro-1,1,2,2-tetrahydrodecyl) triethoxysilane (HFTHTES [CAS No. 101947-16-4]: manufactured by Kanto Kagaku) and Teflon (registered) A HFTHTES film was formed on the entire surface of the substrate by heating in a crucible (trademark) at 120 ° C. for 2 hours to perform a liquid repellency treatment.
Subsequently, a metal mask having an opening with a diameter of 300 μm that opens the channel formation region of the substrate is fixed on the processing substrate, and 172 nm vacuum ultraviolet light is irradiated for 30 minutes to remove the HFTHTES film in the channel formation region. Lyophilic treatment.

The substrate subjected to the lyophilic and lyophobic patterning treatment as described above was heated to 150 ° C., and 0.3% by weight of 1,2,4-triacene of pentacene (CAS No. 135-48-8: manufactured by Aldrich) was used. 200 nL of the chlorobenzene solution was dropped onto the channel formation region of the substrate using a dispenser. The droplets remained in the channel formation region that had been subjected to the lyophilic patterning process.
When the height of the droplet immediately after dropping was measured by the same method as in Example 1, the lowest height h1 was 1.7 mm, and the highest height h2 was 1.8 mm. Therefore, the relationship between the heights h1 and h2 is h2 / h1≈1.1.

A pentacene film, which is an organic semiconductor film, was formed only in the channel region having a channel length of 50 μm and a channel width of 150 μm by drying the droplets on the substrate heated to 150 ° C. for 5 minutes after the completion of the dropping, thereby producing an organic FET. .
When the thickness of the organic semiconductor layer in the channel region of the organic FET was measured by the same method as in Example 1, the film was grown uniformly at a thickness of 400 nm. Therefore, the film thickness distribution of the organic semiconductor layer was 0% within 30% with respect to the film thickness at the center of the channel region.

When the transistor characteristics of the organic FET were evaluated in the same manner as in Example 1, μ = 4.1 × 10 ⁻¹ cm ² / Vs and the on / off ratio = 6 digits. In the XRD measurement, 2θ = 6.1 (d = 1.45 nm), 12.3 ° (d = 0.72 nm), 18.5 ° (0.48 nm) at (001), (002), (003) Diffraction was observed. Thus, it was found that the organic semiconductor layer was a highly crystallized pentacene.

(Example 3)
An organic FET was produced by forming an organic semiconductor layer under the same conditions as in Example 2 except that the amount of droplets dropped was changed to 30 nL.
When the height of the droplet immediately after dropping, which was accumulated in the channel region, was measured by the same method as in Example 1, the lowest height h1 was 300 μm and the highest height h2 was 400 μm. Therefore, the relationship between the heights h1 and h2 is h2 / h1≈1.3.
When the thickness of the organic semiconductor layer formed only in the channel region of the organic FET was measured by the same method as in Example 1, the film was grown uniformly with a thickness of 180 nm. Therefore, the film thickness distribution of the organic semiconductor layer was 0% within 30% with respect to the film thickness at the center of the channel region.
When the transistor characteristics of the organic FET were evaluated by the same method as in Example 1, μ = 2.7 × 10 ⁻¹ cm ² / Vs and the on / off ratio = 6 digits. In the XRD measurement, 2θ = 6.1 (d = 1.45 nm), 12.3 ° (d = 0.72 nm), 18.5 ° (0.48 nm) at (001), (002), (003) Diffraction was observed. Thus, it was found that the organic semiconductor layer was a highly crystallized pentacene.

(Comparative Example 2)
An organic FET was produced by forming an organic semiconductor layer under the same conditions as in Example 2 except that the amount of droplets dropped was 2 nL.
When the height of the droplet immediately after dropping in the channel region was measured by the same method as in Example 1, the lowest height h1 was 0, and the highest height h2 was 120 μm. In this case, the peripheral edge of the droplet came in the channel formation region, and the height of the droplet was zero. Therefore, the relationship between the heights h1 and h2 is h2 / h1 = 0.
When the film thickness of the organic semiconductor layer of this organic FET was measured by the same method as in Example 1, the film thickness at the center was 400 nm, the thinnest part around this was 200 nm, and the thickest part was 1. It was 2 μm. Therefore, the film thickness distribution of the organic semiconductor layer in the channel region is 200% exceeding 30% with respect to the film thickness of the central portion, which indicates that the film thickness unevenness is large. In particular, the film thickness is thicker at the boundary between the lyophilic and lyophobic patterning and becomes thinner toward the center.
When the transistor characteristics of the organic FET were evaluated in the same manner as in Example 1, μ = 6.6 × 10 ⁻² cm ² / Vs and the on / off ratio was 5 digits, which was lower than that in Example 2. In XRD measurement, (001) and (002) diffraction were observed at 2θ = 6.1 (d = 1.45 nm) and 12.3 ° (d = 0.72 nm). Thereby, it was found that the crystallinity of pentacene was lower in the organic semiconductor layer of Comparative Example 2 than in Example 2.

  From the results of Examples 2 and 3 and Comparative Example 2, it is possible to improve the uniformity of film thickness and crystallinity by controlling the height difference of the applied droplets, and as a result, good transistor characteristics can be obtained. I understood.

Example 4
Before forming the organic semiconductor layer, a substrate (stacked body) was produced in the same manner as in Example 2 except that the channel length was changed to 150 μm and the channel width was changed to 150 μm.
Subsequently, a novolac resin was spin-coated on the obtained substrate, and a bank having a width of 5 μm and a thickness of 3 μm was formed so as to surround the channel formation region and the source / drain electrodes by using a photolithography method (see FIG. 8). ).
Next, this bank-attached substrate was subjected to O ₂ and CF ₄ plasma treatment to make only the bank liquid repellent and the other substrate surface lyophilic.
Subsequently, the bank-attached substrate subjected to the lyophilic and lyophobic treatments was heated to 60 ° C., and 55 pL was dropped onto the channel formation region of the heated substrate with a 2 wt% toluene solution of HP naphthacene using a dispenser. The droplet remained in the channel formation region so as to be damped by the liquid-repellent-treated bank.

When the height of the droplet immediately after dropping in the channel region was measured by the same method as in Example 1, the lowest height h1 was 3 μm and the highest height h2 was 6 μm. Therefore, the relationship between the heights h1 and h2 is h2 / h1 = 2.
When the film thickness of the organic semiconductor layer of this organic FET was measured by the same method as in Example 1, the film thickness at the center was 100 nm, the portion in contact with the bank was the thickest at 120 nm, and the film thickness was otherwise Uniform at 100 nm. Therefore, the film thickness distribution of the organic semiconductor layer in the channel region was 20% within 30% with respect to the film thickness of the central portion, and it was found that the organic semiconductor layer was grown with a uniform film thickness.
When the transistor characteristics of the organic FET were evaluated in the same manner as in Example 1, μ = 1.7 × 10 ⁻² cm ² / Vs and the on / off ratio was 4 digits. In XRD measurement, sharp (001) and (002) diffraction were observed at 2θ = 6.9 ° (plane spacing d = 1.28 nm) and 13.8 ° (d = 0.64 nm). As a result, it was found that the organic semiconductor layer was a highly crystallized HP naphthacene.

(Comparative Example 3)
An organic FET was produced by forming an organic semiconductor layer under the same conditions as in Example 4 except that the amount of droplets dropped from the dispenser was 70 pL.
In this case, the lowest height h1 immediately after dropping of the droplets in the channel formation region was 3 μm, and the highest height h2 was 6.5 μm.
When the film thickness of the organic semiconductor layer of this organic FET was measured by the same method as in Example 1, the film thickness at the center was 85 nm, the portion in contact with the bank was 170 nm, and the film thickness was otherwise. Uniform at 85 nm. Therefore, the film thickness distribution of the organic semiconductor layer in the channel region is 100% exceeding 30% with respect to the film thickness of the central portion, and the organic semiconductor layer is extremely thick in the vicinity of the bank.

When the transistor characteristics of the organic FET were evaluated in the same manner as in Example 1, μ = 4.7 × 10 ⁻³ cm ² / Vs and the on / off ratio = 3 digits. In the XRD measurement, only (001) diffraction was observed at 2θ = 6.9 ° (plane spacing d = 1.28 nm). Thereby, it was found that the crystallinity of HP naphthacene in the organic semiconductor layer of Comparative Example 3 was lower than that in Example 4.

  From the results of Example 4 and Comparative Example 3, it is possible to improve the uniformity of film thickness and crystallinity by controlling the height difference of the solution application, and as a result, an organic FET having improved transistor characteristics can be obtained. I understood.

FIG. 2 shows a state in which a droplet is dropped on a substrate in the manufacturing process of the organic FET of Embodiment 1 of the present invention, (b) is a plan view, and (a) is a cross-sectional view taken along line AA in (b). (C) is the BB sectional drawing of (b). The state which dripped the droplet on the board | substrate in the manufacturing process of organic FET of Embodiment 2 of this invention is shown, (b) is a top view, (a) is the sectional view on the AA line of (b). (C) is the BB sectional drawing of (b). The state which dripped the droplet on the board | substrate in the manufacturing process of organic FET of Embodiment 3 of this invention is shown, (b) is a top view, (a) is the sectional view on the AA line of (b). (C) is the BB sectional drawing of (b). The state which dripped the droplet on the board | substrate in the manufacture process of organic FET of Embodiment 4 of this invention is shown, (b) is a top view, (a) is the sectional view on the AA line of (b). (C) is the BB sectional drawing of (b). The organic FET of Embodiment 1 is shown, (b) is a top view, (a) is the sectional view on the AA line of (b), (c) is the sectional view on the BB line of (b). The organic FET of Embodiment 2 is shown, (b) is a top view, (a) is the sectional view on the AA line of (b), (c) is the sectional view on the BB line of (b). The organic FET of Embodiment 3 is shown, (b) is a top view, (a) is the sectional view on the AA line of (b), (c) is the sectional view on the BB line of (b). The organic FET of Embodiment 4 is shown, (b) is a top view, (a) is the sectional view on the AA line of (b), (c) is the sectional view on the BB line of (b). It is a top view which shows the comb-tooth-type source / drain electrode in the organic FET of this invention.

Explanation of symbols

2 Comb-shaped source electrode 3 Comb-shaped drain electrode 11, 21, 31, 41 Substrate 12, 22, 32, 42 Opposing source electrode 13, 23, 33, 43 Opposing drain electrode 14, 24, 34, 44 Gate Electrode 15, 25, 35, 45 Gate insulating film 16, 26, 36, 46 Organic semiconductor layer 16a, 26a, 36a, 46a Solution (droplet) containing organic semiconductor compound
17, 27, 37, 47 Channel region 17a, 27a, 37a, 47a Channel formation region 48 Bank h1 Minimum droplet height in channel formation region h2 Maximum droplet height in channel formation region T ₁ , T ₂ , T ₃ , the thickness of the organic semiconductor layer in the center of the T ₄ channel region

Claims (12)

An organic field effect transistor comprising: a gate electrode; a gate insulating film; a source electrode; a drain electrode; and an organic semiconductor layer disposed at least in a channel region between the source electrode and the drain electrode. A manufacturing method comprising:
A solution containing an organic semiconducting compound is applied to at least a channel formation region on the substrate and dried to form the organic semiconductor layer having a film thickness distribution within 30% of the film thickness at the center of the channel region. A method of manufacturing an organic field effect transistor.   2. The solution applied to the channel forming region, wherein h1 is not 0 and the ratio of h2 / h1 is 2 or less, where h1 is the lowest height and h2 is the highest height. A method for producing an organic field effect transistor.   3. The method of manufacturing an organic field effect transistor according to claim 2, wherein the relationship between the height h <b> 1 and the height h <b> 2 is controlled by controlling a dripping amount of the solution into the channel formation region.   3. The organic electric field according to claim 2, wherein the relationship between the height h <b> 1 and the height h <b> 2 is controlled by performing a lyophilic patterning process on the surface of the channel formation region or a liquid repellent patterning process around the channel formation region. Effect transistor manufacturing method.   The organic electric field according to claim 2, wherein the relationship between the height h1 and the height h2 is controlled by defining a shape of the application region of the solution by forming a bank or a groove around the channel formation region. Effect transistor manufacturing method.   The method for manufacturing an organic field effect transistor according to claim 1, wherein the solution applied to the channel formation region is dried by heating the substrate.   The method for manufacturing an organic field effect transistor according to any one of claims 2 to 6, wherein the height h1 is 1 to 3000 µm, and the height h2 is 1 to 6000 µm.   It is manufactured by the method for manufacturing an organic field effect transistor according to any one of claims 1 to 7, and the organic semiconductor layer has a film thickness distribution in the channel region with respect to a film thickness in the center of the channel region. Organic field effect transistor that is within 30%.   The organic field effect transistor according to claim 8, wherein the organic semiconductor layer is made of an organic semiconductor compound having an ionization potential of 4 to 6 eV.   The organic field effect transistor according to claim 8 or 9, wherein the thickness of the central portion of the channel region of the organic semiconductor layer is 50 to 500 nm.   The organic field effect transistor according to any one of claims 8 to 10, wherein the source electrode and the drain electrode are disposed on an inner side than a peripheral edge portion of the organic semiconductor layer.   The organic semiconductor according to claim 8, further comprising a bank or a groove surrounding the source electrode, the drain electrode, and the channel region, wherein the organic semiconductor layer is formed in an inner region of the bank or the groove. Field effect transistor.