JP5428048B2 - Discharge lamp lighting device - Google Patents

Description

The present invention relates to a discharge lamp lighting apparatus having a power supply capable of power supplies selectively controlled means from any one of the different points from each other.

  Conventionally, for example, a discharge lamp lighting device as a power supply device for lighting a discharge lamp as a load rectifies a commercial AC power supply, and then converts the rectified input voltage into a DC voltage boosted by a power factor correction circuit such as a boost chopper circuit. DC power source for conversion, inverter circuit for lighting a discharge lamp by converting a DC voltage output from the DC power source to a high frequency voltage, and power supplied from the inverter circuit connected between the inverter circuit and the discharge lamp And an LC resonance circuit for controlling the. The inverter circuit includes, for example, a half-bridge type having a pair of switching elements, and performs a switching operation by controlling the switching element via a drive circuit to drive, and the high frequency voltage of a predetermined frequency is supplied to the LC resonance circuit. It is possible to turn on the discharge lamp from the preheated state through the starting state by applying to the discharge lamp.

  For such a control means, for example, it is conceivable that power is supplied from a DC power supply side via a power supply circuit provided with a resistor or the like, but in such a configuration, power is always consumed by a high withstand voltage resistor. Therefore, the circuit efficiency is not good. Therefore, such a power supply from the DC power source side is used only at the time of starting the discharge lamp lighting device, and after the inverter circuit is started, power is supplied from the inverter circuit side to the control means via an arbitrary current limiting element. It is known (for example, see Patent Document 1).

Japanese Patent No. 3379159 (page 3, FIG. 1)

  However, in the discharge lamp lighting device, the voltage from the DC power supply is lowered depending on the lighting state of the discharge lamp, the desired power cannot be supplied from the inverter circuit, and the power supply voltage of the control means may be lowered. Have. And when a control means is a microcomputer, there exists a possibility that a control means may be reset by the fall of this power supply voltage.

The present invention has been made in view of such points, while securing the circuit efficiency, and to provide a discharge electric lamp lighting device that can suppress the power fluctuations of the control unit due to load variations.

Discharge lamp lighting device according to claim 1, wherein the discharge lamp and, a DC power source, an inverter circuit for supplying the conversion to the discharge lamp to the high frequency AC voltage a DC voltage outputted from the DC power source, the driving of the inverter circuit The control means that can control the discharge lamp to any one of the preheated state, the starting state and the lighting state by controlling the power supply, the detecting means for detecting the direct current voltage output from the direct current power source, When the inverter circuit is driven, power is supplied from the inverter circuit side to the control means, and when the DC voltage detected by the detection means falls below a predetermined threshold, the control means is supplied from the DC power supply side. And a power supply device including power supply means for performing auxiliary power supply for a predetermined time .

For example, a hot cathode discharge lamp is used as the discharge lamp.

  The DC power supply may be, for example, one that obtains a DC voltage by a power factor correction circuit such as a boost chopper circuit after rectifying the AC voltage, or may be a battery power supply or a capacitor.

  As the inverter circuit, for example, a half bridge type including a pair of switching elements is used, but the inverter circuit is not limited thereto.

  The control means is, for example, a microcomputer, and can stop the inverter circuit by stopping switching of the switching element of the inverter circuit.

As the detection means, for example, a comparator (comparator) or the like is used.

Discharge lamp lighting apparatus 請 Motomeko 2 wherein, in the discharge lamp lighting device according to claim 1, wherein the control means, a discharge lamp, preheat state, can be controlled in one of two states starting state and the lighting state, The power supply means supplies power to the control means from the DC power supply side at the start-up, and after the inverter circuit is driven, supplies power to the control means from the inverter circuit side, and the discharge lamp shifts to either the starting state or the lighting state. Then, auxiliary power is supplied to the control means from the DC power supply side for a predetermined time.

  The power supply from the DC power supply side may be configured to supply a DC voltage output from the DC power supply, for example, or may be configured to supply this rectified voltage when the AC voltage is rectified.

  Auxiliary power feeding refers to feeding from the DC power supply side in addition to power feeding from the inverter circuit side.

Discharge lamp lighting apparatus 請 Motomeko 3 wherein, in the discharge lamp lighting apparatus according to claim 1 or 2, wherein the control means is of a type wherein at least a portion is connected directly to the DC power supply is integrated with the feeding means is there.

  The fact that at least a part of the control means is integrated with the power supply means may be a configuration in which the entire control means is integrated with the power supply means, or only a main part such as a control unit of the inverter circuit is the power supply means. An integrated configuration may be used.

According to the discharge lamp lighting device of claim 1, when the discharge lamp is started , the power supply means supplies power to the control means from the DC power supply side, and after driving the inverter circuit, supplies power to the control means from the inverter circuit side. In addition, when the DC voltage detected by the detection means falls below a predetermined threshold value, by supplying auxiliary power to the control means for a predetermined time from the DC power supply side, for example, a resistor or the like does not always consume power, and the circuit efficiency Can be ensured, and power supply fluctuation of the control means accompanying load fluctuation according to the lighting state of the discharge lamp can be reliably suppressed.

According to the discharge lamp lighting apparatus 請 Motomeko 2 wherein, in addition to the effects of the discharge lamp lighting device according to claim 1, the power supply means is, at the time of startup, and power supply to the control unit from the DC power supply side, the driving of the inverter circuit After this, the inverter circuit side supplies power to the control means, and when the discharge lamp transitions to the start state or lighting state, the discharge lamp is started from the preheated state by auxiliary power supply from the DC power source side to the control means for a predetermined time. The power supply fluctuation of the control means when shifting to can be more reliably suppressed.

According to the discharge lamp lighting apparatus 請 Motomeko 3 wherein, in addition to the effects of the discharge lamp lighting device according to claim 1 or 2, directly connected to the DC power supply and integrated with the feeding means at least a part of the control means Thus, a small and inexpensive circuit configuration can be obtained.

It is a circuit diagram of a discharge lamp lighting device showing an embodiment of the present invention. It is a circuit diagram which shows a part of control means of a discharge lamp lighting device same as the above. It is a timing chart which shows the operation timing of each part of a discharge lamp lighting device same as the above. It is a perspective view of the lighting fixture provided with the discharge lamp lighting device same as the above.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a circuit diagram of a discharge lamp lighting device, FIG. 2 is a circuit diagram showing a part of the control means of the discharge lamp lighting device, FIG. 3 is a timing chart showing the operation timing of each part of the discharge lamp lighting device, and FIG. It is a perspective view of the lighting fixture provided with the lamp lighting device.

  As shown in FIG. 1, a discharge lamp lighting device 10 which is a hot cathode type discharge lamp lighting device as a power supply device, that is, an electronic ballast, has a DC output (DC voltage) from the DC power source 11 on the output side of the DC power source 11. ) Is converted into a high-frequency alternating voltage and output, and the inverter circuit 13 is electrically connected, and a discharge lamp FL such as a hot cathode fluorescent lamp as a load is detachably mounted on the output side of the inverter circuit 13 . Further, the discharge lamp lighting device 10 includes a control element 16 that controls the inverter circuit 13 and the like, and a drive element 17 that is a driver unit for driving the inverter circuit 13 is electrically connected to the control element 16. ing.

  The DC power source 11 rectifies a commercial AC power source e such as 100V to 242V by a full-wave rectifier REC such as a bridge diode, and then, for example, a switching element for chopping such as a field effect transistor and a boosting transformer etc. The voltage is boosted by a power factor correction circuit 21 such as a circuit, and further smoothed by an electrolytic capacitor C1, which is a smoothing capacitor, to output a DC voltage.

  The inverter circuit 13 is, for example, a half-bridge type or a full-bridge type having a switching element such as a pair of field effect transistors, and an LC resonance circuit for outputting a voltage according to the output frequency. It is assumed to include a resonance circuit (not shown).

  In the discharge lamp FL, a preheating circuit (not shown) is connected to each filament FLa, FLb.

  The control element 16 is, for example, a so-called IC (integrated circuit), and is electrically connected to the output side of the startup power supply circuit 23 and the inverter circuit 13 that are electrically connected directly to the output side of the power factor correction circuit 21 of the DC power supply 11. Power supply unit 25 as a power supply means having a control power supply circuit 24 directly connected, a power factor improvement control unit 26 connected to the power factor improvement circuit 21 of the DC power supply 11, and the operation (lighting) state of the discharge lamp FL The oscillation control unit 27 as an inverter control means that generates a frequency signal P for controlling the operation of the switching element of the inverter circuit 13 based on the output and outputs it to the drive element 17, and the voltage of the discharge lamp FL are detected. And a control unit 29 as a control means integrally including a state detection unit 28 for detecting the lighting state of the discharge lamp FL.

  Note that the fact that the control unit 29 integrally includes the power factor correction control unit 26, the oscillation control unit 27, the state detection unit 28, and the like means that these are integrated.

  As shown in FIG. 2, the startup power supply circuit 23 includes a voltage drop unit 31, a startup unit 32, and the like.

  The voltage drop unit 31 is used to stabilize the voltage supplied from the startup power supply circuit 23 side to the control unit 29 (FIG. 1) by dropping it to a predetermined voltage, for example, 12V.

  The starter 32 is a high withstand voltage unit for supplying the output voltage VDC output from the power factor correction circuit 21 (FIG. 1) to the control unit 29 (FIG. 1) via the voltage drop unit 31. Although not shown in the drawing, it includes a resistor and a Zener diode that is a protective element.

  Further, the control power supply circuit 24 is a backup power supply circuit using a snubber capacitor, for example.

  Therefore, the power supply unit 25 can selectively supply power to the control unit 29 from a plurality of different points, that is, the output side of the power factor correction circuit 21 on the DC power supply 11 side and the inverter circuit 13 side. .

  The power factor improvement control unit 26 shown in FIG. 1 switches the switching element based on a predetermined signal such as an input voltage on the power source side and a switching current flowing in the switching element of the power factor improvement circuit 21. It has a function of generating and outputting a chopping frequency signal PC which is a pulse.

  The oscillation control unit 27 continuously controls the discharge lamp FL so as to be lit from the preheated state through the starting state. That is, the oscillation control unit 27 includes a preheating mode in which the discharge lamp FL is in a preheating state, a starting mode in which the discharge lamp FL is in a starting state, and a lighting mode in which the discharge lamp FL is in a lighting state and controls the lighting state. It has a control mode.

  The oscillation control unit 27 controls the inverter circuit 13 and the like so as to continuously control the discharge lamp FL so that it is lit from the preheating state before starting through the starting state. That is, the oscillation control unit 25 puts the discharge lamp FL in a preheating state by operating the inverter circuit 13 and the like in the preheating mode (before starting), and operates the inverter circuit 13 and the like in the starting mode to start the discharge lamp FL. Then, it is possible to control the lighting of the discharge lamp FL by operating the inverter circuit 13 and the like in the lighting mode.

  The oscillation control unit 27 has a function of generating a frequency signal P having a predetermined frequency based on the lighting state of the discharge lamp FL detected by the state detection unit 28. Specifically, the oscillation control unit 27 stops the inverter circuit 13 when the detection voltage VCL is lower than the first threshold voltage VTH1 or when the detection voltage VCL exceeds the second threshold voltage VTH2. In other cases, the frequency signal P is generated according to the lighting state of the discharge lamp FL.

Specifically, the oscillation control unit 27 has a mode control unit 35 shown in FIG. The mode control unit 35 includes a preheating counter comparator OP1 and a start counter comparator OP2.

  In the preheating counter comparator OP1, the drain terminal of the N-type MOSFET Q1, which is a switching element, is electrically connected to the non-inverting input terminal, and the Zener diode ZD1, the resistor R1, and the charge / discharge capacitor Cpre A series circuit is electrically connected in parallel to MOSFET Q1. The source terminal of this MOSFET Q1 is grounded. The preheating counter comparator OP1 is supplied with the reference voltage V1 to the inverting input terminal. The output terminal of the preheating counter comparator OP1 is electrically connected to the input terminal of the NOT gate N1, and the output terminal of the NOT gate N1 is electrically connected to the T terminal of the counter TA which is a T-type flip-flop. The Q terminal of the counter TA is electrically connected to the T terminal of the counter TB that is a T-type flip-flop, and the Q terminal of the counter TB is electrically connected to the T terminal of the counter TC that is a T-type flip-flop. Connected. The gate terminals of the MOSFETs Q1 are electrically connected to the EN terminals of these counters TA to TC via NOT gates N2, respectively. The Q terminals of the counters TA to TC are electrically connected to the input side of the AND gate A1, and the output side of the AND gate A1 is electrically connected to the S terminal of the flip-flop RSpre. The gate terminal of the MOSFET Q1 is electrically connected to the R terminal of the flip-flop RSpre, and the Q terminal is electrically connected to the base terminal of an NPN transistor Q2 as a switching element via a NOT gate N3. Has been. The emitter terminal of the transistor Q2 is grounded, and the collector terminal is electrically connected to a parallel circuit of a resistor R2 and a Zener diode ZD2 which is a constant voltage element. The resistor R2 is electrically connected to the preheating end switch tpre. Connected. Further, the Q terminal of the counter TA is electrically connected to the S terminal of the flip-flop RSDK1, which is a preheating detection means for detecting whether or not the preheating mode is in effect, and the R terminal of the flip-flop RSDK1 is connected to the MOSFET Q1. Are electrically connected through an OR gate OR1. The Q terminal of the flip-flop RSDK1 is electrically connected to the input side of the OR gate OR2. Note that the Q terminal of the flip-flop RSpre is electrically connected to the input side of the OR gate OR1 (RSpre_Q).

  On the other hand, in the start counter comparator OP2, the drain terminal of an N-type MOSFET Q3, which is a switching element, is electrically connected to a non-inverting input terminal, and a Zener diode ZD3, a resistor R3, and a charge / discharge capacitor A series circuit of Cstr is electrically connected in parallel to the MOSFET Q3. The output side of the NOT gate N3 is electrically connected to the gate terminal of the MOSFET Q3. Further, the start counter comparator OP2 is supplied with the reference voltage V2 to the inverting input terminal. The output terminal of the start counter comparator OP2 is electrically connected to the input terminal of the NOT gate N4. The output terminal of the NOT gate N4 is electrically connected to the T terminal of the counter TD which is a T-type flip-flop. The Q terminal of the counter TD is electrically connected to the T terminal of the counter TE that is a T-type flip-flop. The output terminals (pre_f) of the NOT gate N3 are electrically connected to the EN terminals of the counters TD and TE via the NOT gate N5. The Q terminals of the counters TD and TE are electrically connected to the input side of the AND gate A2, respectively. The T terminal of the counter TD is connected to the input side of the AND gate A2 via the NOT gate N6. Has been. Further, the output side of the AND gate A2 is electrically connected to the S terminal of the flip-flop RSstr. The output side of the NOT gate N5 is electrically connected to the R terminal of the flip-flop RSstr via a NOT gate N7, and the Q terminal is connected to an NPN transistor Q4 as a switching element via the NOT gate N8. It is electrically connected to the base terminal. The emitter terminal of the transistor Q4 is grounded, and the collector terminal is electrically connected to a parallel circuit of a resistor R4 and a Zener diode ZD4 which is a constant voltage element. The resistor R4 is electrically connected to the start end switch tstr. Connected. Further, the output side of the NOT gate N7 is electrically connected to the R terminal of the flip-flop RSDK2, which is a start detection means for detecting whether or not the discharge lamp FL (FIG. 1) is started. The S terminal of RSDK2 is electrically connected to the Q terminal of the counter TD. The Q terminal of the flip-flop RSDK2 is electrically connected to the input side of the OR gate OR2.

  The output side (DKoff_f) of the OR gate OR2 is electrically connected to the voltage drop unit 31 and is also electrically connected to the input side of the AND gate A3 via the NOT gate N9. On the input side of the AND gate A3, in addition to the output side of the NOT gate N9, the magnitude of the power supply voltage Vcc of the control unit 29 (FIG. 1) and the operation stop lower limit voltage (Under Voltage Lock Out, UVLO) is compared and determined. The output terminal of the comparator OP3 and the output terminal of the comparator OP4 as a detecting means for detecting a decrease in the output voltage VDC are electrically connected to the DC power supply 11 side shown in FIG.

  Note that not only the output side of the OR gate OR2 but also the Q terminal (RSpre_Q) of the flip-flop RSpre and the non-inverting input terminal of the comparator OP3 are electrically connected to the voltage drop unit 31, respectively.

  The comparator OP3 is connected in parallel with the non-inverting input terminal to the voltage drop unit 31 and the power line 33 electrically connected to the power feeding unit 29 (FIG. 1). The reference voltage V3 for setting the operation stop lower limit voltage is supplied to the inverting input terminal.

  An activation unit 32 is electrically connected to the power line 33 via a switch S. The switch S is electrically connected to the output terminal of the AND gate A3. When the output from the AND gate A3 becomes H level, the starter 32 and the control unit 29 (FIG. 1) are electrically connected. Is configured to do.

  The comparator OP4 is supplied with a reference voltage V4 for detecting a decrease in the output voltage VDC with respect to the non-inverting input terminal, and with the output voltage VDC input with respect to the inverting input terminal. At the same time, the inverting input terminal of the comparator OP5 whose output terminal is electrically connected to the power factor correction control unit 26 is electrically connected. A reference voltage V5 for chopping control of the power factor correction circuit 21 is supplied to the non-inverting input terminal of the comparator OP5.

  Further, the state detection unit 28 shown in FIG. 1 has a drive element 17 via the oscillation control unit 27 in accordance with the state of the discharge lamp FL based on the discharge lamp current (discharge lamp voltage) detected through, for example, a resistor. It is configured to be controllable.

  The drive element 17 switches and drives the switching element of the inverter circuit 13 at a frequency of about several tens of kHz to 200 kHz, for example, 50 kHz or more, in accordance with the dimming frequency signal P supplied from the oscillation control unit 27. Thus, a predetermined high-frequency alternating current is generated.

  The discharge lamp lighting device 10 configured as described above can be applied to a lighting fixture as an electric device as shown in FIG. This lighting fixture includes a fixture main body 41 in which the discharge lamp lighting device 10 is disposed, sockets 42 on which both ends of the fixture main body 41 are mounted with straight tube-type discharge lamps FL, and the like.

  Next, the operation of the above embodiment will be described.

  When the discharge lamp lighting device 10 shown in FIG. 1 is activated, the output voltage VDC is supplied from the power factor correction circuit 21 to the mode control unit 35 of the control unit 29 of the control element 16.

  The output voltage VDC output from the power factor correction circuit 21 is supplied to the starter 32 and is input to the inverting input terminal of the comparator OP4 and the inverting input terminal of the comparator OP5 shown in FIG. The voltage is smoothed by the electrolytic capacitor C1 and is input to the inverter circuit 13 as a DC voltage.

  The comparator OP4 compares the reference voltage V4 with the output voltage VDC. At this start-up, since the output voltage VDC is smaller than the reference voltage V4 (VDC <V4), the output voltage VDC is output from the output side of the comparator OP4 to the input side of the AND gate A3.

  In the AND gate A3, the output (DKoff_f) of the OR gate OR2 is inverted and the output of the comparator OP3 is input. As shown in FIG. 3, at the time of start-up, that is, at a timing before the preheating mode, the output (RSDK1_Q) of the flip-flop RSDK1 and the output (RSDK2_Q) of the flip-flop RSDK2 are each at the L level. Output (DKoff_f) becomes L level, and therefore, the AND gate A3 receives the H level signal via the NOT gate N9. The comparator OP3 outputs an H level signal when the power supply voltage Vcc of the control unit 29 (FIG. 1) is higher than the reference voltage V3 for setting the operation stop lower limit voltage. Therefore, the AND gate A3 outputs an H level signal to the switch S. The switch S is turned on, and the starting unit 32 of the starting power supply circuit 23 is connected to the control unit 29 (FIG. 1) together with the voltage drop unit 31.

  In the startup power supply circuit 23, the output voltage VDC from the power factor correction circuit 21 is dropped to a predetermined voltage by the voltage drop unit 31 and supplied to the control unit 29 (FIG. 1). As a result, the control unit 29 starts operating.

  Further, in the comparator OP5, the H level signal and the L level signal are alternately output to the power factor correction control unit 26 due to the magnitude relationship between the reference voltage V5 and the output voltage VDC. The switching drive of the chopping switching element of the power factor correction circuit 21 is performed by the chopping frequency signal PC corresponding to the H level signal and the L level signal, and the phase of the rectified input voltage is input by this switching operation. The power factor is improved in accordance with the phase of the current.

  Further, since the inverter circuit 13 is driven via the drive element 17 by the frequency signal P generated by the operation of the oscillation control unit 27, the switching element is turned on and off at a predetermined frequency such as 50 kHz. The DC voltage output from the rate improvement circuit 21 and smoothed by the electrolytic capacitor C1 is converted into a high-frequency AC voltage. By this high-frequency AC voltage, the resonance circuit resonates and a resonance current flows and is output to the discharge lamp FL side. In addition, preheating of the filaments FLa and FLb of the discharge lamp FL is started by the preheating circuit. At the same time, when the inverter circuit 13 is driven, power is supplied from the control power supply circuit 24 (FIG. 1) using a snubber capacitor to the control unit 29 (FIG. 1).

  As shown in FIG. 3, in the preheating mode, the charging / discharging capacitor Cpre is charged with a predetermined constant current by the constant current circuit as the preheating starts, and charging / discharging is repeated.

  As the charging / discharging capacitor Cpre is charged / discharged, the preheating counter comparator OP1 compares the reference voltage V1 with the output voltage of the charging / discharging capacitor Cpre, and the output from the preheating counter comparator OP1 is H level and L level. The output of the NOT gate N1 is alternately switched between the L level and the H level (TFFA_CLK). As a result, signals are sequentially generated by the counter TA, the counter TB, and the counter TC (TA_Q, TB_Q, TC_Q).

  Here, when the output from the counter TA becomes H level, the H level is input to the S terminal of the flip-flop RSDK1 connected to the Q terminal of the counter TA, and the output of the flip-flop RSDK1 becomes H level. Therefore, since the output (DKoff_f) of the OR gate OR2 becomes H level, the L level signal is input to the AND gate A3 via the NOT gate N9, the output from the AND gate A3 becomes L level, and the switch S is turned off. Is done. Therefore, the power supply from the starting power supply circuit 23 to the control unit 29 (FIG. 1) is cut off. That is, the starting power supply circuit 23 is the first charging / discharging of the charging / discharging capacitor Cpre from the starting of the discharge lamp lighting device 10 (start of the preheating mode) until the counter TA first outputs the H level. Auxiliary power is supplied to the control unit 29 (FIG. 1) for a half predetermined time t.

  Until the signals generated by the counters TA, TB, and TC all become H level, a predetermined starting voltage is applied between the filaments FLa and FLb by preheating the filaments FLa and FLb, and the discharge lamp FL is started. When the signals generated by the counters TA, TB, and TC all become H level, the output from the AND gate A1 becomes H level (RSpre_S), and the output from the flip-flop RSpre (RSpre_Q) becomes H level. As a result, the transistor Q2 is turned off through the NOT gate N3, the preheating end switch tpre is turned on, the preheating mode is finished, and the H level is input to the R terminal of the flip-flop RSDK1 through the OR gate OR1, The output (RSDK1_Q) of the flip-flop RSDK1 is reset to L level.

  Next, as shown in FIG. 2, in the start mode started by turning on the preheating end switch tpre, for example, the output voltage VDC on the DC power supply 11 side cannot follow the load fluctuation due to the shift to the start mode. When the voltage VDC is lower than the reference voltage V4, an H level signal is output from the output side of the comparator OP4 to the input side of the AND gate A3. At this time, since the output (RSDK1_Q) of the flip-flop RSDK1 and the output (RSDK2_Q) of the flip-flop RSDK2 are each at the L level, the output (DKoff_f) of the OR gate OR2 becomes the L level, and therefore the AND gate A3 Is supplied with an H level signal via the NOT gate N9, and the comparator OP3 indicates that the power supply voltage Vcc of the control unit 29 (FIG. 1) is higher than the reference voltage V3 for setting the operation stop lower limit voltage. Thus, the H level signal is output and input to the AND gate A3. Therefore, the AND gate A3 outputs an H level signal to the switch S. The switch S is turned on, and the starting unit 32 of the starting power supply circuit 23 is connected to the control unit 29 (FIG. 1) together with the voltage drop unit 31.

  In the starting power supply circuit 23, the output voltage VDC from the power factor correction circuit 21 is dropped to a predetermined voltage by the voltage drop unit 31 and supplied to the control unit 29 (FIG. 1) as an auxiliary.

  In the start mode, the output from the NOT gate N3 is inputted to the gate terminal of the MOSFET Q3 at the L level, the MOSFET Q3 is turned off, the charging / discharging capacitor Cstr is charged with a predetermined constant current by the constant current circuit, and charging / discharging is repeated. .

  As the charging / discharging capacitor Cstr is charged / discharged, the starting counter comparator OP2 compares the reference voltage V2 with the output voltage of the charging / discharging capacitor Cstr, and the output from the starting counter comparator OP2 is H level and L level. The output of the NOT gate N4 is alternately switched between the L level and the H level (TFFD_CLK). As a result, signals are sequentially generated by the counter TD and the counter TE (TD_Q, TE_Q).

  When the output from the counter TD becomes H level, the H level is input to the S terminal of the flip-flop RSDK2 connected to the Q terminal of the counter TD, and the output of the flip-flop RSDK2 becomes H level. Therefore, since the output (DKoff_f) of the OR gate OR2 becomes H level, the L level signal is input to the AND gate A3 via the NOT gate N9, the output from the AND gate A3 becomes L level, and the switch S is turned off. Is done. Therefore, the auxiliary power supply from the starting power supply circuit 23 to the control unit 29 (FIG. 1) is cut off. That is, the starting power supply circuit 23 is the control unit from the start of the start mode until the counter TD first outputs the H level, in other words, for the predetermined time t which is half of the first charge / discharge of the charge / discharge capacitor Cstr. Auxiliary power is supplied to 29 (Fig. 1).

  The start mode continues until the signals generated by the counters TD, TE and the inverted signal of the output of the NOT gate N4 all become H level. The signals generated by the counters TD, TE and the NOT gate When all the inverted signals of the output of N4 become H level, the output from the AND gate A2 becomes H level (RSstr_S), and the output from the flip-flop RSstr (RSstr_Q) becomes H level. As a result, the transistor Q4 is turned off via the NOT gate N8, the start end switch tstr is turned on, the start mode ends, and the lighting mode is entered.

  Then, after the discharge lamp FL is turned on, the inverter circuit 13 is driven by generating the frequency signal P supplied from the oscillation control unit 27 to the drive element 17 based on the detection voltage detected by the state detection unit 28 and the like. The frequency is varied and feedback control is performed so that the discharge lamp current (discharge lamp voltage, discharge lamp power) becomes a predetermined target value.

  As described above, in the above-described embodiment, the power supply unit 25 selectively supplies power to the control unit 29 from a plurality of points different from each other according to the state of the discharge lamp FL. The power is supplied for a predetermined time.

  Specifically, at the time of startup, the power supply unit 25 supplies power to the control unit 29 from the startup power supply circuit 23 connected to the DC power supply 11, and after driving the inverter circuit 13, the control power supply circuit 24 connected to the inverter circuit 13 is supplied. When the power is supplied to the control unit 29 and the discharge lamp FL shifts to the starting state, or when the DC voltage on the DC power supply 11 side detected by the comparator OP3, that is, the output voltage VDC falls below a predetermined threshold, The starter power supply circuit 23 connected to the DC power supply 11 is configured to perform auxiliary power supply to the control unit 29 for a predetermined time.

  In other words, the start-up power supply circuit 23 having a large loss due to having the start-up unit 32 configured to have a high withstand voltage by being connected to the DC power supply 11 is expected to require power assistance at the time of start-up and load fluctuation. Since the control power supply circuit 24 is used only at the timing to be used and at other times the loss is smaller than the start-up power supply circuit 23, the resistor provided in the start-up section 32 does not always consume power, and the circuit efficiency can be secured. At the same time, the state change of the discharge lamp FL, that is, the power source fluctuation of the control unit 29 accompanying the load fluctuation can be suppressed, and the control unit 29 can be operated stably. In particular, the overshoot that occurs when the output voltage VDC on the DC power supply 11 side cannot follow the load fluctuation, such as when the preload state from the light load state where only the filament of the discharge lamp FL becomes the load of the inverter circuit 13 shifts to the start state. Or, the power supply fluctuation of the control unit 29 at the time of undershoot or the like can be reliably suppressed.

  Furthermore, by driving the discharge lamp FL as a load by the discharge lamp lighting device 10, it is possible to suppress power supply fluctuations caused by load fluctuations according to the lighting state of the discharge lamp FL.

  Further, by integrating the control unit 29 together with the power supply unit 25 and directly connecting it to the DC power source 11, a small and inexpensive circuit configuration can be obtained.

Incidentally, in the embodiment described above, even in other than the mode change of the discharge lamp FL, when the output voltage VDC from the DC power supply 11 side by the comparator OP4 is detected that lower than the predetermined voltage, the activation Auxiliary power may be supplied from the power supply circuit 23 to the control unit 29 for a predetermined time.

Further, when the start mode is switched to the lighting mode, auxiliary power may be supplied from the startup power supply circuit 23 to the control unit 29 for a predetermined time .

10 Discharge lamp lighting device as a power supply
11 DC power supply
13 Inverter circuit
25 Power feeding unit as power feeding means
29 Control unit as control means
FL discharge electric lamp
OP4 Comparator as detection means

Claims (3)

With a discharge lamp;
A DC power source, an inverter circuit for supplying an output DC voltage to the conversion to the discharge lamp to the high frequency AC voltage from the DC power source, a discharge lamp by controlling the driving of the inverter circuit, preheat state, startup state, and Control means that can be controlled to any one of the lighting states, a detection means that detects a DC voltage output from the DC power supply, and at the start-up, power is supplied to the control means from the DC power supply side, and after the inverter circuit is driven, A power supply device comprising: a power supply means for supplying power to the control means from the inverter circuit side, and for supplying auxiliary power to the control means for a predetermined time from the DC power supply side when the DC voltage detected by the detection means falls below a predetermined threshold ; ;
A discharge lamp lighting device comprising: The control means can control the discharge lamp to any one of a preheating state, a starting state and a lighting state,
The power supply means supplies power to the control means from the DC power supply side at the start-up, and after the inverter circuit is driven, supplies power to the control means from the inverter circuit side, and the discharge lamp shifts to either the starting state or the lighting state. Then, a discharge lamp lighting device according to claim 1, characterized in that the predetermined time aiding the feed to the control unit from the DC power source side. The discharge lamp lighting device according to claim 1 or 2 , wherein at least a part of the control means is integrated with the power supply means and is directly connected to a DC power source.

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