JP5407349B2 - Switch circuit - Google Patents

Description

  The present invention relates to a switch circuit that switches on and off according to a control signal.

  Conventionally, a frequency conversion circuit is used to control the operation state of an electric motor (for example, a three-phase motor) that drives a compressor of an air conditioner. This frequency conversion circuit is roughly classified into an indirect method and a direct method. In the indirect method, frequency conversion is performed by combining a rectifier circuit and an inverter circuit, and in the direct method, direct frequency conversion is performed by one circuit.

  As an example of the direct type frequency conversion circuit, a so-called matrix converter circuit is known. In the matrix converter circuit, for example, a bidirectional switch is provided between a three-phase AC power supply and a load such as a three-phase motor, and AC power of a desired frequency is obtained by controlling the state of these bidirectional switches. It is like that.

  For bidirectional switches used in matrix converter circuits, switching elements such as IGBTs (Insulated Gate Bipolar Transistors) and MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are generally used. This IGBT has a low reverse breakdown voltage and cannot flow a current in the reverse direction. Therefore, when an IGBT is used for a bidirectional switch, it is common to connect a diode in reverse parallel to the IGBT and connect it in series in the reverse direction. Further, since a MOSFET has a parasitic diode between a source and a drain, it has a characteristic that only ON / OFF of current in one direction can be controlled, and is used in series connection in the opposite direction.

  By the way, in recent years, wide band gap semiconductors using materials such as SiC (Silicon Carbide) and GaN (Gallium Nitride) have been actively developed. A wide bandgap semiconductor mainly made of SiC has a junction field effect transistor (hereinafter abbreviated as JFET) structure rather than a MOSFET structure, so that loss can be easily reduced. Application as a junction field effect transistor is expected. In addition, wide bandgap semiconductors mainly composed of GaN can adopt a heterojunction field effect transistor (hereinafter abbreviated as HFET; HFET: Hetero junction Field Effect Transistor) structure, which is expected to be applied as a heterojunction field effect transistor. Has been. Moreover, since these JFETs and HFETs can flow current in the reverse direction, they can be applied as switching elements for the bidirectional switches described above.

For example, Non-Patent Document 1 uses, as an example of a bidirectional switch using GaN, a bidirectional switch using a single gate type switching element having one gate and a dual gate type switching element having two gates. A bidirectional switch has been proposed. The single gate type switching element needs only one gate to be controlled, and the dual gate type switching element has a feature that conduction loss is small.
Osamu Machida, Nobuo Kaneko, Shinichi Iwagami, Masataka Yanagihara, Hirokazu Goto, Akio Iwabuchi, “GaN Bidirectional Switch”, 2008 Annual Conference of the Institute of Electrical Engineers of Japan, 4th volume, p. 269

  By the way, in the dual gate type switching element, a reverse voltage is applied between the drain and one of the sources regardless of the polarity of the input. In general, since the reverse breakdown voltage of the switching element is lower than the forward breakdown voltage, the switching element may be destroyed depending on the magnitude of the reverse voltage applied as described above. In response to this, as described in Non-Patent Document 1, it is also conceivable to adopt a lateral structure as the structure of the switching element and to have both positive and negative breakdown voltages by designing the surface electrode.

  However, if both positive and negative breakdown voltages are provided by the design of the surface electrode, the size between the gate and the source (that is, the size of the switching element) increases. This increase in size leads to a decrease in blocking gain, an increase in cost, and a decrease in yield.

  The present invention has been made paying attention to the above-described problem, and aims to prevent damage to the switching element due to a reverse voltage without increasing the size of the switching element.

In order to solve the above problems, the first invention is
A switch circuit that switches the on / off state between two terminals (T1, T2) in response to an on / off control signal (CS),
Dual gate type switching element (11) formed on the same substrate with two gates (G1, G2) and two sources (S1, S2) and sharing drain (D), or each gate (G1 , G2) and a switch unit (10) having two switching elements (11a, 11b) connected in series,
When switching between the terminals (T1, T2) from the off state to the on state, of the two drains (D) and sources (S1, S2), the drain (D) The gate (G1, G2) corresponding to the source (S1, S2) is turned on before the other gate (G1, G2), and the terminal (T1, T2) is switched from the on state to the off state. In this case, the control unit (G1, G2) corresponding to the source (S1, S2) on the side to which the reverse voltage is applied is turned off later than the other gate (G1, G2) ( 50),
It is provided with.

  As a result, when the switching element (11) has a drain / source to which a forward voltage is applied (that is, a side having a high withstand voltage) is in an off state, the side having a drain / source to which a reverse voltage is applied The on / off state on the side where the withstand voltage is low is switched.

In addition, the second invention,
In the switch circuit of the first invention,
The control unit (50) determines whether a reverse voltage is applied between the drain and source of the switching element (11, 11a, 11b) according to a voltage value applied between the terminals (T1, T2). A polarity discriminating unit (21) for discriminating is provided.

  As a result, the switching element side to which the reverse voltage is applied is determined based on the voltage value applied between the terminals (T1, T2). For example, it is determined that a reverse voltage is applied between the drain and source of the switching element connected to the terminal having the higher voltage value.

In addition, the third invention,
A switch circuit that switches the on / off state between two terminals (T1, T2) in response to an on / off control signal (CS),
A switch unit (10) having a switching element (11) connected between the terminals (T1, T2);
When the gate of the switching element (11) is turned off, a reverse voltage (including 0 V) higher than a predetermined value is applied between the drain and source of the switching element (11). A control unit (20) for turning on the gate regardless of the control signal (CS);
It is provided with.

  Thus, when a reverse voltage is applied between the drain and source of the switching element (11), the gate of the switching element (11) is turned on before the voltage exceeds a predetermined voltage (including 0 V). To be. When the gate of the switching element (11) is turned on, conduction between the drain and the source is established. That is, it is possible to prevent a voltage exceeding the reverse breakdown voltage from being applied between the drain and the source. In addition, since it is not necessary to secure a region having a reverse breakdown voltage by designing the surface electrode, the structure of the surface electrode can adopt the same structure as a conventional switching element, and the size of the switching element does not increase. . Specifically, for example, a device having a vertical structure can also be adopted.

In addition, the third invention ,
Before SL switch unit (10) is formed as the switching element (11), a gate (G1, G2) and source (S1, S2) the same substrate sharing a drain (D) has two each Dual gate type switching element (11), or two switching elements (11a, 11b) each having a gate (G1, G2) connected in series,
When the on / off control signal (CS) for switching to the off state is input, the control unit (20) turns off the two gates (G1, G2) in the switch unit (10). The gate corresponding to the drain / source to which a reverse voltage higher than a predetermined level is applied is turned on, and the other gate is turned off.

  Thus, when the on / off control signal (CS) for switching to the off state is input, regardless of the polarity of the input to the terminals (T1, T2), if the two gates are controlled to the off state, either the drain or the drain is controlled. A reverse voltage is applied between one source. In this case, of the two gates (G1, G2) in the switch unit (10), the gate corresponding to the drain / source to which a reverse voltage higher than the predetermined level is applied when turned off is controlled to be on. The other gate is controlled to be off. At this time, the source and drain corresponding to the turned-on gate are conducted, and the other source and drain are turned off. That is, according to the present invention, no reverse voltage higher than the reverse breakdown voltage is applied to any drain / source, and a switching element to which a forward voltage is applied (or a portion inside the switching element to which a forward voltage is applied). ) Between terminals (T1, T2) is turned off.

In addition, the fourth invention is
In the third switch circuit,
The control unit (20) determines whether or not a reverse voltage higher than the predetermined value is applied between the drain and source of the switching element (11) according to a voltage value applied between the terminals (T1, T2). A polarity discriminating unit (21) for discriminating is provided.

  Thereby, it is determined whether or not a reverse voltage is applied based on a voltage value applied between the terminals (T1, T2). For example, when there are two switching elements connected in series on the drain side, a reverse voltage is applied between the drain and source of the switching element connected to the terminal having the higher voltage value. Determined.

In addition, the fifth invention,
In any one of the switch circuits according to the first to fourth inventions,
The switching elements (11, 11a, 11b)
Junction field effect transistor,
Electrostatic induction transistor,
Metal semiconductor field effect transistor,
It is one of a heterojunction field effect transistor and a high electron mobility transistor.

  As a result, the switching elements (11, 11a, 11b) with low loss can be realized, and a current can flow in both directions to the switching elements (11).

  According to the first invention, the reverse voltage is not applied only to the portion with a low breakdown voltage, and it is possible to prevent the switching element from being damaged by the reverse voltage. And this does not require an increase in the size of the switching element.

  Further, according to the second invention, the timing of voltage application to each gate (G1, G2) can be easily determined.

  Further, according to the third invention, it is possible to prevent the switching element from being damaged by the reverse voltage without increasing the size of the switching element.

According to the third invention, when this switch circuit is made to function as a bidirectional switch, no reverse voltage higher than the reverse breakdown voltage is applied to the switching element (11) for any voltage in any direction. You can That is, it is possible to realize a bidirectional switch that can prevent the switching element (11) from being damaged by a reverse voltage without increasing the size of the switching element (11).

According to the fourth aspect of the invention, whether or not the predetermined reverse voltage is applied between the drain and source of the switching element (11) depends on the voltage value applied between the terminals (T1, T2). Since the determination is made, it is possible to prevent a reverse voltage exceeding the reverse breakdown voltage from being applied to the switching element (11).

In addition, according to the fifth invention, a switch circuit with a small loss can be easily realized.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The following embodiments are essentially preferable examples, and are not intended to limit the scope of the present invention, its application, or its use. In the following description of each embodiment, constituent elements having the same functions as those described once will be assigned the same reference numerals and description thereof will be omitted.

Embodiment 1 of the Invention
The switch circuit according to the present invention is used in, for example, a matrix converter circuit. FIG. 1 is a block diagram showing a configuration of a matrix converter circuit (1) using a switch circuit (5) according to Embodiment 1 of the present invention. The matrix converter circuit (1) converts the power supplied from the three-phase AC power source (2) into a predetermined frequency and supplies it to the electric motor (3) (three-phase motor).

  As shown in the figure, the matrix converter circuit (1) includes a filter circuit (4) and nine switch circuits (5). The filter circuit (4) is an LC filter including a coil and a capacitor corresponding to each phase of the three-phase AC power source (2). This filter circuit (4) is provided in order to suppress the high-frequency current generated by the on / off operation of the switch circuit (5) from flowing into the three-phase AC power supply (2) side.

<Configuration of switch circuit (5)>
FIG. 2 is a block diagram showing a configuration of the switch circuit (5). As shown in the figure, the switch circuit (5) includes a switch unit (10), a control unit (20), and two gate drive circuits (30, 31). The switch circuit (5) switches the on / off state between the terminals (T1, T2) according to the input on / off control signal (CS). In the present embodiment, the switch circuit (5) is switched on when the on / off control signal (CS) is at a high level (hereinafter abbreviated as H level), and is off when it is at a low level (hereinafter abbreviated as L level). It shall be switched to the state. The switch circuit (5) is a bidirectional switch, and the polarity of the voltage applied to the terminals (T1, T2) is arbitrary. That is, the terminal (T1) side may have a higher potential than the terminal (T2) side, or vice versa.

  The switch unit (10) of the present embodiment includes a dual gate type switching element (11) as a switching element. This dual gate type switching element (11) is an example of the switching element of the present invention. The dual gate switching element (11) includes two gates (G1, G2) and two sources (S1, S2), as schematically shown in FIG. A region between the gate (G1) and the gate (G2) functions as a drain (D). That is, the dual gate type switching element (11) can be regarded as two transistors sharing the drain (D) being integrally formed on one semiconductor substrate. FIG. 4 shows this structure with an equivalent circuit. Note that the dual gate type switching element (11) of the present embodiment has a reverse breakdown voltage lower than a forward breakdown voltage.

  Further, the dual gate switching element (11) of the present embodiment employs a JFET structure mainly composed of a wide band gap semiconductor such as SiC. The dual gate type switching element (11) of the present embodiment is a so-called normally-on type switching element. For example, when the gate voltage is 0V, the dual gate type switching element (11) is turned on, and when the gate voltage is −15V, it is turned off. The JFET employed here is an example. In addition, any transistor can be used as a switching element for a bidirectional switch as long as it can flow a current in the reverse direction and can be turned on / off in any current direction. Specifically, for example, a static induction transistor (SIT), a metal-semiconductor field-effect transistor (MESFET), a heterojunction field-effect transistor (HFET) A transistor, a high electron mobility transistor (HEMT), or the like can be employed. Further, a so-called normally-off type switching element may be employed.

  In response to the drive circuit control signal (SIG1) given from the control unit (20), the gate drive circuit (30) is turned on with respect to the gate (G1) (in this example, between the gate (G1) and the source (S1)). 0V) or off voltage (-15 V between the gate (G1) and the source (S1) in this example) is applied, and the gate drive circuit (31) is a drive circuit control signal (SIG2) given from the control unit (20) Depending on the gate (G2), the ON voltage (0 V between the gate (G2) and the source (S2) in this example) or the OFF voltage (-15 V between the gate (G2) and the source (S2) in this example) Is applied. In the present embodiment, each of the gate drive circuits (30, 31) applies an on-voltage when the drive circuit control signals (SIG1, SIG2) are at the H level, and applies an off-voltage when the drive circuit control signals (SIG1, SIG2) are at the L level. Shall. In the following description, applying an on voltage to a gate simply means turning on the gate, and applying an off voltage means turning off the gate.

  The control unit (20) controls each gate drive circuit (30, 31). More specifically, when the on / off control signal (CS) for switching the switch circuit (5) to the off state is input, the control unit (20) of the present embodiment has two dual gate switching elements (11). Of the gates (G1, G2), when the transistor is turned off, the gate to which a reverse voltage of a predetermined level or higher is applied between the drain and source is turned on, and the other gate is turned off. When an on / off control signal (CS) for switching the switch circuit (5) to the on state is input, the two gates (G1, G2) are turned on.

  In the present embodiment, whether or not a reverse voltage higher than the predetermined value is applied between the respective drains and sources of the dual gate type switching element (11) is determined by the voltage applied between the two terminals (T1, T2). The on / off state of each gate (G1, G2) is controlled as shown in FIG. For example, in the example shown in FIG. 5, when the switch circuit (5) is turned off, when a reverse voltage is applied to the drain (D) / source (S1), the gate (G1) Turn on and turn off the gate (G2).

  In order to realize the control shown in FIG. 5, the control unit (20) of the present embodiment includes a polarity determination unit (21), two OR circuits (22, 23), and a NOT circuit ( 24).

  The polarity discriminating unit (21) determines whether a reverse voltage higher than the predetermined value is applied between the drain and source of the dual gate type switching element (11) according to the voltage value applied between the terminals (T1, T2). Is determined. In more detail, this polarity discriminating unit (21) indicates that the polarity of the voltage applied to the drain (D) / source (S1) is reversed when the potential of the terminal (T1) is higher than the potential of the terminal (T2). The polarity of the voltage applied to the drain (D) and source (S1) is forward when the opposite polarity voltage is applied. And an L level polarity determination signal (SIG3) is output. The polarity determination signal (SIG3) is input to the NOT circuit (24), and the NOT circuit (24) outputs an inverted signal of the polarity determination signal (SIG3).

  The OR circuit (22) receives the on / off control signal (CS) and the polarity determination signal (SIG3) as inputs, and outputs the drive circuit control signal (SIG1). The OR circuit (23) receives the on / off control signal (CS) and the inverted signal of the polarity determination signal (SIG3) (output of the NOT circuit (24)) and inputs the drive circuit control signal (SIG2). Output.

<Operation of switch circuit (5)>
Next, the operation of the switch circuit (5) in the on state and the off state will be described.

(1) When the switch circuit (5) is turned on When the switch circuit (5) is turned on, an H-level on / off control signal (CS) is input to the control unit (20). In the control unit (20), the on / off control signal (CS) is input to the two OR circuits (22, 23), respectively. As a result, the drive circuit control signals (SIG1, SIG2) output by the two OR circuits (22, 23) respectively are H level regardless of the polarity determination signal (SIG3) output by the polarity determination unit (21). It becomes. As a result, the two gate drive circuits (30, 31) turn on the corresponding gates (G1, G2). As a result, the terminals (T1, T2) are conducted and the switch circuit (5) is turned on.

(2) When the switch circuit (5) is turned off When the switch circuit (5) is turned off, an L level on / off control signal (CS) is input to the control unit (20).

<When the potential of the terminal (T1) is higher than that of the terminal (T2)>
For example, when the potential of the terminal (T1) is higher than that of the terminal (T2), a reverse voltage is applied between the drain (D) and the source (S1), and the drain (D) and the source (S2) A forward voltage is applied in between. At this time, the polarity determination unit (21) of the control unit (20) outputs an H level polarity determination signal (SIG3).

  This H level polarity determination signal (SIG3) is input to the OR circuit (22). As a result, the drive circuit control signal (SIG1) output from the OR circuit (22) is set to the level of the on / off control signal (CS). Regardless, it goes to H level. When the drive circuit control signal (SIG1) becomes H level, the gate drive circuit (30) to which the drive circuit control signal (SIG1) is input turns on the gate (G1). That is, the control unit (20) controls to turn on the gate (G1) to which a predetermined or higher reverse voltage (in this example, a reverse voltage of 0 V or higher) is applied when turned off.

  On the other hand, since the inverted signal of the polarity determination signal (SIG3) (the output of the NOT circuit (24)) is at the L level, the two inputs of the OR circuit (23) are both at the L level, and the OR circuit (23) An L level drive circuit control signal (SIG2) is output. When the drive circuit control signal (SIG2) becomes L level, the gate drive circuit (31) to which the drive circuit control signal (SIG2) is input turns off the gate (G2). When the gate (G2) is turned off, the drain (D) and the source (S2) are turned off, and the dual gate switching element (11) as a whole can be regarded as being turned off. That is, the terminals (T1, T2) are turned off. At this time, since the gate (G1) is controlled to be on as described above, the drain (D) and the source (S1) are electrically connected, and the drain (D) and the source (S1) are reversed. It is possible to prevent a voltage exceeding the withstand voltage from being applied. That is, the dual gate switching element (11) is prevented from being damaged.

<When the potential of the terminal (T1) is lower than that of the terminal (T2)>
In addition, when the potential of the terminal (T1) is lower than that of the terminal (T2), a forward voltage is applied between the drain (D) and the source (S1), and the drain (D) and the source (S2). In the meantime, a reverse voltage is applied. At this time, the polarity determination unit (21) of the control unit (20) outputs an L level polarity determination signal (SIG3).

  As a result, the two inputs to the OR circuit (22) both become L level, and as a result, the drive circuit control signal (SIG1) output from the OR circuit (22) becomes L level. When the drive circuit control signal (SIG1) becomes L level, the gate drive circuit (30) turns off the gate (G1). When the gate (G1) is turned off, the drain (D) and the source (S1) are turned off, and the dual gate switching element (11) as a whole can be regarded as being turned off. That is, the terminals (T1, T2) are turned off.

  At this time, since an H level signal, which is an inverted signal of the polarity determination signal (SIG3) (output of the NOT circuit (24)), is input to the OR circuit (23), the level of the on / off control signal (CS) is set. Regardless, the drive circuit control signal (SIG2) output from the OR circuit (23) becomes H level. Thereby, the gate drive circuit (31) turns on the gate (G2). That is, the control unit (20) controls to turn on the gate (G2) to which a reverse voltage of a predetermined level or higher (in this example, a reverse voltage of 0 V or higher) is applied when the switch is turned off. Control G1) off. By controlling the gate (G2) to turn on in this way, the drain (D) and the source (S2) become conductive, and the drain (D) and the source (S2) have a reverse breakdown voltage or higher. The voltage can be prevented. That is, the dual gate switching element (11) is prevented from being damaged.

  As described above, according to the present embodiment, the reverse breakdown voltage or higher between each drain and source of the dual gate type switching element (11) regardless of the polarity of the voltage applied to each terminal (T1, T2). The switching element is not damaged by the reverse voltage. In addition, since it is not necessary to secure an area with a reverse breakdown voltage by designing the surface electrode, the same structure as the conventional switching element can be adopted as the structure of the surface electrode, the blocking gain is reduced, There is no increase in size. Specifically, for example, a device having a vertical structure can also be adopted.

  In general, the switch circuit is required to have low conduction loss. However, in this embodiment, since the dual gate type switching element (11) is adopted as the switching element, the switch circuit (5) has the conduction loss. There is a feature that there are few.

<< Embodiment 2 of the Invention >>
FIG. 6 is a block diagram showing the configuration of the switch circuit (6) according to the second embodiment of the present invention. This switch circuit (6) has the on / off switching logic opposite to that of the switch circuit (5) of the first embodiment, and the switch circuit (6) switches to the off state when the on / off control signal (CS) is at the H level. In the case of the L level, it is switched to the on state.

  In this switch circuit (6), the control unit (20) of the switch circuit (5) described in the first embodiment is replaced with a control unit (40), and the gate drive circuit (30, 31) is modified. Is.

  In the present embodiment, each gate drive circuit (30, 31) operates with a logic opposite to that in the first embodiment. Specifically, the gate drive circuit (30, 31) of this embodiment applies an on-voltage to the gate corresponding to the case where the drive circuit control signals (SIG1, SIG2) are at the L level, and turns off when the drive circuit control signal (SIG1, SIG2) is at the H level. Apply voltage.

  The control unit (40) includes a polarity determination unit (41), a photocoupler (42, 43), an AND circuit (44, 45), and a power source (46, 47).

  The polarity discriminating unit (41) determines that the polarity applied to the drain (D) / source (S1) is in the reverse direction when the potential of the terminal (T1) is higher than the potential of the terminal (T2), An L level polarity determination signal (SIG4) is output to the AND circuit (44), and an H level polarity determination signal (SIG5) is output to the AND circuit (45). When the opposite voltage is applied between the terminals (T1, T2), the polarity discriminator (41) indicates that the polarity of the voltage applied to the drain (D) / source (S1) is forward. And an H level polarity determination signal (SIG4) is output to the AND circuit (44), and an L level polarity determination signal (SIG5) is output to the AND circuit (45).

  Specifically, the polarity discriminating unit (41) includes a resistor (R1) and two Zener diodes (D1, D2). The anode sides of these Zener diodes (D1, D2) are connected to each other via a resistor (R1). The cathode of the Zener diode (D1) is connected to the terminal (T1), and the cathode of the Zener diode (D2) is connected to the terminal (T2). The Zener diode (D1) outputs the polarity determination signal (SIG4) from the anode, and the Zener diode (D2) outputs the polarity determination signal (SIG5) from the anode.

  These Zener diodes (D1, D2) have a Zener whose potential when conducting in the reverse direction is less than the L level threshold voltage of the AND circuit (44, 45) and does not exceed the reverse breakdown voltage of the switching element. Use one with voltage. Specifically, one having a Zener voltage comparable to the power supply voltage of the control unit (40) is employed. In the present embodiment, the Zener voltage of these Zener diodes (D1, D2) is 5V.

  In the AND circuit (44), one input is connected to the anode of the Zener diode (D1) and the polarity determination signal (SIG4) is input, and the other input is turned on / off control signal (via a photocoupler (42)). CS) is entered. The output of the AND circuit (44) is given to the gate drive circuit (30) as a drive circuit control signal (SIG1).

  The AND circuit (45) has one input connected to the anode of the Zener diode (D2) and the polarity determination signal (SIG5) is input, and the other input is on / off controlled via the photocoupler (43). The signal (CS) is input. The output of the AND circuit (45) is given to the gate drive circuit (31) as a drive circuit control signal (SIG2).

  The power source (46) is a power source for the gate drive circuit (30), and the power source (47) is a power source for the gate drive circuit (31). The power supply of the AND circuit (44, 45) and the photocoupler (42, 43) is not shown, but in this embodiment, it is 5 V (the power supply (46, 47) may be used).

  In the polarity discriminating unit (41), for example, when the potential of the terminal (T1) becomes higher than the terminal (T2) and the voltage applied to the Zener diode (D1) exceeds the Zener voltage, the Zener diode (D1) Breaks down and the voltage across the Zener diode (D1) becomes the Zener voltage (5V in this example). At this time, the potential on the anode side of the Zener diode (D1), that is, the level of the polarity determination signal (SIG4) becomes L level. Further, since a forward voltage is applied to the Zener diode (D2), the anode-side potential of the Zener diode (D2), that is, the level of the polarity determination signal (SIG5) is H level (almost the power supply). Potential). That is, when the voltage at the terminal (T1) exceeds the Zener voltage, the polarity determination unit (41) outputs an L level polarity determination signal (SIG4) and an H level polarity determination signal (SIG5). Conversely, when the voltage at the terminal (T2) exceeds the Zener voltage, the polarity discriminator (41) outputs an H level polarity judgment signal (SIG4) and an L level polarity judgment signal (SIG5). To do.

<Operation of switch circuit (6)>
Next, the operation of the switch circuit (6) will be described.

(1) When the switch circuit (6) is turned on When the switch circuit (6) is turned on, an L-level on / off control signal (CS) is input to the control unit (40). Thus, the drive circuit control signals (SIG1, SIG2) output from the two AND circuits (44, 45) of the control unit (40) are the polarity determination signals (SIG4, SIG5) output from the polarity determination unit (41). Regardless of the level, it becomes the L level. As a result, the two gate drive circuits (30, 31) turn on the corresponding gates (G1, G2). As a result, the terminals (T1, T2) are conducted and the switch circuit (6) is turned on.

(2) When the switch circuit (6) is turned off When the switch circuit (6) is turned off, an H-level on / off control signal (CS) is input to the control unit (40).

<When the potential of the terminal (T1) is higher than that of the terminal (T2)>
For example, when the potential of the terminal (T1) is higher than that of the terminal (T2), a reverse voltage is applied between the drain (D) and the source (S1), and the drain (D) and the source (S2) A forward voltage is applied in between. At this time, when the voltage at the terminal (T1) exceeds the Zener voltage, the polarity determination unit (41) outputs an L level polarity determination signal (SIG4) and an H level polarity determination signal (SIG5).

  Accordingly, one input of the AND circuit (44) becomes L level, and the drive circuit control signal (SIG1) output from the AND circuit (44) becomes L level regardless of the level of the on / off control signal (CS). When the drive circuit control signal (SIG1) becomes L level, the gate drive circuit (30) to which the drive circuit control signal (SIG1) is input turns on the gate (G1). That is, the control unit (40) controls to turn on the gate (G1) to which a predetermined or higher reverse voltage (in this example, a reverse voltage of 5V or more of the zener voltage) is applied when turned off. Thus, by performing control with a value larger than 0 V (5 V in this example), the noise margin can be increased.

  On the other hand, since the polarity determination signal (SIG5) is at the H level, the two inputs of the AND circuit (45) are both at the H level. As a result, the drive circuit control signal (SIG2) output from the AND circuit (44) becomes H level. The gate drive circuit (31) to which the H level drive circuit control signal (SIG2) is input turns off the gate (G2). When the gate (G2) is turned off, the drain (D) and the source (S2) are turned off, and the dual gate switching element (11) as a whole can be regarded as being turned off. That is, the terminals (T1, T2) are turned off. At this time, since the gate (G1) is controlled to be on as described above, even in this switch circuit (6), a voltage higher than the reverse breakdown voltage is not applied between the drain (D) and the source (S1). Can be. That is, the dual gate switching element (11) is prevented from being damaged.

<When the potential of the terminal (T1) is lower than that of the terminal (T2)>
In addition, when the potential of the terminal (T1) is lower than that of the terminal (T2), a forward voltage is applied between the drain (D) and the source (S1), and the drain (D) and the source (S2). In the meantime, a reverse voltage is applied. At this time, when the voltage at the terminal (T2) exceeds the Zener voltage, the polarity determination unit (41) outputs an H level polarity determination signal (SIG4) and an L level polarity determination signal (SIG5).

  As a result, the two inputs to the AND circuit (44) both become H level, and as a result, the drive circuit control signal (SIG1) output from the AND circuit (44) becomes H level. When the drive circuit control signal (SIG1) becomes H level, the gate drive circuit (30) turns off the gate (G1). When the gate (G1) is turned off, the drain (D) and the source (S1) are turned off, and the dual gate switching element (11) as a whole can be regarded as being turned off. That is, the terminals (T1, T2) are turned off.

  At this time, since the L level polarity determination signal (SIG5) is input to the AND circuit (45), the drive circuit control signal (SIG2) output from the AND circuit (45) regardless of the level of the on / off control signal (CS). ) Becomes L level. Thereby, the gate drive circuit (31) turns on the gate (G2). That is, the control unit (40) controls to turn on the gate (G2) to which a reverse voltage of a predetermined level or higher (in this example, a reverse voltage of 5V or higher of the zener voltage) is applied when turned off, Control off the gate (G1). Thus, by controlling the gate (G2) to be on, it is possible to prevent a voltage higher than the reverse breakdown voltage from being applied between the drain (D) and the source (S2). That is, the dual gate switching element (11) is prevented from being damaged.

  As described above, also in this embodiment, it is possible to prevent a voltage higher than the reverse breakdown voltage from being applied between each drain and source regardless of the polarity of the voltage applied to each terminal (T1, T2). That is, the switching element is not damaged by the reverse voltage. In addition, since it is not necessary to have both positive and negative withstand voltages due to the design of the surface electrode, the blocking gain does not decrease and the size of the switching element does not increase. Specifically, for example, a device having a vertical structure can also be adopted.

  Further, since the dual gate type switching element (11) is adopted as the switching element, this switch circuit (5) has a feature that there is little conduction loss.

<< Embodiment 3 of the Invention >>
FIG. 7 is a block diagram showing a configuration of the switch circuit (7) according to the third embodiment of the present invention. This switch circuit (7) is obtained by changing the control unit (20) of the switch circuit (5) of the first embodiment to a control unit (50). Specifically, as shown in FIG. 7, the control unit (50) of the switch circuit (7) includes a polarity determination unit (21) and a delay control unit (25). The polarity discriminating unit (21) has the same configuration as that of the first embodiment.

  The delay control unit (25) receives the polarity determination signal (SIG3) and the on / off control signal (CS), and outputs two drive circuit control signals (SIG1, SIG2). Specifically, the delay control unit (25) of the present embodiment, when switching between the terminals (T1, T2) from the off state to the on state, the two drains (D), The drive circuit control signal (S1 and S2) is applied so that the ON voltage is applied to the gate corresponding to the drain / source on the side to which the reverse voltage is applied before the other gate. SIG1, SIG2) is output. More specifically, when the on / off control signal (CS) rises to the H level, the H level driving circuit control signals (SIG1, SIG2) are immediately output to the reverse voltage side gate driving circuit (30, 31), and thereafter Then, an H level drive circuit control signal (SIG1, SIG2) is output to the other gate drive circuit (30, 31) with a delay of a predetermined time. For example, when a reverse voltage is applied between the drain (D) and the source (S1), as shown in FIG. 8, the drive circuit control signal (SIG1) is ahead of the drive circuit control signal (SIG2). Is raised to H level. The predetermined time delay is set in consideration of the switching delay of the dual gate type switching element (11). That is, the delay time is set to a time longer than the switching delay, and the subsequent drive circuit control signal rises after the side to which the on-voltage is applied first is surely turned on.

  When switching between the terminals (T1, T2) from the ON state to the OFF state, the drain / source on the side to which the reverse voltage is applied is selected from the two drains (D) / sources (S1, S2). A drive circuit control signal (SIG1, SIG2) is output so that the off-voltage is applied to the corresponding gate later than the other gate. More specifically, when the on / off control signal (CS) falls to the L level, the L level driving circuit control signal (SIG1, SIG2) is immediately output to the forward voltage side gate driving circuit (30, 31), After that, an L level drive circuit control signal (SIG1, SIG2) is output to the other gate drive circuit (30, 31) with a delay of a predetermined time. For example, when a reverse voltage is applied between the drain (D) and the source (S1), as shown in FIG. 8, the drive circuit control signal (SIG2) is ahead of the drive circuit control signal (SIG1). Falls to L level.

<Operation of switch circuit (7)>
Next, the operation of the switch circuit (7) will be described.

(1) When the potential of the terminal (T1) is higher than that of the terminal (T2) <When switching the switch circuit (7) from the off state to the on state>
In FIG. 8, when the voltage of the terminal (T1) is higher than that of the terminal (T2), that is, a reverse voltage is applied between the drain (D) and the source (S1), and the drain (D) and the source (S2). Is a timing chart showing the operation of the delay control unit (25) when a forward voltage is applied during the period.

  When a reverse voltage is applied between the drain (D) and the source (S1), the polarity determination unit (21) outputs an H level polarity determination signal (SIG3) as shown in FIG. . Here, when the on / off control signal (CS) rises to the H level, the delay control unit (25) immediately raises the drive circuit control signal (SIG1) to the H level. When the drive circuit control signal (SIG1) becomes H level, the gate drive circuit (30) applies an ON voltage to the gate (G1). As a result, the drain (D) and the source (S1) of the dual gate switching element (11) are turned on. However, at this timing, the entire switch circuit (7) is in an off state.

  Thereafter, after a predetermined time delay, the delay control unit (25) raises the drive circuit control signal (SIG2) to the H level. When the drive circuit control signal (SIG2) becomes H level, the gate drive circuit (31) applies an ON voltage to the gate (G2). As a result, the drain (D) and the source (S2) of the dual gate switching element (11) are turned on. That is, the entire switch circuit (7) is also turned on.

<When switching circuit (7) from on to off>
When switching the switch circuit (7) from the on state to the off state, the on / off control signal (CS) is lowered to the L level. When the on / off control signal (CS) becomes L level, the delay control unit (25) immediately lowers the drive circuit control signal (SIG2) to L level. When the drive circuit control signal (SIG2) becomes L level, the gate drive circuit (31) applies an off voltage to the gate (G2). As a result, the drain (D) and source (S2) of the dual gate switching element (11) are turned off. At this timing, the entire switch circuit (7) is also turned off.

  Thereafter, after a predetermined time delay, the delay control unit (25) causes the drive circuit control signal (SIG1) to fall to the L level. When the drive circuit control signal (SIG1) becomes L level, the gate drive circuit (30) applies an off voltage to the gate (G1). As a result, the drain (D) and the source (S1) of the dual gate switching element (11) are also turned off.

(2) When the potential of the terminal (T1) is lower than that of the terminal (T2) FIG. 9 shows the case where the voltage of the terminal (T2) is higher than that of the terminal (T1), that is, the drain (D) and the source (S2 Is a timing chart showing the operation of the delay control unit (25) when a reverse voltage is applied between the drain (D) and the source (S1). When a reverse voltage is applied between the drain (D) and the source (S1), the polarity determination unit (21) outputs an L level polarity determination signal (SIG3) as shown in FIG. .

<When switching circuit (7) from off to on>
Here, when the on / off control signal (CS) is raised to the H level, the delay control section (25) immediately raises the drive circuit control signal (SIG2) to the H level. When the drive circuit control signal (SIG2) becomes H level, the gate drive circuit (31) applies an ON voltage to the gate (G2). As a result, the drain (D) and the source (S2) of the dual gate switching element (11) are turned on. However, at this timing, the entire switch circuit (7) is in an off state.

  Thereafter, after a predetermined time delay, the delay control unit (25) raises the drive circuit control signal (SIG1) to the H level. When the drive circuit control signal (SIG1) becomes H level, the gate drive circuit (30) applies an ON voltage to the gate (G1). As a result, the drain (D) and the source (S1) of the dual gate switching element (11) are turned on. That is, the entire switch circuit (7) is also turned on.

<When switching circuit (7) from on to off>
When switching the switch circuit (7) from the on state to the off state, the on / off control signal (CS) is lowered to the L level. When the on / off control signal (CS) becomes L level, the delay control unit (25) immediately lowers the drive circuit control signal (SIG1) to L level. When the drive circuit control signal (SIG1) becomes L level, the gate drive circuit (30) applies an off voltage to the gate (G1). As a result, the drain (D) -source (S1) of the dual gate switching element (11) is turned off. At this timing, the entire switch circuit (7) is also turned off.

  Thereafter, after a predetermined time delay, the delay control unit (25) causes the drive circuit control signal (SIG2) to fall to the L level. When the drive circuit control signal (SIG2) becomes L level, the gate drive circuit (31) applies an off voltage to the gate (G2). As a result, the drain (D) and source (S2) of the dual gate switching element (11) are also turned off.

  As described above, in the present embodiment, the portion with a high breakdown voltage when the dual gate switching element (11) has a high breakdown voltage (the side with the drain / source to which the forward voltage is applied) is in the low state. The on / off state of the side (the side with the drain / source to which the reverse voltage is applied) is switched. Therefore, the reverse voltage is not applied only to the portion with a low withstand voltage of the dual gate switching element (11), and it is possible to prevent the switching element from being damaged by the reverse voltage. Moreover, this does not require an increase in the size of the switching element.

<< Other Embodiments >>
<1> In the first embodiment, the dual gate type switching element (11) is controlled in accordance with the polarity of the voltage applied between the terminals (T1, T2). Since a reverse voltage can be applied, application of a reverse voltage smaller than the reverse withstand voltage is allowed, and when a certain threshold value is exceeded, the gate on the side that becomes the reverse voltage may be controlled to be turned on by the control unit. This makes it possible to provide a noise margin.

  <2> The switching element used for the switch unit (10) is not limited to the dual gate switching element (11). For example, as shown in FIG. 10, the first switching element (11a) and the second switching element (11b) may be connected in series to realize the switch unit (10). In this example, each of the first and second switching elements (11a, 11b) is a switching element that includes only one gate and whose on / off state is controlled by the one gate. In general, the reverse breakdown voltage of this switching element is lower than the forward breakdown voltage. However, the control unit (20) or the like controls the switching element (11a, 11b) between the drain and source. It is possible to prevent a voltage exceeding the reverse breakdown voltage from being applied. That is, each switching element (11a, 11b) is prevented from being damaged. The switch unit (10) configured by the first and second switching elements (11a, 11b) can be applied to any of the first, second, and third embodiments. As shown in FIG. 10, the first and second switching elements (11a, 11b) may be connected in series on the source side instead of being connected in series on the drain side.

  <3> The gate control described in each of the first and second embodiments may be applied to a so-called unidirectional switch that allows current in only one direction.

  For example, to apply this gate control to a unidirectional switch, the switch section (10) is formed by one switching element. This switching element has, for example, a drain connected to the terminal (T1) and a source connected to the terminal (T2). One gate drive circuit (30) is provided, and the gate of the switching element is driven by the gate drive circuit (30). When a reverse voltage is applied between the terminals (T1, T2) (that is, between the drain and source of the switching element), the control unit (20) or the like turns on the gate. By doing in this way, damage to this switching element can be prevented. That is, this form can also be applied as a safety mechanism for a unidirectional switch.

  <4> The relationship between each signal level (H level, L level) and its meaning (for example, on / off of a switch) described in the above embodiments is an example, and is not limited to the above example. Similarly, a combination of logic circuits such as an OR circuit and a NOT circuit is also an example, and is not limited to the above example as long as a desired control signal can be output.

  The present invention is useful as a switch circuit that switches on and off according to a control signal.

It is a block diagram which shows the structure of the matrix converter circuit (1) using the switch circuit (5) which concerns on Embodiment 1 of this invention. It is a block diagram which shows the structure of a switch circuit (5). It is a figure which shows typically the structure of a dual gate type switching element (11). It is a figure which shows the equivalent circuit of a dual gate type switching element (11). It is a figure explaining the on-off control of each gate (G1, G2) which a control part (20) performs. It is a block diagram which shows the structure of the switch circuit (6) which concerns on Embodiment 2 of this invention. It is a block diagram which shows the structure of the switch circuit (7) which concerns on Embodiment 3 of this invention. It is a timing chart which shows operation | movement of the delay control part (25) when the reverse voltage is applied to the drain (D) * source (S1) side. It is a timing chart which shows operation | movement of the delay control part (25) when the reverse voltage is applied to the drain (D) * source (S2) side. It is a figure which shows the switch part (10) using two switching elements.

5, 6, 7 Switch circuit 10 Switch part 11 Dual gate type switching element (switching element)
11a 1st switching element 11b 2nd switching element 20, 40 Control part 21, 41 Polarity discrimination part CS ON / OFF control signal T1, T2 terminal

Claims (5)

A switch circuit that switches the on / off state between two terminals (T1, T2) in response to an on / off control signal (CS),
Dual gate type switching element (11) formed on the same substrate with two gates (G1, G2) and two sources (S1, S2) and sharing drain (D), or each gate (G1 , G2) and a switch unit (10) having two switching elements (11a, 11b) connected in series,
When switching between the terminals (T1, T2) from the off state to the on state, of the two drains (D) and sources (S1, S2), the drain (D) The gate (G1, G2) corresponding to the source (S1, S2) is turned on before the other gate (G1, G2), and the terminal (T1, T2) is switched from the on state to the off state. In this case, the control unit (G1, G2) corresponding to the source (S1, S2) on the side to which the reverse voltage is applied is turned off later than the other gate (G1, G2) ( 50),
A switch circuit comprising: The switch circuit of claim 1,
The control unit (50) determines whether a reverse voltage is applied between the drain and source of the switching element (11, 11a, 11b) according to a voltage value applied between the terminals (T1, T2). A switch circuit comprising a polarity discrimination unit (21) for discrimination. A switch circuit that switches the on / off state between two terminals (T1, T2) in response to an on / off control signal (CS),
A switch unit (10) having a switching element (11) connected between the terminals (T1, T2);
When the gate of the switching element (11) is turned off, a reverse voltage (including 0 V) higher than a predetermined value is applied between the drain and source of the switching element (11). A control unit (20) for turning on the gate regardless of the control signal (CS),
The switch unit (10) is formed on the same substrate as the switching element (11), having two gates (G1, G2) and two sources (S1, S2), sharing a drain (D). Dual gate type switching element (11), or two switching elements (11a, 11b) each having a gate (G1, G2) and connected in series,
When the on / off control signal (CS) for switching to the off state is input, the control unit (20) turns off the two gates (G1, G2) in the switch unit (10). A switch circuit characterized by controlling a gate corresponding to a drain / source to which a reverse voltage of a predetermined level or more is applied to an on state and controlling the other gate to an off state. The switch circuit of claim 3 ,
The control unit (20) determines whether or not a reverse voltage higher than the predetermined value is applied between the drain and source of the switching element (11) according to a voltage value applied between the terminals (T1, T2). A switch circuit comprising a polarity discrimination unit (21) for discrimination. In any one switch circuit in any one of Claims 1-4 ,
The switching elements (11, 11a, 11b)
Junction field effect transistor,
Electrostatic induction transistor,
Metal semiconductor field effect transistor,
A switch circuit comprising any one of a heterojunction field effect transistor and a high electron mobility transistor.

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