JP5407126B2 - Manufacturing method of semiconductor substrate - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly, to a method for manufacturing a semiconductor substrate that can improve the manufacturing yield and realize a thin film and that requires a very thin substrate. Is.

  There is an IGBT (Insulated Gate Bipolar Transistor) as a semiconductor circuit element for power control. The IGBT is a high voltage circuit element having both high-speed switching characteristics of a power MOSFET and high output characteristics of a bipolar transistor, and is widely used in the field of power electronics such as an inverter and a switching power supply.

As shown in FIG. 3 (E), for example, an IGBT manufactured by a conventional technique is one in which an element 22 is formed on one surface of an n ⁻ -type silicon single crystal substrate 21, and the other surface is An n ⁺ layer 23a and a p ⁺ layer 23b are formed, and an electrode 24 is further formed. An example of the procedure for manufacturing the IGBT is shown in FIG. FIG. 3 is a diagram showing an example of a process for manufacturing an IGBT in the prior art.

As a semiconductor substrate for constituting the IGBT, for example, an n-type high resistivity silicon single crystal substrate 21 (n ^- substrate) manufactured by FZ method is used (FIG. 3A). Then, after the element 22 (diffusion layer, insulating film, electrode, etc.) is formed on the surface side using an ion implantation technique, a dopant diffusion technique, a lithography technique, etc. (FIG. 3B), the ON resistance of the IGBT is changed. In order to lower, the back side is ground to make the substrate thin to about 100 to 200 μm (FIG. 3C). Thereafter, by ion implantation from the back side and heat treatment, the n ⁺ layer 23a in which the n-type dopant is diffused at a high concentration is formed (FIG. 3D), and then the p-type in which the p-type dopant is diffused at a high concentration. By forming the ⁺ layer 23b, a substrate having a structure of n ⁻ substrate / n ⁺ layer / p ⁺ layer is manufactured, and the back electrode 24 is formed on the front surface (back surface side) of the p ⁺ layer 23b to complete the IGBT. (FIG. 3E) (see, for example, Patent Document 1).

In the manufacturing process of the IGBT, the power MOSFET can be manufactured by omitting the process of forming the p ⁺ layer and forming a structure of n ⁻ substrate / n ⁺ layer.
However, when manufacturing a substrate structure for an IGBT or a power MOSFET in this way, it is extremely difficult to perform ion implantation or heat treatment on a substrate thinned to about 100 to 200 μm. It has become. Further, since the thinning is performed by grinding, there is a problem that it is difficult to reduce the thickness to 100 μm or less.

JP 2002-359373 A

  The present invention, as represented by IGBT and power MOSFET, a grinding process that is a factor that deteriorates the manufacturing yield when manufacturing a semiconductor substrate that requires a process of making the back substrate extremely thin, Manufacturing method of semiconductor substrate capable of improving manufacturing yield by manufacturing without performing ion implantation from the rear surface after thinning and heat treatment, and realizing thinning to a thickness of, for example, 100 μm or less The purpose is to provide.

In order to solve the above-described problems, the present invention provides a method for manufacturing a semiconductor substrate, comprising at least a step of forming a porous layer on the surface of a silicon single crystal substrate, and then epitaxial silicon on the surface of the porous layer. Performing a step of forming a layer, then performing a step of forming an element on the surface of the epitaxial silicon layer, and then performing a step of separating the epitaxial silicon layer and the silicon single crystal substrate in the porous layer, Next, a method for manufacturing a semiconductor substrate is provided, wherein a step of forming an electrode on a separation surface of the epitaxial silicon layer separated from the silicon single crystal substrate is performed .

Thus, in the manufacturing method of the present invention, the porous layer is formed on the surface of the silicon single crystal substrate, and the epitaxial silicon layer is formed on the surface. Further, after the element is formed, the silicon single crystal substrate and the epitaxial silicon layer are separated by the porous layer.
Here, since the crystallinity of the porous layer is the same as that of a single crystal, the crystallinity of the epitaxial silicon layer formed on the surface of the porous layer is also high, and the quality of the semiconductor element formed on the epitaxial silicon layer is high. Can be made as good as before.

  In addition, the porous layer has a lower mechanical strength because it has a lower density than the silicon single crystal. By using this, the silicon single crystal substrate and the epitaxial silicon layer can be easily separated by the porous layer. can do. As a result, it is not necessary to perform back surface grinding for thinning the substrate as in the prior art, so that it is possible to suppress the occurrence of processing distortion and mechanical strength deterioration in the epitaxial silicon layer and the element. Further, contamination introduced in the back grinding process can be eliminated. These effects also have the effect that the manufacturing yield can be greatly improved as compared with the prior art. Further, unlike the case of back-grinding, the separated silicon single crystal substrate can be reused, and the manufacturing cost can be reduced.

  In addition, since the thickness of the epitaxial silicon layer can be set arbitrarily, even when a device such as an IGBT is thinned, it can be dealt with by forming the epitaxial silicon layer thin. Conventionally, it has been very difficult to reduce the film thickness due to the problem of mechanical strength. However, according to the manufacturing method of the present invention, it is possible to easily reduce the film thickness.

Further, in the step of forming an epitaxial silicon layer on the surface of the porous layer, the epitaxial silicon layer is formed in the order of p ⁺ layer, n ⁺ layer, and n ⁻ layer, whereby the epitaxial silicon layer has a three-layer structure. Can be.

Thus, by forming the p ⁺ layer, the n ⁺ layer, and the n ⁻ layer by epitaxial growth, the dopant concentration between the layers is higher than that in the past in which the p ⁺ layer and the n ⁺ layer are formed by ion implantation or thermal diffusion. The profile can be controlled with high accuracy, and a steep profile can be easily obtained. The characteristics of a device to be manufactured, particularly, the characteristics and yield of the IGBT can be remarkably improved as compared with the related art.

In the step of forming an epitaxial silicon layer on the surface of the porous layer, the epitaxial silicon layer is formed in the order of n ⁺ layer and n ⁻ layer so that the epitaxial silicon layer has a two-layer structure. Can

In this way, by forming the n ⁺ layer and the n ⁻ layer by epitaxial growth, it is possible to control the dopant concentration profile between each layer with higher precision than in the conventional case where the n ⁺ layer is formed by ion implantation or thermal diffusion. In addition, a steep profile can be easily obtained, and the characteristics of the manufactured device, particularly the characteristics and yield of the power MOSFET, can be significantly improved as compared with the prior art.

In addition, after the step of forming an element on the surface of the epitaxial silicon layer and before the step of separating the epitaxial silicon layer and the silicon single crystal substrate in the porous layer, the element is formed. it is good preferable to adhere the reinforcing material to form the surface.

  The manufacturing method of the present invention can also be applied to a case where the device is made as a thin film of 100 μm or less. However, after separating the silicon single crystal substrate and the epitaxial silicon layer, the epitaxial silicon layer of 100 μm or less is separated from problems such as mechanical strength. Handling is not so good. However, the handling of the epitaxial silicon layer after separation can be improved by adhering the reinforcing material to the surface on which the element is formed in this way.

Further, as the reinforcing material, a ceramic material, it is good preferable to use a quartz material or a resin material.

  Thus, by using a ceramic material, a quartz material, or a resin material as the reinforcing material, it is possible to prevent contamination of the epitaxial silicon layer or element from the reinforcing material such as metal impurities.

Further, after the step of forming an electrode separation surface of the epitaxial silicon layer separated from the silicon single crystal substrate, it is good preferable to peel the reinforcing member with the adhesive surface between the forming surface of the element.

  In this way, after forming the electrode on the epitaxial silicon layer, the reinforcing material is peeled off at the bonding surface, so that the reinforcing material is adhered only during the process in which the thinned epitaxial silicon layer is difficult to handle, Can be obtained.

  According to the manufacturing method of the present invention, it is possible to improve the manufacturing yield of a semiconductor substrate that requires a process of making the substrate extremely thin from the back surface, and it can be easily applied to thinning to a thickness of 100 μm or less. The manufacturing method of the semiconductor substrate which can be provided can be provided. Further, the concentration profile between the dopant diffusion layers can be made steep, and the characteristics of the device to be manufactured can be improved. Furthermore, since the separated silicon single crystal substrate can be reused, the manufacturing cost can be further reduced.

Hereinafter, the present invention will be described more specifically.
As described above, as represented by IGBT and power MOSFET, when manufacturing a semiconductor substrate that requires a process of making the back surface of the substrate extremely thin, a grinding process that is a factor that deteriorates the manufacturing yield, Manufacturing method of semiconductor substrate capable of improving manufacturing yield by manufacturing without performing ion implantation from the rear surface after thinning and heat treatment, and realizing thinning to a thickness of 100 μm or less The development of was awaited.

  Therefore, the present inventors have developed a process that is a main factor that deteriorates the manufacturing yield, a process that makes the substrate extremely thin by grinding, and a process that replaces the ion implantation and heat treatment process from the back surface after thinning. We intensively studied to solve the problem by fabricating a semiconductor substrate.

  As a result, the inventors focused on the fact that the porous layer has a crystallinity that is the same as that of a single crystal but has a low mechanical strength, and formed a thin epitaxial silicon layer on the surface of the porous layer. By separating the silicon single crystal substrate and the epitaxial silicon layer with the porous layer, it is possible to manufacture a semiconductor substrate that requires a process of making the substrate extremely thin without using back surface grinding or back surface high-concentration impurity addition / diffusion processes. The present invention has been completed.

Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.
The semiconductor substrate manufactured by the method for manufacturing a semiconductor substrate of the present invention has an electrode 15 formed on one surface of the epitaxial silicon layer 13 as shown in FIG. The element 14 is formed on the other surface.

An example of a method for manufacturing a semiconductor substrate of the present invention will be described with reference to FIGS. 1 and 2, but the present invention is not limited to these. FIG. 1 is a diagram showing an example of a process for fabricating an IGBT according to the present invention, and FIG. 2 is a diagram showing another example.
In the present invention, n.sup. ^{+ And p.sup} . ⁺ Mean that the resistivity doped with a high concentration of dopant is 0.1 .OMEGA.cm or less, the conductivity type is n-type, and p-type, and the resistivity is higher than that. In this case, they are expressed as n ⁻ and p ⁻ , respectively.

First, a silicon single crystal substrate 11 for forming a porous layer on the surface is prepared (FIGS. 1A and 2A).
Here, in order to form a porous layer with good controllability, it is preferable to use a p ⁺ substrate having a low resistivity of about 0.005 to 0.1 Ωcm as the silicon single crystal substrate to be used. Even if the substrate has a higher resistivity, it can be used in the same manner even if a p ⁺ layer is formed on the surface in advance by several methods such as thermal diffusion or epitaxial growth.

Next, as shown in FIGS. 1B and 2B, a porous layer 12 is formed on one surface of the silicon single crystal substrate 11.
As a method for forming the porous layer 12, various methods can be adopted. From the viewpoint of easy control of manufacturing cost and porosity (easy control of vulnerability), an anodizing method is used. Is preferred.
The silicon single crystal substrate can be made porous by anodization using an HF solution. The porosity can be easily controlled within a range of about 20% to 70% by controlling the HF concentration and the current density during chemical conversion. For example, the porosity can be increased by keeping the current density constant and decreasing the HF solution concentration. Even if it is made porous in this way, its single crystallinity is maintained, and it is possible to epitaxially grow a single crystal silicon layer on top of the porous layer.

Next, as shown in FIGS. 1C and 2C, an epitaxial silicon layer 13 is formed on the surface of the porous layer 12 by epitaxial growth. The number of epitaxial silicon layers to be formed and the conductivity type are not particularly limited. However, when fabricating an IGBT, first, the p ⁺ layer 13a is formed to a few μm, and then the n ⁺ layer 13b is formed to a few μm. Thereafter, it is preferable to form the n ⁻ layer 13c of about several tens μm to several hundreds of μm to form an epitaxial silicon layer having a total of about 50 to 200 μm.

As described above, since the p ⁺ layer 13a, the n ⁺ layer 13b, and the n ⁻ layer 13c can be formed by epitaxial growth, it is possible to control the dopant concentration profile between the layers, and the conventional method is formed by ion implantation or thermal diffusion. Compared to the case, the steep profile can be obtained, and the characteristics of the manufactured device can be improved.
Further, even when IGBTs or other devices require further thinning, the total thickness is set to a desired thickness of 100 μm or less by adjusting the thickness of each layer of the epitaxial silicon layer. This is possible.

By the way, in order to reduce crystal defects in the epitaxial silicon layer formed on the porous layer, a porous layer having a low porosity is preferable.
On the other hand, in this invention, there exists a process of isolate | separating with a porous layer in the process after epitaxial silicon layer formation. The mechanical strength of porous silicon depends on the porosity, but in any case is sufficiently weaker than a non-porous silicon single crystal. Therefore, when a stress such as a tensile force or a shearing force is applied to the porous layer, the porous layer is broken and can be separated by the porous layer. At this time, since the mechanical strength of the porous layer becomes weaker as the porosity is increased, the porous layer can be broken with a weaker force. Therefore, in order to make the porous layer function as a separation layer by utilizing such a weak mechanical strength of the porous layer, a porous layer having a high porosity is preferable.

Therefore, the porous layer 12 formed in FIGS. 1B and 2B is a porous layer having a low porosity for forming an epitaxial silicon layer on the surface and a porous layer for mechanical separation. A two-layer structure with a highly porous layer is preferable.
Thus, in order to change the porosity of the porous layer in the thickness direction, the formation current at the time of anodization for forming the porous layer may be changed. Further, a method of changing the concentration of the chemical conversion solution is also possible. For example, the porosity of the porous layer and the size of the pores can be changed by changing the formation current or changing the concentration of the formation solution using HF. Can be easily formed.

  In FIG. 1C and FIG. 2C, after the epitaxial silicon layer 13 is formed according to the type of device to be fabricated, an element 14 is formed on the surface. In the step of forming the element 14, for example, dopant diffusion layer formation, insulating film formation (for gate, element separation, mask, etc.), electrode formation, and the like can be cited (FIGS. 1D and 2D). .

Next, in FIG. 1E, the epitaxial silicon layer 13 (including the element 14) and the silicon single crystal are separated from each other with the porous layer as a boundary in a state in which both surfaces of the substrate that have been subjected to the formation of the surface element 14 are held by adsorption or the like. Separated from the substrate 11. In this step, it is most preferable to perform separation by generating a crack in the injection portion by spraying the fluid onto the porous layer 12 as the separation layer and injecting the fluid. The fluid flow used for separation can be formed by ejecting pressurized fluid from a thin nozzle. A water jet method can be used as a method for making the fluid to be jetted into a high-speed and high-pressure thin beam, for example, 100 to several thousand kgf / cm ² of high-pressure water pressurized by a high-pressure pump is thin. It can be sprayed from the nozzle and sprayed onto the porous layer. As a fluid to be sprayed, a gas such as air, an inert gas, an etching gas, or the like can be used in addition to a liquid such as water.
In addition to the method of spraying fluid, a wedge-shaped instrument can be inserted into the porous layer and mechanically separated.

Since a part of the porous layer 12 remains on the surface of the separated surface of the epitaxial silicon layer 13 and the silicon single crystal substrate 11 thus separated, etching, polishing, etc. are performed on the separated surface as necessary. To remove the porous layer 12. In the case of removing by etching, for example, an etchant that is a mixed solution of HF / H ₂ O ₂ can be used, and porous silicon can be etched with a high selectivity with respect to a silicon single crystal. Note that the separated silicon single crystal substrate can be reused as a silicon single crystal substrate having a surface with high crystallinity and high quality by performing the surface treatment as described above. Therefore, the substrate cost can be significantly reduced as compared with the conventional grinding method.

  Further, as shown in FIG. 3 (c), since the film thickness is conventionally reduced by back surface grinding, it is difficult to reduce the thickness to 100 μm or less because of processing distortion caused by grinding. The manufacturing method uses mechanical separation in the porous layer, almost no processing strain is applied to the thin film (epitaxial silicon layer), the mechanical strength of the thin film is not reduced, and the film thickness is reduced to 100 μm or less. Is also possible.

In this case, as shown in FIG. 2E, after the element 14 is formed in consideration of prevention of cracking in the separation process or handling after thinning, an adhesive is provided on the surface side of the element 14. Then, the reinforcing material 16 is adhered, and the separation process and the subsequent processes can be performed in this state.
Thus, by adhering the reinforcing material to the surface on which the element is formed, the yield at the time of separation can be improved, and the handling of the epitaxial silicon layer after separation can be improved.

In this case, a substrate or a sheet formed of a ceramic material, a quartz material, or a resin material can be used as the reinforcing material 16. As the adhesive, for example, an epoxy-based resin-based adhesive, wax, SOG (spin on glass), or the like, or an adhesive whose adhesive strength is weakened by irradiation with ultraviolet rays can be used.
Thus, by using a ceramic material or a resin material as the reinforcing material, it is possible to prevent contamination of the epitaxial silicon layer or the element from the reinforcing material, such as metal impurities.

  By forming the electrode 15 on the surface on the separation surface side of the epitaxial silicon layer separated by the porous layer 12, a device substrate such as an IGBT having electrodes formed on both surfaces of the substrate is completed (FIG. 1F). FIG. 2 (G)).

When the reinforcing material 16 is bonded, it is preferable to peel the reinforcing material after forming the back surface electrode 15 (FIG. 2G) (FIG. 2H).
In this way, the reinforcing material can be adhered only during the process that is difficult to handle the thinned epitaxial silicon layer.

EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to these.
Example 1
A silicon single crystal substrate (Si substrate) having a diameter of 200 mm, p-type, 0.05 Ωcm, and crystal orientation <100> was prepared. A porous layer was formed on one surface of this substrate by anodization. At this time, by changing the concentration of the chemical conversion solution using HF and the chemical conversion current, a porous layer of 4 μm with a porosity of 15% on the surface side and a porous layer of 8 μm with a porosity of 50% on the lower side (substrate side) Formed.
The substrate was put into an epitaxial growth apparatus, and a p ⁺ epitaxial layer (resistivity: 0.05 Ωcm) having a thickness of 3 μm was first formed. Next, it is put into another epitaxial apparatus to form an n ⁺ epitaxial layer (resistivity: 0.05 Ωcm) having a thickness of 3 μm on the surface of the p ⁺ epitaxial layer, and subsequently an n ⁻ having a thickness of 80 μm. An epitaxial layer (resistivity: 10 Ωcm) was formed.

Emitter layer diffusion, gate oxidation, and electrode formation for forming an IGBT on the surface side of the n ⁻ layer having the structure of n ⁻ layer / n ⁺ layer / p ⁺ layer / porous layer / Si substrate thus fabricated. Etc. were formed. After that, a ceramic substrate having the same size as the substrate is adhered to the surface of the substrate on which the element has been formed as a reinforcing material using an adhesive (a type whose adhesive strength is weakened by ultraviolet rays), and the silicon single crystal substrate and the ceramic substrate The exposed surface was adsorbed and held, and separated by a porous layer by a water jet.

Since the porous layer remained on the surface of the p ⁺ layer after the separation and the surface of the Si substrate, only the porous layer was selectively removed by immersing in a mixed solution of HF / H ₂ O _2. did. And after forming the collector electrode of IGBT on the surface (back side) of the p ⁺ layer from which the porous layer has been removed, the ceramic substrate is removed from the semiconductor substrate by irradiating ultraviolet rays to weaken the adhesive force between the ceramic substrate and the element. separated. As a result, an IGBT substrate having a substrate thickness of substantially 86 μm could be produced.
The Si substrate from which the porous layer was removed was reused as a Si substrate in Example 2 described later.

(Example 2)
A porous layer having a two-layer structure is formed on the Si substrate that can be reused in Example 1 under the same conditions as in Example 1, and then the substrate is put into an epitaxial growth apparatus. An n ⁺ epitaxial layer (resistivity: 0.05 Ωcm) having a thickness of 3 μm was formed, and subsequently, an n ⁻ epitaxial layer (resistivity: 10 Ωcm) having a thickness of 50 μm was formed.

Diffusion for forming a source region, gate oxidation, and electrode formation for forming a power MOSFET on the surface side of the n ⁻ layer having a structure of n ⁻ layer / n ⁺ layer / porous layer / Si substrate thus fabricated. Etc. were formed. Then, the element formation side surface and the back surface of the Si substrate were adsorbed and held, and separated by a porous layer by a water jet.

Since the porous layer remained on the surface of the n ⁺ layer after separation and the surface of the Si substrate, only the porous layer was selectively removed by immersing in a mixed solution of HF / H ₂ O _2. did. And the drain electrode of power MOSFET was formed in the surface (back side) of the n ⁺ layer from which the porous layer was removed. As a result, a power MOSFET substrate having a substrate thickness of substantially 53 μm could be produced.
Further, since the Si substrate from which the porous layer has been removed can be repeatedly used as a porous layer forming substrate thereafter, substrate loss can be substantially eliminated.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

It is the figure which showed an example of the process for producing the semiconductor substrate in this invention. It is the figure which showed the other example of the process for producing the semiconductor substrate in this invention. It is the figure which showed an example of the process for producing IGBT in a prior art.

Explanation of symbols

11 ... silicon single crystal substrate, 12 ... porous layer, 13 ... epitaxial silicon layer, 13a ... ^{p +} layer, 13b ... ^{n +} layer, 13c ... n ^- layer 14 ... device, 15 ... electrode, 16 ... reinforcing member,
21 ... Silicon single crystal substrate, 22 ... Element, 23a ... n ⁺ layer, 23b ... p ⁺ layer, 24 ... Electrode.

Claims (4)

A method for manufacturing a semiconductor substrate, wherein at least a step of forming a porous layer on the surface of a silicon single crystal substrate is performed, and then a step of forming an epitaxial silicon layer on the surface of the porous layer is performed. A step of forming an element on the surface of the epitaxial silicon layer is performed, and then a step of separating the epitaxial silicon layer and the silicon single crystal substrate in the porous layer is performed, and then separated from the silicon single crystal substrate. Performing a step of forming an electrode on the separation surface of the epitaxial silicon layer;
In the step of forming an epitaxial silicon layer on the surface of the porous layer, the epitaxial silicon layer, p ⁺ layer, n ⁺ layer, n ^- the epitaxial silicon layer by forming in the order of the layers is a three-layer structure Or
In the step of forming an epitaxial silicon layer on the surface of the porous layer, the epitaxial silicon layer is formed in the order of an n ⁺ layer and an n ⁻ layer so that the epitaxial silicon layer has a two-layer structure. A method for manufacturing a semiconductor substrate. After the step of forming an element on the surface of the epitaxial silicon layer, before the step of separating the epitaxial silicon layer and the silicon single crystal substrate in the porous layer, the element is formed after the element is formed The method for manufacturing a semiconductor substrate according to claim 1, wherein a reinforcing material is bonded to the surface. The method for manufacturing a semiconductor substrate according to claim 2 , wherein a ceramic material, a quartz material, or a resin material is used as the reinforcing material. 3. The method according to claim 2 , wherein after the step of forming an electrode on the separation surface of the epitaxial silicon layer separated from the silicon single crystal substrate, the reinforcing material is peeled off at an adhesive surface with the surface on which the element is formed. A method for manufacturing a semiconductor substrate according to claim 3 .

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