JP5353587B2 - Embedded program development apparatus and embedded program development method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a built-in program development device which reduces a program size. <P>SOLUTION: The built-in program development device includes an assembler which translates a source program file written in an assembly language into a machine language of an object processor to generate an object file; and a linker which couples one or more object files to generate an execution format program. The assembler measures a cycle number from a head at a designated position in each source program, and the linker determines a conversion value of the cycle number from the head of the whole program with respect to the designated position in each source program. Furthermore, the assembler uses the conversion value of the cycle number from the head of the whole program to retranslate the source program file written in the assembly language into the machine language of the object processor. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to an embedded program development apparatus and an embedded program development method.

  A program for incorporation into a microcomputer (microcomputer) such as a copying machine often includes input / output (input / output operation instructions) between the processor and its peripheral devices. When performing input / output to / from such a peripheral device, the embedded program checks the operating state of the peripheral device and confirms that the previous operation according to the instructions of the program has been completed. It is usual to output.

  When there are a large number of program portions for checking the operation state of the peripheral device, the overall program size increases and the number of execution cycles increases. The embedded program has a limited program capacity and an allowable execution time. In other words, in an embedded program, exceeding these limitations and restrictions causes a problem.

  Here, if the execution time of the peripheral device is known in advance, if the execution time of the program from the start of the peripheral device to the start of the next operation is longer than the execution time of the peripheral device, When starting the next operation, the peripheral device can be instructed to start the next operation without checking the operation state of the peripheral device. However, there is currently no embedded program development apparatus that uses this fact to reduce the size of an embedded program or reduce the number of execution cycles.

  Patent Document 1 discloses an assembler that generates an object file by embedding cycle information during assembly. The assembler disclosed in Patent Document 1 merely generates cycle number information and informs the user of it. For example, the assembly is not executed again based on this information. Further, there is no disclosure of a technique in which the linker generates cycle number information together with link processing.

  An object of the present invention is to provide a built-in program development apparatus that reduces the size of a program at the time of re-assembling and reduces the number of execution cycles based on the number of execution cycles measured by an assembler and a linker. .

The present invention has been made to achieve the above object. An embedded program development device according to the present invention is:
An embedded program development device for storing an assembler and a linker ,
When the assembler causes the embedded program development device to translate the source program file written in assembly language into the machine language of the target processor and generate an object file , the specified position in each source program to measure the number of cycles from the beginning in,
When the linker develops an executable program by combining one or more object files with the embedded program development apparatus, the linker starts from the beginning of the entire program with respect to the designated position in each source program. Let the conversion value of the number of cycles be obtained ,
Furthermore, when the converted value of the number of cycles from the top of the entire program is greater than or equal to a predetermined value in the embedded program development device, the assembler omits a program part that is unnecessary in that case , again, Ru is translated into machine language of the target processor the source program files written in assembly language.

The assembler according to the present invention is
An assembler further memorized by an embedded program development device for memorizing a linker ,
In the embedded program development device,
When by translating the source program files written in assembly language of the target processor into machine language to generate an object file, to measure the number of cycles from the beginning of the specified position in the respective source program,
When the embedded program development apparatus executes the linker to combine one or more object files to generate an executable program, the entire program is related to a designated position in each source program. After obtaining the converted value of the cycle number from the beginning of the program , if the converted value of the cycle number from the beginning of the entire program is greater than or equal to a predetermined value, the unnecessary program part in that case is omitted. stomach, again, Ru to translate the source program files written in assembly language into machine language of the target processor.

An embedded program development method according to the present invention includes:
An embedded program development method in an embedded program development device for storing an assembler and a linker ,
The embedded program development device
By executing the above assembler, when an object file is generated by translating a source program file written in assembly language into the machine language of the target processor, the source program file from the beginning at a specified position in each source program is generated. Measure the number of cycles,
When executing the above linker to combine one or more object files to generate an executable program, the conversion value of the number of cycles from the beginning of the entire program for the specified position in each source program the request,
Further, when the converted value of the number of cycles from the top of the entire program is greater than or equal to a predetermined value by executing the assembler , the unnecessary program portion is omitted in that case, and again the assembly language The source program file written in is translated into the machine language of the target processor.

  By using the present invention, the number of cycles from one point of the program to another point is measured even when it spans multiple source files with the linker, and the assembly is performed again based on the number of cycles. Since the part of the apparatus waiting for the state can be deleted, the program size and the number of execution cycles can be reduced.

It is a figure which shows the flow of a processing of the program development for an installation in the program development apparatus for an installation which concerns on suitable embodiment of this invention. It is a description example of an assembler program. It is a flowchart of the assembler's re-translation processing in the program development device for embedding according to a preferred embodiment of the present invention. This is an example of a source file, in which a cycle number label is used across source files. This is an example of a source file, in which a cycle number label is used across source files. This is an example of a source file, in which a cycle number label is used across source files. 7 is a configuration example of a cycle information table in the programs of FIGS. 4 to 6. It is a figure which shows the flow of a general process when developing the program for embedding.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

[Preferred embodiment]
FIG. 8 is a diagram showing a general processing flow when an embedded program is developed. The source file group S created on the host computer is translated by the assembler A, and the object file group B is created. The object file group B is combined by the linker L to generate an executable program E. These processes are executed on a host computer such as a personal computer or a workstation.

  Next, FIG. 1 is a diagram showing the flow of processing for developing an embedded program in the embedded program development apparatus according to the preferred embodiment of the present invention. Although not shown, these processes are also executed on the host computer.

  When creating a source file, for example, as shown in the program of FIG. 2, the addition of a label as a symbol name is designated at a position where the number of execution cycles from the beginning of the program is to be obtained. Here, “CYCLE1” and “CYCLE2” correspond to labels as symbol names. Further, using the symbol name, the assembly condition of the program portion waiting for the state of the peripheral device is set by a conditional assembly pseudo-instruction (ifcycle instruction) with the number of execution cycles as a condition.

  At this time, whether or not the symbol to be used exists in the same source file is not limited. It may be an external reference symbol. As shown in FIG. 1, the source file group S1 for which such designation is performed is translated by the assembler A1 to create an object file group B1. At this time, the assembler A1 performs normal translation processing, measures the number of cycles from the program head position in the source file at each symbol position, and embeds it in the object file group B1 that generates the information.

Further, in the first (first) assembly, the condition determination (and line deletion) of the conditional assembly part is not performed based on the number of cycles indicated by the “ifcycle” pseudo instruction. That is, in the program shown in FIG.
“Ifcycle (CYCLE2-CYCLE1) <PERI1CYCLE”
The condition judgment of is not performed. Accordingly, deletion from “ifcycle” to “endif” (described later) is not performed.

  The determination as to whether or not (the host computer) performs the condition determination of the condition assembly part is made by comparing the generation time of the source file S1 and the generation time of the cycle information table T1 described later. Will be. That is, if the creation time of the cycle information table T1 is older than the creation time of the source file S1, it should be determined that the execution cycle number measurement is incomplete, so the condition determination based on the cycle number is not performed. On the contrary, if it is new, it can be considered that the number of cycles has already been measured, so the condition determination is performed.

  Returning to FIG. 1, the linker L1 combines the object file group B1 to generate an executable program P1. At this time, the number of cycles in the symbol existing in the object file group B1 is replaced with the converted value from the top of the entire program according to the order of combination, and the cycle information table T1 is generated (see FIG. 7). The generation of the cycle information table file T1 can be performed by the same procedure as the generation of the program address performed by the conventional linker.

  The assembler A1 translates the source file group S1 again based on the cycle information table T1, and generates an object file B1. At this time, depending on the value of the number of cycles of the symbol value specified in the ifcycle pseudo instruction, it is possible to delete and translate the program part waiting for the state of the target peripheral device.

  After the assembler A1 performs the translation again, the linker L again combines the object files B1 of the reduced programs to generate the executable program P1 with a reduced capacity.

アセンブラＡ１による、図２に示すプログラムの再度の翻訳において、計測されるＣＹＣＬＥ１からＣＹＣＬＥ２までのサイクル数の値が、ＰＥＲＩ１ＣＹＣＬＥの値以上、即ち５０以上であれば、（ｉｆｃｙｃｌｅ命令とｅｎｄｉｆ命令とに挟まれた）ＬＯＯＰ２部分で記述されている条件アセンブル文が偽となり、そこがアセンブルされない。また、このＬＯＯＰ２部分は、対象とする周辺装置の状態待ち部分である。従って、不必要な、周辺装置の動作状態を調べるプログラム部分が省かれるので、プログラム容量や実行サイクル数を低減化できることになる。 FIG. 2 is a description example of an assembler program. The meaning of each description is shown in Table 1 below.

In the retranslation of the program shown in FIG. 2 by the assembler A1, if the value of the number of cycles measured from CYCLE1 to CYCLE2 is equal to or greater than the value of PERI1CYCLE, that is, 50 or greater, it is sandwiched between (ifcycle instruction and endif instruction). The conditional assembly statement described in the LOOP2 part is false and is not assembled. The LOOP2 part is a state waiting part of the target peripheral device. Therefore, an unnecessary program portion for checking the operation state of the peripheral device is omitted, so that the program capacity and the number of execution cycles can be reduced.

  FIG. 3 is a flowchart of re-translation processing of the assembler A1 according to the present embodiment. The assembler A1 reads the source code (S02), and if it is not an ifcycle pseudo-instruction (S06, No), translates it (S08) and reads the next source code. The translation here includes not only normal translation but also analysis of all descriptions other than ifcycle pseudo-instructions such as other pseudo-instructions and labels.

  If the source code read by the assembler A1 is an ifcycle pseudo instruction (S06 / Yes), the actual value of the number of cycles included in the ifcycle instruction is acquired from the cycle information table (S10), and the ifcycle pseudo instruction is true or false. Is confirmed (S12). If it is false (No at S12), it means that the source code up to the subsequent endif is not translated, so those source codes are skipped (S14) and the next source code is read. If true (Yes in S12), the source code immediately after that is also translated, and the next source code is read immediately. When reading of the source code is finished (S04, Yes), the process ends (S16).

  Next, FIG. 4, FIG. 5, and FIG. 6 show three source files, and are examples in which the cycle number label is used across the files. Here, source1, source2, and source3 are connected by the linker in that order. The meanings of the program descriptions shown in FIGS. 4 to 6 are shown in Table 1 as in the case of FIG.

  In FIG. 4, the operation of two peripheral devices, PERI1 and PERI2, is started. The labels “CYCLE1” and “CYCLE2” are assigned to the positions where the operation is started. FIGS. 5 and 6 each show a portion (peripheral device wait) for the end of the operation of each peripheral device according to the number of cycles from the position started in FIG. 4 to the start (position) of further operation to the same peripheral device. It describes the condition assembly of the (waiting state). In any case, if the operation of the peripheral device is completed (that is, if CYCLE3-CYCLE1 ≧ PERI1CYCLE and CYCLE4-CYCLE2 ≧ PERI2CYCLE), the loop portions indicated by LOOP3 and LOOP4 can be deleted. .

  However, if there are multiple condition-assembled parts depending on the number of cycles, the number of program execution cycles decreases due to the deletion of one condition-assembled part, and as a result, the condition of another condition-assembled part changes. There is. In this case, the assembly and link processing can be repeated again.

  FIG. 7 is a configuration example of the cycle information table in the programs of FIGS.

[Other Embodiments]
The present invention can also be used together with a compiler of a high-level programming language such as C language. In other words, by describing conditional compilation using the number of cycles in a high-level programming language program and using the assembler and linker according to the present invention, the number of cycles is measured, and based on the measured number of cycles, unnecessary peripheral It is possible to omit the program part for checking the operation state of the apparatus.

  In this way, the number of cycles from one point of the program to another point is measured not only in the assembler but also across multiple source files by the linker, and the assembly is performed again based on the number of cycles. It is possible to reduce the program size and the number of execution cycles by deleting unnecessary wait states of peripheral devices.

  The present invention can be used for software development of microcomputer embedded device such as CPU / DSP.

S1 ... Source file, A1 ... Assembler, B1 ... Object file, L1 ... Linker, T1 ... Cycle information table, P1 ... Execution format program.

JP 11-39155 A

Claims (3)

An embedded program development device for storing an assembler and a linker ,
When the assembler causes the embedded program development device to translate the source program file written in assembly language into the machine language of the target processor and generate an object file , the specified position in each source program to measure the number of cycles from the beginning in,
When the linker develops an executable program by combining one or more object files with the embedded program development apparatus, the linker starts from the beginning of the entire program with respect to the designated position in each source program. Let the conversion value of the number of cycles be obtained ,
Furthermore, when the converted value of the number of cycles from the top of the entire program is greater than or equal to a predetermined value in the embedded program development device, the assembler omits a program part that is unnecessary in that case , again, embedded program development apparatus according to claim Rukoto to translate the source program files written in machine language of the target processor in assembly language. An assembler further memorized by an embedded program development device for memorizing a linker ,
In the embedded program development device,
When by translating the source program files written in assembly language of the target processor into machine language to generate an object file, to measure the number of cycles from the beginning of the specified position in the respective source program,
When the embedded program development apparatus executes the linker to combine one or more object files to generate an executable program, the entire program is related to a designated position in each source program. After obtaining the converted value of the cycle number from the beginning of the program , if the converted value of the cycle number from the beginning of the entire program is greater than or equal to a predetermined value, the unnecessary program part in that case is omitted. stomach, again, assembler characterized by Rukoto to translate the source program files written in assembly language into machine language of the target processor. An embedded program development method in an embedded program development device for storing an assembler and a linker ,
The embedded program development device
By executing the above assembler, when an object file is generated by translating a source program file written in assembly language into the machine language of the target processor, the source program file from the beginning at a specified position in each source program is generated. Measure the number of cycles,
When executing the above linker to combine one or more object files to generate an executable program, the conversion value of the number of cycles from the beginning of the entire program for the specified position in each source program the request,
Further, when the converted value of the number of cycles from the top of the entire program is greater than or equal to a predetermined value by executing the assembler , the unnecessary program portion is omitted in that case, and again the assembly language A method for developing an embedded program, wherein the source program file written in is translated into a machine language of a target processor.

Images