JP2008276735A - Program code converter and program code conversion method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a program converter capable of reflecting a contrivance on a program included in a binary code of a conversion source, to a binary code in a conversion destination, when converting a program code between different processors. <P>SOLUTION: This program converter 1 has a code analysis part for analyzing the A binary code 15a executable in the A processor to be converted into the program code for the B processor, a machine instruction function extracting part for extracting a prescribed instruction function for the B processor, corresponding to a prescribed instruction for the A processor obtained by the analysis in the code analysis part, and a translator part for generating a source code 23 for the B processor from the A binary code, by rewriting the prescribed instruction for the A processor to the prescribed machine instruction function extracted by the machine instruction function extracting part. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a program code conversion device and a program code conversion method, and in particular, a program code conversion device and a program code for converting a first binary code executable in a first processor into a program code for a second processor. Concerning the conversion method.

  Conventionally, a program is converted so that a program that can be executed by one processor can be executed by another processor. For example, when there are different processors X and Y, there are generally the following two methods for obtaining the binary code for the processor Y from the binary code for the processor X.

The first method is a method of directly converting binary code for processor X into binary code for processor Y using a translator program.
In this method, the converted binary code is low in readability after conversion, and the programmer user can manually debug the converted binary code or adapt it to a new specification change. It was difficult to tune performance. Further, when the instruction system for processor X and the instruction system for processor Y are different, the instruction code for processor X may not be replaced with the instruction code for processor Y on a one-to-one basis.

  In the second method, the binary code for the processor X is decompiled, converted into a so-called high-level language code, and then the high-level language code is compiled by a compiler for the processor Y and then the binary code for the processor Y is compiled. (For example, refer to Patent Document 1).

However, this method solves the problem of the first method, but has the following problem.
When high-level language code that does not depend on the processor is generated by decompilation, the optimization originally performed in the binary code for the processor X is not guaranteed in the binary code for the processor Y. For example, when a code fragment devised for optimization in assembly code is included in the binary code, the high-level language code obtained by decompiling is not devised or wisdom of such code fragment. Is a problem that is not reflected. In other words, as an example of a code fragment for the purpose of the program, even if a machine instruction function is included in the binary code, the code fragment is not included in the high-level language code obtained by decompilation. The binary code for the processor Y generated by the compiler for the processor Y from the high-level language code is not subjected to optimization equivalent to the binary code for the processor X.
JP 2004-252807 A

  Therefore, the present invention has been made in view of such a problem, and when converting a program code between different processors, a device on the program included in the binary code of the conversion source is converted to the binary of the conversion destination. An object of the present invention is to provide a program code conversion device that can be reflected in a code.

  According to an aspect of the present invention, there is provided a program code conversion device for converting a first binary code executable in a first processor into a program code for a second processor, wherein the first binary code is converted into a program code conversion device. A code analysis unit to analyze, and a predetermined one or more machine instruction functions for the second processor corresponding to the predetermined one or more instructions for the first processor obtained by analysis by the code analysis unit Rewriting the predetermined one or more instructions for the first processor with the predetermined one or more machine instruction functions extracted by the machine instruction function extracting unit, A translator unit that generates source code for the second processor as program code for the second processor from the first binary code. It is possible to provide a program code conversion apparatus.

  According to the present invention, there is provided a program code conversion device capable of reflecting a program device included in a conversion source binary code in a conversion destination binary code when the program code is converted between different processors. can do.

Embodiments of the present invention will be described below with reference to the drawings.
First, the configuration of the program conversion apparatus according to the present embodiment will be described with reference to FIG. FIG. 1 is a block diagram showing the configuration of the program code conversion apparatus according to the present embodiment.
A program code conversion device (hereinafter referred to as a program conversion device) 1 includes a central processing unit (hereinafter referred to as a CPU) 11a, a computer main body 11 having a ROM, a RAM, an input device 12 such as a keyboard and a mouse, and a screen. A personal computer (hereinafter referred to as a PC) configured to include a display device 13 and a storage device 14 that stores a target program to be converted (conversion source program), a converted program (conversion destination or converted program), and the like. ) Etc. The storage device 14 includes a binary program (hereinafter referred to as a binary code) 15 that is an object code of a conversion source, a binary code 16 after conversion, a conversion processing program 17 of a program described later, and a conversion table 18 described later. It is remembered. The storage device 14 also stores a debugger 19 that is a debug program, and the CPU 11a can read and execute the debugger 19 when debugging.

  The program conversion apparatus 1 is not limited to such a computer, but may be an apparatus such as a client / server system connected via a network.

A user who performs program conversion using the program conversion apparatus 1 can perform conversion processing of a program, which will be described later, on the conversion source binary code 15 to obtain the converted binary code 16. The user uses a man-machine interface (hereinafter referred to as “MMI”) including the input device 12 and the display device 13 to specify the conversion source binary code 15 stored in the storage device 14 and the converted binary code 16. Is designated as a storage area of the storage device 14.
Further, the user can execute the conversion processing program 17 by specifying the conversion processing program 17 for performing the program conversion processing described later and the conversion table 18 described later using the MMI.

  In this embodiment, a case will be described in which binary code that can be executed by one processor is converted to binary code that can be executed by another processor. An executable binary code is an A binary code, a processor different from the A processor is a B processor, and a binary code executable by the B processor is a B binary code. In accordance with these, a source program corresponding to the A binary code (hereinafter referred to as source code) is defined as an A source code, and a source code corresponding to the B binary code is defined as a B source code. Further, a compiler that compiles A source code to generate A binary code is an A compiler, and a compiler that compiles B source code to generate B binary code is a B compiler.

FIG. 2 is a diagram for explaining an example of the flow of program conversion processing in the present embodiment.
As shown in FIG. 2, the A binary code 15 a is a code generated by compiling the A source code 21 by the A compiler 22. The A source code 21 includes a group of instructions for executing a predetermined process. The A compiler 22 compiles the A source code 21 and generates object code executable by the A processor, that is, A binary code 15a.

  The A binary code 15a is decompiled into a general-purpose high-level language source code, for example, a C language source code 23 by a translator 17a as a translator unit. The translator 17a is a decompiler that decompiles the A binary code 15a.

  The C language source code 23 is a B source code, and a B binary code 16a is generated from the C language source code by being compiled by the B compiler 17b for the B processor. The B compiler 17b compiles the C language source code 23 and generates object code executable by the B processor, that is, B binary code 16a.

  In the program conversion apparatus 1 according to the present embodiment, when the B binary code 16a is generated from the A binary code 15a, a C language source code 23 as a program code for the B processor is generated by the translator 17a. The When generating the source code of the high-level language, the translator 17a extracts a predetermined instruction in the A binary code 15a, and converts the extracted instruction into one or more machine instruction functions (Intrinsic for the corresponding B processor). Replace with (Function: also called built-in function). Accordingly, the C language source code 23 includes a machine instruction function for the B processor. Further, the translator 17a refers to the A source code 21, extracts a comment sentence written in a predetermined format, and embeds the extracted comment sentence in the C language source code 23 to be generated. Do.

  Conventionally, when the A binary code 15 a is decompiled, the optimization applied at the level of the A source code 21 or at the level of the assembly code may be lost from the C language source code 23. Further, the comment text in the A source code 21 is not reproduced in the C language source code 23 obtained by decompiling.

  This will be specifically described. The programmer may optimize the program for the A processor at the level of the A source code 21 or at the assembly code level. For example, the A source code 21 is optimized by using a machine instruction function for the A processor or creating a source code corresponding to the degree of parallelism executable in the A processor. However, even if a short code is optimized at the source code level or the assembly code level, the short code part may be changed to a long code by decompilation.

In addition, since the comment sentence in the A source code 21 is not usually included as debug information in the A binary code 15a, the comment sentence or the like is included in the C language source code 23 obtained by disassembly. Not included.
Therefore, according to the present embodiment, by performing the replacement process and the embedding process as described above, it is possible to retain the optimized program part and generate a comment sentence or the like. Details will be described below.

3 and 4 are flowcharts showing an example of the processing flow of the conversion processing program 17 of the program conversion apparatus 1 according to the present embodiment.
The processing of FIG. 3 is performed by the CPU 11a of the computer main body 11 of the program conversion device 1 reading and executing the conversion processing program 17 in the storage device 14.

  First, the CPU 11a analyzes the conversion source A binary code 15a (step S1). Then, the CPU 11a generates a control data flow graph (CDFG) of the A binary code 15a as an internal representation from the information obtained by analysis (step S2). Therefore, the process of step S1 constitutes a code analysis unit, and step S2 constitutes a control data flow graph (CDFG) information generation unit that generates information of the control data flow graph.

  When the generation of the control data flow graph for the A binary code 15a is completed, the CPU 11a extracts a machine instruction function (IF) from the A binary code 15a (step S3). Step S3 constitutes a machine instruction function extraction unit that extracts a predetermined machine instruction function for the B processor corresponding to a predetermined instruction for the A processor.

  Next, the CPU 11a refers to the conversion table 18 to extract and replace the machine instruction function for the B processor by referring to the conversion table 18 (step S4). This replacement is performed, for example, on a node of the control data flow graph (CDFG). FIG. 5 is a diagram showing a configuration example of the conversion table.

  FIG. 5 shows the configuration of the conversion table 18 in which predetermined instructions included in the binary code of the conversion source are associated with machine instruction functions included in the converted source code. The conversion table 18 is a correspondence table in which a plurality of predetermined instructions for the A processor are associated with a plurality of machine instruction functions (IF) for the corresponding B processor. Here, a plurality of instructions for the A processor are described in the left column 31 of the conversion table 18, and a plurality of machine instruction functions (IF) for the B processor are described in the right column 32. Yes. That is, in FIG. 5, machine instruction functions are stored in the right column 32 in correspondence with the plurality of commands in the left column 31.

For example, assume that the following maximum value detection instruction A_MAX is included in the A binary code.
A_MAX a, b, c (1)
This instruction (A_MAX a, b, c) is assumed to be an instruction for assigning the larger value of b and c to a. Since the binary code is a binary code composed of 0 and 1, the above notation (A_MAX a, b, c) is an assembly code notation. Such a machine instruction function is, for example, as follows in a high-level C language source code that does not depend on a processor.

if (b> c) a = b;
else a = c; (2)
Even when there is an instruction equivalent to (1) above, for example, (B_MAX a, b, c), as an instruction for the B processor, the B compiler 17b uses the (B_MAX a, b, There is generally no guarantee that c) can be generated. In general, the B compiler 17b may generate a code including several instructions using the comparison, branch, and assignment instructions from the instruction group (2).

  Therefore, in this embodiment, when it is known that a machine instruction function (B_MAX (a, b, c)) exists as a machine instruction function corresponding to the instruction (A_MAX a, b, c), the instruction ( For A_MAX a, b, c), a high-level C language code is generated as follows.

B_MAX (a, b, c); (3)
FIG. 5 associates the conversion-source instruction for the A processor with the corresponding machine instruction function for the B processor. Therefore, in the CPU 11a, the instruction for the A processor extracted in step S3 is in the left column 31 of the conversion table 18 of FIG. 5, and the corresponding machine instruction function for the B processor is in the right column 32. In step S4, the CPU 11a replaces the instruction (A_MAX a, b, c) in the A binary code 15a with the machine instruction function B_MAX (a, b, c).

  FIG. 5 further shows an instruction group (B_ADD () including a plurality of machine instruction functions as corresponding instructions for the B processor corresponding to the averaging process instructions (A_AVE a, b, c) for the A processor. An example is shown in which a, b, c) and B_SHIFR (a, 1)) are stored.

  FIG. 5 shows an example showing that an instruction for the A processor corresponds to one or more machine instruction functions for the B processor corresponding to the instruction for the A processor. Includes one or more machine instruction functions for the B processor corresponding to each of the instructions on the left side 31 or the instruction group. Good.

  Then, the CPU 11a generates a high-level C language source code from the A binary code 15a (step S5). When generating the C language source code, the CPU 11a generates the C language source code so as to include the machine instruction function for the B processor extracted with reference to the conversion table 18. Therefore, the A binary code 15a has been optimized by the programmer and the instruction for the A processor is used. As a result, the knowledge of the optimization can be reflected in the B binary code 16a for the B processor. . In steps S4 and S5, a predetermined instruction for the A processor is rewritten to the extracted predetermined machine instruction function, and the C language source code 23 for the B processor is converted from the A binary code 15a into a program code for the B processor. Is configured as a translator unit.

  As described above, the C language source code output in step S5 is a high-level language source code including a machine instruction function for the B processor. Therefore, when compiling in step S7, which will be described later, the B binary code 16a using the machine instruction function for the B processor is generated, so that the same optimization as the A binary code 15a optimized for the A processor is performed. B binary code 16a. In the above example, the B compiler 17b can reliably generate the B_MAX instruction.

  Therefore, since C language source code including machine instruction functions for the B processor is generated, readability of the C language source code is improved, and when the C language source code is compiled by the B compiler 17b, The performance can be expected to be maintained at the same level as the A processor.

  Next, the CPU 11a refers to the A source code 21, extracts a comment sentence written in a predetermined format from the A source code 21, and includes it in the C language source code generated in step S5. Then, according to a predetermined rule, the extracted comment sentence is embedded, that is, inserted (step S6). Step S6 constitutes a comment sentence description format determination unit.

  In general, in the conventional decompile method, the comment text of the A source code for the A processor is not restored in the high level language source code obtained by decompiling from the A binary code 15a. Readability is low. This is because the comment information is not included in the normal debugging information, and the conventional decompilation technique assumes that the source code cannot be obtained.

  The A source code 21 written for the A processor that is finally created includes assembly code that has been manually modified for the A processor architecture, and an indicator that only the A compiler 22 can recognize. In other words, the B compiler 17b cannot generate a binary code corresponding to such correction.

  However, even when the A source code 21 is available, it is effective to once obtain the A binary code 15a by the A compiler 22 and then reversely compile it into the high-level language C source code 23, and In that case, it is desirable to restore the comment text in the A source code 21.

  Therefore, the program conversion apparatus 1 according to the present embodiment is configured such that a comment sentence is restored in the C language source code 23 using the A source code 21.

  The comment sentence written in the predetermined format in step S6 is a comment sentence written based on a description rule adopted in a document automatic generation system such as Doxygen. Therefore, the CPU 11a determines whether or not the comment text in the source code is written in a predetermined format. If the result of the determination is that a comment text is written in the predetermined format, in step S5 The comment text is embedded in the generated C language source code according to the predetermined format.

  Therefore, the translator unit 17a includes a comment statement description format determination unit that refers to the A source code and determines whether or not a comment statement in the source code for the A processor is described in a predetermined format. When the translator unit 17a determines that the comment text in the A source code 21 is described in a predetermined format, the comment text determined to be described in the predetermined format according to the predetermined format. Are embedded in the C language source code 23 which is the source code for the B processor, and the C language source code 23 is generated.

An example will be described.
For example, assume that the following code is included in the A source code 21 which is the source code for the A processor.

...
int max (int a, int b) {return (a> b? a: b);}
/ * this function returns max value * /
int min (int a, int b) {return (a> b? b: a);} (4)
...
The source code (4) is a source code including two function definitions and a one-line comment sentence written between the two function definitions. When this source code (4) is compiled and then converted back to a high-level C language source code, the readability can be improved if the comment sentence portion can be restored together with the function max. However, in general, if debug information is included in the A binary code 15a, the function name and variable name can be restored. However, the above comment statement has two function definitions, namely, max and min. It is impossible to automatically determine whether the function is written for.

  On the other hand, in the present embodiment, when the comment sentence of the A source code 21 is written in a predetermined format for an automatic document generation system or the like, the position of the comment sentence is determined according to the format, According to the predetermined format, a comment sentence is embedded in the generated C language source code so as to correspond to the determined position.

  For example, when the above source code (4) is written according to a predetermined format in a document automatic generation system of Doxygen (for example, see http://www.stack.nl/~dimitri/doxygen/), the following is given: Become.

...
/ ** this function returns max value * /
int max (int a, int b) {return (a> b? a: b);}
int min (int a, int b) {return (a> b? b: a);} (5)
...
In the source code (5), a comment starting with “/ **” indicates that the comment is written based on a format defined in the Doxygen automatic document generation system. In other words, comments about variables, functions, etc. in the source code (5) explicitly indicate that they are written according to a format defined in the Doxygen automatic document generation system.
The Doxygen automatic document generation system has a predetermined rule that the variable and function corresponding to the comment text are defined immediately after that, and the comment text is formatted in accordance with the rule. has been written.

  Therefore, the translator 17a of the present embodiment embeds the extracted comment sentence in the generated high-level language C language source code according to the description of the predetermined format. Specifically, the translator 17a generates a symbol such as “/ **”, that is, by using a correspondence between an identifier such as a symbol and a comment sentence such as “this function returns max value”. It is possible to restore a comment by appropriately associating it with a related function or the like in a high-level C language source code.

  As a result, since the comment sentence is appropriately restored in the C language source code 23, the user can improve the readability, and can easily debug the C language source code 23, cope with specification changes, and perform performance tuning. .

  Next, the CPU 11a refers to the A source code 21, extracts the macro declaration sentence in the A source code 21, and extracts the macro declaration extracted from the C language source code generated in step S5. Matches whether there is a text expression or the like. If a match is found, the macro declaration statement and macro expression are embedded in the C language source code (step S7). Step S7 constitutes a macro declaration extractor that refers to the A source code 21 and extracts a macro declaration statement in the A source code 21. For example, in step S7, a list of macro declaration statements in the A source code 21 is generated. With reference to the macro definitions included in the generated list, the C language source code 23 corresponds to the definition of each macro. In other words, the definition is embedded at a location that matches each macro.

  Further, the CPU 11a refers to the A source code 21, extracts the include declaration statement from the A source code 21, and includes the contents of the extracted include file in the C language source code generated in step S5. Matches for an equivalent part. If an equivalent part is found, the corresponding include declaration statement is embedded in the C language source code (step S8). Step S8 constitutes an include declaration extraction unit that extracts the include declaration statement in the A source code 21 with reference to the A binary code 21. For example, in step S8, the content of the file including the include declaration statement in the A source code 21 is referred to, and the content equivalent to the content described in the file including the include declaration statement in the C language source code 23 is obtained. When it is detected, an include declaration statement is added to the C language source code 23.

Steps S7 and S8 will be specifically described.
For example, it is assumed that the A source code 21 which is the source code for the A processor is composed of the following two files “myheader.h” and “main.c”.

-File name Contents of myheader.h
#define THRESHOLD 127
int binary_filter (unsigned char a) {return (a> THRESHOLD? 255: 0);}
-File name Contents of main.c
#include “myheader.h”
int main () {
unsigned char x = 120;
return binary_filter (x);
}
The macro declaration statement “#define THRESHOLD 127” declares that “127” is a threshold value.

  The include declaration statement “#include“ myheader.h ”” declares that the file name “myheader.h” is included.

  Since all of these include declaration statements and macro declaration statements are expanded by the A compiler 22, the result of applying the processing of steps S1 to S5 to the binary code corresponding to these source codes is as follows. The file is “main2.c”.

・ Contents of file name main2.c
int binary_filter (unsigned char a) {return (a> 127? 255: 0);}
int main () {
unsigned char x = 120;
return binary_filter (x);
}
As the number of include declaration statements and macro declaration statements used in the A source code 21 increases, the readability of the resulting source code decreases.

  Therefore, the translator 17a of the present embodiment restores the macro declaration statement and the include declaration statement for the generated high-level language C source code.

  Here, in step S7, the source code 21 is referred to, a macro declaration sentence such as “#define...” Is extracted, and a macro declaration sentence whose file name is myheader.h is added. In step S7, “127” is replaced with “THRETHHOLD” which is the macro expression in the file name main2.c. In this way, macro declaration statements and macro expressions are embedded.

  In step S8, the A source code 21 is referred to, and an include declaration statement is extracted from the A source code 21. The include declaration statement is added because the "binary filter ..." in the file name main2.c is in the referenced A source code 21, so the include declaration statement that includes the function myheader.h in which the include declaration is included. Is created and added.

  As a result, the program main2.c, which is the one file, is replaced with the two files main.c and myheader.h. In other words, the macro declaration statement and the include declaration statement used in the original A source code 21 are restored. Therefore, the readability of the C language source code 23 is improved, and debugging, specification change, performance tuning, etc. can be facilitated.

  Further, the CPU 11a refers to the A source code 21 and embeds the line number information and symbol information in the A source code 21 in the C language source code obtained in step S5 (step S9). Step S9 constitutes a symbol and line number information embedding unit for embedding the symbol information and line number information of the A source code 21 in the C language source code 23.

  For example, it is assumed that the CPU 11a has the following code in the A source code 21 which is the source code for the A processor. The leftmost number is a convenient line number and is not included in the actual source code.

・ Contents of file name func.c
1: void function () {
2: if (b> c) a = b;
3: else a = c;
Four: }
As a result of applying Steps S1 to S5 to the above, for example, assume the following.

void f () {
B_MAX (a, b, c);
}
In this example, the translator 17a generates a code using the maximum value instruction B_MAX of the processor B. In this example, B_MAX (a, b, c) is processing to obtain the maximum value, but it can be easily inferred from its textual representation, but generally it is highly optimized for processor B such as parallelization. When a machine instruction function subjected to processing is output, it becomes difficult to grasp the processing contents and perform debugging and tuning.

  Therefore, in step S9, the translator 17a of the present embodiment embeds line number information and symbol information in the generated high-level language C language source code as follows.

void f () {/ ** func.c, L1 function * /
B_MAX (a, b, c); / ** func.c, L2,3 * /
}
In the above program, the content of the A source code 21 corresponding to the function f () is on the first line of “func.c”, the symbol name as symbol information is “function”, and B_MAX () It contains information that the corresponding contents are in the second and third lines of “func.c”. It is also possible for the user to understand the processing contents by directly interpreting the information and referring to the A source code 21.

  Further, the embedded information is appropriately interpreted by the parallelizing compiler unit of the processor B, and is embedded as debug information usable by the debugger 19 in the binary code of the processor B in a predetermined format. Normally, the debugger 19 of the processor B can refer to the source code 23 of the processor B when debugging the binary code 16a of the processor B. The user can appropriately refer to the source code 21 of the processor A by the debugger 19 of the processor B.

  FIG. 6 is a diagram illustrating an example of a debug screen displayed on the screen of the display device 13 when the B binary code is being debugged by the debugger 19. On the screen 31, a binary code display unit 32 for displaying B binary code or assembly code, a source code display unit 33 corresponding to B binary code for displaying C language source code 23, and a source for displaying A source code The code display unit 34 is displayed.

  The user not only includes the binary code or assembly code displayed on the binary code display unit 32 and the C language source code displayed on the source code display unit 33, but also the A source code 21 displayed on the source code display unit 34. B binary code can be debugged while referring to.

  When the user selects a desired line in the code displayed on the binary code display unit 32, the program part corresponding to the selected line is displayed on the source code display units 33 and 34, for example, highlighted. Is called.

  Therefore, not only the C source code part corresponding to the B binary code part specified by the user using the input device 12 but also the A source code part corresponding to the B binary code part are displayed on the source code display unit 34. Therefore, the user can debug the B binary code 16a while referring to the source program of the conversion source.

  Note that the embedding of symbol information and line numbers is not limited to processing via the translator 17a. For example, when the source code of the processor A is generated once by the parallel compiler of the processor A, the source code for the processor A multicore or the multithreaded code is generated, as in the above example, The symbol information and line number information of the source code of processor A may be embedded in the multithreaded code. As a result, the original source code can be referred from the processor A parallel code debugger.

  Returning to FIG. 4, the C language source code 23 is generated in step S5, and when the processing of steps S6 to S9 described above is completed, the B compiler 17b then compiles the C language source code 23, A binary code 16a is generated (step S10).

  Here, a parallelizing compiler is used as the B compiler 17b which is a compiler section. By using a parallelizing compiler, when the A processor does not support parallel processing but the B processor supports parallel processing, the binary code 16a is generated when the B binary code 16a is generated from the C language source code 23. 16a can be a parallel program code corresponding to the parallelism for the B processor. The C language source code 23 can be made into a parallelized program by the parallelizing compiler.

  For example, consider the following loop processing.

for (int i = 0; i <256; i ++) a [i] = b [i] + c [i]; (6)
Assume that the A processor does not have a 2-parallel SIMD (Single Instruction / Multiple Data) addition instruction, while the B processor has a 2-parallel SIMD addition instruction, for example, B_ADD_SIMD2. At this time, the A processor repeats the addition instruction 256 times, but the B processor only needs 128 (= 256/2) SIMD addition instructions. Therefore, by using a VLIW (Very Long Instruction Word) / SIMD parallelizing compiler as the B compiler 17b, it is possible to absorb the difference in the arithmetic parallelism between the A processor and the B processor.

  As described above, by using a parallelizing compiler for the B compiler 17b, the binary code 16a can be used when the B processor supports parallel processing even if the A processor does not support parallel processing. Can be a code corresponding to the degree of parallelism for the B processor.

  In other words, if the B processor is capable of executing instructions with higher parallel than the A processor, the A binary code 15a naturally does not include such a highly parallel instruction, so that the highly parallel instruction of the B processor may not be fully utilized. There is. Therefore, by using a compiler corresponding to the high parallelism of the B processor as the B compiler 17b, the B binary code 16a generated from the A binary code 15a may be a code corresponding to the high parallelism of the B processor. it can.

  Furthermore, even when the parallel compilation function of the B compiler includes a multi-threading or multi-core function, the same effect as described above, that is, an effect that a code corresponding to a high degree of parallelism can be obtained. It is done.

  As described above, according to the present embodiment, when the program code is converted between different processors, the program device included in the conversion source binary code can be reflected in the conversion destination binary code. It is possible to realize a program code conversion device that can be used.

  Furthermore, according to the present embodiment, when a high-level language code is generated from a binary code that is a conversion source object code, a comment sentence or a macro included in the source code that is the source of the conversion source binary code. Since the declaration sentence and the like are appropriately restored in the high-level language code, the user can easily debug the high-level language code, cope with specification changes, and perform performance tuning.

  Each “unit” in this specification is a conceptual one corresponding to each function of the embodiment, and does not necessarily correspond to specific hardware or software routine on a one-to-one basis. Therefore, each step of each procedure in the present embodiment may be executed in a different order for each execution by changing the execution order and executing a plurality of steps at the same time, as long as it does not contradict its nature.

Furthermore, the program code for executing the operations described above is recorded or stored in whole or in part on a portable medium such as a flexible disk or CD-ROM, or a recording medium such as a storage device such as a hard disk. . The program code is read by a computer and can be provided as a computer program product in which all or part of the operation is executed. Alternatively, all or part of the program code can be distributed or provided via a communication network. The user can easily realize the program code conversion apparatus of the present invention by downloading the program code via a communication network and installing the program code in a computer or installing the program code from a recording medium into the computer.
The present invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the scope of the present invention.

It is a block diagram which shows the structure of the program conversion apparatus concerning embodiment of this invention. It is a figure for demonstrating the example of the flow of the program conversion process concerning embodiment of this invention. It is a flowchart which shows the example of the flow of a process of the conversion process program which concerns on embodiment of this invention. It is a flowchart which shows the example of the flow of a process of the conversion process program which concerns on embodiment of this invention. It is a figure which shows the structural example of the conversion table which concerns on embodiment of this invention. It is a figure which shows the example of the debug screen concerning embodiment of this invention.

Explanation of symbols

1 program conversion device, 11 computer main body, 12 input device, 13 display device, 14
Storage device, 15 conversion source binary code, 16 conversion destination binary code, 17 conversion processing program, 18 conversion table, 31 screens

Claims (5)

A program code conversion device for converting a first binary code executable in a first processor into a program code for a second processor,
A code analysis unit for analyzing the first binary code;
Machine instruction function extraction for extracting one or more predetermined machine instruction functions for the second processor corresponding to one or more predetermined instructions for the first processor obtained by analysis by the code analysis unit And
The predetermined one or more instructions for the first processor are rewritten to the predetermined one or more machine instruction functions extracted by the machine instruction function extraction unit, and the second binary code is converted into the second one from the first binary code. A translator for generating source code for the second processor as program code for the processor;
A program code conversion apparatus comprising: A correspondence table in which the predetermined one or more instructions for the first processor are associated with the predetermined one or more machine instruction functions for the second processor;
The machine instruction function extraction unit refers to the correspondence table, and corresponds to the predetermined instruction for the second processor corresponding to the predetermined one or more instructions for the first processor obtained by analysis. The program code conversion apparatus according to claim 1, wherein one or more machine instruction functions are extracted. Referring to the source code for the first processor corresponding to the first binary code, it is determined whether or not a comment sentence in the source code for the first processor is described in a predetermined format It has a comment statement description format determination unit,
The translator unit, when the comment statement description format determination unit determines that the comment statement in the source code for the first processor is described in the predetermined format, according to the predetermined format, The source code for the second processor is generated by embedding the comment sentence determined to be described in a predetermined format in the source code for the second processor. 3. The program code conversion device according to 1 or 2.   Using the source code for the second processor generated by the translator as the program code for the second processor, a second binary code of a parallel program that can be executed by the second processor is generated. The program code conversion apparatus according to claim 1, further comprising a parallelizing compiler unit. Program code conversion method for converting a first binary code executable in a first processor into a program code for a second processor by a computer having a code analysis unit, a machine instruction function extraction unit, and a translator unit Because
The code analysis unit analyzes the first binary code,
The predetermined one or more machine instructions for the second processor corresponding to the predetermined one or more instructions for the first processor obtained by analysis by the code analysis unit by the machine instruction function extraction unit. Extract the function,
The translator unit rewrites the predetermined one or more instructions for the first processor into the predetermined one or more machine instruction functions extracted by the machine instruction function extraction unit, and the first binary code A program code conversion method comprising: generating source code for the second processor as program code for the second processor.

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