JP5343255B2 - Imaging element power supply system and imaging apparatus - Google Patents

Description

  The present invention relates to an image sensor power supply system that supplies power for appropriately performing high-speed ejection for discharging unnecessary charges accumulated in an image sensor before imaging.

  A CCD image sensor is known as an image sensor that generates an image signal corresponding to an optical image of a subject. The CCD image pickup device accumulates charges generated by the vertical CCD itself due to leaked light, charges leaked when transferring signal charges exceeding the transfer capacity, charges leaked from pixels other than during reading, and the like. is there. Such charge noise is generated and needs to be removed in order to display an accurate image.

  It is desirable to remove unnecessary charges in the shortest possible time immediately before the transfer of signal charges. Therefore, unnecessary charges are discharged from the imaging element in a short period of time by a high-speed sweeping operation that drives the vertical CCD and the horizontal CCD at high speed before transferring the signal charge.

  In order to shorten the time required for removing unnecessary charges, it is necessary to increase the transfer speed by increasing the frequency of signals for driving the vertical CCD and the horizontal CCD. On the other hand, a large amount of electric power is required to drive other parts of the imaging device before signal charge transfer.

  When the imaging apparatus is driven by a battery, the driving of the entire imaging apparatus is stopped when the power for high-speed sweeping and the power for driving other parts exceed the capacity of the battery.

  In order to prevent the drive of the entire imaging apparatus from being stopped, it has been proposed to control the sweep frequency of high-speed sweep (see Patent Document 1). However, when the sweeping frequency is lowered, it takes time to remove charges, and the number of shots per unit time cannot be increased particularly during continuous shooting. Further, it is particularly disadvantageous when using an image sensor with a large number of pixels.

JP 2000-32346 A

  Therefore, an object of the present invention is to provide an image sensor power supply system that can sufficiently secure a high-speed sweeping frequency of the image sensor while preventing the drive of the entire image pickup apparatus from being stopped.

  The image sensor power supply system of the present invention can be electrically connected to an image sensor that can remove electric charges that become noise by a high-speed sweeping operation, and a battery that supplies power for driving the components of the image pickup apparatus provided with the image sensor. A battery connector, a capacitor charged by power supplied from the battery via the battery connector, a power supplied from the battery via the battery connector, and a power charged in the capacitor, A power supply circuit that generates power for driving, a timing generator that generates a high-speed sweep signal for executing a high-speed sweep operation, and a high-speed sweep signal that drives the image sensor using the power adjusted by the power supply circuit An image sensor driving circuit for causing the image sensor to perform a high-speed sweep operation, a capacitor, It is characterized in that it comprises a switch for supplying the power charged to the rapid discharge signal provided to the capacitor only during reception between the image element driving circuit to the power supply circuit.

  Furthermore, it is preferable to include a constant current circuit that is provided between the battery connector and the capacitor and that flows a constant current for charging the capacitor using the electric power remaining in the battery in a state where it is used in the power supply circuit.

  The charging control unit controls the supply timing of the battery power to the capacitor, and the component part is a mirror driving mechanism that drives a mirror that switches an optical image picked up by the image pickup device to the image pickup device or the viewfinder, and is charged The control unit stops supplying power to the capacitor during the first period after the start of driving and the second period before the end of driving during the period in which the mirror driving mechanism drives the mirror, and the first and second periods It is preferable to supply power to the capacitor during a period excluding.

  An imaging apparatus according to the present invention is an imaging apparatus that captures a subject, and is electrically connected to an imaging element that can remove electric charges that cause noise by a high-speed sweeping operation, and a battery that supplies electric power for driving the components of the imaging apparatus. A connectable battery connector, a power supply circuit that adjusts power for driving the components and the image sensor using power supplied from the battery via the battery connector, and power supplied from the battery via the battery connector Capacitor charged by, timing generator for generating high-speed sweep signal for executing high-speed sweep operation, power adjusted by power supply circuit and power supplied from capacitor to drive image sensor and receive high-speed sweep signal An image sensor drive circuit that causes the image sensor to perform a high-speed sweeping operation, and a capacitor It is characterized in that it comprises a switch for supplying the power charged to the rapid discharge signal provided to the capacitor only during reception between the image element drive circuit to the image pickup device drive circuit.

  According to the present invention, since the electric power charged in the capacitor is used when the high-speed sweep is performed, it is possible to sufficiently increase the frequency of the high-speed sweep while preventing the entire imaging apparatus from being stopped.

1 is a block diagram schematically showing an internal configuration of a single-lens reflex camera having an image sensor power supply system to which a first embodiment of the present invention is applied. FIG. 1 is a block diagram schematically showing an internal configuration of a capacitor circuit according to a first embodiment. It is a schematic block diagram of an image sensor. FIG. 6 is a layout view of first to fourth electrodes. It is a timing chart which shows the timing of operation of a capacitor at the time of release control. It is a block diagram which shows roughly the internal structure of the single-lens reflex camera which has an image pick-up element power supply system to which 2nd Embodiment is applied. It is a block diagram which shows roughly the internal structure of the capacitor circuit of 2nd Embodiment. It is a flowchart which shows the charge permission discrimination | determination process performed by CPU.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram schematically showing an internal configuration of a single-lens reflex camera having an image sensor power supply system to which the first embodiment of the present invention is applied.

  The single-lens reflex camera 10 includes an imaging optical system 11, an image sensor 40, a timing generator (TG) 12, a digital signal processor (DSP) 13, a CPU 14, an image sensor drive circuit 15, a power supply circuit 16, a battery connector 17, and a capacitor circuit 30. Consists of.

  The photographing optical system 11 is formed by a plurality of lenses including a focus lens (not shown) and a variable power lens (not shown). The image sensor 40 is disposed on the optical axis so as to be perpendicular to the optical axis of the photographing optical system 11. An optical image of the subject is formed on the light receiving surface of the image sensor 40 by the photographing optical system 11. The focus lens and the zoom lens are displaced along the optical axis by a lens driving mechanism (not shown) based on the control of the CPU 14.

  A mirror 18 and a shutter 19 are disposed between the photographing optical system 11 and the image sensor 40. At the time of shooting standby, the mirror 18 is maintained at the shooting standby position shown in FIG. 1, and reflects the optical image of the subject toward the pentaprism 20 and guides it to a viewfinder (not shown). At the time of imaging, the mirror 18 moves upward and retracts from the optical path of the photographing optical system 11, and the light beam from the photographing optical system 11 reaches the shutter 19. By opening and closing the shutter 19, exposure of the subject image to the image sensor 40 and light shielding are switched.

  The mirror 18 is provided in the mirror drive mechanism 21. The driving of the mirror 18 by the mirror driving mechanism 21 is controlled by the CPU 14. The shutter 18 is provided in a shutter drive mechanism (not shown). Opening and closing of the shutter 19 by the shutter driving mechanism is controlled by the CPU 14, and the time during which the subject image is exposed to the image sensor 40 is controlled.

  The image sensor 40 is driven by the image sensor drive circuit 15, and an image signal corresponding to the optical image is generated. The image sensor drive circuit 15 controls the image sensor 40 based on a signal transmitted from the TG 12.

  The generated image signal is transmitted to the DSP 13 via the AFE 22. In the AFE 22, the image signal is subjected to CDS processing, AGC processing, and A / D conversion processing. In the DSP 13, predetermined signal processing is performed on the image signal. The image signal that has undergone predetermined signal processing is stored in the memory 23. Alternatively, the image is transmitted to the LCD 24 and the captured image is displayed on the LCD 24.

  The DSP 13 is connected to the CPU 14. Based on the signal received from the CPU 14, the DSP 13 performs processing such as signal processing on the image signal and storage of the image signal. The DSP 13 is connected to the TG 12. Based on the signal received from the TG 12, the DSP 13 controls the timing of the aforementioned processing operation.

  As described above, the CPU 14 controls the lens driving mechanism, the mirror driving mechanism 21, the shutter driving mechanism, and the DSP 13. Further, the CPU 14 controls the operation of each part of the single-lens reflex camera 10 including the TG 12.

  The power supply circuit 16 supplies power for driving each part of the single-lens reflex camera 10 including the focus lens, the variable power lens, the mirror 18, the shutter 19, and the image sensor 40. In the power supply circuit 16, power to be supplied to each part is generated using the power stored in the battery 25 electrically connected to the battery connector 17.

  The battery connector 17 is also connected to the capacitor circuit 30. As will be described later, the capacitor circuit 30 is charged with electric power, and the electric power charged when the image pickup device 40 is swept out at high speed is supplied to the power supply circuit 16.

  As shown in FIG. 2, the capacitor circuit 30 includes a charging circuit 31, a capacitor 32, and an output switch 33. Charging circuit 31, capacitor 32, and output switch 33 are connected in series.

  The charging circuit 31 is connected to the battery connector 17. The charging circuit 31 generates a constant current for charging the capacitor 32 using the electric power stored in the battery 25 connected to the battery connector 17.

  Note that a necessary voltage for generating a constant current in the charging circuit 31 is determined. While the power of the battery 25 is used in the power supply circuit 16, while the voltage of the battery 25 is less than the required voltage, the charging circuit 31 cannot generate a constant current, and charging of the capacitor 32 is stopped. Therefore, when the voltage of the battery 25 is higher than the required voltage, a constant current is passed through the capacitor 32 and charged.

  The output switch 33 is connected to the power supply circuit 16. A high-speed sweep signal is transmitted from the TG 12 to the output switch 33 as will be described later. When the high-speed sweep signal is received, the output switch 33 is switched to ON, and the power stored in the capacitor 32 is supplied to the power supply circuit 16.

  Next, the configuration of the image sensor 40 and the operation of the image sensor 30 when performing imaging will be described in more detail. The image sensor 40 is a CCD image sensor, and includes a pixel 41, a vertical CCD 42, a horizontal CCD 43, an output amplifier 44, and the like as shown in FIG.

  A plurality of pixels 41 are two-dimensionally arranged on the light receiving surface of the image sensor 40. A vertical CCD 42 is arranged in each row in which the pixels 41 are arranged. Each pixel 41 is connected to an adjacent vertical CCD 42. Below the vertical CCD 42, a horizontal CCD 43 extending in the row direction of the pixels is provided. The all vertical CCD 42 is connected to the horizontal CCD 43. An output amplifier 44 is connected to one end of the horizontal CCD 43.

  In each pixel 41, signal charge corresponding to the amount of received light is generated and accumulated. An electronic shutter terminal 45sub is connected to a substrate (not shown) on which the pixels 41 are arranged. When an electronic shutter pulse is input to the electronic shutter terminal 45sub, charges accumulated in all the pixels 41 are swept out and reset.

  A sensor gate (not shown) is disposed between the pixel 41 and the vertical CCD 32. A sensor gate (SG) terminal 45sg is connected to the sensor gate. When the SG pulse ΦSG is input to the SG terminal 45sg, the signal charge accumulated in the pixel 41 is read out to the vertical CCD.

  As shown in FIG. 4, the first to fourth electrodes 46 a to 46 d are arranged on the vertical CCD 32 so as to repeat in order along the column direction. By inputting a vertical transfer pulse ΦV whose phase is shifted to the first to fourth electrodes 46 a to 46 d, charges accumulated in the vertical CCD 42 are transferred to the horizontal CCD 43. The first to fourth electrodes 46a to 46d are connected to the first to fourth vertical transfer terminals 45v1 to 45v4 (see FIG. 3), respectively.

  The charge transfer speed in the vertical CCD 42 changes according to the frequency of the vertical transfer pulse ΦV. The higher the frequency, the faster the transfer rate, and the lower the frequency, the slower the transfer rate. When the frequency of the vertical transfer pulse ΦV is increased to increase the charge transfer rate, the amount of power supplied to the power supply circuit 16 also increases.

  Similar to the vertical CCD 42, fifth and sixth electrodes (not shown) are arranged in the horizontal CCD 43 so as to repeat in order along the row direction. By inputting horizontal transfer pulses whose phases are shifted to the fifth and sixth electrodes, the charges transferred to the horizontal CCD 43 are transferred to the output amplifier 44. The fifth and sixth electrodes are connected to the first and second horizontal transfer terminals 45h1 and 45h2, respectively.

  Note that the electronic shutter pulse, sensor gate pulse ΦSG, vertical transfer pulse ΦV, and horizontal transfer pulse are generated by the image sensor driving circuit 15 and input to each terminal.

  The output amplifier 44 has a capacitor, converts the transferred signal charge into a signal voltage, and outputs the signal voltage.

  Next, the release control that is started when the release button is fully pressed will be described with reference to FIG. FIG. 5 is a timing chart for explaining the release control.

  When the release button is fully pressed, the CPU 14 starts release control, which is sequence control. At timing t1 after detection of full release button press, the mirror 18 starts to rotate upward.

  At the next timing t2, the input of the vertical transfer pulse ΦV having the first frequency to the first to fourth vertical transfer terminals 45v1 to 45v4 is started. The first frequency is a frequency used for transferring signal charges. The charges accumulated in the vertical CCD 42 are swept out by the input of the vertical transfer pulse ΦV.

  At timing t2, input of horizontal transfer pulses to the first and second horizontal transfer terminals 45h1 and 45h2 and input of electronic shutter pulses to the electronic shutter terminal 45sub are also started. The charges accumulated in the horizontal CCD 43 and the pixel 41 are swept out by the input of the horizontal transfer pulse and the electronic shutter pulse.

  At timing t3, the upward rotation of the mirror 18 is stopped. At timing t3, the shutter 19 is opened, and exposure of the optical image to the image sensor 40 is started. Note that the input of the electronic shutter pulse is stopped before the timing t3, and the signal charge can be accumulated in the pixel 41.

  At timing t4 after the set exposure time has elapsed, the shutter 19 is completely closed, and the exposure of the optical image onto the image sensor 40 is completed. At timing t4, the mirror 18 starts to rotate downward.

  The image sensor 40 is driven to perform an interlace scan. That is, the signal charge accumulated by exposure between timing t3 and timing t4 is read in two steps. First, the signal charges of the pixels 41 in the odd rows are transferred, and then the signal charges of the pixels 41 in the even rows are transferred. An image signal of one frame is generated based on the signal charges of the odd-numbered pixels 41 and the signal charges of the even-numbered pixels 41. Before the signal charges of the pixels 41 in the odd and even rows are transferred, the high-speed sweep of the vertical CCD 42 is executed.

  At timing t4, a high-speed sweep signal corresponding to a high-speed sweep execution command is transmitted from the TG 12 to the image sensor driving circuit 15 and the output switch 33.

  The frequency of the vertical transfer pulse ΦV is switched from the first frequency to the second frequency by receiving the high-speed sweep signal in the image sensor driving circuit 15. Note that the second frequency is set to a frequency higher than the first frequency. By switching the frequency to the second frequency, unnecessary charges accumulated in the vertical CCD 42 are swept out at a high speed. Further, the power stored in the capacitor 32 is supplied to the power supply circuit 16 by the reception of the high-speed sweep signal at the output switch 33.

  The transmission of the high-speed sweep signal from the TG 12 is stopped at the timing t5 after the elapse of a period required to sufficiently sweep out the electric charge remaining in the vertical CCD 42 by the vertical transfer pulse of the second frequency from the timing t4. The supply of power is stopped.

  At timing t6 after completion of the high-speed sweep, the sensor gate pulse ΦSG is input to the sensor gate terminal 35sg. By inputting the sensor gate pulse ΦSG, the signal charges generated and accumulated in the pixels 31 in the odd-numbered rows between the timing t3 and the timing t4 are read out to the vertical CCD 42.

  At timing t7 after the signal charge is read out to the vertical CCD 42, the frequency of the vertical transfer pulse ΦV is returned to the first frequency again. By returning the frequency to the first frequency, the signal charge is transferred to the horizontal CCD 43 without causing a transfer failure. The signal charges transferred to the horizontal CCD 43 are transferred to the output amplifier 44 by a horizontal transfer pulse.

  After timing t8 after the elapse of a period of time required for transferring all the signal charges of the pixels 41 in the odd-numbered rows by the vertical transfer pulse ΦV having the first frequency from timing t7, the processing is executed between timing t4 and timing t8. Similar to the above-described operation, the vertical CCD 42 is rapidly swept, the signal charge is read from the pixels 41 in the even-numbered rows to the vertical CCD 42, and the signal charge is transferred to the output amplifier 34.

  Next, the power consumption in the power supply circuit 16 and the charging and discharging of the capacitor 32 during the release operation will be described. In the power supply circuit power consumption column in FIG. 5, chargeable power and battery supplyable power are shown. When the power consumption of the power supply circuit 16 is less than the chargeable power, the charging circuit 31 can generate a constant current for charging the capacitor 32. In addition, the power supply circuit 16 can generate an output power supply only by the electric power stored in the battery 25 up to the power that can be supplied by the battery.

  Before the release operation is executed (before timing t1), the power consumption is less than the chargeable power, so the capacitor 32 is charged (see the capacitor control column). In a predetermined period p1 after the timing t1, an initial operation of rotating the mirror 18 upward causes a motor (not shown) to start and consume a large amount of power, and the power consumption exceeds the chargeable power. Therefore, charging to the capacitor 32 is stopped.

  Since the power consumption again becomes less than the chargeable power after the lapse of the predetermined period p1, the capacitor 32 is charged. During a predetermined period p2 before the rotation stop timing t3 of the mirror 18, a large amount of power is consumed to stop the rotation of the mirror 18, and the power consumption exceeds the chargeable power. Therefore, charging to the capacitor 32 is stopped.

  Between timing t3 and timing t4, the power consumption again becomes less than the chargeable power, so that the capacitor 32 is charged. During a predetermined period p3 after timing t4, the motor is activated and a large amount of power is consumed because of the initial operation of rotating the mirror 18 downward. Furthermore, power for executing high-speed sweep is consumed in a part of the predetermined period p3. Note that, during high-speed sweeping, power exceeding the battery supplyable power is supplied from the capacitor 32 (see timing t4 to timing t5).

  After the elapse of the predetermined period p3, the power consumption again becomes less than the chargeable power, so that the capacitor 32 is charged. During a predetermined period p4 before the rotation stop timing t9 of the mirror 18, a large amount of power is consumed to stop the rotation of the mirror 18, and the power consumption exceeds the chargeable power. Therefore, charging to the capacitor 32 is stopped. In addition, power for executing the high-speed sweep is consumed in a part of the predetermined period p4. During high-speed sweeping, power exceeding the battery power supply is supplied from the capacitor 32.

  After the timing t9 when the mirror 18 is closed, the power consumption again becomes less than the chargeable power, so that charging of the capacitor 32 is started.

  According to the image sensor power supply system of the first embodiment as described above, it is possible to use not only the power of the battery 25 but also the power charged in the capacitor 32 during execution of the high-speed sweep. Therefore, it is possible to sufficiently increase the frequency of high-speed sweeping while preventing driving of the entire single-lens reflex camera 10 from being stopped. Therefore, the generation time of one frame of image signal can be shortened particularly during continuous shooting, so that the number of shots per unit time can be increased.

  Further, in the first embodiment, since the power charged in the capacitor 32 is supplied only during a short high-speed sweep, the capacity required for the capacitor 32 compared to a configuration in which a capacitor is simply provided in parallel with the power supply circuit 16. Is small.

  In the first embodiment, the timing for supplying power from the capacitor 32 is determined based on the high-speed sweep signal transmitted from the TG 12. Since the high-speed sweep signal from the TG 12 is generated for driving the image sensor even in the conventional TG, the high-speed sweep signal may be output from the existing TG 12 to the output switch 33, and manufacturing is easy.

  In the first embodiment, the charging circuit 31 is a constant current circuit that generates a constant current when a voltage higher than a necessary voltage is supplied. Therefore, the charging circuit 31 is automatically charged when it can be charged without external control. The

  Next, an image sensor power supply system to which a second embodiment of the present invention is applied will be described. The image sensor power supply system of the second embodiment is different from the first embodiment in the control of charging the capacitor. Hereinafter, a description will be given focusing on differences from the first embodiment. In addition, the same code | symbol is attached | subjected to the site | part which has the same function as 1st Embodiment.

  As shown in FIG. 6, in the single-lens reflex camera 100 of 2nd Embodiment, the structure and function of parts other than CPU140 and the capacitor circuit 300 are the same as 1st Embodiment. Unlike the first embodiment, the CPU 140 is connected to the capacitor circuit 300.

  As shown in FIG. 7, the capacitor circuit 300 includes an input switch 34, a capacitor 32, and an output switch 33. The input switch 34, the capacitor 32, and the output switch 33 are connected in series.

  The input switch 34 is connected to the battery connector 17. The input switch 34 is turned on when a charge permission signal is received from the CPU 140, and power is supplied to the capacitor 32. Therefore, the capacitor 32 is charged while the input switch 34 is ON.

  The configurations and functions of the capacitor 32 and the output switch 33 are the same as those in the first embodiment.

  A charge permission signal is transmitted from the CPU 140 when the capacitor 32 can be charged. In an EEPROM (not shown) provided in the CPU 140, power necessary for executing the operation of each part is stored as data. CPU 140 transmits a charge permission signal based on the stored data.

  In the CPU 140, the power used by the entire single-lens reflex camera 100 at a predetermined cycle is calculated from the data stored in the EEPROM. When the power used as a whole, that is, the power consumption in the power supply circuit 16 is less than the threshold value, a charge permission signal is transmitted from the CPU 140. The threshold value is set to the maximum value of power that can be consumed by the power supply circuit 16 while allowing the capacitor 32 to be stably charged.

  For example, during release control, a predetermined period p1 (first period) from the start of upward rotation of the mirror 18, a predetermined period p2 (second period) before the rotation of the mirror 18 is stopped, The power consumption exceeds the threshold during a predetermined period p3 from the start of the downward rotation and a predetermined period p4 before the rotation of the mirror 18 is stopped. Therefore, the charge permission signal is not transmitted from the CPU 140 during these periods, and the charge permission signal is transmitted from the CPU 140 during other periods.

  Next, the charge permission determination process executed by the CPU 140 will be described with reference to the flowchart of FIG. Note that the charge permission determination process is an interrupt process executed at intervals of, for example, 10 milliseconds.

  In step S100, an operation currently being executed is detected. After detecting the operation, the process proceeds to step S101. In step S101, power consumption necessary for all operations being executed is calculated. After calculating the power consumption, the process proceeds to step S102.

  In step S102, it is determined whether or not the overall power consumption is less than a threshold value. If the power consumption is less than the threshold, the process proceeds to step S103. In step S103, a charge permission signal is transmitted to the input switch 34, and the capacitor 32 is charged. After transmitting the charge permission signal, the charge permission determination process is terminated. If the power consumption is greater than or equal to the threshold value, the process proceeds to step S104, where a charge prohibition signal is transmitted to the input switch 34, and charging of the capacitor 32 is prohibited. After transmitting the charge prohibition signal, the charge permission determination process is terminated.

  Even with the imaging element power supply system of the second embodiment as described above, it is possible to use not only the power of the battery 25 but also the power charged in the capacitor 32 during execution of the high-speed sweep.

  In the second embodiment, since charging of the capacitor 32 is controlled by the CPU 140, the capacitor 32 can be charged at an appropriate time for various states as compared to the first embodiment.

  In the first and second embodiments, power is supplied from the capacitor 32 when the mirror 18 is rotated. However, the timing is not limited to the rotation time of the mirror 18. When the operation of other parts of the single-lens reflex camera 10 or 100 is being executed and the power of the battery 25 cannot execute high-speed sweeping at a sufficiently high frequency, the power charged in the capacitor 32 may be used. . Moreover, the capacity | capacitance of the capacitor 32 and the timing of charge can be suitably set according to use of the imaging device to be used. Therefore, the present invention can be applied to an image sensor having a large number of pixels, and the degree of freedom in designing the image pickup apparatus is improved.

  In the second embodiment, the charge permission determination process is performed by an interrupt process. For example, the timing of a process operation that consumes a large amount of power, such as before and after a mirror drive operation, or charge control of a strobe (not shown). The configuration may be such that charging to the capacitor 32 is prohibited or permitted before and after.

  In the first and second embodiments, the image pickup device 40 is configured to transfer the signal charge to the output amplifier 44 by two-time reading of the interlace scan. However, the number of times of reading is not limited to two times, but three times or more. It may be read separately. Furthermore, a configuration in which reading is performed once by progressive scan may be employed.

  In the first and second embodiments, the image pickup device 40 is a CCD image pickup device. However, the image pickup device 40 can also be applied to other types of image pickup devices that can sweep out unnecessary charges at high speed.

10, 100 single-lens reflex camera 12 timing generator (TG)
14,140 CPU
DESCRIPTION OF SYMBOLS 15 Image pick-up element drive circuit 16 Power supply circuit 17 Battery connector 18 Mirror 21 Mirror drive mechanism 25 Battery 30, 300 Capacitor circuit 31 Charging circuit 32 Capacitor 33 Output switch 40 Image pick-up element 42 Vertical CCD
45v1 to 45v4 first to fourth vertical transfer terminals 46a to 46d first to fourth electrodes

Claims (4)

An image sensor that can remove the charge that becomes noise by high-speed sweeping operation;
A battery connector that can be electrically connected to a battery that supplies electric power for driving a component part of the imaging apparatus provided with the imaging element;
A capacitor that is charged by power supplied from the battery via the battery connector;
A power supply circuit that generates power for driving the components and the image sensor using power supplied from the battery via the battery connector and power charged in the capacitor;
A timing generator for generating a high-speed sweep signal for executing the high-speed sweep operation;
An image sensor driving circuit that drives the image sensor using electric power adjusted by the power supply circuit and causes the image sensor to execute the high-speed sweep operation when receiving the high-speed sweep signal;
An image sensor power supply comprising: a switch provided between the capacitor and the image sensor drive circuit, wherein the power source circuit is supplied with power charged in the capacitor only when the high-speed sweep signal is received. system.   A constant current circuit provided between the battery connector and the capacitor and configured to flow a constant current for charging the capacitor using electric power remaining in the battery in a state of being used in the power supply circuit; The image sensor power supply system according to claim 1, wherein the power supply system is an image sensor power supply system. A charge control unit for controlling a supply timing of the battery power to the capacitor;
The component part is a mirror driving mechanism that drives a mirror that switches an optical image picked up by the image pickup device to the image pickup device or the viewfinder,
The charge control unit stops supplying power to the capacitor in a first period after the start of driving and a second period before the end of driving in the period in which the mirror driving mechanism drives the mirror, The image sensor power supply system according to claim 1, wherein power is supplied to the capacitor during a period excluding the first and second periods. An imaging device for photographing a subject,
An image sensor that can remove the charge that becomes noise by high-speed sweeping operation;
A battery connector that can be electrically connected to a battery that supplies power for driving the components of the imaging device;
A power supply circuit that adjusts the power for driving the components and the imaging device using the power supplied from the battery via the battery connector;
A capacitor that is charged by power supplied from the battery via the battery connector;
A timing generator for generating a high-speed sweep signal for executing the high-speed sweep operation;
An image sensor driving circuit that drives the image sensor using the power adjusted by the power supply circuit and the power supplied from the capacitor, and causes the image sensor to execute the high speed sweep operation when receiving the high speed sweep signal. When,
An imaging device comprising: a switch provided between the capacitor and the image sensor driving circuit, wherein the switch supplies power charged to the capacitor to the image sensor driving circuit only when the high-speed sweep signal is received. .

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