JP5316038B2 - Digital-analog conversion apparatus and digital-analog conversion method - Google Patents

Description

  The present invention relates to a digital-to-analog conversion apparatus and a digital-to-analog conversion method, and more particularly to a digital-to-analog conversion technique for correcting an error in an analog current generated in an integrated circuit.

  When a current value at a specific location flowing in a reception-side LSI is controlled by a remote operation by a transmission-side LSI by wireless communication between semiconductor integrated circuits (LSIs), generally only digital data can be transmitted and received. For this reason, it is difficult to control such that an analog current value is generated in the transmission-side LSI and the current is directly transmitted to the reception-side LSI. This is because, for example, in order to generate an arbitrary DC current or DC voltage in the receiver, the current input to the antenna or coil of the transmitter must always be increased (a constant di / dt is generated, Always need to supply the same radio wave or magnetic flux). However, in order to constantly increase the current flowing through the transmission coil, an infinite current value is required, which is impossible with a normal transmitter having an upper limit in current driving force.

  Therefore, in the wireless communication system, in order to output the analog current requested from the transmitting side in the receiving side LSI, a digital code corresponding to the value of the requested analog current is calculated by the transmitting side LSI, and the receiving side LSI A method is conceivable in which an analog voltage is output using a digital-analog voltage converter in the receiving circuit, and an analog current is output using a voltage-current converter. However, an ideal required current value code-current value relationship predicted at the time of design may not be obtained due to the influence of variations in characteristics of the digital-analog voltage conversion circuit and the voltage-current conversion circuit.

  As a method of correcting such variations, a current value is measured in a digital-to-analog converter, and a correction circuit that directly corrects parameters of the elements in the digital-to-analog voltage conversion circuit or voltage-current conversion circuit is provided. There is a method of trying to output a value (see Patent Document 1). There is also known a method of preparing a reference current source, searching for an appropriate current setting code that can output a reference current, and transmitting the current setting code to a constant current circuit (see Patent Document 2).

JP-T-2006-527956 JP 2005-301410 A

  The following analysis is given in the present invention.

  In the conventional correction method, it is necessary to create a reference current source in the chip, and there is a problem that the circuit scale increases because a correction circuit is added to the digital-analog voltage converter and the voltage-current converter.

  Accordingly, an object of the present invention is to provide a digital / analog conversion apparatus and a digital / analog conversion method that perform highly accurate required current value code-current conversion without substantially increasing the circuit scale.

A digital-to-analog converter according to an aspect of the present invention includes a digital value generation circuit that converts a required current value code into a digital code and outputs the digital value, and a digital-to-analog voltage converter that outputs an analog voltage in accordance with the digital code Circuit, a voltage-current conversion circuit that converts an analog voltage into a current and outputs an output current, and a current detection circuit that converts the output current of the voltage-current conversion circuit into a digital value and feeds it back to a digital value generation circuit The digital value generation circuit sets a correction amount for conversion to a digital code based on the fed back digital value. The current detection circuit includes a current pulse conversion circuit that outputs a pulse signal whose output pulse width changes according to the output current, and a pulse digital conversion circuit that converts the pulse signal into a digital value. A capacitive element that is charged by applying an output current during the measurement period, a logic circuit that inverts the output value when the capacitive element is charged by a certain amount, and is turned on during the non-measurement period, and the voltage of the capacitive element is constant. The logic circuit outputs a pulse signal.

A digital-analog converter according to another aspect of the present invention includes a digital value generation circuit that converts a required current value code into a digital code and outputs the digital value, and a digital-analog voltage converter that outputs an analog voltage according to the digital code Circuit, a voltage-current conversion circuit that converts an analog voltage into a current and outputs an output current, and a current detection circuit that converts the output current of the voltage-current conversion circuit into a digital value and feeds it back to a digital value generation circuit The digital value generation circuit sets a correction amount for conversion to a digital code based on the fed back digital value. The current detection circuit includes a current pulse conversion circuit that outputs a pulse signal whose output pulse width changes according to the output current, and a pulse digital conversion circuit that converts the pulse signal into a digital value. A first capacitive element that is charged with an output current; a second capacitive element that is discharged with an output current; two reset switches that reset charging or discharging of the first and second capacitive elements; And a comparison circuit that compares the voltages of the second capacitor elements, and the comparison circuit outputs a pulse signal based on the comparison result.

  According to the present invention, a reference current source is unnecessary and a voltage-current converter can be corrected without a correction circuit, and a highly accurate required current value code-current conversion can be realized without substantially increasing the circuit scale. Can do.

1 is a block diagram illustrating a configuration of a digital-analog conversion device according to an embodiment of the present invention. 1 is a block diagram illustrating a configuration of a digital-analog converter according to a first embodiment of the present invention. It is a figure which shows the structural example of a conversion map. It is a figure which shows another circuit example of a current pulse conversion circuit. It is a timing chart showing operation of a current pulse conversion circuit. It is a circuit diagram which shows the example of a digital analog voltage conversion circuit. It is a timing chart showing operation of a digital analog voltage conversion circuit. It is a circuit diagram which shows the example of a voltage current conversion circuit. It is a figure which shows the shift | offset | difference of the characteristic in a voltage-current relationship.

The digital-analog converter according to the embodiment of the present invention is configured as follows.
(1) A digital value generation logic for converting a required current value code into a digital code and outputting it, a digital-analog voltage conversion circuit for outputting an analog voltage according to the digital code, and a voltage current for converting the analog voltage into a current A conversion circuit and current detection means for observing the output current, converting it to a digital value, and feeding back to the digital value generation logic are provided.
(2) The current detection means includes a current-pulse conversion circuit having a feature that an output pulse width changes according to an input current, and a pulse-digital conversion circuit that converts a pulse signal into a digital value.
(3) The current-pulse conversion circuit includes a capacitive element that is charged by applying an output current during a measurement period, a logic circuit that includes an inverting circuit whose output value changes when charged by a certain amount, The reset switch is turned on during the measurement period and holds the voltage of the capacitor at a constant value.
(4) The current-pulse conversion circuit includes a first capacity whose capacity value can be charged with an output current value, a second capacity whose capacity value can be discharged with an output current value, and a respective charge. Or it is comprised with the reset switch which resets discharge, and the electric current-pulse conversion circuit provided with the comparison circuit which compares the voltage of a 1st capacity | capacitance with the voltage of a 2nd capacity | capacitance.
(5) At the time of variation correction, the digital value generation logic inputs a predetermined one or more digital codes, and determines the relationship between the digital code and the current value according to the current value detected by the current detection circuit. Create the map or expression shown and save it in memory within the digital value generation logic. In actual use, when a required current value is input, it has a function of outputting a corresponding digital code using the map or expression.
(6) Based on the difference between the digital code and the output current of the voltage-current conversion circuit, the map or expression is converted from the required current value code to the digital code so that the output current value is closest to the required current value code. .
(7) The digital value generation logic is provided in the first LSI, the digital analog voltage conversion circuit, the voltage-current conversion circuit, and the current detection means are provided in the second LSI, and the digital code and the current detection means are provided. Means for communicating the output signal between the LSIs.
(8) The digital-analog voltage conversion circuit is composed of two identical capacitance values, and each time one bit of the digital code is input, the switch between the two capacitances is opened and the first capacitance value is set according to the digital code. The first period during which the power supply voltage is charged or the ground level is discharged, and the second period during which the switch between the two capacitors is short-circuited.
(9) The voltage-current circuit is configured such that a voltage is applied to both ends of the resistance element by the same voltage as the input voltage.

  Next, it demonstrates more concretely with reference to drawings. FIG. 1 is a block diagram showing a configuration of a digital-analog converter according to an embodiment of the present invention. In FIG. 1, the digital-analog converter includes a digital value generation circuit 21 that converts a required current value code Mc into a digital code Md and outputs it, and a digital-analog voltage conversion circuit 22 that outputs an analog voltage Vin according to the digital code Md. A voltage-current conversion circuit 23 that converts the analog voltage Vin into a current and outputs an output current Iout; and a current detection that converts the output current Iout of the voltage-current conversion circuit 23 into a digital value and feeds it back to the digital value generation circuit 21 The digital value generation circuit 21 sets a correction amount for conversion to the digital code Md based on the fed back digital value.

  The current detection circuit 24 may include a current pulse conversion circuit that outputs a pulse signal whose output pulse width changes according to the output current, and a pulse digital conversion circuit that converts the pulse signal into a digital value.

  Here, the current pulse conversion circuit is turned on in a non-measurement period, a capacitive element that is charged by applying an output current in a measurement period, a logic circuit that inverts an output value when the capacitive element is charged by a certain amount, and A reset switch that holds the voltage of the capacitive element at a constant value, and the logic circuit may output a pulse signal.

  The current pulse conversion circuit resets charging or discharging of the first capacitive element charged with the output current, the second capacitive element discharged with the output current, and the first and second capacitive elements. Two reset switches and a comparison circuit that compares the voltages of the first and second capacitive elements may be provided, and the comparison circuit may output a pulse signal based on the comparison result.

  The digital value generation circuit 21 includes a storage unit that holds a correction amount for conversion to a digital code, and inputs one or more predetermined required current value codes at the time of variation correction, and is detected by a current detection circuit. A correction amount indicating the relationship between the digital code and the current value is created according to the current value of the output current and stored in the storage unit. When the required current value code is input during actual use, the correction amount is stored. It is also possible to have a function of correcting and outputting a corresponding digital code using a certain correction amount.

  Based on the difference between the digital code and the output current of the voltage-current converter, the correction amount is a map or formula that converts the required current value code to the digital code so that the output current value is closest to the required current value code. It may be expressed as

  The digital-analog voltage conversion circuit 22 includes third and fourth capacitive elements having the same capacitance value, and a switch that opens and closes one end of the third and fourth capacitive elements, and serially inputs a digital code. Each time one bit of the digital code is input, the switch is opened and the third capacitor element is charged to the power supply voltage or discharged to the ground level according to the digital code, and the switch is short-circuited. The second period may be repeated, and the voltage of the fourth capacitor element obtained when all the digital codes are input may be analog voltage.

  In addition, a receiving-side LSI 12 that includes the above-described digital-analog conversion device and includes a digital value generation circuit 21, a digital-analog voltage conversion circuit 22, a voltage-current conversion circuit 23, and a current detection circuit 24; The digital code Md and the output signal of the current detection circuit 24 may be configured as a signal transmission system including means for communicating between the transmission-side LSI 11 and the reception-side LSI 12.

  In the digital-analog converter as described above, when a certain requested current value code Mc is input, the information on the output current Iout when the digital code Md is input to the receiving LSI 12 is fed back to the transmitting LSI 11 to request the requested current value code. The digital code Md closest to Mc is searched and corrected. Therefore, the accuracy of the output current Iout can be ensured even when the circuit characteristics in the receiving LSI 12 vary. Further, by storing the correction result in the digital value generation circuit 21, a correct current can be output without feedback in the normal operation after the correction is completed. Further, by configuring the current detection circuit 24 not to use a constant current source, an error occurs in voltage-current conversion, and the circuit area does not increase even when correction using a plurality of current values is required. In addition, the digital-to-analog voltage converter 22 using the capacitance ratio can realize highly accurate required current value code-current conversion without correction.

  FIG. 2 is a block diagram showing the configuration of the digital-analog converter according to the first embodiment of the present invention. In FIG. 2, the same reference numerals as those in FIG. In the digital-analog conversion device shown in FIG. 2, the current detection circuit 24 in FIG. 1 is configured as a current pulse conversion circuit 25 in the reception-side LSI 12 and a pulse digital conversion circuit 26 in the transmission-side LSI 11. A detailed example of the current pulse conversion circuit 25 that measures the actual current Iout and converts it into a digital signal without using the reference current source is shown. The pulse digital conversion circuit 26 converts the pulse signal Vpulse output from the current pulse conversion circuit 25 into a digital value and outputs the digital value to the digital value generation circuit 21.

  The current pulse conversion circuit 25 includes PMOS transistors MP1 and MP2, a capacitive element C1, a switch SW1, an inverter circuit INV1, and an AND circuit AND1. The diode-connected PMOS transistor MP1 constitutes a current mirror circuit with the PMOS transistor MP2, wraps the current Iout output from the voltage-current conversion circuit 23, and supplies the current to the other end of the capacitive element C1 whose one end is grounded. The capacitive element C1 connects a switch SW1 controlled by a control signal Vsw between both ends. The inverter circuit INV1 has an input end connected to the other end of the capacitive element C1, and an output end connected to one input end of the AND circuit AND1. The AND circuit AND1 inputs an inverted signal of the control signal Vsw to the other input terminal, and outputs a pulse signal Vpulse.

  In the current pulse conversion circuit 25 configured as described above, at the moment when the switch SW1 is turned off by setting the control signal Vsw to the low level, the voltage of the capacitive element C1 is at the ground level (0 V). Thereafter, the electric charge is accumulated in the capacitive element C1 by Iout, and the voltage of the capacitive element C1 eventually exceeds the logical threshold value Vt of the inverter circuit INV1 in the subsequent stage. At this time, the output waveform of the current pulse conversion circuit 25 is a pulse signal Vpulse, and the pulse width Tpulse is expressed by Tpulse = C · Vt / Iout. Since this pulse signal Vpulse is a digital signal (a voltage signal composed of only two levels of the first and second levels), it can be transmitted to the transmission-side LSI 11. In such a circuit configuration, the values of C and Vt are parameters that can be designed to reduce the error, for example, by increasing the size of the capacitive element C1 and the inverter circuit INV1. Therefore, the error when converting the pulse width Tpulse to Iout is small.

  The pulse digital conversion circuit 26 in the transmission-side LSI 11 reads the pulse width Tpulse of the pulse signal Vpulse and converts it into a digital value corresponding to the value of Iout. Thereby, a conversion map as shown in FIG. 3 can be created.

  FIG. 4 is a diagram illustrating another circuit example of the current pulse conversion circuit. In FIG. 4, the same reference numerals as those in FIG. The current pulse conversion circuit 25a includes a charging circuit 27, a discharging circuit 28, a comparator CMP1, and an AND circuit AND1. Similarly to FIG. 2, the charging circuit 27 includes PMOS transistors MP1 and MP2, a capacitive element C1, and a switch SW1, and has a circuit configuration including a discharging circuit 28 and a comparator CMP1 instead of the inverter circuit INV1 of FIG.

  The discharge circuit 28 includes a PMOS transistor MP3, NMOS transistors MN1 and MN2, a capacitive element C2, and a switch SW2. The PMOS transistor MP3 forms a current mirror circuit with the PMOS transistor MP1, and folds back the current Iout and supplies it to the diode-connected NMOS transistor MN1. The NMOS transistor MN1 constitutes a current mirror circuit with the NMOS transistor MN2, folds back the current of Iout and supplies the current to the other end of the capacitive element C2 connected to the power supply. The capacitive element C2 connects the switch SW2 controlled by the control signal Vsw between both ends.

  The comparator CMP1 compares the voltage Vd at the other end of the capacitive element C2 with the voltage Vc at the other end of the capacitive element C1, and outputs an H level when Vd ≧ Vc and an L level when Vd <Vc. Output to one input terminal of the product circuit AND1.

  Next, the operation of the current pulse conversion circuit 25a configured as described above will be described. FIG. 5 is a timing chart showing the operation of the current pulse conversion circuit 25a. The switch SW1 of the charging circuit 27 and the switch SW2 of the discharging circuit 28 are controlled to be opened and closed by the same control signal Vsw. After the control signal Vsw is set to the low level and the two switches SW1 and SW2 are simultaneously turned off, the output voltage Vc of the charging circuit 27 is Vc = Iout · T / according to the time T after the switch SW1 is turned off. C rises. On the other hand, the output voltage Vd of the discharge circuit 28 decreases as Vd = Vdd− (Iout · T / C). Here, Vdd is a power supply voltage. The pulse width Tpulse of the output signal Vpulse is the time from when the switches SW1 and SW2 are turned off until Vc = Vd, and is expressed as Tpulse = C (Vdd / 2) / Iout. A feature of such a current pulse conversion circuit 25a is that even if the logic threshold value of the inverter circuit is not known in advance, if the power supply voltage Vdd is known, conversion from Tpulse to Iout is possible.

  Next, the digital analog voltage conversion circuit 22 will be described. FIG. 6 is a circuit diagram showing an example of the digital-analog voltage conversion circuit 22. The digital-analog voltage conversion circuit 22 includes AND circuits AND2 and AND3, capacitive elements C3 and C4 having the same capacitance value, switches SW3 to SW6, and a timing circuit 31 that controls on / off of the switches SW3 to SW6.

  The AND circuit AND2 inputs the serialized digital code Md to one input terminal, inputs the clock signal φ1 output from the timing circuit 31 to the other input terminal, and controls opening and closing of the switch SW3. The AND circuit AND3 inputs the inverted signal of the serialized digital code Md to one input terminal, inputs the clock signal φ1 output from the timing circuit 31 to the other input terminal, and controls the opening / closing of the switch SW4. . The switch SW3 is connected between the other end of the capacitive element C3 whose one end is grounded and the power source. The switch SW4 is connected between the other end of the capacitive element C3 and the ground. The switch SW5 is controlled to open and close by the clock signal / φ1 output from the timing circuit 31, and is connected between the other end of the capacitive element C4 whose one end is grounded and the other end of the capacitive element C3. The switch SW6 is controlled to be opened and closed by a signal φ2 output from the timing circuit 31, and is connected between both ends of the capacitive element C4. Here, it is assumed that the voltage at the other end of the capacitive element C3 is V1, and the voltage at the other end of the capacitive element C4 is V2 (analog voltage Vin).

  Next, the operation of the digital / analog voltage conversion circuit 22 will be described. FIG. 7 is a timing chart showing the operation of the digital-analog voltage conversion circuit 22. First, the binarized digital code Md (here, binary signal 011 (decimal number 3)) is input from the least significant bit (LSB) B0. The clock signal φ1 is raised every time one bit is input. At this time, the voltage V1 stored in the capacitive element C3 is a voltage corresponding to B0, such as a power supply voltage level if B0 is 1 and a ground level if B0 is 0. Thereafter, when the clock signal φ1 falls, the switch SW5 is turned on, and V1 and V2 are short-circuited. When the value of V2 before the short circuit is 0, the voltage levels of V1 and V2 are V1 = V2 = B0 × Vdd / 2.

  Next, the second least significant bit B1 is input. Thereafter, when the clock signal φ1 is raised, the switch SW5 is turned off, and the voltage V1-V2 is opened. At the same time, V1 is the power supply voltage level if B1 is 1, and grounded if B1 is 0. The level is a voltage corresponding to B1. Thereafter, when the clock signal φ1 falls, V1 and V2 are short-circuited. At this time, the voltage levels of V1 and V2 are V1 = V2 = (B0 / 2 + B1) × Vdd / 2.

When this operation is repeated, when the most significant bit (MSB) Bn is input and the clock signal φ1 falls, the voltage levels of V1 and V2 are expressed by the following equations.
V1 = V2 = (B0 / (2 ^ n) + B1 / (2 ^ (n-1)) ... + Bn) * Vdd / 2 (1)

  Finally, when another voltage level is output, the clock signal φ2 is once raised to reset the capacitive elements C3 and C4 to the ground level, and then the above operation is performed again.

  As described above, when the (n + 1) -bit digital code Md from B0 to Bn is input, the digital-analog voltage conversion circuit 22 is proportional to the value of the digital code Md at a voltage interval of Vdd / (2 ^ (n + 1)). The voltage Vin can be output.

  Even if the absolute values of the capacitance values of the capacitive elements C3 and C4 are different from the design values, the digital-analog voltage conversion circuit 22 can be used if the two capacitance values are the same (that is, if there is no relative error). ) And the relationship represented by the formula (1) can be maintained. In particular, in LSI, the relative error between adjacently arranged capacitive elements is smaller than the absolute value error of the capacitance value, and high-precision digital-voltage conversion is performed without correction.

  Next, the voltage / current conversion circuit 23 will be described. FIG. 8 is a circuit diagram showing an example of the voltage / current conversion circuit 23. The voltage-current conversion circuit 23 includes an operational amplifier OP1, an NMOS transistor MN3, PMOS transistors MP4 and MP5, and a resistance element R1. The operational amplifier OP1 inputs the voltage Vin to the non-inverting terminal (+), connects the inverting terminal (−) to the node Vx, and connects the output terminal to the gate of the NMOS transistor MN3. The NMOS transistor MN3 has a drain connected to the diode-connected PMOS transistor MP4, and is grounded via the resistance element R1 with the source as the node Vx. The PMOS transistor MP5 forms a current mirror circuit with the PMOS transistor MP4, and outputs Iout from the drain.

  In the voltage-current conversion circuit 23 having such a configuration, the operational amplifier OP1 and the NMOS transistor MN3 operate so that the voltage of the node Vx is always Vin = Vx. At this time, if the resistance value of the resistance element R1 is R, the current flowing through the resistance element R1 is Vx / R, that is, Vin / R. This current is output as Iout using a current mirror circuit composed of PMOS transistors MP4 and MP5. At this time, ideally, Iout = Vin / R. Therefore, the circuit outputs Iout proportional to the input voltage Vin. Further, by using the digital-analog voltage conversion circuit 22, the input voltage Vin in FIG. 2 is proportional to the digital code Md. Therefore, the configuration combining the digital-analog voltage conversion circuit 22 and the voltage-current conversion circuit 23 is digital. Iout proportional to the code Md can be output.

  However, in the actual voltage-current conversion circuit 23, the ideal voltage-current relationship is not achieved due to variations in transistor characteristics and the voltage offset of the operational amplifier, and a characteristic shift as shown in FIG. 9 occurs. Therefore, a correction operation by feedback using the current pulse conversion circuit 25 is performed on several digital codes Md, and the interpolation result of the correction result is performed on the other digital codes Md to reproduce a map or an expression. Just make it.

  At this time, even if Iout is not measured for any digital code Md, as shown in FIG. 9A, if it can be ensured that Vin and Iout are in a proportional relationship, Iout is measured for one digital code Md. Thus, Iout for other digital codes Md can be predicted without measurement. Also, as shown in FIG. 9B, if Vin and Iout are in a linear function relationship, Iout for other digital codes Md is not measured by measuring Iout for two digital codes Md. Even predictable. The former is, for example, the case where the resistance value R in the voltage-current conversion circuit 23 varies only from the ideal value, and the latter occurs when the voltage offset of the operational amplifier OP1 also varies.

  As described above, according to the digital-analog converter of the present embodiment, the digital current correction technique that does not require a reference current source and does not require a correction circuit in the voltage-current converter can increase the LSI area almost without increasing the area. Accurate required current value code-current conversion can be realized. In addition, the digital-to-analog voltage converter that uses the capacitance ratio enables high-accuracy required current value code-current conversion without correction. In addition, a suitable digital code for any current value can be obtained with only a few current measurements. It is also possible to know Md.

  It should be noted that the disclosures of the aforementioned patent documents and the like are incorporated herein by reference. Within the scope of the entire disclosure (including claims) of the present invention, the embodiments and examples can be changed and adjusted based on the basic technical concept. Various combinations and selections of various disclosed elements are possible within the scope of the claims of the present invention. That is, the present invention of course includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

11 Transmitting LSI
12 Receiver LSI
21 Digital value generation circuit 22 Digital analog voltage conversion circuit 23 Voltage current conversion circuit 24 Current detection circuit 25, 25a Current pulse conversion circuit 26 Pulse digital conversion circuit 27 Charging circuit 28 Discharge circuit 31 Timing circuits AND1-AND3 AND circuits C1-C4 Capacitance element CMP1 Comparator INV1 Inverter circuits MN1 to MN3 NMOS transistors MP1 to MP5 PMOS transistor OP1 Operational amplifier R1 Resistance elements SW1 to SW6 Switch

Claims (6)

A digital value generation circuit that converts a required current value code into a digital code and outputs the digital code;
A digital-to-analog voltage conversion circuit that outputs an analog voltage according to the digital code;
A voltage-current conversion circuit that converts the analog voltage into a current and outputs an output current; and
A current detection circuit that converts the output current of the voltage-current conversion circuit into a digital value and feeds it back to the digital value generation circuit;
With
The digital value generation circuit sets a correction amount when converting into the digital code based on the digital value fed back,
The current detection circuit is
A current pulse conversion circuit that outputs a pulse signal whose output pulse width changes according to the output current;
A pulse digital conversion circuit for converting the pulse signal into the digital value;
With
The current pulse conversion circuit is:
A capacitive element that is charged by applying an output current during the measurement period;
A logic circuit whose output value is inverted when the capacitance element is charged by a certain amount;
A reset switch that is turned on during a non-measurement period and holds the voltage of the capacitive element at a constant value;
With
The digital-to-analog conversion device, wherein the logic circuit outputs the pulse signal . A digital value generation circuit that converts a required current value code into a digital code and outputs the digital code;
A digital-to-analog voltage conversion circuit that outputs an analog voltage according to the digital code;
A voltage-current conversion circuit that converts the analog voltage into a current and outputs an output current; and
A current detection circuit that converts the output current of the voltage-current conversion circuit into a digital value and feeds it back to the digital value generation circuit;
With
The digital value generation circuit sets a correction amount when converting into the digital code based on the digital value fed back,
The current detection circuit is
A current pulse conversion circuit that outputs a pulse signal whose output pulse width changes according to the output current;
A pulse digital conversion circuit for converting the pulse signal into the digital value;
With
The current pulse conversion circuit is:
A first capacitive element charged with the output current;
A second capacitive element discharged with the output current;
Two reset switches for resetting charging or discharging of the first and second capacitive elements;
A comparison circuit for comparing voltages of the first and second capacitive elements;
With
The digital-to-analog converter characterized in that the comparison circuit outputs the pulse signal based on a comparison result . The digital value generation circuit includes:
A storage unit for holding a correction amount when converting to the digital code;
At the time of variation correction, one or more predetermined current value codes are inputted, and the relationship between the digital code and the current value is determined according to the current value of the output current detected by the current detection circuit. Create the indicated correction amount and store it in the storage unit,
3. The function according to claim 1, wherein when the required current value code is input during actual use, the corresponding digital code is corrected and output using the stored correction amount. Digital-to-analog converter. The correction amount is calculated based on the difference between the digital code and the output current of the voltage / current converter circuit so that the value of the output current is closest to the required current value code. 4. The digital-to-analog conversion device according to claim 3 , wherein the digital-to-analog conversion device is expressed by a map or an expression that converts to a digital value. The digital-analog voltage conversion circuit is
Third and fourth capacitive elements having the same capacitance value;
A switch for opening and closing between one ends of the third and fourth capacitive elements;
With
Enter the digital code serially,
Each time one bit of the digital code is input, a first period in which the switch is opened and the third capacitive element is charged to a power supply voltage or discharged to the ground level according to the digital code; Repeating the second period of short-circuiting,
3. The digital-analog converter according to claim 1, wherein a voltage of the fourth capacitive element obtained when all of the digital codes are input is the analog voltage. Including the digital-analog converter according to any one of claims 1 to 5 ,
A first LSI comprising the digital value generation circuit;
A second LSI comprising the digital-analog voltage conversion circuit, the voltage-current conversion circuit, and the current detection circuit;
Means for communicating the digital code and the output signal of the current detection circuit between the first and second LSIs;
A signal transmission system comprising:

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