JP5310089B2 - Semiconductor laser - Google Patents

Description

The present invention relates to a semiconductor laser.

  Non-Patent Document 1 describes a laser diode having a ridge structure. The laser diode includes an n-type semiconductor layer, an active layer provided on the n-type semiconductor layer, a p-type semiconductor layer provided on the active layer, a ridge portion provided on the p-type semiconductor layer, a p-type semiconductor layer and an upper electrode provided on the ridge portion.

K. Takagi et al., “120 ℃ 10-Gb / s Uncooled Direct Modulated 1.3-μm AlGaInAs MQW DFB Laser Diodes”, IEEE Photnics Technology Letters, November 2004, Vol. 16, No. 11, pp. 241-2417

  The upper electrode of the laser diode described in Non-Patent Document 1 is provided on the upper surface and both side surfaces of the ridge portion and on the p-type semiconductor layer. For this reason, the upper electrode on the p-type semiconductor layer is capacitively coupled to the semiconductor layer in the laser diode to form a large parasitic capacitor.

  Therefore, an object of the present invention is to provide a semiconductor laser that has good heat dissipation and can reduce parasitic capacitance.

  The semiconductor laser of the present invention is provided on a first conductive type semiconductor layer, an active layer provided on the semiconductor layer, a first semiconductor part having an upper surface and a pair of side surfaces, and a main surface of the active layer. A second conductivity type semiconductor region including the second semiconductor portion; and an insulator layer having a first portion provided on one side surface of the pair of side surfaces of the first semiconductor portion; An electrode provided on the upper surface of the first semiconductor portion and electrically connected to the first semiconductor portion, and a metal provided on the first portion of the insulator layer, spaced from the electrode A layer, and the upper surface and the pair of side surfaces of the first semiconductor portion extend in a direction of a predetermined axis, and the second semiconductor portion extends along the main surface of the active layer. Having a first region, a second region, and a third region arranged in order in a direction crossing the direction of the axis of It said first semiconductor portion is provided on the second region, characterized in that.

  In this semiconductor laser, a metal layer is provided on one side surface of the pair of side surfaces of the first semiconductor portion. For this reason, the heat generated by the semiconductor laser propagates from the first semiconductor portion to the metal layer and is radiated from the surface of the metal layer. Moreover, since the metal layer is spaced apart from the electrode, it is electrically insulated from the electrode and is in a floating state. Although the semiconductor laser includes a capacitor composed of a metal layer and a semiconductor region in the semiconductor laser, the capacitor does not charge / discharge during the operation of the semiconductor laser. Therefore, according to this semiconductor laser, it has good heat dissipation and can reduce parasitic capacitance.

  The semiconductor laser of the present invention further includes a resin body provided on the other side surface of the pair of side surfaces of the first semiconductor portion and the third region, and the electrode is provided on the resin body. It is preferable that In this case, an increase in parasitic capacitance can be suppressed by configuring the resin body with a resin having a relatively low dielectric constant.

  In the semiconductor laser of the present invention, it is preferable that the resin body is made of at least one of a polyimide resin and a benzocyclobutene resin.

  In the semiconductor laser according to the aspect of the invention, the insulator layer further includes a second portion provided on the first region of the second semiconductor portion, and the metal layer includes the second portion of the insulator layer. 2 is preferably provided on the second portion. In this case, the metal layer is further provided on the first region of the second semiconductor unit in addition to the one side surface of the first semiconductor unit. For this reason, the heat generated by the semiconductor laser is also radiated from the surface of the metal layer on the first region. Therefore, this semiconductor laser has better heat dissipation.

In the semiconductor laser according to the aspect of the invention, the upper surface of the first semiconductor portion includes first and second areas sequentially arranged in a direction from the one side surface to the other side surface, and the insulator layer Further includes a third portion provided on the first area of the upper surface of the first semiconductor portion and in contact with the first portion, and the insulator layer is provided on the second area. The metal layer is provided on the third portion of the insulator layer, and the electrode contacts the first semiconductor portion through the opening of the insulator layer. The electrode is provided on the third portion of the insulator layer, and the electrode is separated from the metal layer on the third portion of the insulator layer . In this case, the metal layer is spaced apart from the electrode on the third portion of the insulator layer. For this reason, according to this semiconductor laser, it can suppress that the upper surface of a 1st semiconductor part is exposed.

According to the present invention, it is possible to provide a semiconductor laser that has good heat dissipation and can reduce parasitic capacitance.

1 is a perspective view of a semiconductor laser according to an embodiment. It is a figure which shows the semiconductor laser shown by FIG. It is a figure which shows the main processes in the manufacturing method of the semiconductor laser which concerns on an Example. It is a figure which shows the main processes in the manufacturing method of the semiconductor laser which concerns on an Example. It is a figure which shows the semiconductor laser which concerns on an Example, and the conventional semiconductor laser.

  The knowledge of the present invention can be easily understood by considering the following detailed description with reference to the accompanying drawings shown as examples. Subsequently, embodiments of the semiconductor laser according to the present invention will be described with reference to the accompanying drawings. Where possible, the same parts are denoted by the same reference numerals.

  FIG. 1 is a perspective view showing a semiconductor laser according to the present embodiment. In FIG. 1, an orthogonal coordinate system S is shown. Referring to FIG. 1, a semiconductor laser 1 includes a lower electrode 3, a first conductivity type (for example, n-type) semiconductor substrate 5, a first conductivity type semiconductor layer 7, an active layer 9, and a second conductivity type. (For example, p-type) carrier stop layer 11, second conductivity type semiconductor region 12, diffraction grating 15, insulator layer 17, upper electrode 21, metal layer 23, and resin body 25. The semiconductor region 12 includes a spacer layer (second semiconductor portion) 13 and a ridge portion (first semiconductor portion) 19. The semiconductor laser 1 is a ridge type semiconductor laser element.

  2A is a plan view showing the semiconductor laser 1 shown in FIG. 1, and FIG. 2B is a cross-sectional view showing the semiconductor laser 1 taken along the line II in FIG. 2C is a cross-sectional view showing the semiconductor laser 1 taken along the line II-II in FIG. FIG. 2 shows an orthogonal coordinate system S. Referring to FIG. 2, the lower electrode 3 is provided on the back surface 5 a of the semiconductor substrate 5. The lower electrode 3 is made of, for example, AuGeNi / Au and has a thickness of about 150/300 nm, for example. The semiconductor substrate 5 is made of n-type InP doped with, for example, Si, and has a thickness of about 100 μm, for example.

  The semiconductor layer 7 is provided on the semiconductor substrate 5. The semiconductor layer 7 functions as, for example, a first conductivity type cladding layer. The semiconductor layer 7 is made of, for example, n-type InP doped with Si, and has a thickness of about 100 nm, for example. The active layer 9 is provided on the semiconductor layer 7. The active layer 9 can have a quantum well structure, for example. The active layer 9 is made of, for example, AlGaInAs, and its thickness is, for example, seven periods of a quantum well layer of 7 nm and a barrier layer of 10 nm.

  The carrier stop layer 11 is provided on the main surface 9 a of the active layer 9. The carrier stop layer 11 reduces the overflow of carriers from the active layer 9 toward the ridge portion 19. The carrier stop layer 11 is made of a second conductivity type semiconductor layer, and is made of, for example, p-type AlInAs doped with Zn. The thickness of the carrier stop layer 11 is, for example, about 50 nm.

  The spacer layer 13 is provided on the carrier stop layer 11. The spacer layer 13 has a first region 13a, a second region 13b, and a third region 13c. The first region 13a, the second region 13b, and the third region 13c are sequentially arranged along the main surface 9a of the active layer 9 (along the z-axis direction). The spacer layer 13 is made of a second conductivity type semiconductor and functions as a cladding layer. The spacer layer 13 is made of, for example, p-type InP doped with Zn and has a thickness of, for example, about 50 nm.

  The diffraction grating layer 15 is provided on the spacer layer 13 and has a periodic structure extending in the x-axis direction. The diffraction grating layer 15 is between the spacer layer 13 and the ridge portion 19, and the refractive index thereof is different from the refractive indexes of the spacer layer 13 and the ridge portion 19. The period of the diffraction grating layer 15 defines the wavelength of the laser light from the active layer 9. The diffraction grating 15 is made of, for example, p-type GaInAsP doped with Zn and has a thickness of, for example, about 30 nm.

  The ridge portion 19 is provided on the second region 13 b of the spacer layer 13. The ridge portion 19 has an upper surface 19c and a pair of side surfaces 19a and 19b. The upper surface 19c and the pair of side surfaces 19a, 19b extend in the x-axis direction (predetermined direction). The top surface 19c of the ridge portion 19 has a first area 19d and a second area 19e. The first area 19d and the second area 19e are sequentially arranged in the direction from the side surface 19a to the side surface 19b (z-axis direction). Each of the first area 19d and the second area 19e extends in the x-axis direction and has, for example, a stripe structure. The ridge portion 19 is made of, for example, Zn-doped p-type InP, and has a width W of, for example, about 1.5 μm and a height H of, for example, about 2 μm.

The insulator layer 17 has a first portion 17a, a second portion 17b, and a third portion 17c. The first portion 17 a is provided on the side surface 19 a of the ridge portion 19. The second portion 17 b is provided on the first region 13 a of the spacer layer 13. The third portion 17 c is provided on the first area 19 d of the upper surface 19 c of the ridge portion 19. The first portion 17a is in contact with the second portion 17b and the third portion 17c. The third portion 17 c of the insulator layer 17 has an opening 17 d provided on the second area 19 e on the upper surface 19 c of the ridge portion 19. The opening 17d is defined by the edge 17e and the edge 17f of the insulator layer 17. The opening 17d has a stripe shape extending in the x-axis direction. The insulator layer 17 includes a fourth portion 17 g, and the fourth portion 17 g is provided on the side surface 19 b of the ridge portion 19 and the third region 13 c of the spacer layer 13. In the semiconductor laser 1, the insulator layer 17 covers the surface of the ridge portion 19 and the surface of the spacer layer 13 except for the opening 17 d. The insulator layer 17 is made of, for example, SiO ₂ and has a thickness of about 500 nm, for example.

  The resin body 25 is provided on the side surface 19 b of the ridge portion 19 and the third region 13 c of the spacer layer 13. The resin body 25 covers the surface of the fourth portion 17g of the insulating layer 17. The resin body 25 is preferably composed of at least one of a polyimide resin and a benzocyclobutene resin, for example.

  The upper electrode 21 is provided on the second area 19 e of the upper surface 19 c of the ridge portion 19, the third portion 17 c of the insulator layer 17, and the resin body 25. The upper electrode 21 is in contact with the ridge portion 19 through the opening 17d of the insulator layer 17, and is electrically connected to the ridge portion 19 by this contact. The upper electrode 21 includes a stripe portion 21a having a stripe shape extending in the x-axis direction and a pad portion 21b provided adjacent to the stripe portion 21a. The upper electrode 21 is made of, for example, Ti / Pt / Au and has a thickness of about 50/50/300 nm, for example.

  The metal layer 23 is provided on the first portion 17a, the second portion 17b, and the third portion 17c of the insulator layer 17. The metal layer 23 is spaced apart from the upper electrode 21. Specifically, the metal layer 23 is spaced apart from the upper electrode 21 on the third portion 17 c of the insulator layer 17. Therefore, the metal layer 23 is electrically insulated from the upper electrode 21 and is in a floating state. The metal layer 23 is made of, for example, Ti / Pt / Au and has a thickness of about 2000 nm.

  In the semiconductor laser 1 according to the present embodiment, the metal layer 23 is provided on the side surface 19 a of the ridge portion 19 and the first region 13 a of the spacer layer 13. Therefore, the heat generated by the semiconductor laser 1 propagates from the ridge portion 19 and the spacer layer 13 to the metal layer 23 and is radiated from the surface of the metal layer 23. Further, since the metal layer 23 is spaced apart from the upper electrode 21, it is electrically insulated from the upper electrode 21, and is therefore in a floating state. Therefore, although the semiconductor laser 1 includes a capacitor constituted by the metal layer 23 and the semiconductor region in the semiconductor laser 1, this capacitor does not charge / discharge during the operation of the semiconductor laser 1. Therefore, according to this semiconductor laser 1, it is possible to reduce the parasitic capacitance while having good heat dissipation.

Further, the semiconductor laser 1 has a resin body 25 in a partial region between the upper electrode 21 and the semiconductor layer 7. For this reason, the space | interval of the upper electrode 21 and the semiconductor layer 7 can be taken comparatively large. Therefore, in the semiconductor laser 1, when the resin body 25 is made of a resin having a lower dielectric constant than that of an insulator made of SiO ₂ or the like, the parasitic capacitance caused by the electrostatic coupling between the upper electrode 21 and the semiconductor layer 7. Can be suppressed.

  Further, in the semiconductor laser 1, the upper surface 19c of the ridge portion 19 has a first area 19d and a second area 19e, and the third portion 17c of the insulator layer 17 is the first area. It is provided on 19d and contacts the first portion 17a. Furthermore, the opening 17d of the insulator layer 17 is provided on the second area 19e, and the upper electrode 21 is in contact with the ridge portion 19 through the opening 17d. The metal layer 23 and the upper electrode 21 are provided on the third portion 17c of the insulator layer 17, and the metal layer 23 and the upper electrode 21 are spaced apart from each other on the third portion 17c. ing. According to this structure, exposure of the upper surface 19c of the ridge portion 19 can be suppressed.

Reference letter _{S 1} designates a indicates the center of the opening 17d with respect to the z-axis direction. The reference letter _{S 2} designates indicates the center of the upper surface 19c of the ridge 19 about the z-axis direction. Center _{S 1} of the opening 17d of the insulator layer 17, on the upper surface 19c of the ridge portion 19 is located biased to the side surface 19b side with respect to the center _{S 2} of the upper surface 19c. In addition, the third portion 17 c of the insulator layer 17 can have a first region 17 h and a second region 17 i extending in the x-axis direction on the upper surface 19 c of the ridge portion 19. The first region 17h and the second region 17i include an edge 17e and an edge 17f, respectively, and the first region 17h and the second region 17i define an opening 17d. The first region 17h and the second region 17i, respectively, have a first width _{W 1} and the second width _{W 2} which is defined in the z-axis direction, the first width _{W 1} and the second greater than the width _{W 2} of _{(0 ≦ W 2 <W 1} ). With this structure, it is possible to easily separate the upper electrode 21 and the metal layer 23 on the third portion 17 c of the insulator layer 17.

  The thickness of the metal layer 23 is preferably larger than the thickness of the upper electrode 21. Specifically, the thickness of the metal layer 23 is preferably 100 nm or more. By configuring the relatively thick metal layer 23, the semiconductor laser 1 can have better heat dissipation.

(Example)
Next, a method for manufacturing the semiconductor laser 100 according to the present embodiment will be described with reference to FIGS. 3 and 4 show an orthogonal coordinate system S. In each of the following layers, Si is used as the n-type dopant, and Zn is used as the p-type dopant. In addition, for example, a metal organic vapor phase epitaxial growth method can be used for the growth of each layer described below. First, an n-type InP substrate 105 having a thickness of about 350 μm is prepared. In step S101, an n-type InP buffer layer 107 having a thickness of 100 nm, an AlGaInAs active layer 109 in which a quantum well layer having a thickness of 7 nm and a barrier layer having a thickness of 10 nm are stacked for seven periods, and a p-type AlInAs carrier stop having a thickness of 50 nm. An n-type InP substrate, a p-type InP spacer layer 113 having a thickness of 50 nm, a p-type GaInAsP diffraction grating layer having a thickness of 30 nm (hereinafter referred to as a diffraction grating 115), and a p-type InP cover layer having a thickness of 30 nm. It grows on top 105 sequentially. After applying a resist on the main surface of the p-type InP cover layer, the diffraction grating pattern is transferred to the resist by interference exposure to form a mask. The p-type InP cover layer and the p-type GaInAsP diffraction grating layer are etched by dry etching to form the diffraction grating 115 on the p-type InP spacer layer 113. Then, after the resist remaining on the main surface of the p-type InP cover layer is peeled off, a p-type InP clad layer 117 having a thickness of about 2 μm is grown as shown in FIG.

The p-type InP spacer layer 113 includes a first region 113a, a second region 113b, and a third region 113c that are sequentially arranged in the z-axis direction. In step S102, an etching mask is formed on the p-type InP cladding layer 117. The etching mask covers the second region 113b and has openings in the first region 113a and the third region 113c. Using this etching mask, the p-type InP cladding layer 117 on the first region 113a and the third region 113b of the p-type InP spacer layer 113 is etched by a dry etching method to form a ridge portion 119. The ridge portion 119 has a width W ₁₀₀ of about 1.5 μm, for example, and a height H ₁₀₀ of about 2 μm, for example. The ridge portion 119 has an upper surface 119c and a pair of side surfaces 119a and 119b. As shown in FIG. 3B, an insulator layer 121 is formed on the ridge portion 119 and the p-type InP spacer layer 113. The insulator layer 121 is provided on the upper surface 119c and the pair of side surfaces 119a and 119b of the ridge portion 119, and on the first region 113a and the third region 113b of the p-type InP spacer layer 113. The insulator layer 121 is made of, for example, SiO ₂ and has a thickness of about 500 nm, for example. For the formation of the insulator layer 121, for example, a chemical vapor deposition method can be used. The upper surface 119c of the ridge portion 119 includes a first area 119d and a second area 119e that are sequentially arranged in the z-axis direction.

  Subsequently, in step S103, a resin body 123 is formed on the insulator layer 121 as shown in FIG. The resin body 123 is made of, for example, a polyimide resin and a benzocyclobutene resin.

  Subsequently, in step S104, the resin body 123 is uniformly etched by a dry etching method. At this time, dry etching is performed until the portion of the insulator layer 121 on the second region 113b of the p-type InP spacer layer 113 (on the upper surface 119c of the ridge 119) is exposed. Thereafter, an etching mask is formed on the upper surface 119c of the ridge 119 and the third region of the p-type InP spacer layer 113. By performing dry etching using this etching mask, a portion of the resin body 123 on the first region 113a of the p-type InP spacer layer 113 is removed. The etching mask is removed to expose a portion on the upper surface 119c of the ridge portion 119 of the insulator layer 121. A portion of the top surface 119c of the ridge portion 119 of the insulator layer 121 on the second area 119e is removed by wet etching, and as shown in FIG. 4A, the second area 119e of the top surface 119a of the ridge portion 119 is removed. To expose.

  The insulator layer 121 includes a first portion 121a, a second portion 121b, a third portion, and a fourth portion 121d. The first portion 121 a is provided on the side surface 119 a of the ridge portion 119. The second portion 121b is provided on the first region 113a of the p-type InP spacer layer 113. The third portion 121c is provided on the first area 119d of the upper surface 119c of the ridge portion 119. The fourth portion is provided on the side surface 119b of the ridge portion 119 and the third region 113c of the p-type InP spacer layer 113.

  In step S105, a predetermined pattern is formed by a resist, Ti / Pt / Au is deposited, and then unnecessary portions are removed by lift-off. The predetermined pattern includes a stripe-shaped pattern extending in the x-axis direction on the third portion 121c of the insulator layer 121. The n-type InP substrate 105 is polished from the back surface 105a side until the thickness reaches about 100 μm. After polishing, a lower electrode 129 is formed on the back surface 105a of the n-type InP substrate 105. By these steps, as shown in FIG. 4B, the upper electrode 125, the metal layer 127, and the lower electrode 129 are formed. The upper electrode 125 and the metal layer 127 are spaced apart from each other on the third portion 121 c of the insulator layer 121. The thickness of the upper electrode and the metal layer 127 is about 400 nm. The lower electrode 129 is made of AuGeNi / Au and has a thickness of 150/300 nm, for example.

  In step S106, the metal layer 127 is plated to form a metal layer 131 having a thickness of about 2 μm as shown in FIG. The metal layer 131 is made of, for example, gold. Through the above steps, the semiconductor laser 100 according to the present embodiment is manufactured.

The measurement results of DC and AC characteristics of this semiconductor laser 100 at 85 ° C. are as follows:
Oscillation threshold current: 23 mA
Thermal resistance: 100K / W
Maximum light output: 30mW
3 dB band: 20 GHz
Met. On the other hand, the measurement results of the DC and AC characteristics at 85 ° C. of the conventional semiconductor laser 200 shown in FIG.
Oscillation threshold current: 23 mA
Thermal resistance: 150K / W
Maximum light output: 24mW
3 dB band: 12 GHz
Met. Here, referring to FIG. 5B, the conventional semiconductor laser 200 has an insulator layer 221 instead of the insulator layer 121 of the semiconductor laser 100. The semiconductor laser 200 has an upper electrode 225 instead of the upper electrode 125 of the semiconductor laser 100. Further, the semiconductor laser 200 does not have the metal layer 131 and the resin body 123 of the semiconductor laser 100. Other configurations of the semiconductor laser 200 are the same as those of the semiconductor laser 100. In the semiconductor laser 200, the metal layer 225 is provided so as to cover the surface of the ridge portion 119 and the insulator layer 221. According to the above measurement results, the semiconductor laser 100 does not change the oscillation threshold current as compared with the conventional semiconductor laser, but the thermal resistance is greatly reduced. For this reason, the semiconductor laser 100 has an improved maximum light output compared to the conventional semiconductor laser. This is because the metal layers (metal layer 127 and metal layer 131) in the semiconductor laser 100 are thicker than the upper electrode 225 in the semiconductor laser 200, so that the semiconductor laser 100 has excellent heat dissipation compared to the semiconductor laser 200. It is thought that this is because.

In the semiconductor laser 100, the metal layers 127 and 131 are in a floating state. Therefore, although the semiconductor laser 100 includes a capacitor constituted by the metal layers 127 and 131 and the semiconductor region in the semiconductor laser 100, the capacitor does not charge / discharge during the operation of the semiconductor laser 100. Therefore, during operation of the semiconductor laser 100, only the parasitic capacitor C ₁ by the upper electrode 125 is charged and discharged. In contrast, in the semiconductor laser 200, the parasitic capacitor C ₂ by the entire upper electrode 225 provided so as to cover the ridge portion 119 and the region around its charged and discharged. Therefore, the parasitic capacitance of the semiconductor laser 100 is smaller than the parasitic capacitance of the semiconductor laser 200. Therefore, it is considered that the semiconductor laser 100 has a better 3 dB band than the semiconductor laser 200.

  While the principles of the invention have been illustrated and described in the preferred embodiments, it will be appreciated by those skilled in the art that the invention can be modified in arrangement and detail without departing from such principles. The present invention is not limited to the specific configuration disclosed in the present embodiment. We therefore claim all modifications and changes that come within the scope and spirit of the following claims.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor laser, 7 ... Semiconductor layer, 9 ... Active layer, 12 ... Semiconductor region, 13 ... Spacer layer, 13a ... First region, 13b ... Second region, 13c ... Third region, 17 ... Insulator layer, 17a ... 1st part, 17b ... 2nd part, 17c ... 3rd part, 19 ... Ridge part, 19a, 19b ... Side surface, 19c ... Upper surface, 19d ... 1st area, 19e ... 2nd area, 21 ... top electrode.

Claims (4)

A first conductivity type semiconductor layer;
An active layer provided on the semiconductor layer;
A semiconductor region of a second conductivity type including a first semiconductor portion having an upper surface and a pair of side surfaces and a second semiconductor portion provided on the main surface of the active layer;
An insulator layer having a first portion provided on one side surface of the pair of side surfaces of the first semiconductor portion;
An electrode provided on the upper surface of the first semiconductor part and electrically connected to the first semiconductor part;
A metal layer spaced from the electrode and provided on the first portion of the insulator layer,
The upper surface and the pair of side surfaces of the first semiconductor part extend in a direction of a predetermined axis,
The second semiconductor unit includes a first region, a second region, and a third region that are sequentially arranged in a direction intersecting the direction of the predetermined axis along the main surface of the active layer, The semiconductor part is provided on the second region ,
The upper surface of the first semiconductor part has first and second areas arranged in order in a direction from the one side surface to the other side surface,
The insulator layer further includes a third portion provided on the first area of the upper surface of the first semiconductor portion and in contact with the first portion,
The insulator layer has an opening provided on the second area;
The metal layer is provided on the third portion of the insulator layer;
The electrode is in contact with the first semiconductor part through the opening of the insulator layer,
The electrode is provided on the third portion of the insulator layer;
The electrode is spaced apart from the metal layer on the third portion of the insulator layer;
A semiconductor laser characterized by the above. A resin body provided on the other side surface of the pair of side surfaces of the first semiconductor part and the third region;
The electrode is provided on the resin body,
The semiconductor laser according to claim 1. The resin body is made of at least one of a polyimide resin and a benzocyclobutene resin.
The semiconductor laser according to claim 2. The insulator layer further includes a second portion provided on the first region of the second semiconductor portion,
The metal layer is provided on the second portion of the insulator layer;
The semiconductor laser according to any one of claims 1 to 3, wherein:

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