JP5297310B2 - 単一のｓａｓエクスパンダとして動作する複数のｓａｓエクスパンダのためにパスフェールオーバーを提供するための方法、システム、及び、コンピュータ可読媒体 - Google Patents

単一のｓａｓエクスパンダとして動作する複数のｓａｓエクスパンダのためにパスフェールオーバーを提供するための方法、システム、及び、コンピュータ可読媒体 Download PDF

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JP5297310B2
JP5297310B2 JP2009204928A JP2009204928A JP5297310B2 JP 5297310 B2 JP5297310 B2 JP 5297310B2 JP 2009204928 A JP2009204928 A JP 2009204928A JP 2009204928 A JP2009204928 A JP 2009204928A JP 5297310 B2 JP5297310 B2 JP 5297310B2
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sas
sas expander
expander
link
physical port
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JP2010061664A (ja
JP2010061664A5 (enExample
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クリストファー・マッカーティ
スティーブン・ビー．・ジョンソン
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LSI Corp
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LSI Logic Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G06F11/201—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
JP2009204928A 2008-09-05 2009-09-04 単一のｓａｓエクスパンダとして動作する複数のｓａｓエクスパンダのためにパスフェールオーバーを提供するための方法、システム、及び、コンピュータ可読媒体 Expired - Fee Related JP5297310B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US19103708P 2008-09-05 2008-09-05
US61/191,037 2008-09-05
US12/384,291 US8077605B2 (en) 2008-09-05 2009-04-02 Method for providing path failover for multiple SAS expanders operating as a single SAS expander
US12/384,291 2009-04-02

Publications (3)

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JP2010061664A JP2010061664A (ja) 2010-03-18
JP2010061664A5 JP2010061664A5 (enExample) 2010-04-30
JP5297310B2 true JP5297310B2 (ja) 2013-09-25

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JP2009204928A Expired - Fee Related JP5297310B2 (ja) 2008-09-05 2009-09-04 単一のｓａｓエクスパンダとして動作する複数のｓａｓエクスパンダのためにパスフェールオーバーを提供するための方法、システム、及び、コンピュータ可読媒体

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Country Link
US (1) US8077605B2 (enExample)
EP (1) EP2163996A1 (enExample)
JP (1) JP5297310B2 (enExample)
KR (1) KR101043548B1 (enExample)
CN (1) CN101719049A (enExample)
TW (1) TWI439865B (enExample)

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Also Published As

Publication number Publication date
JP2010061664A (ja) 2010-03-18
CN101719049A (zh) 2010-06-02
US20100064086A1 (en) 2010-03-11
US8077605B2 (en) 2011-12-13
TWI439865B (zh) 2014-06-01
EP2163996A1 (en) 2010-03-17
KR20100029015A (ko) 2010-03-15
TW201013411A (en) 2010-04-01
KR101043548B1 (ko) 2011-06-21

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