JP5270817B2 - Method for processing a semiconductor member having a three-dimensional shape - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable a three-dimensionally shaped semiconductor member to be processed at as low costs as possible. <P>SOLUTION: The method comprises the steps of: forming a plateau portion on the semiconductor member that has a projection; selectively coating the plateau portion with a self-organizing material or a solution thereof to form a self-organizing material film; creating a latent image in a self-organizing manner on the self-organizing material film; developing the latent image by etching to form a pattern of the self-organizing material film; and processing the semiconductor member using the pattern as a mask. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

The present invention relates to how to process a semiconductor member having a three-dimensional shape.

  Conventionally, in the manufacture of semiconductor components such as logic and memory, a desired layer is formed on a flat substrate such as silicon by oxidation or deposition, and a desired shape is formed using a resist, an exposure apparatus, etching or doping. A so-called semiconductor lithography technique for forming a pattern on (electrode or wiring) has been used. Many of the basic structural units of these semiconductor components use transistors, and it is fundamental to form an accompanying circuit with the three electrodes of the source, gate, and drain using the above method. .

  On the other hand, as represented by VLSI, in order to meet the demand for higher speed and higher density, as the dimensions required for transistors have become finer, the light source for processing has been increasingly shortened in wavelength. Yes. For example, miniaturization of a processing dimension up to about several tens of nanometers has been achieved using lithography using a halogen-based gas laser or light in the EUV region. However, the shortening of the wavelength of these light sources and the miniaturization of the processing dimensions in each process increase the process cost and the equipment cost, and the possibility that “the cost as a product is very high even if it can be processed” has increased. ing. In particular, the manufacturing cost is expected to increase logarithmically from the processing size of around 30 nm, which requires a reflection optical system and a vacuum device such as an electron beam. For this reason, there is a movement to increase the density of devices by making the conventional two-dimensional device structure three-dimensional (see, for example, Non-Patent Document 1). However, since these devices are basically produced by stacking planar lithography, there are few cost advantages and it is extremely difficult to process a three-dimensional structure.

  On the other hand, as a simple pattern forming method replacing the conventional lithography process, a method using a microphase separation film formed in a self-organized manner such as a block copolymer or a graft copolymer is known. (For example, refer nonpatent literature 2). In this method, first, a microphase separation film is formed on a substrate, and a specific phase of the microphase separation structure is selectively removed to form a porous film. The microphase separation structure is transferred to the substrate using the obtained porous film as an etching mask. Thereby, a fine pattern is formed. Such a pattern forming method is simple, low cost, and can form a fine pattern of about several tens of nanometers.

  However, it is difficult to form a desired shape such as a transistor electrode by this method. This is because the pattern to be generated can usually form a dot or line pattern, but position control on the substrate is difficult. Therefore, as a method for controlling the positions of these patterns, a method has been devised in which grooves are formed around the self-organized patterns to serve as guides for aligning the patterns and the patterns are arranged. (For example, refer to Patent Document 1). However, when these methods are used, a pattern that serves as an array guide is basically formed by planar lithography or nanoimprinting, and therefore can basically be applied only to planar processing. For this reason, it is difficult to process a semiconductor having a three-dimensional shape such as unevenness.

On the other hand, in recent years, MEMS (Micro Electro Mechanical Systems) multi-probe memory media has attracted attention. As an example, “Millipede” developed by IBM is known (for example, see Non-Patent Document 3). This is a memory for thermally recording on a medium made of an organic polymer material, and signal reproduction is performed by detecting a change in resistance of a cantilever resistor caused by the presence or absence of recording. It is assumed that 1000 cantilevers are installed in one chip and these are processed in parallel at the same time. One batch of chips is produced. In terms of recording density, 1.14 Tbits / in ² that far exceeds the level of HDDs has already been demonstrated, but the transfer speed is very slow, about 1/10 or less compared with current HDDs. .
Nikkei Microdevice April 2005 issue no. 238, pp60 Miri Park, Christopher Harrison, Paul M. Charkin, Ric hard, A. Register, Douglas H. Adamson, SCIENCE VOL.276 30 / MAY 1997, p1401-1404 JP 2003-155365 A P. Vettiger, G. Cross, M. Despont, U. Drecher, U. During, B. Gotsmann, W. Haberle, WMA Lantz, HERothuien, R. Stuzs and GKBinning, IEEE Trans. Nanotechnol. Vol. 1, No. 1 March 2002, p39-55

  As described above, with the conventional technology, it has been difficult to form or process a semiconductor member having a three-dimensional shape as inexpensively as possible.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a method capable of processing a semiconductor member having a three-dimensional shape as inexpensively as possible.

A method of processing a semiconductor member having a three-dimensional shape according to one embodiment of the present invention forms a plateau portion having flatness on a top surface of a protrusion provided on a semiconductor member and planarly independent from adjacent semiconductor portions. A step of selectively applying a self-organizing material or a solution thereof along the shape of the plateau part to form a self-organizing material film, and referring to an end of the shape of the plateau part. A step of self-organizing a latent image on the self-organizing material film; a step of developing the latent image by etching to form a pattern of the self-organizing material film; and processing the semiconductor member using the pattern as a mask. a step of, before forming the self-organizing material film, the periphery of said plateau portion, a step of coating with a film having the self-organizing material or a contact angle of 60 degrees or more with respect to the solution, Provided, wherein the self-assembled material is a di-block copolymer or graft copolymer.

A transistor according to a reference example of the present invention includes a source and a drain formed in the plateau portion using the above method.

  According to the present invention, a semiconductor member having a three-dimensional shape can be processed as inexpensively as possible.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a procedure of a method for processing a semiconductor member having a three-dimensional shape according to an embodiment of the present invention. First, the processing method of this embodiment includes a step of forming a plateau portion on a semiconductor member having a three-dimensional shape formed on a substrate (step S1), and a self-organizing material or this self-organizing material on the plateau portion. A step of forming a self-assembling material film by applying a solution containing (step S2), a step of forming 1 to 10 latent images on the self-assembling material film (step S3), and etching the latent image And a step of forming a pattern having an opening on the self-organizing material film (step S4) and a step of processing the semiconductor member using the opening of the pattern (step S5). ing.

  Here, the plateau portion refers to a portion having flatness and planarly independent from other adjacent semiconductor portions. Such a plateau part is not necessarily parallel to the substrate surface as long as it is a plane having a finite width that can substantially hold the material to be applied. In an extreme case, it may be perpendicular to the substrate surface. Such a plateau portion is desirably a flat surface sufficient to apply or hold the self-organizing material to be subsequently applied, but may have a slight uneven shape that does not allow the liquid to slide down. Preferably, it is as flat as possible or has a slightly concave structure.

  It is important that the plateau part has affinity for the self-organizing material to be applied or a solution thereof and can be loaded with a liquid. For that purpose, it is desirable that the contact angle at the time of application of the plateau part and the self-organizing material or the solution thereof is at least 30 degrees or less. In order to adjust the contact angle, it is generally used to oxidize the surface of the plateau part by plasma treatment, UV treatment, oxidation with chemicals such as hydrogen peroxide and acid, or ozone treatment. it can. Furthermore, this can be improved by applying a very thin surfactant layer. Furthermore, it is also possible to adjust the hydrophilicity by changing the solvent to which the self-assembling material is applied.

  In order to form such a plateau portion, a general lithographic technique can be used. The typical size of the plateau part formed here is about 1 to 10 patterns of several nanometers to several tens of nanometers generated therein, and from the viewpoint of creating electrodes on the same plateau by combining these, Those having a size of 200 nm to 20 nm can be suitably used, those having a size of 200 nm to 100 nm are subjected to KrF exposure, those having a size of 100 nm to 30 nm are subjected to ArF exposure, and those having a size of 50 nm to 20 nm are subjected to EUV or EB exposure. The used lithography or the like can be used. Among these, the size that can be processed by laser exposure, which is relatively low in exposure equipment cost, is desirable to be effective using this method. Alternatively, when a semiconductor substrate is doped with ions and the other portion is dissolved with a basic etching solution, a pyramid-shaped three-dimensional structure can be formed with the doped portion as a flat surface. This is preferably used for processing a needle tip or the like.

  Such a plateau part is not necessarily limited to the tip part of the structure as long as the liquid is held, but may be any part such as a flat structure in the middle part of the three-dimensional structure, a wall surface, or the bottom surface of the structure.

  In an extreme case, the plateau portion is perpendicular to the substrate surface. In such a case, a formation method such as a trench formed by normal semiconductor lithography can be preferably used.

  As for the self-organizing material or its application to such a structure, a dipping method, a soft print method, a transfer stamp method, an ink jet method, a droplet adsorption transfer method using a cantilever, a vapor deposition method, and the like can be given. In particular, for a substrate having a severe three-dimensional undulation shape, a dipping method, a transfer method by a soft print method, a transfer stamp method, or the like is preferably used in the case of a two-dimensional shape with slight irregularities, inclined portions, wall surfaces, and the like.

  Usually, when γ is the surface tension, for example, the surface tension of the liquid adhering to the plateau portion having a radius r is represented by 2πrγ. On the other hand, when the plateau portion is turned upside down, it is expressed by gravity (1/3) π (rh) 2 (2rh) ρg applied to the held liquid. Here, h is the height of the liquid surface, ρ is the density of the liquid, and g is the acceleration of gravity. In ordinary organic matter and water, the density is 0.7 to 1.3, and the general surface tension of the solution is about 15 mN / m to 70 mN / m. For this reason, if a liquid that can wet the surface of the plateau part (contact angle less than 90 degrees) is used, the liquid can be sufficiently retained once the fine plateau part having a size of about 100 nm to 10 nm can be adhered. However, at this time, if there is a similar plateau portion in the vicinity, the droplets are combined and a desired film cannot be formed. Therefore, when applying by the dipping method, it is desirable that the distance between the plateau portions is as far as possible, and more specifically, it is desirable that there is an interval larger than the size of the plateau portion. Further, the finer the plateau portion, the smaller the surface tension (for example, alcohols), and it is more desirable that partial coating is performed.

  In the partial application, a soft print method, a transfer stamp method, an ink jet method, a droplet transfer method using a cantilever, or the like is preferably used in order to prevent bonding between the droplets. In particular, when applying to a wall surface, a soft print method is preferably used.

  The soft print method is a method in which a self-organizing material is applied to a flexible transfer medium obtained by polymerizing dimethylsiloxane, and transferred onto a target substrate surface or plateau part. This is preferable when the uneven structure is severe.

  The viscosity of the solution suitably used in such a self-assembled material or a solution thereof is preferably 0.1 mPa · s to several mPa · s in the case of direct application such as dipping method or ink jet method, and soft print In the case of using transfer such as a transfer stamp method or a transfer stamp method, it is preferably several mPa · s to 100 mPa · s. However, if the solution having a relatively high viscosity has a high quick-drying property after coating, the formed film thickness becomes non-uniform. Therefore, a more uniform film can be formed by applying a solvent having a relatively high boiling point, which is desirable.

  The coating solvent in such a self-assembled material usually has a boiling point of 100 ° C. or higher, more preferably 150 ° C. or higher, and a certain degree of time until drying. This is because if the time to drying is too early, the film quality will not be uniform, and if the time to drying is too long, the film thickness of a specific part tends to be non-uniform. Specifically, examples of such solvents include ketone solvents such as cyclohexanone, acetone, methyl ethyl ketone, and methyl isobutyl ketone, cellosolv solvents such as methyl cellolbu, methyl cellosolve acetate, ethyl cellosolve acetate, and butyl cellosolve acetate, ethyl acetate, butyl acetate, and acetic acid. Ester solvents such as isoamyl and γ-butyrolactone, glycol solvents such as propylene glycol monomethyl ether acetate, nitrogen-containing solvents such as dimethyl sulfoxide, hexamethylphosphoric triamide dimethylformamide, N-methylpyrrolidone, and improved solubility Therefore, a mixed solvent obtained by adding dimethyl sulfoxide dimethylformaldehyde, N-methylpyrrolidinone, or the like to these can be used. Further, propionic acid derivatives such as methyl methyl propionate, lactic acid esters such as ethyl lactate, PGMEA (propylene glycol monoethyl acetate) and the like are low in toxicity and can be preferably used. In the present embodiment, such solvents can be used alone or in combination of two or more, and isopropyl alcohol, ethyl alcohol, methyl alcohol, butyl alcohol, n-butyl alcohol, s-butyl alcohol, t -An aliphatic solvent such as butyl alcohol or isobutyl alcohol, or an aromatic solvent such as toluene or xylene may be contained.

  The concentration of the self-assembling material in such a solvent cannot be defined unconditionally due to the solubility of the material, etc., but usually, for example, liquid accumulation on a hemisphere is typically performed on a circular plateau portion. Further, the thickness of the film to be formed is required to be about the same as the pattern size and at least about 1/2 of the film size according to the generated pattern size. Therefore, for example, when the pattern size is about 1/3 of the plateau The concentration of the solution is preferably about 25% to 50%, and it is desirable that the concentration is higher. Further, as the pattern size is smaller and the area of the plateau portion is smaller, it is necessary to adjust the concentration to be dilute. Generally, when a 40 nm to 10 nm pattern that is difficult to be formed by photolithography is generated on a plateau portion of about 100 nm to 50 nm, the concentration of the solution is at least 5% to 50%, more preferably about 10% to 40%. become.

  It is preferable that the peripheral portion of the plateau portion has a large contact angle with respect to the coating liquid in order to prevent the liquid from entering the adjacent pattern or the plateau portion. Such a contact angle is desirably 60 degrees or more, more preferably 90 degrees or more with respect to at least the substrate surface under the temperature condition at the time of application. In order to achieve such a surface, it is desirable to coat the plateau part with a good oil-repellent fluorosurfactant.

  In producing such a plateau portion, the plateau portion does not necessarily have to be the same as that of the semiconductor substrate. Si oxide film or nitride film, other Ga, Ta, Ti, Al, AlSi, SiC, Cu, Au, Ag or other metallization or oxides, nitrides or alloy materials thereof may be used, and the plateau may be formed of an organic material such as a photosensitive material. This organic pedestal is further coated with a thin film such as silicon or SOG on the surface, a pattern is formed by self-organization using the upper surface as a plateau, and the upper layer pattern is transferred to the lower layer in sequence, so-called "multilayer process" May be carried out.

  Next, the shape of the plateau will be described in more detail.

  As the shape of the plateau portion, generally, shapes such as a circle, an ellipse, a rectangle, a square, a triangle, a rhombus, and the like are listed. Among such shapes, the self-organizing material is applied along the shape of the plateau portion, and an array pattern can be formed with reference to the end portion. In consideration of alignment with other wirings, an ellipse or a rectangle that can control the direction of arrangement is preferable to a circular shape.

  On the other hand, since circular shape self-organization patterns such as dots are usually easily arranged in a triangular lattice pattern, the shape of the plateau portion is a triangle or rhombus shape in order to improve the accuracy of the self-organization pattern. It becomes more preferable. In addition, the cylindrical self-assembled pattern is easy to form a concentric shape along the peripheral shape if the plateau pattern has good symmetry. In addition, when the long side of the plateau portion is long, a linear pattern can be formed. In this case, the ratio of the long side to the short side is preferably at least 3 or more.

  The number of patterns generated by the self-organizing material in the plateau portion is about 1 to 10 in accordance with the subsequent electrode formation. When one transistor is formed in the plateau portion, the number of necessary patterns is several, so the number of generated patterns is one to four.

  Examples of such a shape and a pattern to be formed are illustrated in FIGS. 2 (a) to 2 (f) show examples of patterns (indicated by hatching) formed on a circular plateau portion, and FIGS. 3 (a) to 3 (f) are formed on a triangular plateau portion. 4 (a) to 4 (e) show examples of patterns (shown by diagonal lines) formed on a square (diamond) plateau portion, and FIG. ) To FIG. 5 (d) show examples of patterns (indicated by diagonal lines) formed on a quadrangular (rectangular) plateau portion.

  Among these shapes, the rhomboid plateau shown in FIGS. 4A to 4E is the easiest to form including the gate alignment. Such a pattern size is not generally determined according to a desired circuit line width, but is usually about several nm to 50 nm. As described later, these pattern widths are defined by the molecular weight of the block copolymer.

  With regard to the shape processing of the plateau part, as described above, it can be formed by using etching that is a normal lithography method, or by using doping and wet etching, and spherical silica such as CMP and a surfactant. It is possible to use a combination of flat polishing and the like using. In the case of a cantilever, it is possible to scan the needle tip over the polishing substrate and flatten it.

  Next, self-organized materials will be described.

  Regarding self-assembly that can be used in the present embodiment, a method using a microphase separation in a block copolymer or a graft copolymer, a method using a fine pattern formed by a coacervation method, an emulsion templating method, or the like Various techniques such as an array of nanoparticles having a uniform size can be used. However, since it is necessary to strictly define the number of patterns generated here, it is desirable to use a block copolymer having a specific molecular weight.

  The block copolymer refers to a copolymer having a plurality of polymer chains as partial constituent components (blocks). The polymer chain as a partial constituent is often a homopolymer. A typical example of the block copolymer is in the form of a linear molecular chain, in which an A polymer chain having a repeating unit A and a B polymer chain having a repeating unit B are chemically bonded at the ends. It is an AB type diblock copolymer having a structure of (AA ·· AA)-(BB ·· BB)-. Moreover, the block copolymer which 3 or more types of polymer chains couple | bonded may be sufficient. In the case of a triblock copolymer, any of ABA type, BAB type, or ABC type may be used. Alternatively, the block copolymer may have a star-shaped molecular chain form. Examples of the star-shaped molecular chain form include those in which block copolymer chains extend radially from the center and those in which different polymer chains extend from the center. It is also possible to use a block copolymer such as (AB) n type or (ABA) n type having four or more blocks. The block copolymer may contain a polymer chain composed of a random copolymer. Examples of such a block copolymer include a block copolymer in which at least one block is a polymer chain composed of a random copolymer, such as-(AA ·· AA)-(BCBBBCBCCBCB ·· CBB)-, and further-(ABBAA ··· -A block copolymer of random copolymers such as AABABB)-(CDCCDCDD... DDC)-can also be used.

  On the other hand, a graft copolymer has a structure in which another polymer chain is bonded as a side chain to a main chain of a certain polymer, and several types of polymers can be suspended from the side chain. Further, a combination of a block copolymer and a graft copolymer in which a C polymer chain is bonded as a side chain to a block copolymer such as an AB type, an ABA type, or a BAB type may be used.

  By using block copolymers or graft copolymers as described above, several structures are hierarchical, such as sea-island structures, cylinder structures, bicontinuous structures, lamellar structures, or sea phases of sea-island structures being cylinder structures. Combined microphase separation structures are formed. Furthermore, for example, various structures such as those described by Frank Bates et al. (Physics Today, February 1999, pages 32-38) can be adopted. Usually, a sea-island structure capable of forming a dot-shaped pattern on a substrate, a cylinder structure capable of forming a line-shaped pattern, or a lamella structure is used. A diblock copolymer is most preferred in the present invention because such a pattern can be formed and synthesis is easy. For example, a diblock copolymer exemplified in JP-A-2001-151834 is preferably used.

  The form of the microphase separation structure is determined by the volume ratio of each phase composed of each polymer chain constituting the block or graft copolymer. The volume ratio can be adjusted by changing the molecular weight of each polymer chain. Alternatively, the volume ratio may be adjusted by adding a homopolymer of each polymer chain to the block or graft polymer. However, the addition amount of the homopolymer is preferably 50% by weight or less, more preferably 10% by weight or less based on the block copolymer or graft copolymer. When an excessive amount of the homopolymer is added, the microphase separation structure is disturbed, and it may be difficult to form a regular pattern.

  The molecular weight of each polymer chain of the block copolymer or graft copolymer can be changed as follows. First, the molecular weight of a polymer chain constituting a phase (microdomain) desired to have a domain size of 10 nm or less is adjusted to a desired domain size. Thereafter, the molecular weight of the polymer chain constituting the other phase is determined so as to obtain a desired microphase separation structure. For example, when the molecular weight of the polymer chain is about 10,000, the domain size is about 10 nm, and a domain of 10 nm or less can be formed by further reducing the molecular weight of the polymer chain.

  The form of the microphase separation structure is determined by the volume ratio of each phase as described above, and the volume ratio of each phase can be adjusted by the molecular weight ratio of each polymer chain. For example, in the case of a diblock copolymer, the standard of the molecular weight ratio of two polymer chains is about 1: 9 in the case of a dot structure, and is about 2: 8 in the case of a cylinder structure. Although not used in the present embodiment, it is about 4: 6 in the case of the bicontinuous structure and about 5: 5 in the case of the lamellar structure. However, this ratio may vary greatly depending on the difference in solubility parameter of each polymer chain. In general, better results are often obtained when the molecular weight of a polymer chain having a polar group introduced later is made larger than the above-mentioned ratio.

In order to form a finer pattern, at least one polymer chain in the block copolymer or graft copolymer as described above includes a carbonate group, a lactonyl group, a nitrile group, a hydroxyl group, an acidic group and a basic group. A polar group selected from can be introduced. More specifically, examples of the acidic group include a carboxyl group, a sulfoxyl group, a phosphoxyl group, a silanol group, and a phenolic hydroxyl group. Examples of basic groups include amino groups and pyridyl groups. Examples of polymer chains having an acidic group or basic group introduced therein include polymer chains having an acidic group introduced, such as polyacrylic acid, polymethacrylic acid, poly (styrenesulfonic acid), and poly (hydroxystyrene). ) And the like. Examples of the polymer chain having a basic group introduced include poly (2-vinylpyridine) and poly (4-vinylpyridine). The introduction rate of the polar group, acidic group or basic group into the polymer chain is preferably 10% or more, and more preferably 50% or more. When the introduction rate of acidic groups or basic groups is too small, it is difficult to increase the difference in interaction parameters between polymer chains when a salt is formed. On the other hand, if the introduction rate is too large, the difference in interaction parameters becomes too large without forming a salt, which may deteriorate applicability. In consideration of this, it is desirable that the upper limit of the introduction rate of acidic groups or basic groups with respect to the polymer chain is about 200%. Here, the introduction rate is expressed by the following equation.
Introduction rate (%) = (number of acidic groups or basic groups in polymer chain) / (degree of polymerization of polymer chain) × 100

  The polymer chain having an acidic group or a basic group is combined with other polymer chains to constitute the block copolymer or graft copolymer used in this embodiment. The other polymer chains are preferably non-polar and have a small dipole moment of the constituent monomer units in order to increase the difference in interaction parameters with the polymer chains formed with salts. However, when the dipole moment is too small and the polarity is low, the difference in the interaction parameter with the polymer chain having an acidic group or basic group before changing to a salt becomes too large. Therefore, the solubility in a solvent is lowered and it is difficult to form a good thin film. Considering these, in block copolymers having acidic or basic side chains, polyacrylic acid ester derivatives such as polymethyl acrylate and polymethyl methacrylate, which are such acidic, basic polymer and nonionic polar polymer, poly Acrylonitrile, polymethacrylonitrile and the like are favorably used as the copolymer. Moreover, as a polymer chain combined with polyvinylpyridines, a polystyrene derivative can also be used favorably.

  Examples of preferable combinations of polymer chains constituting the block copolymer or graft copolymer include the following.

  The combinations of polyacrylic acid derivative polymer and polyacrylic acid ester derivative polymer include polyacrylic acid + polymethyl methacrylate, polymethacrylic acid + polymethyl methacrylate, polymethacrylic acid + poly (hydroxyethyl methacrylate), polymethacrylic acid + poly (Phenyl methacrylate), and polymethacrylic acid + poly (naphthyl methacrylate).

  Examples of the combination of the poly (hydroxystyrene) derivative polymer and the polyacrylate derivative polymer include poly (4-hydroxystyrene) + polymethyl methacrylate.

  Examples of the combination of the poly (vinyl pyridine) derivative polymer and the polyacrylate derivative polymer include poly (4-vinyl pyridine) + polymethyl methacrylate and poly (2-vinyl pyridine) + polymethyl methacrylate.

  Examples of the combination of the poly (vinylpyridine) derivative polymer and the polystyrene derivative polymer include poly (4-vinylpyridine) + polystyrene and poly (4-vinylpyridine) + poly (α-methylstyrene).

  When three or more kinds of polymer chains are included as in the ABC type triblock copolymer, it is desirable that one of the polymer chains be a fluorine-containing polymer chain. The fluorine-containing polymer chain can be satisfactorily phase-separated from normal carbon-based polymer chains and silicon-based polymer chains. Therefore, a combination of three polymer chains, ie, a polymer chain having an acidic group or a basic group, a nonionic polar carbon-based or silicon-based polymer chain, and a fluorine-containing polymer chain is preferable. Although it does not specifically limit as a fluorine-containing polymer chain, For example, the polyacrylic ester derivative which has a fluorinated alkyl group, an aryl group, an aralkyl group in the ester part, a polymethacrylic ester derivative, etc. are used. More specifically, 2,2,2-trifluoroethyl methacrylate, 2,2,3,3-terafluoropropyl methacrylate, 2,2,3,3,3-pentafluoropropyl methacrylate, 1,1,1 3,3,3-hexafluoroisopropyl methacrylate, 2,2,3,4,4,4-hexafluorobutyl methacrylate, 2,2,3,3,4,4,4-heptafluorobutyl methacrylate, etc. Polymerized polymethacrylic acid ester derivatives can be mentioned.

  Examples of the polymer chain in which at least one of the polymer chains is a random copolymer chain include a block copolymer or a graft copolymer having a random copolymer chain of methacrylic acid ester, acrylonitrile, vinyl carbazole and the like and styrene. Such copolymers can often be synthesized by living radical polymerization.

  Such a block copolymer can be converted into a (latent image) pattern represented by the density of the structure through a microphase separation process. These can usually be formed by heat-treating the molded body at a temperature higher than the glass transition temperature of each polymer chain constituting the block copolymer or graft copolymer. For example, in the case of a diblock copolymer containing polystyrene or poly (4-vinylpyridine) and polymethyl methacrylate, by performing a heat treatment at about 120 ° C. to 150 ° C. for about 0.1 hour to 10 hours, A microphase separation structure is formed. In order to prevent deterioration of the polymer chain due to oxidation or the like, it is preferable to perform the heat treatment in an atmosphere of an inert gas such as nitrogen gas or argon gas or a reducing gas such as hydrogen gas.

  When a plasticizer is added to the molded body, it can be subjected to a heat treatment at a temperature not higher than the glass transition temperature to cause microphase separation. As the plasticizer, for example, if a high boiling point solvent such as N, N-dimethylacetamide, N-methylpyrrolidinone, dimethyl sulfoxide, triglyme, xylene, and tetrason is used, it can be used because it remains as it is. Alternatively, esters having a long chain alkyl group, specifically, aromatic esters and fatty acid esters are used. More specifically, phthalate ester plasticizers such as dimethyl phthalate, dibutyl phthalate, di-2-ethylhexyl phthalate, dioctyl phthalate, diisononyl phthalate; trimellitic acid plasticizers such as octyl trimellitate; Acid plasticizers such as octyl pyromellitate; and adipic acid plasticizers such as dibutoxyethyl adipate, dimethoxyethyl adipate, dibutyl diglycol adipate, and dialkylene glycol adipate are commonly used Plasticizers that can be used may also be used. Many of the compounds known as surfactants also work as plasticizers. For example, nonionic surfactants such as ester compounds having a perfluorocarbon skeleton have a remarkable effect. From the viewpoint of shortening the heat treatment time, it is advantageous to add a plasticizer.

  Further, an antioxidant can be added to the molded body, and examples of the antioxidant that can be used here include phenolic antioxidants such as 3,5-di-tert-butyl-4-hydroxytoluene. HALS (Hindered Amine Light represented by piperidine compounds such as sulfur antioxidants such as phosphorus antioxidants, sulfide derivatives, and piperidine compounds such as bis (2,2,6,6-tetramethylpiperidinyl-4) sebacate Stabilizer) type antioxidant and the like. In order to obtain a sufficient effect without disturbing the microphase-separated structure, the content of additives such as plasticizers and antioxidants is in the range of 0.1% to 20% by weight with respect to the block or graft copolymer. It is preferable that

  In some cases, it is possible to form or change the microphase separation structure by leaving it at room temperature for a short time without performing heat treatment. Specifically, when the glass transition temperature of the polymer chain is not higher than room temperature, the microphase separation structure of the block copolymer or graft copolymer is formed or changed by leaving it at room temperature for about 0.1 hour to 10 hours. . In such a case, since the structure may be thermally deformed by processing, it is necessary to fix the structure formed by radiation or the like.

  When forming a microphase-separated structure, specify a microphase-separated structure by applying a mechanical external field to the polymer molding or by forming a temperature gradient in the molding during heat treatment. It can also be oriented in the direction. Such an approach can be suitably used to orient block copolymer cylinders in a line.

When such a self-organizing material is used, pattern development is achieved by subsequent dry etching as described later. In this case, a fluorocarbon gas such as CF ₄ , oxygen, nitrogen, or the like can be used as the etching gas. Usually, however, an oxygen plasma gas is preferably used because the etching ratio of the formed pattern can be easily obtained. These etchings are sufficient for pattern formation, and can be used for fine dimension control, such as overetching until a desired electrode width is obtained.

  Therefore, the block copolymer is preferably a combination of polymer chains having a dry etching rate ratio of about 1.5 times or more, such as a combination of an aromatic polymer chain and an acrylic resin polymer chain. More specifically, a combination of a poly (vinylpyridine) derivative polymer and a polyacrylate derivative polymer, such as poly (4-vinylpyridine) and polymethyl methacrylate, a polyacrylic acid derivative polymer and a polystyrene derivative polymer, Or a combination of a poly (hydroxystyrene) derivative polymer and a polyacrylate derivative polymer. And silicon-containing polymer chains such as polysilanes such as polydihexylsilane, polysiloxanes such as polydimethylsiloxane, and silylated polystyrene derivatives such as poly (4-trimethylsilylstyrene) and poly (4-pentamethyldisilylstyrene). Even when combined with a non-silicon-containing polymer chain, the difference in dry etching rate can be increased. In particular, a combination of a silylated polystyrene derivative polymer and a poly (vinylpyridine) derivative polymer is excellent because it is easy to form a homogeneous and very regular microphase separation structure.

  Such block copolymer or graft copolymer is a living copolymer such as living anionic polymerization, living cationic polymerization, living radical polymerization, group transfer polymerization, polymerization using a macromer, or graft copolymer starting from a polymer side chain. It can synthesize | combine using various methods, such as superposition | polymerization.

  Furthermore, when performing fine processing of a base such as a substrate subsequent to the development process, the film used as an etching mask is required to have etching resistance with respect to the base. For example, when a silicon substrate, a glass substrate, or the like as a base is processed by dry etching, an etching selection ratio between a film used as an etching mask and the base is preferably about 2 or more. Wiring may be formed in combination with a deposition technique such as a film forming technique such as electroless plating or sputtering.

  The method for selectively etching and developing a specific polymer chain is not particularly limited, and a known technique can be used. For example, the method of decomposing | disassembling a polymer chain by ozone exposure, light irradiation, electron beam irradiation, the method of removing by thermal decomposition, etc. can be mentioned.

The pattern formed by such a method can be further transferred to a base, or a self-organized pattern of a block copolymer can be used as a mask to diffuse desired impurities, thereby forming an electrode such as a transistor. Examples of such impurities include B (boron), C (carbon), P (phosphorus), BF ₂ , As (arsenic), In (indium), Sb (antimony), and the like. These dopings are achieved by using an implantation apparatus represented by, for example, Japan Vacuum Technology IMX series. In order to be a thin film such as a self-assembled diblock copolymer and to be a mask material that can withstand these implantations, if the implantation is performed under the condition that the organic matter is likely to be charged up, a relatively high selectivity can be obtained. Furthermore, in order to form a contrast in the gate, it is possible to suppress the short gate effect by using a multilayer process or the like.

  If the cantilever is a charge-sensitive type, the gate electrode may be formed with a p-Si film formed in advance on the plateau portion, as long as the tip protrudes without explicitly forming the gate electrode. Or using a self-assembled film as disclosed in JP-A-2002-241532, selectively adsorbing metal to the pattern to be formed, using them as nuclei, and using CNT (carbon nanotubes) as electrodes It is also possible to grow.

  Embodiments of the present invention will be described in more detail with reference to examples.

Example 1
Embodiment 1 of the present invention is a method of forming a transistor on a cantilever needle tip.

(Plateau formation process)
First, as shown in FIG. 6A, an electron beam resist 3 is applied on the silicon substrate 2. Subsequently, as shown in FIG. 6B, the resist 3 is irradiated with an electron beam 4 and exposed to expose, for example, 100 elliptical openings 5 having a major axis of 50 nm to 100 nm (one in the drawing), A resist pattern 3a arranged on the matrix is created (see FIG. 6C). Thereafter, using this resist pattern 3a as a mask, 60 keV P ions are irradiated at a surface density of 5 × 10 ¹⁴ cm ⁻² using FIB (Focused Ion Beam) to form an N-type semiconductor region 6 on the silicon substrate 2. .

Next, the resist pattern 3a is peeled off as shown in FIG. 7 (a), and then, as shown in FIG. 7 (b), the hydrazine aqueous solution (N ₂ H ₄ .H ₂ O) heated to 115 ° C. is used. The silicon substrate 2 is immersed for 8 seconds and pulled up. As a result, as shown in FIG. 7C, a pyramid structure 8 having the semiconductor region 6 as a vertex is formed on the surface of the silicon substrate 2. FIG. 7C shows an enlarged perspective view of the pyramid structure 8 of the silicon substrate 2. The top surface of the pyramid structure 8 becomes a plateau portion 10. This pyramid structure 8 is used as the tip of the cantilever.

  Next, as shown in FIG. 8A, Au (gold) is deposited on the surface of the substrate 2 to form an Au film 12. Thereafter, as shown in FIGS. 8B and 8C, the pattern 16 formed on the stamper 14 is transferred onto the pyramid structure 8 with the pattern 16 of the alkanethiol using soft print lithography. FIG. 8C is an enlarged perspective view of the pyramid structure 8 after the pattern 16 is transferred.

  Next, as shown in FIGS. 9A and 9B, the Au film 12 is patterned using the pattern 16 as a mask, and a wiring 12 a made of Au is formed so as to extend to the top surface 10 of the pyramid structure 8. . If the wiring 12a has a defect, it is shaped using FIB. Thereafter, the excess Au film on the elliptical portion of the top surface 10 of the pyramid structure was also removed, and the plateau portion 10 was formed. FIG. 9B is an enlarged perspective view of the pyramid structure 8 after the plateau portion 10 is formed.

  Next, as shown in FIG. 10A, a 10% ethyl lactate solution of polystyrene (PS) having a molecular weight of 100,000 and diblock copolymer A having a polymethyl methacrylate (PMMA) of 9: 1 is carefully treated with a pyramid structure 8. The plateau part 10 is brought into contact with the plateau part 10 and gently lifted to allow the plateau part 10 to retain the liquid 18 of a 10% ethyl lactate solution of the diblock copolymer A. Thereafter, the substrate on which the liquid suitable 18 was left on the plateau portion 10 was dried in an oven at 45 ° C., thereby forming a diblock copolymer film 18a on the plateau portion 10 as shown in FIG.

(Self-organization process of plateau part)
Next, the substrate 2 on which the polymer film 18a was formed on the plateau portion 10 was annealed in a nitrogen atmosphere at 210 ° C. for 4 hours to separate the PS and PMMA of the diblock copolymer film 18a. As a result, as shown in FIG. 11, a pattern having a phase 18a1 made of PS and two dots (latent images) 18a2 made of PMMA is formed in the plateau section 10 in a self-organizing manner. FIG. 11 is an enlarged perspective view of the plateau unit 10.

(Plateau etching process and implantation process)
Next, as shown in FIG. 12A, etching is performed using an RIE (Reactive Ion Etching) method using an O ₂ plasma under an etching condition of a flow rate of 30 sccm, a pressure of 13.3 Pa (100 mTorr), and a power of 100 W. Thus, the dot (latent image) 18a2 made of PMMA was completely removed, that is, the latent image was developed, and an opening 18a3 was formed in the dot trace. Subsequently, as shown in FIG. 12B, overetching was performed using RIE to increase the diameter of the opening 18a3. At this time, the shortest distance between the two openings 18a3 was several nm. Thereafter, as shown in FIG. 12C, the ion implantation apparatus is used to irradiate B ions at 60 KeV and 1 × 10 ¹⁴ ions / cm ² , and the source region 20 and the region corresponding to the opening 18a3 of the plateau portion 10 are irradiated. A drain region 21 is formed.

Next, as shown in FIG. 13, the polymer film 18 a was peeled from the plateau portion 10 by performing O ₂ asher cleaning. Then, the plateau part 10 in which the source region 20 and the drain region 21 connected to the wiring 12a are formed is obtained.

(Plateau mask)
Next, as shown in FIG. 14 (a), a diblock copolymer B (20% cyclohexanone solution) 22 having a molecular weight of 400,000 and PMMA of 1: 9 is applied to the plateau part 10. After that, by drying in an oven at 45 ° C. as described above, a diblock copolymer film 22a was formed on the plateau portion 10 as shown in FIG. Subsequently, annealing was performed at 210 ° C. for 4 hours in a nitrogen atmosphere, and phase separation of PS and PMMA of the block copolymer film 22a was performed. Then, a pattern (not shown) having a phase made of PS and one dot (latent image) made of PMMA is formed. This latent image is provided across the source region 20 and the drain region 21 formed in the plateau portion 10. Thereafter, O ₂ plasma was similarly used, and the region made of PS was completely removed by performing RIE on the pattern under the etching conditions of a flow rate of 30 sccm, a pressure of 13.3 Pa (100 mTorr), and a power of 100 W. Thereby, only the dot 22a1 made of PMMA is left on the plateau portion 10 as shown in FIG.

(Thinning of the plateau part)
By applying RIE to the pyramid structure 8 using the dot 22a1 made of PMMA as a mask under the etching conditions of CF ₄ gas with a flow rate of 14 sccm, a pressure of 1.3 Pa (10 mTorr), and a power of 200 W, the diameter of the plateau portion Is reduced to about 10 nm to sharpen the pyramid structure 8a (see FIG. 15).

  The cantilever array thus prepared was further processed into a desired needle shape, and then current measurement was performed. Then, as shown in FIG. 16, when the signal in the electrostatic recording medium 30 on which the gate electrode 32 is formed is scanned, the signal state appears as a current change of about 20%, and the resolution is about 3 nm. I found out that This indicates that these cantilever arrays function as electrostatic sensing transistors and can read signals with a recording density of several nm.

  As described above, according to the present embodiment, a semiconductor member having a three-dimensional shape can be processed without using an expensive manufacturing apparatus, and an inexpensive processing method can be obtained.

(Example 2)
In the first embodiment, the plateau portion 10 has an elliptical shape, but may have a triangular shape. This will be described with reference to FIGS. 17 (a) to 19 (c). As shown in FIG. 17 (a), a diblock polymer A solution 18 is dipped and applied to the triangular plateau portion 10 of the pyramid structure 8 in which wiring (not shown) made of Au is formed (FIG. 17 (a)). b)). In addition, the size of one side of the triangle of the plateau part 10 is 30 nm, and the molecular weight of the diblock polymer A is 80,000.

  Next, as in Example 1, the diblock polymer film 18a is formed on the plateau portion 10 by drying (see FIG. 18A). FIG. 18A is a plan view of the plateau portion. Subsequently, similarly to Example 1, phase separation of PS and PMMA of the diblock polymer film 18a is performed by annealing in a nitrogen atmosphere. Then, a pattern having a phase composed of PS and three dots (latent images) composed of PMMA is formed in a self-organizing manner. In the present embodiment, since the planar shape of the plateau portion 10 is a triangle, three dots are formed. Thereafter, when PMMA is removed by performing RIE, as shown in FIG. 18B, a pattern having an opening 18a3 formed in the trace of the removal of PMMA is formed in the phase 18a1 made of PS. Then, as shown in FIG. 18C, the openings 18a3 are over-etched to reduce the distance between the openings.

  Next, using the pattern in which the opening 18a3 is over-etched as a mask, impurities, for example, B ions are implanted into the plateau portion to form the source region 20 and the drain region 21 (see FIG. 19A). Subsequently, when the diblock polymer film 18a is removed, as shown in FIG. 19B, the plateau portion 10 in which the source region 20 and the drain region 21 connected to the wiring (not shown) are formed is obtained. Thereafter, in the same manner as in Example 1, the diblock copolymer B is applied on the plateau portion 10 and dried to form a diblock copolymer film on the plateau portion 10. The molecular weight of the diblock polymer B is 160,000. Subsequently, similarly to Example 1, phase separation of PS and PMMA of the diblock copolymer film is performed by annealing in a nitrogen atmosphere. Then, as in the first embodiment, a pattern (not shown) having a phase composed of PS and one dot (latent image) composed of PMMA is formed in a self-organizing manner. This latent image is formed across the source region 20 and the two drain regions 21 formed in the plateau portion 10. Subsequently, when the PS phase is completely removed, only the dots 22a1 made of PMMA are left on the plateau portion 10, as shown in FIG. As in the first embodiment, by performing RIE using the dot 22a1 as a mask, the plateau portion 10 is small and the tip of the pyramid structure 8 is sharpened.

  In this embodiment, since there are two drains, the current change of both drains is detected. As a result, a cantilever having a current change increased by 35% compared to Example 1 was obtained. It was found that the cantilever of this example also functions as an electrostatic sensing transistor and can read a signal with a recording density of several nm.

  As described above, according to the present embodiment, a semiconductor member having a three-dimensional shape can be processed without using an expensive manufacturing apparatus, and an inexpensive processing method can be obtained.

(Example 3)
In the first embodiment, the shape of the plateau portion 10 is elliptical, but it may be rectangular. This will be described with reference to FIGS. 20 (a) to 22 (c). As shown in FIG. 20 (a), a diblock polymer A solution 18 is dipped and applied to the triangular plateau portion 10 of the pyramid structure 8 on which a wiring (not shown) made of Au is formed (FIG. 20 (a)). b)). In addition, the size of one side of the square of the plateau part 10 is 20 nm, and the molecular weight of the diblock polymer A is 100,000 as in Example 1.

  Next, similarly to Example 1, the diblock polymer film 18a is formed on the plateau portion 10 by drying (see FIG. 21A). FIG. 21A shows a plan view of the plateau portion. Subsequently, similarly to Example 1, phase separation of PS and PMMA of the diblock polymer film 18a is performed by annealing in a nitrogen atmosphere. Then, a pattern having a phase composed of PS and two dots (latent images) composed of PMMA is formed in a self-organizing manner. In the present embodiment, since the planar shape of the plateau portion 10 is a square, two dots are formed. Thereafter, when PMMA is removed by performing RIE, as shown in FIG. 21B, a pattern having an opening 18a3 formed in the trace of the removal of PMMA is formed in the phase 18a1 made of PS. Then, as shown in FIG. 21C, the openings 18a3 are over-etched to reduce the distance between the openings.

  Next, using the pattern in which the opening 18a3 is over-etched as a mask, impurities, for example, B ions are implanted into the plateau portion to form the source region 20 and the drain region 21 (see FIG. 22A). Subsequently, when the diblock polymer film 18a is removed, as shown in FIG. 22B, the plateau portion 10 in which the source region 20 and the drain region 21 connected to the wiring (not shown) are formed is obtained. Thereafter, in the same manner as in Example 1, the diblock copolymer B is applied on the plateau portion 10 and dried to form a diblock copolymer film on the plateau portion 10. As in Example 1, the molecular weight of the diblock polymer B is 400,000. Subsequently, similarly to Example 1, phase separation of PS and PMMA of the diblock copolymer film is performed by annealing in a nitrogen atmosphere. Then, as in the first embodiment, a pattern (not shown) having a phase composed of PS and one dot (latent image) composed of PMMA is formed in a self-organizing manner. This latent image is formed across the source region 20 and the drain region 21 formed in the plateau portion 10. Subsequently, when the PS phase is completely removed, only the dots 22a1 made of PMMA are left on the plateau portion 10, as shown in FIG. As in the first embodiment, by performing RIE using the dot 22a1 as a mask, the plateau portion 10 is small and the tip of the pyramid structure 8 is sharpened. In this way, a semiconductor chip having a transistor at the tip could be obtained as in Example 1.

  When the current signal was measured in the same manner as in Example 1, the same result as in Example 1 was obtained. It was found that the cantilever of this example also functions as an electrostatic sensing transistor and can read a signal with a recording density of several nm.

  As described above, according to the present embodiment, a semiconductor member having a three-dimensional shape can be processed without using an expensive manufacturing apparatus, and an inexpensive processing method can be obtained.

( Reference example )
Next, a method for manufacturing a three-dimensional transistor array according to a reference example of the present invention will be described.

(Wall surface forming process)
First, as shown in FIG. 23, an acrylic ArF resist (manufactured by JSR) is applied on a silicon substrate 40 , and an ArF stepper having a numerical aperture (NA) of 0.65 is used as a resist to form a line pattern having a width of 50 nm. After drawing, the resist was over-developed and slimmed to obtain a resist pattern (not shown) having two isolated line patterns having a width of 25 nm and a height of 100 nm. The pitch of these two line patterns was 200 nm. By using this resist pattern as a mask and anisotropically etching using CF ₄ etching gas, the resist pattern is transferred onto the silicon substrate 40, and then the resist pattern is removed. Then, a substrate 40 is obtained in which line patterns 42 made of isolated silicon having a width of 20 nm and a height of 80 nm are formed at a pitch of 200 nm (see FIG. 23).

Next, as shown in FIG. 24, a resist is applied to the entire surface of the substrate 40 and patterned to obtain a resist pattern 44 formed in a direction orthogonal to the pattern 42. Subsequently, as shown in FIG. 25, the metal layer 46a made of Al and the insulating layer 46b made of SiO ₂ are alternately formed by PECVD (tell me the official name), and then CMP (Chemical Mechanical Polishing) Flatten with.

  Next, as shown in FIG. 26, the center resist 44 is removed by lift-off, and a layered electrode 46 in which a metal layer 46a and an insulating layer 46b are stacked is formed on both sides of the line pattern 42. did.

(Application process of self-assembled film)
A toluene solution of dimethylsiloxane was applied so as to fill the line pattern 42 and dried to obtain a soft-printed reverse stamp-shaped mold (not shown). A cyclohexanone solution of a cycloblock copolymer having a molecular weight of 100,000 and a PMMA: PS composition ratio of 2: 8 was once applied to the template, and then transferred onto the line pattern 42 at a pressure of 0.5 Gpa, and about 10 nm. A thick block copolymer film 48 was formed on the exposed wall of the line pattern (see FIGS. 27 and 28). This siblock copolymer has the property of self-organizing in a cylindrical shape. FIG. 28 is a side view of FIG. 27 viewed from the side, that is, the direction indicated by the arrow.

(Self-organization process 1)
Next, annealing is performed in a nitrogen atmosphere at 210 ° C. for 4 hours, and as shown in FIG. 29, phase separation of the phase 48a made of PS and the phase 48b made of PMMA of the diblock copolymer film 48 is performed. Pattern was formed. 29 is also a side view similar to FIG. The phase-separated pattern was aligned on the wall surface of the line pattern 42 in parallel with the surface of the substrate 40, and the pitch was 30 nm. That is, in this reference example , the plateau portion is the wall surface of the line pattern 42 and is perpendicular to the surface of the substrate 40.

(etching)
Next, using an _{O 2} plasma as shown in FIG. 30, the flow rate is 30 sccm, the pressure is 6.5 Pa (50 mTorr), by the power to RIE with 100W, to completely remove the phase 48b made of PMMA. Subsequently, CF ₄ plasma is used, isotropic etching is performed by RIE at a flow rate of 30 sccm, a pressure of 13.3 Pa (100 mTorr), and a power of 100 W, and a pattern 42 made of silicon is formed on the phase 48b made of PMMA. An opening 49 penetrating at a position corresponding to the mark is formed.

(Production of gate electrode)
Next, as shown in FIG. 31, a resist 50 is applied to the entire surface, and a 50 nm trench 52 corresponding to the opening of the gate portion is formed in the resist 50. Note that the width of the trench 52 (the length in the horizontal direction on FIG. 31) is narrower than the thickness of the resist pattern 44 shown in FIG. Subsequently, as described with reference to FIG. 25, the metal layers 54a and the insulating films 54b are alternately deposited, and after CMP, the resist 50 is lifted off to produce the wiring 54 connected to the gate electrode (see FIG. 32). ).

(Implantation and passivation)
Next, as shown in FIG. 33, using the opening 49, the entire surface was irradiated with B ions at 60 KeV and 1 × 10 ¹⁴ ions / cm ² using an ion implantation apparatus to form a source and a drain. Finally, the entire surface was lightly oxidized and coated with polyimide to form a transistor. The left side of FIG. 32 is the source S, the center is the gate G, and the right side is the drain D.

When the operations of the six transistor arrays thus created were confirmed, it was confirmed that all of them functioned as transistors having an on-off ratio of 10 ³ or more although there were variations in characteristics.

Since this expensive example does not use an expensive manufacturing apparatus, a semiconductor member having a three-dimensional shape can be processed as inexpensively as possible.

  As described above in detail, according to each embodiment of the present invention, a part that cannot be processed by conventional photolithography, such as a semiconductor having a three-dimensional concavo-convex structure and a tip part such as a needle tip of a sensor. In addition, basic circuit units such as fine transistor electrodes can be formed by self-organization.

  Moreover, it is considered that a MEMS probe memory with higher speed and higher density can be realized by changing the recording / reproducing principle from charge to charge in polymer MEMS memory and creating a cantilever having an FET sensor for detection. In order to form a nano-sized transistor with as many as a thousand needle tips at a time, the conventional lithography technique requires strict processing dimensions and high cost, and cannot be practically processed due to the tip. In order to form nano-sized transistors at a thousand needle tips at a time in a MEMS memory, the conventional lithography technique cannot be practically processed. However, if the method of the above embodiment is used, an inexpensive and effective manufacturing method can be obtained without using a technique such as photolithography.

The flowchart which shows the process sequence of the processing method of the semiconductor member which has three-dimensional shape by one Embodiment of this invention. The figure which shows the example of the self-organization pattern formed in a circular plateau part. The figure which shows the example of the self-organization pattern formed in a triangular plateau part. The figure which shows the example of the self-organization pattern formed in a diamond-shaped plateau part. The figure which shows the example of the self-organization pattern formed in a rectangular plateau part. Sectional drawing explaining the formation method of the transistor to the cantilever needle tip whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the operation | movement of the transistor to the cantilever needle point whose plateau part is elliptical. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is a triangle shape. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is a triangle shape. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is a triangle shape. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is square shape. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is square shape. The figure explaining the formation method of the transistor to the cantilever needle point whose plateau part is square shape. The perspective view explaining the formation method of a three-dimensional transistor array. The perspective view explaining the formation method of a three-dimensional transistor array. The perspective view explaining the formation method of a three-dimensional transistor array. The perspective view explaining the formation method of a three-dimensional transistor array. The perspective view explaining the formation method of a three-dimensional transistor array. The side view explaining the formation method of a three-dimensional transistor array. The side view explaining the formation method of a three-dimensional transistor array. The side view explaining the formation method of a three-dimensional transistor array. The side view explaining the formation method of a three-dimensional transistor array. The side view explaining the formation method of a three-dimensional transistor array. The side view explaining the formation method of a three-dimensional transistor array.

2 Silicon substrate 3 Resist layer 3a Resist pattern 4 Electron beam 5 Aperture 6 N-type semiconductor region 8 Pyramid structure 10 Plateau portion 12 Au film 12a Au wiring 14 Stamper 16 Alkanethiol pattern 18 Diblock copolymer A solution 18a Diblock copolymer film 18a1 PS phase 18a2 PMMA phase 18a3 Opening 20 Source 21 Drain 22 Diblock copolymer B solution 22a Diblock copolymer film 22a1 PMMA phase 30 Electrostatic recording medium 32 Gate

Claims (3)

Forming a plateau part having planarity on the top surface of the protrusion provided on the semiconductor member and planarly independent from the adjacent semiconductor part ;
A step of selectively applying a self-organizing material or a solution thereof along the shape of the plateau part to form a self-organizing material film;
A step of self-organizing a latent image on the self-organizing material film with reference to an end of the shape of the plateau portion;
Developing the latent image by etching to form a pattern of a self-assembled material film;
Processing the semiconductor member using the pattern as a mask;
Before forming the self-assembled material film, coating the periphery of the plateau with a film having a contact angle of 60 degrees or more with respect to the self-assembled material or a solution thereof;
Equipped with a,
A method of processing a semiconductor member having a three-dimensional shape, wherein the self-organizing material is a diblock copolymer or a graft copolymer . The self-organizing material, a method of processing a semiconductor member having a three-dimensional shape according to claim 1, characterized in that it is applied by dipping. The self-organizing material, a method of processing a semiconductor member having a three-dimensional shape according to claim 1, characterized in that it is applied by a soft printing.

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