JP5213512B2 - Transmitting apparatus and method - Google Patents

Description

  The present invention relates to a transmission apparatus and method, and more particularly to a transmission apparatus and method suitable for transmission of video or audio data.

  There is a transmission device that transmits data input from an input device in a predetermined cycle in frames having a predetermined continuous configuration. Such a transmission apparatus is useful for transmitting streaming data such as video and audio that require punctuality in output, for example. However, when there is a fluctuation in the data input cycle or a deviation in the operation clock frequency between the input device and the transmission device, a difference occurs between the data input speed and the transmission speed. As a result, there is a problem that high-quality transmission of streaming data such as video and audio cannot be performed, for example, data is lost or frame continuity is interrupted.

  Therefore, it is widely performed to provide a buffer memory to absorb the speed difference and level the transmission speed. However, when data is input without interruption for a long time, if the fluctuation of the data input cycle is biased to one side, or there is a deviation in the operating clock frequency between the input device and the transmission device, Buffer memory overflow or underflow occurs.

  In order to cope with this problem, a technique disclosed in Patent Document 1 that changes the length of a preamble that constitutes a frame in accordance with the accumulation amount of the buffer memory can be used.

JP-A 62-072251

  However, even with the technique disclosed in Patent Document 1, a considerable amount of buffer memory is required to perform processing according to the amount of storage, and thus a problem of transmission delay still remains.

  It is an object of the present invention to reduce the amount of buffer memory required and reduce transmission delay while maintaining the quality of transmission when data input at a predetermined period is transmitted in frames having a predetermined predetermined configuration. To do.

According to an aspect of the present invention, a decoder that inputs and decodes a first synchronization signal and media data based on a first clock signal, and a data frame for each period based on the first synchronization signal decoded by the decoder. A data frame generation unit to generate, a modulation unit to modulate the data frame generated by the data frame generation unit to generate symbol data, and a clock to generate a second clock signal independent of the first clock signal The second synchronization signal is generated by reclocking the first synchronization signal decoded by the signal generation unit and the decoder with the second clock signal generated by the clock signal generation unit, and the generated second synchronization signal The time length of the symbol data generated by the modulator rising after a predetermined time has elapsed from the rising of the synchronization signal A timing signal generation unit that generates an output enable signal that falls after the output signal, and the symbol data generated by the modulation unit when the output enable signal generated by the timing signal generation unit is at an H level. A D / A converter that converts and generates an intermediate frequency signal, and a burst that divides and filters the second clock signal generated by the clock signal generator to generate a burst signal having a frequency equal to the carrier frequency A transmission frequency for generating a carrier frequency signal by converting the intermediate frequency signal generated by the signal generator and the D / A converter into a carrier frequency using the burst signal generated by the burst signal generator When the output enable signal generated by the converter and the timing signal generator is at H level, the transmission frequency A switching unit that outputs the carrier frequency signal generated by the number conversion unit to the transmission line, and outputs the burst signal generated by the burst signal generation unit to the transmission line when the output enable signal is L level; There is provided a transmission device comprising:

  According to the present invention, when data input at a predetermined cycle is transmitted in frames having a predetermined continuous configuration, it is possible to reduce the amount of buffer memory required while maintaining the quality of transmission and reduce transmission delay. It becomes possible to do.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In addition, this invention is not limited to the following embodiment, It shows only the specific example advantageous for implementation of this invention. In addition, not all combinations of features described in the following embodiments are indispensable as means for solving the problems of the present invention.

<Embodiment 1>
As an embodiment of the present invention, a 5.1 channel sound system to which the present invention is applied will be described.

  FIG. 2 shows a block diagram of a 5.1 channel sound system to which the present invention is applied.

  A player 200 reads out multi-channel sound data as media data from a recording medium on which sound data such as an optical disk is recorded, and outputs the multi-channel sound data to the outside as multi-channel sound data including reproduction synchronization data such as S / PDIF. Reference numeral 210 denotes a controller as a transmission device that transmits acoustic data input from the player 200 to the adapters 220 to 225. 220 to 225 are adapters that receive the acoustic data transmitted by the controller 210 and output the sound data to the speakers 230 to 235 connected thereto. Reference numerals 230 to 235 denote speakers that output the acoustic signals output from the adapters 220 to 225 connected thereto as sound. Acoustic channels according to the installation positions of the speakers 230 to 235 are assigned to the adapters 220 to 225, respectively. Specifically, the adapter 220 is assigned to the center (C) channel, and the adapter 221 is assigned to the subwoofer (SW) channel. The adapters 222 and 223 are assigned to the front light (FR) channel and the rear light (RR) channel, respectively. The adapters 224 and 225 are assigned to a rear left (RL) channel and a front left (FL) channel, respectively.

  The player 200 and the controller 210 are connected by an acoustic cable such as S / PDIF. The controller 210 and the adapters 221 to 225 are connected by a cable in a daisy chain format. That is, the controller 210 and the adapter 220, the adapter 220 and the adapter 221, the adapter 221 and the adapter 222, the adapter 222 and the adapter 223, the adapter 223 and the adapter 224, and the adapter 224 and the adapter 225 are connected.

  The acoustic data transmitted by the controller 210 is received by the adapter 220 and transmitted to the adapter 221. The acoustic data received by the adapter 221 is transmitted to the adapter 222. In this way, the acoustic data output from the player 200 is transmitted from the controller 210 in the order of the adapter 220, the adapter 221, the adapter 222, the adapter 223, the adapter 224, and the adapter 225.

  The configuration and operation of the controller 210 will be described with reference to FIGS. FIG. 1 is a block diagram of the controller 210, and FIG. 3 is a timing diagram of input / output and internal signals of the controller 210.

  Reference numeral 100 denotes a multi-channel audio decoder. The multi-channel audio decoder 100 decodes multi-channel audio data including reproduction synchronization data such as S / PDIF output from the player 200, and generates reproduction synchronization signals and pulse code modulation (PCM) audio data for each channel. . The reproduction synchronization signal is generated from reproduction synchronization data (a preamble in the case of S / PDIF) output from the player 200, and has a period equal to the sampling period of the acoustic signal. The multi-channel audio decoder 100 outputs the generated PCM-format audio data for each channel to the data frame generator 101 together with the reproduction synchronization signal, one sampling point per reproduction synchronization signal period. The reproduction synchronization signal is also output to the timing signal generator 106.

  I2S can be applied to the output interface of the multi-channel acoustic decoder 100. I2SX4 in FIG. 3 is an output signal of the multi-channel acoustic decoder 100. SCK and WS correspond to an I2S serial clock (SCK) (first clock signal) and word select (WS), respectively. SD0 to SD2 correspond to serial data (SD), respectively, C0 and SW channels are output to SD0, FR and FL channels to SD1, and RR and RL channels are output to SD2. In this case, the WS signal corresponds to a reproduction synchronization signal (first synchronization signal).

  It should be noted here that the playback synchronization signal is generated from the playback synchronization data in the multi-channel audio data output by the player 200. Therefore, if there is a temporal fluctuation in the output of the playback synchronization data, The period of the reproduction synchronization signal also fluctuates.

  Reference numeral 101 denotes a data frame generation unit. The data frame generation unit 101 generates a data frame having the configuration shown in FIG. 4 from the I2SX4 signal input from the multi-channel acoustic decoder 100 for every predetermined period, for example, one period (first period) of the WS signal. In the figure, areas marked C, FR, FL, RR, RL, and SW are data areas for C channel, FR channel, FL channel, RR channel, RL channel, and SW channel, respectively. In addition, a command for the adapters 220 to 225 is arranged in an area labeled “command”. The data frame generation unit 101 outputs the generated data frame to the OFDM modulation unit 102.

  Reference numeral 102 denotes an OFDM modulation unit. The OFDM modulation unit 102 modulates the data frame input from the data frame generation unit 101 by orthogonal frequency division multiplexing (OFDM) to generate OFDM symbol data including an effective symbol part and a guard interval part, and a D / A conversion unit To 103. At this time, the OFDM modulation unit 102 generates one OFDM symbol data from one data frame.

  Reference numeral 103 denotes a D / A converter. The D / A converter 103 operates in synchronization with the clock signal (MCLK) output from the clock signal generator 107. The D / A converter 103 performs D / A conversion on the OFDM symbol data input from the OFDM modulator 102 when the output enable signal (OE) output from the timing signal generator 106 is at H (High) level, and performs an intermediate frequency An OFDM signal is generated. At this time, the D / A converter 103 D / A converts one OFDM symbol data in one OE signal H period. The D / A converter 103 outputs the generated intermediate frequency signal (intermediate frequency OFDM signal) to the transmission frequency converter 109.

  Reference numeral 104 denotes a burst signal generator. The burst signal generation unit 104 operates in synchronization with the MCLK signal output from the clock signal generation unit 107. The burst signal generation unit 104 divides the MCLK signal output from the clock signal generation unit 107 and then performs filtering to generate a sine wave signal having a frequency equal to the carrier frequency (hereinafter referred to as “burst signal”), and the transmission frequency. The data is output to the conversion unit 109 and the switching unit 105. The generated burst signal constitutes a variable length portion arranged adjacent to an effective symbol included in the fixed length portion or its guard interval.

  Reference numeral 105 denotes a switching unit. Switching unit 105 outputs the carrier frequency signal (carrier frequency OFDM signal) output from transmission frequency conversion unit 109 to the transmission path to adapter 220 when the OE signal output from timing signal generation unit 106 is at the H level. On the other hand, the switching unit 105 outputs the burst signal output from the burst signal generation unit 104 to the transmission path to the adapter 220 when the OE signal output from the timing signal generation unit 106 is L (Low) level.

  Reference numeral 106 denotes a timing signal generator. The timing signal generator 106 operates in synchronization with the MCLK signal output from the clock signal generator 107. The timing signal generator 106 reclocks the WS signal output from the multi-channel acoustic decoder 100 with the MCLK signal output from the clock signal generator 107, and generates a second period WSR signal as a second synchronization signal. The timing signal generation unit 106 generates an OE signal that falls after a predetermined time has elapsed from the rise of the WSR signal (after Δd has elapsed) and after the time length of the rising OFDM symbol data has elapsed (after Ts has elapsed). The OE signal is output to the D / A conversion unit 103 and the switching unit 105. Here, Δd is determined so that the audio data output by the multi-channel acoustic decoder 100 in the WS signal cycle can be output as a transmission (TX) signal in the cycle of the WSR signal corresponding to the WS signal. Δd has a length at least equal to the time required from when the acoustic data is output from the multi-channel acoustic decoder 100 to when it is input to the D / A converter 103. In FIG. 3, attention should be paid to Ci, SWi, FRi, FLi, RRi, and RLi (i is an integer) of SD0, SD1, and SD2 signals, and GIj and valid symbol j (j is an integer) of the TX signal. Here, when the subscript i matches the subscript j, it indicates that they are data or signals based on the same audio data. That is, for example, C1, SW1, FR1, FL1, RR1, and RL1 of the SD0, SD1, and SD2 signals are output as the TX signal GI1 and the effective symbol 1. In the following drawings, data or signals based on the same audio data are similarly expressed using subscripts.

  Reference numeral 107 denotes a clock signal generator. The clock signal generation unit 107 generates an MCLK signal as the second clock signal and outputs the MCLK signal to the D / A conversion unit 103, the burst signal generation unit 104, and the timing signal generation unit 106. The MCLK signal is generated from a clock source independent of the clock source of the player 200, and is a low jitter clock signal sufficient for use in the OFDM modulation / demodulation system.

  Here, it is necessary to pay attention to the following points. The controller 210 substantially uses the player 200 as a clock source in processing related to reception from the player 200. On the other hand, in the processing related to transmission to the adapter 220, a clock signal generated inside the controller 210 independent of the processing is used. For this reason, there is a frequency deviation between both clocks. Therefore, even if there is no fluctuation in the period of the WS signal, the period of the WSR signal fluctuates.

  Reference numeral 109 denotes a transmission frequency conversion unit. The transmission frequency conversion unit 109 converts the intermediate frequency OFDM signal output from the D / A conversion unit 103 into a carrier frequency using the burst signal output from the burst signal generation unit 104, and generates a carrier frequency OFDM signal. Transmission frequency conversion section 109 outputs the generated carrier frequency OFDM signal to switching section 105.

  As a result of the operation of each of these units, the transmission signal (TX) to the adapter 220 is a signal having a frame period that is substantially equal to the WS signal that is substantially synchronized with the clock of the player 200 and its fluctuation. A frame is composed of an OFDM signal part (consisting of a guard interval part and an effective symbol part) which is a fixed length part and a burst signal part which is a variable length part whose length increases or decreases according to fluctuations of the WS signal or WSR signal. .

  Next, the configuration and operation of the adapters 220 to 225 will be described with reference to FIGS. FIG. 5 is a block diagram of the adapters 220 to 225, and FIG. 6 is a timing diagram of input / output and internal signals of the adapters 220 to 225.

  Reference numeral 500 denotes an A / D conversion unit. The A / D conversion unit 500 performs analog / digital (A / D) conversion on the intermediate frequency reception signal output from the reception frequency conversion unit 510 to generate a digitized reception signal (RXD). The signal is output to the signal generator 502.

  Reference numeral 501 denotes an OFDM demodulator. The OFDM demodulator 501 obtains symbol synchronization from the RXD signal input from the A / D converter 500 using the symbol synchronization signal (SS) output from the timing signal generator 502, and performs OFDM demodulation to obtain a data frame (FIG. 4). ) To get. The OFDM demodulator 501 outputs the acquired data frame to the output unit 504 together with the reproduction synchronization signal (AS). The AS signal is generated from the SS signal output from the timing signal generation unit 502, and has the same period as the SS signal, including fluctuations thereof. The OFDM demodulator 501 outputs audio data received in a frame having an RX signal at the period of an AS signal corresponding to the frame. At this time, the relationship between the period of the SD0 signal, the SD1 signal, the SD2 signal and the period of the WSR signal in the controller 210 is reproduced in the form of the period of the data output from the OFDM demodulator 501 and the period of the AS signal. The OFDM demodulator 501 also outputs the acquired data frame to the OFDM modulator 505.

  Reference numeral 502 denotes a timing signal generator. The timing signal generation unit 502 generates a burst gate signal (BG), an SS signal, and an output enable signal (OE) based on the RXD signal output from the A / D conversion unit 500, and includes a PLL unit 503, an OFDM demodulation unit 501, The data is output to the D / A conversion unit 506 and the switching unit 508. As widely known as a symbol synchronization method in an OFDM modulation / demodulation system, an SS signal can be generated based on a correlation signal (RXDC) between an RX signal and a signal (RXDD) obtained by delaying it by an effective symbol length. The SS signal rises upon detection of the peak of the RXC signal and falls after one clock. Similarly, the BG signal and the OE signal can be generated based on the RXDC signal. The BG signal rises upon detection of the peak of the RXDC signal, and falls after holding the H level for a period equal to or shorter than the predetermined shortest burst signal length. The shortest burst signal length can be determined based on the temporal fluctuation width of the reproduction synchronization data output from the player 200. The OE signal rises after a predetermined time (Δd) from the detection of the peak of the RXDC signal, and falls after a long OFDM symbol time (Ts). Δd has at least a length from when the RXD signal is OFDM demodulated by the OFDM demodulator 501 to when it is input to the D / A converter 506.

  Reference numeral 503 denotes a PLL unit. The PLL unit 503 extracts a burst signal from the RX signal output from the controller 210 or the adapter connected upstream using the BG signal output from the timing signal generation unit 502 as a window signal. Then, a continuous burst signal whose phase is synchronized with the phase locked loop (PLL) is generated. The PLL unit 503 outputs the generated burst signal to the reception frequency conversion unit 510, the A / D conversion unit 500, the transmission frequency conversion unit 507, and the switching unit 508. The PLL unit 503 multiplies the generated burst signal to generate a clock signal (MCLK). The PLL unit 503 supplies the generated MCLK signal to each part of the adapter. Each part of the adapter operates in synchronization with the MCLK signal. That is, the adapters 220 to 225 use burst signals for frequency synchronization (carrier frequency synchronization, sampling frequency synchronization) related to the operation clock and OFDM modulation / demodulation processing.

  Reference numeral 504 denotes an output unit. The output unit 504 extracts acoustic data of its own channel from the data frame input from the OFDM demodulator 501, performs D / A conversion based on the AS signal, amplifies it, generates an acoustic signal, and outputs it to the speaker. At this time, the output unit 504 corrects the data arrival time difference by the adapter so that correct sound is obtained, that is, delays the output of the acoustic signal in accordance with the adapter having the slowest data arrival. At this time, the output unit 504 may generate a signal obtained by averaging the AS signal over a plurality of periods, and output the acoustic signal according to the signal.

  Reference numeral 505 denotes an OFDM modulation unit. The OFDM modulation unit 102 performs OFDM modulation on the data frame input from the data frame generation unit 101 to generate OFDM symbol data including an effective symbol part and a guard interval part, and outputs the OFDM symbol data to the D / A conversion unit 506. At this time, the OFDM modulation unit 505 generates one OFDM symbol data from one data frame.

  Reference numeral 506 denotes a D / A converter. The D / A conversion unit 506 performs D / A conversion on the OFDM symbol data input from the OFDM modulation unit 505 to generate an intermediate frequency OFDM signal when the OE signal output from the timing signal generation unit 502 is at the H level, and transmits the intermediate frequency OFDM signal. The frequency is output to the frequency converter 507. At this time, the D / A converter 506 D / A converts 1 OFDM symbol data in the 1OE signal H period.

  Reference numeral 507 denotes a transmission frequency conversion unit. The transmission frequency conversion unit 507 converts the intermediate frequency OFDM signal output from the D / A conversion unit 506 into a carrier frequency using the burst signal output from the PLL unit 503, and generates a carrier frequency OFDM signal. The transmission frequency conversion unit 109 outputs the generated carrier frequency OFDM signal to the switching unit 108.

  Reference numeral 508 denotes a switching unit. Switching section 508 outputs the carrier frequency OFDM signal output from transmission frequency conversion section 507 to the transmission line when the OE signal output from timing signal generation section 502 is at the H level. On the other hand, when the OE signal output from the timing signal generation unit 502 is at the L level, the switching unit 508 outputs the burst signal output from the PLL unit 503 to the transmission path to the adapter connected downstream.

  Reference numeral 510 denotes a reception frequency converter. The reception frequency conversion unit 510 receives a transmission signal (RX) output from the controller 210 or an adapter connected upstream, and converts it to an intermediate frequency using a burst signal output from the PLL unit 503 to generate an intermediate frequency reception signal. To do. The reception frequency conversion unit 510 outputs the generated intermediate frequency reception signal to the A / D conversion unit 500.

  As a result of the operation of each of these units, the transmission signal (TX) to the adapter connected downstream has a frame period of the same period including the reception signal received from the controller 210 or the adapter connected upstream and its fluctuation, The signals have the same configuration.

  In this embodiment, the controller 210 has been described as transmitting data for one cycle of the WS signal in one frame. However, the controller 210 transmits data for n cycles (where n is a positive integer) of the WS signal in one frame. Also good. In this case, by increasing / decreasing the length of the burst signal portion in accordance with the fluctuations of the plurality of periods for every WS signal n periods, it is possible to substantially match the plurality of periods of the WS signal and the frame period including the fluctuations. . In this case, the output unit 504 of the adapters 220 to 225 generates a signal obtained by multiplying the AS signal corresponding to the WS signal by n or a signal obtained by averaging the signal obtained by multiplying the AS signal over a plurality of periods. To output an acoustic signal.

  Further, data for one cycle of the WS signal may be transmitted in a plurality of frames. That is, data for 1 / n cycles of the WS signal may be transmitted in one frame. In this case, the length of the burst signal portion of at least one frame of a plurality of frames transmitting data for one cycle of the WS signal is increased or decreased according to the fluctuation for each cycle of the WS signal. Thereby, the period of the WS signal and the length of the frame plural periods can be substantially matched including the fluctuation. In this case, the output unit 504 of the adapters 220 to 225 outputs an acoustic signal according to a signal consisting of n periods of the AS signal corresponding to the WS signal or an average of signals consisting of n periods of the AS signal over a plurality of periods. To do.

  In this embodiment, the period of the WS signal has been described as being equal to the sampling period of the acoustic signal. However, the period of the WS signal is n times or 1 / n of the sampling period of the acoustic signal (n is a positive integer). It may be. In this case, the output unit 504 of the adapters 210 to 225 performs an audio signal output process according to the output format of the multi-channel audio decoder 100 of the controller 200. For example, when the cycle of the WS signal is n times that of the acoustic signal, the acoustic signal is generated according to a signal obtained by multiplying the AS signal corresponding to the WS signal by n or a signal obtained by averaging the AS signal multiplied by n over a plurality of cycles. Output a signal. On the other hand, when the cycle of the WS signal is 1 / n times the sampling cycle of the acoustic data, the AS signal corresponding to the WS signal or the signal consisting of the AS signal n cycles is averaged over a plurality of cycles. An acoustic signal is output according to what is done.

  Since this embodiment includes a burst signal in a frame, this embodiment is useful when it is necessary to synchronize operation clocks and frequencies related to modulation / demodulation processing between transmission and reception devices.

  Also, this embodiment is useful when it is difficult to change the length of the portion including significant data because the length of the burst signal portion that does not include significant data in the data transmission is increased or decreased. is there.

  Therefore, the present embodiment requires frequency synchronization related to modulation / demodulation processing between the transmitting and receiving apparatuses as in the OFDM modulation / demodulation method, and it is difficult to change the length of a portion including significant data in data transmission. Useful in cases. In the case of the OFDM modulation / demodulation system, the “portion including significant data” is an effective symbol.

  In the present embodiment, the case where acoustic data is transmitted has been described as an example. However, the present invention is not limited to this, and punctuality such as video data (including cases involving acoustic data) and various measurement data. Therefore, it can be widely applied to transmission of streaming data that requires the.

<Embodiment 2>
As another embodiment of the present invention, a configuration in which the configurations and operations of the controller 210 and the adapters 220 to 225 in the 5.1 channel sound system shown in FIG. 2 are different from those of the previous embodiment will be described.

  The configuration and operation of the controller 210 will be described with reference to FIGS. FIG. 7 is a block diagram of the controller 210, and FIG. 8 is a timing diagram of input / output and internal signals of the adapters 220 to 225.

  Reference numeral 700 denotes a multi-channel audio decoder. The multi-channel sound decoder 100 decodes multi-channel sound data including reproduction synchronization data such as S / PDIF output from the player 200, and generates a reproduction synchronization signal and sound data in PCM format for each channel. The reproduction synchronization signal is generated from reproduction synchronization data (a preamble in the case of S / PDIF) output from the player 200, and has a period equal to the sampling period of the acoustic signal. The multi-channel acoustic decoder 700 outputs the generated PCM-format acoustic data for each channel to the data frame generation unit 701 along with the reproduction synchronization signal, one sampling point for each period of the reproduction synchronization signal. The reproduction synchronization signal is also output to the timing signal generation unit 706.

  I2S can be applied to the output interface of the multi-channel acoustic decoder 700. I2SX4 in FIG. 3 is an output signal of the multi-channel audio decoder 700. SCK and WS correspond to an I2S serial clock (SCK) and word select (WS), respectively. SD0 to SD2 correspond to serial data (SD), respectively, C0 and SW channels are output to SD0, FR and FL channels to SD1, and RR and RL channels are output to SD2. In this case, the WS signal corresponds to the reproduction synchronization signal.

  It should be noted here that the playback synchronization signal is generated from the playback synchronization data in the multi-channel audio data output by the player 200. Therefore, if there is a temporal fluctuation in the output of the playback synchronization data, The period of the reproduction synchronization signal also fluctuates.

  Reference numeral 701 denotes a data frame generation unit. The data frame generation unit 701 generates a data frame having the configuration shown in FIG. 4 for each cycle of the WS signal from the I2SX4 signal input from the multi-channel acoustic decoder 700. In the figure, areas marked C, FR, FL, RR, RL, and SW are data areas for C channel, FR channel, FL channel, RR channel, RL channel, and SW channel, respectively. In addition, a command for the adapters 220 to 225 is arranged in an area labeled “command”. The data frame generation unit 701 outputs the generated data frame to the OFDM modulation unit 702.

  Reference numeral 702 denotes an OFDM modulation unit. OFDM modulation section 702 performs orthogonal frequency division multiplexing (OFDM) modulation on the data frame input from data frame generation section 701 to generate OFDM symbol data including an effective symbol section and a guard interval section, and outputs the OFDM symbol data to adjustment data addition section 708. To do. At this time, the OFDM modulation unit 702 generates one OFDM symbol data from one data frame.

  Reference numeral 703 denotes a D / A converter. The D / A converter 703 operates in synchronization with the clock signal (MCLK) output from the clock signal generator 707. The D / A conversion unit 703 performs digital / analog (D / A) conversion on the data input from the adjustment data adding unit 708 when the output enable signal (OE) output from the timing signal generation unit 706 is at H (High) level. And output to the transmission frequency converter 709. At this time, the D / A conversion unit 703 performs D / A conversion on the OFDM symbol data to which one adjustment data is added in the 1OE signal H period.

  Reference numeral 704 denotes a burst signal generator. The burst signal generation unit 704 operates in synchronization with the MCLK signal output from the clock signal generation unit 707. The burst signal generation unit 704 divides the MCLK signal output from the clock signal generation unit 707 and then performs filtering to generate a sine wave signal having a frequency equal to the carrier frequency (hereinafter referred to as “burst signal”), and the transmission frequency. The data is output to the conversion unit 709 and the switching unit 705.

  Reference numeral 705 denotes a switching unit. The switching unit 705 outputs the signal output from the transmission frequency conversion unit 709 to the transmission path to the adapter 220 when the OE signal output from the timing signal generation unit 706 is at the H level. On the other hand, the switching unit 705 outputs the burst signal output from the burst signal generation unit 704 to the transmission path to the adapter 220 when the OE signal output from the timing signal generation unit 706 is L (Low) level.

  Reference numeral 706 denotes a timing signal generator. The timing signal generation unit 706 operates in synchronization with the MCLK signal output from the clock signal generation unit 707. The timing signal generator 706 reclocks the WS signal output from the multi-channel acoustic decoder 700 with the MCLK signal output from the clock signal generator 707 to generate a WSR signal. The timing signal generation unit 706 outputs the generated WSR signal to the adjustment data addition unit 708. The timing signal generation unit 706 generates an OE signal that falls after a predetermined time (Δd) has elapsed from the rise of the WSR signal, and rises after a predetermined burst signal time length has elapsed. The D / A conversion unit 703 and the switching unit Output to 705. The predetermined burst signal time length is indicated by Tb. Here, Δd is determined so that the audio data output by the multi-channel acoustic decoder 100 in the WS signal cycle can be output as a transmission (TX) signal in the cycle of the WSR signal corresponding to the WS signal. Δd has a length obtained by subtracting the burst signal length from the time required for at least the sound data to be input from the multi-channel sound decoder 700 until it is input to the D / A converter 703. In FIG. 8, attention should be paid to Ci, SWi, FRi, FLi, RRi, and RLi (i is an integer) of the SD0, SD1, and SD2 signals, and GIj and valid symbol j (j is an integer) of the TX signal. Here, when the subscript i matches the subscript j, it indicates that they are data or signals based on the same audio data. That is, for example, C1, SW1, FR1, FL1, RR1, and RL1 of the SD0, SD1, and SD2 signals are output as the TX signal GI1 and the valid symbol 1. In the following drawings, data or signals based on the same audio data are similarly expressed using subscripts.

  Reference numeral 707 denotes a clock signal generator. The clock signal generation unit 707 generates an MCLK signal and outputs the MCLK signal to the D / A conversion unit 703, the burst signal generation unit 704, the timing signal generation unit 706, and the adjustment data addition unit 708. The MCLK signal is generated from a clock source independent from the clock source of the player 200, and is a low jitter clock signal sufficient for use in the OFDM modulation / demodulation system.

  Here, it is necessary to pay attention to the following points. The controller 210 substantially uses the player 200 as a clock source in processing related to reception from the player 200. On the other hand, in the processing related to transmission to the adapter 220, a clock signal generated inside the controller 210 is used. For this reason, there is a frequency deviation between both clocks. Therefore, even if there is no fluctuation in the period of the WS signal, the period of the WSR signal fluctuates.

  Reference numeral 708 denotes an adjustment data adding unit. The adjustment data adding unit 708 adds adjustment data having a length corresponding to the fluctuation of the period of the WSR signal output from the timing signal generation unit 706 to the OFDM symbol data input from the OFDM modulation unit 702, and a D / A conversion unit 703. Output to. The adjustment data has a length corresponding to the amount of increase / decrease in the period obtained by measuring each rise of the WSR signal. For example, in the frame 3 of FIG. 8, the length of the adjustment data is increased by the increment Tf3-Tf2 of the period of the WSR signal. As a result, the adjustment data increment Tg3-Tg2 is equal to Tf3-Tf2. The increase / decrease amount of the cycle of the WSR signal is obtained by counting the length of the cycle using the MCLK signal output from the clock signal generation unit 707 and comparing the count value of the cycle with the count value of the immediately preceding cycle. Note that the minimum length of the adjustment data is determined to be 0 or more even when the WSR signal has the shortest cycle.

  As the adjustment data, the same data as the front part of the effective symbol is used, and if it is added after the effective symbol (FIG. 9), it is effective in reducing demodulation errors due to symbol synchronization errors during OFDM demodulation. In the present embodiment, unless otherwise specified, the adjustment data will be described assuming that the same data as the front part of the effective symbol is used and added to the rear of the effective symbol.

  Reference numeral 709 denotes a transmission frequency conversion unit. The transmission frequency conversion unit 709 converts the signal output from the D / A conversion unit 703 into a carrier frequency using the burst signal output from the burst signal generation unit 704 and outputs the carrier frequency to the switching unit 705.

  As a result of the operation of each of these units, the transmission signal (TX) to the adapter 220 is a signal having a frame period that is substantially equal to the WS signal that is substantially synchronized with the clock of the player 200 and its fluctuation. A frame is composed of a fixed-length burst signal part, an OFDM signal part (consisting of a guard interval part and an effective symbol part), and an adjustment data part whose length increases or decreases in accordance with fluctuations in the WS signal.

  The configuration and operation of the adapters 220 to 225 will be described with reference to FIGS. FIG. 10 is a block diagram of the adapters 220 to 225, and FIG. 11 is a timing diagram of input / output and internal signals of the adapters 220 to 225.

  Reference numeral 1000 denotes an A / D conversion unit. The A / D converter generates an analog / digital (A / D) -converted intermediate frequency reception signal output from the reception frequency converter 1010 to generate a digitized reception signal (RXD), and an OFDM demodulator 1001 and a timing signal The data is output to the generation unit 1002.

  Reference numeral 1001 denotes an OFDM demodulator. The OFDM demodulator 1001 obtains symbol synchronization of the RXD signal input from the A / D converter 1000 using the symbol synchronization signal (SS) output from the timing signal generator 1002 and performs OFDM demodulation, and data frame (FIG. 4). ) To get. The rise of the SS signal is not at the start of the guard interval of the RXD signal as in a general OFDM modulation / demodulation system, but since the burst signal length is fixed, it is possible to acquire symbol synchronization using the SS signal. It is. The OFDM demodulator 1001 outputs the acquired data frame to the output unit 1004 together with the reproduction synchronization signal (AS). The AS signal is generated from the SS signal output from the timing signal generation unit 1002 and has a period equal to that of the SS signal including fluctuations thereof. The OFDM demodulator 1001 outputs audio data received in a frame having an RX signal at the period of an AS signal corresponding to the frame. At this time, the relationship between the period of the SD0 signal, the SD1 signal, the SD2 signal and the period of the WSR signal in the controller 210 is reproduced in the form of the period of the data output from the OFDM demodulator 1001 and the period of the AS signal. The OFDM demodulator 1001 also outputs the acquired data frame to the OFDM modulator 1005.

  Reference numeral 1002 denotes a timing signal generator. The timing signal generator 1002 generates a burst gate signal (BG), an SS signal, and an output enable signal (OE) based on the RXD signal output from the A / D converter 1000. These signals are output to the PLL unit 1003, the OFDM demodulation unit 1001, the adjustment data adding unit 1009, the D / A conversion unit 1006, and the switching unit 1008, respectively. As widely known as a symbol synchronization method in an OFDM modulation / demodulation system, an SS signal can be generated based on a correlation signal (RXDC) between an RX signal and a signal (RXDD) obtained by delaying it by an effective symbol length. At that time, it is effective to obtain a peak in the RXDC signal at the frame break. For this purpose, for example, the technique disclosed in Japanese Patent No. 3807878 can be used. The SS signal rises upon detection of the peak of the RXDC signal and falls after one clock. Similarly, the BG signal and the OE signal can be generated based on the RXDC signal. The BG signal rises upon detection of the peak of the RXDC signal, and falls after holding the H level until the end of the burst signal period. The burst signal length is a fixed length. The OE signal falls after a predetermined time (Δd) after detecting the peak of the RXDC signal, and rises after the burst signal time length (Tb) has elapsed. Δd is determined so that acoustic data received in a frame having an RX signal can be output as a TX signal in a frame having a period corresponding to the frame. In addition to the burst signal length, Δd has a length from when the RXD signal is input to the OFDM demodulator 1001 to when it is input to the D / A converter 1006. For example, GI1 and effective symbol 1 of the RX signal are output as GI1 and effective symbol 1 of the TX signal. Note that FIG. 25 is merely a schematic diagram, and the RXDC signal is different from the actual signal waveform except for the peak position.

  Reference numeral 1003 denotes a PLL unit. The PLL unit 1003 extracts a burst signal from the RX signal output from the controller 210 or the adapter connected upstream using the BG signal output from the timing signal generation unit 1002 as a window signal. Then, a continuous burst signal whose phase is synchronized with the phase locked loop (PLL) is generated. The PLL unit 1003 outputs the generated burst signal to the reception frequency conversion unit 1010, the A / D conversion unit 1000, the transmission frequency conversion unit 1007, and the switching unit 1008. The PLL unit 1003 multiplies the generated burst signal to generate a clock signal (MCLK). The PLL unit 1003 supplies the generated MCLK signal to each part of the adapter. Each part of the adapter operates in synchronization with the MCLK signal. That is, the adapters 220 to 225 use the burst signal for synchronization of the operation clock and the frequency related to the OFDM modulation / demodulation processing (carrier frequency synchronization, sampling frequency synchronization).

  Reference numeral 1004 denotes an output unit. The output unit 1004 extracts the acoustic data of its own channel from the data frame input from the OFDM demodulator 1001, performs D / A conversion based on the AS signal, amplifies it to generate an acoustic signal, and outputs it to the speaker. At this time, the output unit 1004 corrects the data arrival time difference by the adapter so that correct sound is obtained, that is, delays the output of the acoustic signal in accordance with the adapter having the slowest data arrival. At this time, the output unit 1004 may generate a signal obtained by averaging the AS signal over a plurality of periods, and output the acoustic signal according to the signal.

  Reference numeral 1005 denotes an OFDM modulation unit. The OFDM modulation unit 102 performs OFDM modulation on the data frame input from the data frame generation unit 101 to generate OFDM symbol data including an effective symbol part and a guard interval part, and outputs the OFDM symbol data to the adjustment data addition unit 1009. At this time, the OFDM modulation unit 1005 generates one OFDM symbol data from one data frame.

  Reference numeral 1006 denotes a D / A converter. The D / A converter 1006 operates in synchronization with the clock signal (MCLK) output from the PLL unit 1003. The D / A conversion unit 1006 performs D / A conversion on the data input from the adjustment data adding unit 1009 when the output enable signal (OE) output from the timing signal generation unit 1002 is at H (High) level, thereby converting the transmission frequency. Output to the unit 1007. At this time, the D / A conversion unit 506 D / A converts the OFDM symbol data to which one adjustment data is added in the 1OE signal H period.

  Reference numeral 1007 denotes a transmission frequency converter. The transmission frequency conversion unit 1007 converts the signal output from the D / A conversion unit 1006 into a carrier frequency using the burst signal output from the PLL unit 1003, and outputs it to the switching unit 1008.

  Reference numeral 1008 denotes a switching unit. Switching unit 1008 outputs the signal output from transmission frequency conversion unit 1007 to the transmission path to adapter 220 when the OE signal output from timing signal generation unit 1002 is at the H level. On the other hand, the switching unit 1008 outputs the burst signal output from the PLL unit 1003 to the transmission path to the adapter 220 when the OE signal output from the timing signal generation unit 1002 is L (Low) level.

  Reference numeral 1009 denotes an adjustment data adding unit. An adjustment data adding unit 1009 adds adjustment data having a length corresponding to the fluctuation of the cycle of the SS signal output from the timing signal generating unit 1002 to the OFDM symbol data input from the OFDM modulation unit 1005, and a D / A conversion unit 1006 Output to. The adjustment data has a length corresponding to the amount of increase / decrease of the period obtained by measuring each rise of the SS signal. For example, in FIG. 11, in frame 1, the length of the adjustment data is increased by the increment Tf1-Tf0 of the SS signal cycle. As a result, the adjustment data increment Tg1-Tg0 is equal to Tf1-Tf1. The increase / decrease amount of the cycle of the SS signal is obtained by counting the length of the cycle using the MCLK signal output from the PLL unit 1003 and comparing the count value of the cycle with the count value of the immediately preceding cycle. Note that the minimum length of the adjustment data is determined to be 0 or more even when the SS signal has the shortest cycle.

  Reference numeral 1010 denotes a reception frequency converter. The reception frequency conversion unit 1010 receives a transmission signal (RX) output from the controller 210 or an adapter connected upstream, and converts it to an intermediate frequency using a burst signal output from the PLL unit 1003 to generate an intermediate frequency reception signal. To do. The reception frequency conversion unit 1010 outputs the generated intermediate frequency reception signal to the A / D conversion unit 1000.

  As a result of the operation of each of these units, the transmission signal (TX) to the adapter connected downstream has a frame period of the same period including the reception signal received from the controller 210 or the adapter connected upstream and its fluctuation, The signals have the same configuration.

  In this embodiment, the controller 210 has been described as transmitting data for one cycle of the WS signal in one frame. However, data for a plurality of cycles of the WS signal may be transmitted in one frame. In this case, the length of the adjustment data portion is increased or decreased in accordance with the fluctuations of the plurality of periods for each of the plurality of periods of the WS signal, so that the plurality of periods of the WS signal and the frame period are substantially matched including the fluctuations. In this case, the output unit 504 of the adapters 220 to 225 generates a signal obtained by multiplying the AS signal corresponding to the WS signal by n or a signal obtained by averaging the signal obtained by multiplying the AS signal over a plurality of periods. To output an acoustic signal.

  Further, data for one cycle of the WS signal may be transmitted in a plurality of frames. In this case, the cycle of the WS signal is increased or decreased by increasing or decreasing the length of the adjustment data portion of at least one frame of the plurality of frames transmitting data for one cycle of the WS signal according to the fluctuation for each cycle of the WS signal. And the length of a plurality of frame periods, including their fluctuations, are substantially matched. In this case, the output unit 504 of the adapters 220 to 225 outputs an acoustic signal according to a signal consisting of n periods of the AS signal corresponding to the WS signal or an average of signals consisting of n periods of the AS signal over a plurality of periods. To do.

  In this embodiment, the period of the WS signal has been described as being equal to the sampling period of the acoustic signal. However, the period of the WS signal is n times or 1 / n of the sampling period of the acoustic signal (n is a positive integer). It may be. In this case, the output unit 504 of the adapters 210 to 225 performs an audio signal output process according to the output format of the multi-channel audio decoder 100 of the controller 200. For example, when the cycle of the WS signal is n times that of the acoustic signal, the acoustic signal is generated according to a signal obtained by multiplying the AS signal corresponding to the WS signal by n or a signal obtained by averaging the AS signal multiplied by n over a plurality of cycles. Output a signal. On the other hand, when the cycle of the WS signal is 1 / n times the sampling cycle of the acoustic data, the AS signal corresponding to the WS signal or the signal consisting of the AS signal n cycles is averaged over a plurality of cycles. An acoustic signal is output according to what is done.

  In the present embodiment, the adjustment data uses the same data as the effective symbol front and is added to the rear of the effective symbol. However, the adjustment data may be arbitrary data or null data (no signal), and can be inserted at an arbitrary location. it can. For example, it may be added in front of the guard interval and function as a part of the guard interval. In this case, it is substantially the same as the guard interval length increasing or decreasing according to the fluctuation of the WS signal.

  Since this embodiment includes a burst signal in a frame, this embodiment is useful when it is necessary to synchronize operation clocks and frequencies related to modulation / demodulation processing between transmission and reception devices.

  Further, in the present embodiment, a portion not including significant data is provided separately from the portion including significant data in data transmission, and the length thereof is increased or decreased. Therefore, the length of the portion including significant data is changed. Useful when it is difficult.

  Therefore, the present embodiment requires frequency synchronization related to modulation / demodulation processing between the transmitting and receiving apparatuses as in the OFDM modulation / demodulation method, and it is difficult to change the length of a portion including significant data in data transmission. Useful in cases. In the case of the OFDM modulation / demodulation system, the “portion including significant data” is an effective symbol.

  In the present embodiment, the case where acoustic data is transmitted has been described as an example. However, the present invention is not limited to this, and punctuality such as video data (including cases involving acoustic data) and various measurement data. Therefore, it can be widely applied to transmission of streaming data that requires the. In the first and second embodiments, the controller 210 and the adapters 220 to 225 have been described as being connected by cables in a daisy chain format. However, the present invention is not limited to this, and each device may be connected in a bus format. In this case, the transmission processing to the adapter connected downstream of the adapter in the adapters 220 to 225 becomes unnecessary. Further, the correction processing of the data arrival time difference by the adapter by the output units 504 and 1004 is also unnecessary.

(Other embodiments)
As mentioned above, although embodiment of this invention was explained in full detail, this invention may be applied to the system comprised from several apparatuses, and may be applied to the apparatus which consists of one apparatus.

  In the present invention, a program for realizing each function of the above-described embodiments is supplied directly or remotely to a system or apparatus, and a computer included in the system or apparatus reads and executes the supplied program code. Can also be achieved.

  Accordingly, since the functions and processes of the present invention are implemented by a computer, the program code itself installed in the computer also implements the present invention. That is, the computer program itself for realizing the functions and processes is also one aspect of the present invention.

  In this case, the program may be in any form as long as it has a program function, such as an object code, a program executed by an interpreter, or script data supplied to the OS.

  Examples of the computer-readable recording medium for supplying the program include a flexible disk, a hard disk, an optical disk, a magneto-optical disk, an MO, a CD-ROM, a CD-R, and a CD-RW. Examples of the recording medium include a magnetic tape, a non-volatile memory card, a ROM, a DVD (DVD-ROM, DVD-R), and the like.

  The program may be downloaded from a homepage on the Internet using a browser on a client computer. That is, the computer program itself of the present invention or a compressed file including an automatic installation function may be downloaded from a home page to a recording medium such as a hard disk. Further, it is also possible to divide the program code constituting the program of the present invention into a plurality of files and download each file from a different home page. That is, a WWW server that allows a plurality of users to download a program file for realizing the functions and processing of the present invention on a computer may be a constituent requirement of the present invention.

  The program of the present invention may be encrypted and stored in a computer-readable storage medium such as a computer-readable CD-ROM and distributed to users. In this case, only users who have cleared the predetermined conditions are allowed to download the key information for decryption from the homepage via the Internet, decrypt the program encrypted with the key information, execute it, and install the program on the computer. May be.

  Further, the functions of the above-described embodiments may be realized by the computer executing the read program. Note that an OS or the like running on the computer may perform part or all of the actual processing based on the instructions of the program. Of course, also in this case, the functions of the above-described embodiments can be realized.

  Furthermore, the program read from the recording medium may be written in a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer. Based on the instructions of the program, a CPU or the like provided in the function expansion board or function expansion unit may perform part or all of the actual processing. In this way, the functions of the above-described embodiments may be realized.

FIG. 2 is a block diagram illustrating a configuration of a controller according to the first embodiment. The block diagram which shows the structure of the 5.1 channel sound system in embodiment. FIG. 3 is a timing diagram of controller input / output and internal signals in the first embodiment. FIG. 3 is a diagram illustrating a configuration example of a data frame generated in the first embodiment. FIG. 3 is a block diagram illustrating a configuration of an adapter according to the first embodiment. FIG. 4 is a timing diagram of adapter input / output and internal signals in the first embodiment. FIG. 4 is a block diagram illustrating a configuration of a controller according to a second embodiment. FIG. 9 is a timing diagram of input / output and internal signals of a controller in the second embodiment. FIG. 6 is a diagram for explaining adjustment data in the second embodiment. FIG. 5 is a block diagram illustrating a configuration of an adapter according to a second embodiment. FIG. 9 is a timing diagram of adapter input / output and internal signals in the second embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Multichannel acoustic decoder 101 Data frame generation part 102 OFDM modulation part 103 D / A conversion part 104 Burst signal generation part 105 Switching part 106 Timing signal generation part 107 Clock signal generation part 109 Transmission frequency conversion part

Claims (8)

A decoder for inputting and decoding a first synchronization signal and media data based on the first clock signal;
A data frame generator for generating a data frame for each period based on the first synchronization signal decoded by the decoder;
A modulation unit that modulates the data frame generated by the data frame generation unit to generate symbol data;
A clock signal generator for generating a second clock signal independent of the first clock signal;
The first synchronization signal decoded by the decoder is reclocked with the second clock signal generated by the clock signal generation unit to generate a second synchronization signal, and from the rising edge of the generated second synchronization signal A timing signal generation unit that generates an output enable signal that rises after a predetermined time elapses and a time length of the symbol data generated by the modulation unit elapses; and
A D / A converter that generates an intermediate frequency signal by D / A converting the symbol data generated by the modulator when the output enable signal generated by the timing signal generator is at an H level;
A burst signal generator that divides and filters the second clock signal generated by the clock signal generator to generate a burst signal having a frequency equal to a carrier frequency;
A transmission frequency converter that converts the intermediate frequency signal generated by the D / A converter to a carrier frequency using the burst signal generated by the burst signal generator, and generates a carrier frequency signal;
When the output enable signal generated by the timing signal generation unit is H level, the carrier frequency signal generated by the transmission frequency conversion unit is output to a transmission line, while the output enable signal is L level, A switching unit that outputs the burst signal generated by the burst signal generation unit to a transmission path;
A transmission device comprising: The transmission apparatus according to claim 1 , wherein the predetermined time has a length equal to a time required from when the media data is output from the decoder to when the media data is input to the D / A conversion unit. A decoder for inputting and decoding a first synchronization signal and media data based on the first clock signal;
A data frame generator for generating a data frame for each period based on the first synchronization signal decoded by the decoder;
A modulation unit that modulates the data frame generated by the data frame generation unit to generate symbol data;
A clock signal generator for generating a second clock signal independent of the first clock signal;
A burst signal generator that divides and filters the second clock signal generated by the clock signal generator to generate a burst signal having a frequency equal to a carrier frequency;
The first synchronization signal decoded by the decoder is reclocked with the second clock signal generated by the clock signal generation unit to generate a second synchronization signal, and from the rising edge of the generated second synchronization signal A timing signal generating unit that generates an output enable signal that falls after a predetermined time elapses and rises after a predetermined burst signal time length elapses;
An adjustment data adding unit that adds, to the symbol data generated by the modulation unit, adjustment data having a length corresponding to a fluctuation in the period of the second synchronization signal generated by the timing signal generation unit;
When the output enable signal generated by the timing signal generation unit is at an H level, the adjustment data adding unit performs D / A conversion on the symbol data to which the adjustment data is added to generate an intermediate frequency signal. An A conversion unit;
A transmission frequency converter that converts the intermediate frequency signal generated by the D / A converter to a carrier frequency using the burst signal generated by the burst signal generator, and generates a carrier frequency signal;
When the output enable signal generated by the timing signal generation unit is H level, the carrier frequency signal generated by the transmission frequency conversion unit is output to a transmission line, while the output enable signal is L level, A switching unit that outputs the burst signal generated by the burst signal generation unit to a transmission path;
A transmission device comprising: The predetermined burst signal time length is a time of the burst signal generated by the burst signal generation unit from a time required for the media data to be input from the decoder to the D / A conversion unit. The transmission apparatus according to claim 3 , wherein the transmission apparatus has a length obtained by subtracting the length. A decoding step of inputting and decoding a first synchronization signal and media data based on the first clock signal;
A data frame generation step of generating a data frame for each period based on the decoded first synchronization signal;
A modulation step of modulating the generated data frame to generate symbol data;
A clock signal generating step of generating a second clock signal independent of the first clock signal;
The first synchronization signal decoded in the decoding step is reclocked with the second clock signal generated in the clock signal generation step to generate a second synchronization signal, and the rising edge of the generated second synchronization signal A timing signal generating step for generating an output enable signal that rises after a predetermined time elapses from and rises after a time length of the symbol data generated in the modulation step;
A D / A conversion step of generating an intermediate frequency signal by D / A converting the symbol data generated in the modulation step when the generated output enable signal is at an H level;
A burst signal generating step of dividing and filtering the second clock signal generated in the clock signal generating step to generate a burst signal having a frequency equal to a carrier frequency;
A transmission frequency conversion step of converting the intermediate frequency signal generated in the D / A conversion step into a carrier frequency using the burst signal generated in the burst signal generation step to generate a carrier frequency signal;
When the output enable signal generated in the timing signal generation step is H level, the carrier frequency signal generated in the transmission frequency conversion step is output to a transmission line, while the output enable signal is L level. An output step of outputting the burst signal generated in the burst signal generation step to a transmission line;
A transmission method characterized by comprising: A decoding step of inputting and decoding a first synchronization signal and media data based on the first clock signal;
A data frame generation step of generating a data frame for each period based on the decoded first synchronization signal;
A modulation step of modulating the generated data frame to generate symbol data;
A clock signal generating step of generating a second clock signal independent of the first clock signal;
A burst signal generating step of dividing and filtering the generated second clock signal to generate a burst signal having a frequency equal to a carrier frequency;
The first synchronization signal decoded in the decoding step is reclocked with the second clock signal generated in the clock signal generation step to generate a second synchronization signal, and the rising edge of the generated second synchronization signal A timing signal generation step of generating an output enable signal that falls after a predetermined time elapses from a predetermined burst signal time length;
An adjustment data adding step of adding adjustment data having a length corresponding to the fluctuation of the period of the second synchronization signal generated in the timing signal generation step to the symbol data generated in the modulation step;
When the output enable signal generated in the timing signal generation step is at an H level, D / A conversion is performed on the symbol data to which the adjustment data is added in the adjustment data addition step to generate an intermediate frequency signal. A conversion process;
The generated intermediate frequency signal is converted to a carrier frequency using the burst signal generated in the burst signal generation step, and a transmission frequency conversion step for generating a carrier frequency signal;
When the output enable signal generated in the timing signal generation step is H level, the carrier frequency signal generated in the transmission frequency conversion step is output to a transmission line, while the output enable signal is L level. An output step of outputting the burst signal generated in the burst signal generation step to a transmission line;
A transmission method characterized by comprising: The program for functioning a computer as a transmission apparatus of any one of Claims 1 thru | or 4 . A computer-readable storage medium storing a program for causing a computer to function as the transmission device according to any one of claims 1 to 4 .

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