JP5195463B2 - Semiconductor light receiving element and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor light receiving element.

  With the development of technology in recent years, high speed and large capacity in the fields of optical communication, optical measurement, optical information processing, etc. are indispensable, and for light receiving elements, development of semiconductor light receiving elements with excellent high speed response is indispensable. . For example, in these semiconductor light-receiving elements, in addition to the element characteristics, high reliability and high productivity capable of reducing the cost are required in terms of the use environment and the degree of freedom in package design. As an example of a semiconductor light-receiving element having a wavelength band of 1 μm to 1.6 μm, a PIN photodiode made of a compound semiconductor (hereinafter referred to as PIN-PD) (for example, Non-Patent Document 1, Non-Patent Document 2, and Patent Document 1) There are avalanche photodiodes (hereinafter referred to as APD) (for example, Patent Document 2, Non-Patent Document 3, and Patent Document 3). In these semiconductor light receiving elements, a planar type structure, a pseudo-planar type structure such as Non-Patent Document 1, Patent Document 2, and Non-Patent Document 2, or a mesa type structure such as Patent Document 1 and Patent Document 3 is employed. ing.

  The semiconductor light-receiving element is classified into one of a front-surface incident structure, a back-surface incident structure, and an end-surface incident structure depending on the light incident direction. Of these, the surface incident structure allows light to enter from the surface side of the semiconductor epitaxial layer. Therefore, there is no need for flip chip mounting, and the structure is excellent in mountability and advantageous for cost reduction. For example, the semiconductor light receiving elements described in Non-Patent Document 2, Patent Document 1, and Patent Document 2 employ a surface incident structure.

  In addition, as a technique regarding the semiconductor light receiving element, there are also those described in Patent Documents 4 to 6. Patent Document 4 discloses a second conductive type third electrode that is grounded in a photodiode including a first conductive type first electrode and a second conductive type second electrode formed on the light absorption layer. Describes a semiconductor light-receiving element formed around the second electrode. In addition, as the third electrode, it is described that a second conductivity type electrode on a ring centering on the formation position of the second electrode is used. According to the technique of Patent Document 4, it is described that the capacitance of the photodiode can be reduced by the action of the third electrode provided around the second electrode.

  Patent Document 5 describes that wiring capacity can be reduced by forming a wiring connecting a bonding pad and a light receiving element with an air bridge structure on a semiconductor layer of the light receiving element.

  In Patent Document 6, a pad portion for forming a light receiving portion and an electrode is formed at the separated position on the substrate by the same selective growth, and the pad portion and the light receiving portion are connected via an air bridge wiring. Have been described. Thus, it is described that a semiconductor light-receiving element that can be easily manufactured can be obtained.

JP 2008-16535 A JP-A-2005-285921 JP 2000-22197 A Japanese Patent Laid-Open No. 02-026082 Japanese Patent Laid-Open No. 01-175776 Japanese Patent Laid-Open No. 08-097461

ELECTRONICS LETTERS, Vol.20, No.16, pp.654-656,1984 2007 International Conference on Indium Phosphide and Related Materials Conference Proceedings, TuB3-5, pp.87-90 IEEE PHOTONICS TECHNOLOGY LETTERS, Vol.8 No.6 pp.827-829,1996

  However, in the semiconductor light-receiving element having the surface incident structure described in the above-mentioned document, it is difficult to reduce the capacity of the element, which is disadvantageous in improving the frequency characteristics.

  FIG. 11 is a perspective view of a mesa APD having a general surface incidence structure. FIG. 12 is a top view of a mesa APD having a general surface incidence structure. 13 is a cross-sectional view taken along the line DD ′ of the mesa APD shown in FIG. 11 to 13 includes a light receiving region 1110 formed of a mesa-shaped semiconductor layer, a light receiving surface 1119 that is a mesa upper surface of the light receiving region 1110, and a first light receiving region 1110 formed on the light receiving region 1110. The electrode 1112 and the second electrode 1115 formed outside the light receiving region 1110 are configured.

  The semiconductor light receiving element 9 includes an n-type InP buffer layer 1102, an InAlAs multiplication layer 1103, a p + -type InAlAs electric field relaxation layer 1104, an InGaAs light absorption layer 1105, a p-type InAlAs cap layer 1106, a p-type InGaAs on an n-type InP substrate 1101. The contact layer 1107 is sequentially stacked.

  The light receiving surface 1119 is provided on the upper surface of the mesa structure by wet etching or dry etching. The side wall of the mesa portion is covered with a protective film 1111.

  A second electrode 1115 is formed on the n-type buffer layer 1102 outside the light receiving region 1110. In order to connect to an external circuit, a first electrode bonding pad 1114 and a second electrode bonding pad 1117 are formed. The first electrode bonding pad 1114 is electrically connected to the first electrode 1112 via the lead wiring 1113. Further, the second electrode bonding pad 1117 is electrically connected to the second electrode 1115 through the lead wiring 1116. The light receiving surface 1119 is covered with an AR (Anti-Reflection) coat 1118.

  In general, the first electrode 1112 in the surface incident structure is formed in a ring shape surrounding the light receiving surface 1118 or a shape corresponding thereto in order to secure a light incident portion.

  As shown in FIGS. 11 to 13, in the semiconductor light receiving element 9 having the surface incident structure having the ring-shaped electrode 1112, the incident light is blocked by the ring-shaped first electrode 1112 formed on the outer periphery of the light-receiving surface 1119. Is done. However, a pn junction capacitance is also generated in a region immediately below the first electrode 1112 and a portion that becomes a process margin 1120 outside the first electrode 1112 necessary for the process. Therefore, the ring-shaped electrode 1112 includes a pn junction capacitance larger than the actual light receiving area in the element capacitance. Transparent electrodes such as ITO and ZnO can transmit incident light. However, when a transparent electrode is used, light absorption increases when the contact resistance is lowered in the wavelength range of 1 to 1.6 μm, which is often used in optical communications. There was a trade-off problem that the contact resistance did not decrease when the absorption was suppressed.

  In addition, the general semiconductor light-receiving element illustrated in FIGS. 11 to 13 has a process margin 1120 and thus has a disadvantageous structure from the viewpoint of reducing the size of the element.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor light-receiving device that reduces the pn junction capacitance and is advantageous in reducing the size of the device.

According to the present invention,
A semiconductor substrate;
A semiconductor layer formed on the semiconductor substrate;
A light-receiving surface provided on the upper surface of the semiconductor layer;
A first electrode formed on the semiconductor layer;
Have
The semiconductor layer comprises a semiconductor layer of a first conductivity type;
The semiconductor layer of the first conductivity type is formed immediately below the light receiving surface;
The first electrode is disposed in the light receiving surface ;
A plurality of the first electrodes are formed on the light receiving surface to be separated from each other,
The light receiving surface is circular,
Semiconductor light receiving devices in which the distances between the centers of the first electrodes are equal to each other, and the shortest distances between the centers of the first electrodes and the outer periphery of the light receiving surface are the same. An element is provided.

Moreover, according to the present invention,
Forming a semiconductor layer on the substrate;
Providing a light receiving surface on an upper surface of the semiconductor layer;
Forming a first electrode on the semiconductor layer;
Including
In the step of forming the semiconductor layer, the semiconductor layer including a semiconductor layer of a first conductivity type is formed immediately below the light receiving surface,
In the step of forming the first electrode, the first electrode is disposed in the light receiving surface ,
In the step of forming the first electrode, a plurality of the first electrodes are formed apart from each other on the light receiving surface,
The light receiving surface is circular,
In the step of forming the first electrode, the distance between the centers of the first electrodes is equal to each other, and the shortest distance between the center of the first electrode and the outer periphery of the light receiving surface is the same, A method of manufacturing a semiconductor light receiving element in which a first electrode is disposed is provided.

  According to the present invention, since the pn junction capacitance not caused by light reception can be reduced, the device capacitance can be reduced and the frequency characteristics of the semiconductor light receiving device can be improved. Further, the element can be reduced in size.

It is a perspective view of the semiconductor light receiving element of the first reference embodiment. It is a top view of the semiconductor light receiving element of the first reference embodiment. FIG. 3 is a cross-sectional view of the semiconductor light receiving element shown in FIG. 2 taken along the line AA ′. FIG. 4A is a perspective view showing the air bridge wiring according to the embodiment. 4B to 4D are cross-sectional views taken along the line BB ′ in FIG. It is a perspective view of the semiconductor light receiving element of 1st Embodiment. It is a top view of the semiconductor light receiving element of the first embodiment. FIG. 6A is a top view of the entire semiconductor light receiving element according to the first embodiment. FIG. 6B is a top view around the light receiving region. It is CC 'sectional drawing of the semiconductor light receiving element shown in FIG. It is sectional drawing which shows the semiconductor light receiving element which is 2nd reference embodiment. It is sectional drawing which shows the modification of the semiconductor light receiving element of 1st reference embodiment. It is a figure which shows the modification of the air bridge wiring which concerns on embodiment. It is a perspective view of the semiconductor light receiving element relevant to this invention. It is a top view of the semiconductor light receiving element relevant to this invention. It is DD 'sectional drawing of the semiconductor light receiving element shown in FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In all the drawings, the same reference numerals are given to the same components, and the description will be omitted as appropriate.

(First Reference Embodiment)
FIG. 1 is a perspective view of the semiconductor light receiving element of the first reference embodiment. FIG. 2 is a top view of the semiconductor light receiving element of the first reference embodiment. 3 is a cross-sectional view taken along the line AA ′ of the semiconductor light receiving element shown in FIG. The semiconductor light receiving element 1 of this embodiment includes an n-type semiconductor substrate 101, a mesa-shaped light receiving region 110 formed on the n-type semiconductor substrate 101, a light receiving surface 119 that is a mesa upper surface of the light receiving region 110, and a light receiving region 110. A p-type electrode (first electrode) 112 formed thereon. The light receiving region 110 includes a p-type contact layer 107 (first conductivity type semiconductor layer). The p-type contact layer 107 is formed over the entire surface immediately below the light receiving surface 119. The p-type electrode 112 is disposed in the light receiving surface 119.

  Specifically, in this embodiment, one p-type electrode 112 is formed on the light receiving surface 119. As shown in FIG. 2, the center of the p-type electrode 112 is located at the center of the light receiving surface 119. 1 and 2 show an example in which the light receiving surface 119 is circular, the light receiving surface 119 may be elliptical or rectangular.

  The area ratio of the p-type electrode 112 to the light receiving surface 119 is preferably 20% or less, and more preferably 10% or less. By doing so, it is possible to satisfactorily obtain the effect of improving the response speed by reducing the pn junction capacitance and the effect of cost reduction and space saving by reducing the element size.

  The semiconductor light receiving element 1 may include a bonding pad 114 (first conductivity type pad) for the p-type electrode 112 outside the light receiving surface 119 in order to connect to an external circuit. An air bridge wiring 113 is used as a lead wiring for the p-type electrode 112, and the p-type electrode 112 and the bonding pad 114 are electrically connected. At this time, the air bridge wiring 113 is formed so as to straddle the light receiving surface 119. When light is blocked by the air bridge wiring 113, the number of PN junction surfaces not caused by light reception is increased. However, by forming the air bridge wiring 113 so as to straddle the light receiving surface 119, it is possible to reduce the pn junction capacitance not caused by light reception.

  FIG. 4 is a diagram showing the air bridge wiring 113. FIG. 4A is a perspective view of the air bridge wiring 113. 4B to 4D are cross-sectional views taken along the line BB ′ in FIG. As shown in FIGS. 4B to 4D, the air bridge wiring 113 on the p-type electrode 112 side relatively narrows the wiring width on the side facing the light receiving surface 119. By doing so, the wraparound of incident light is improved, and the light receiving surface 119 is not hindered from receiving light. Moreover, since the cross-sectional area of the wiring can be increased by relatively widening the wiring width on the upper surface side of the wiring, the resistance of the wiring can be reduced.

  The semiconductor light receiving element 1 is a mesa APD having a surface incident structure. Hereinafter, an example of the semiconductor light receiving element 1 will be described in detail.

  The semiconductor light receiving element 1 includes an n-type InP buffer layer 102, an InAlAs multiplication layer 103, a p + -type InAlAs electric field relaxation layer 104, an InGaAs light absorption layer 105, a p-type InAlAs cap layer 106, and a p-type InGaAs on an n-type InP substrate 101. It has a light receiving region 110 formed of a mesa-like semiconductor layer in which contact layers 107 are sequentially stacked.

  The light receiving region 110 is formed with a mesa structure by wet etching or dry etching. The mesa upper surface of the light receiving region 110 is a light receiving surface 119. The side wall of the mesa portion is covered with a protective film 111. A p-type electrode 112 as a first electrode is formed on the p-type InGaAs contact layer 107 and connected to a p-type electrode bonding pad 114 formed on the protective film 111 outside the light receiving surface 119 by an air bridge wiring 113. ing. The p-type electrode 112 is formed at the center of the circular light receiving surface 119 and is located at an equal distance from the entire outer peripheral portion of the light receiving surface 119.

  An n-type electrode 115 as a second electrode is formed on the n-type InP buffer layer 102 outside the light receiving region 110. Further, an n-type electrode bonding pad 117 on the protective film 111 is formed for connection to an external circuit. The n-type electrode 115 and the n-type electrode bonding pad 117 are electrically connected through the lead wiring 116. All portions of the light receiving surface 119 other than the p-type electrode 112 are covered with an AR coat 118.

  Next, a manufacturing method of the semiconductor light receiving element 1 will be described with reference to FIG. First, an epitaxial layer (semiconductor layers 102 to 107) is formed on the n-type semiconductor substrate 101 using a gas source MBE, a solid source MBE, MO-MBE, or the like.

  Next, a mesa-shaped light receiving region 110 is formed in the epitaxial layer by wet etching or dry etching using a bromine-based etching solution.

  Next, an AR coat 118 is formed on the upper surface of the light receiving region 110. The mesa side wall and the mesa bottom surface are covered with a protective film 111. The protective film 111 can be formed of an inorganic insulating film such as SiOx or SiNx or an organic insulating film such as polyimide or BCB.

  Next, the p-type electrode 112 and the n-type electrode 115 are formed by vacuum-depositing an electrode metal such as Ti / Pt / Au, Au / Ge / Ni, or AuZn. The p-type electrode 112 is disposed in the light receiving surface 119 and formed at a position separated from the outer periphery of the light receiving surface 119.

  Next, the p-type electrode 112 and the p-type electrode bonding pad 114 on the protective film 111 are electrically connected via the air bridge wiring 113. Further, the n-type electrode 115 and the n-type electrode bonding pad 117 on the protective film 111 are electrically connected through the lead wiring 116. Thus, the semiconductor light receiving element 1 is obtained.

  It continues and demonstrates the effect of the semiconductor light receiving element 1 of this embodiment. In this embodiment, a p-type semiconductor layer (p-type contact layer 107) is formed immediately below the light receiving surface 119 on which the p-type electrode 112 is formed. Thereby, an electric field can be uniformly applied to the light receiving region 110. On the other hand, since the p-type electrode 112 is disposed in the light receiving surface 119, the pn junction surface corresponding to the area of the p-type electrode 112 that does not contribute to light reception can be reduced as compared with the conventional case. Therefore, the pn junction capacitance that is not caused by light reception can be reduced to reduce the capacitance of the element. Further, by disposing the p-type electrode 112 in the light receiving surface 119, the process margin required for the ring-shaped electrode is not required, and the element can be reduced in size. Therefore, according to the semiconductor light receiving element 1, it is possible to reduce the element size while reducing the element capacity of the semiconductor light receiving element and improving the frequency characteristics.

  The conventional semiconductor light-receiving element 9 having a front-illuminated structure shown in FIGS. 11 to 13 has a problem that it is difficult to reduce the capacity of the element, which is disadvantageous in improving frequency characteristics. This was caused by the ring-shaped first electrode 1112 formed so as to surround the outer periphery of the light receiving surface 1119. In the light receiving region 1110, the region immediately below the first electrode 1112 does not contribute to light reception because incident light is blocked by the electrode metal. However, a pn junction capacitance is also generated in the process margin 1120 outside the electrode 1112 necessary for manufacturing and the area of the first electrode 1112. For this reason, in the element having the ring-shaped electrode 1112, a pn junction capacitance larger than the actual light receiving area is included in the element capacitance, and it is difficult to reduce the capacitance of the element.

For example, when the mesa upper surface of the light receiving region 1110 is circular with a diameter of 50 μm, the width of the first electrode 1112 is 5 μm, and the process margin 1120 is 3 μm, the area of the upper surface of the mesa of the light receiving region 1110 is 3.42 × 10 ⁻⁵ cm ^2. On the other hand, the area of the first electrode 1112 and the process margin 1120 is 1.46 × 10 ⁻⁵ cm ² . Therefore, the first electrode 1112 that does not contribute to light reception and the process margin 1120 portion occupy 43% of the area of the upper surface of the mesa of the light receiving region 1110, and an extra pn junction capacitance corresponding to this area increases the element capacitance. Specifically, in the case of an APD having a semiconductor structure in which the pn junction capacitance per 1 cm ² of the semiconductor light receiving element 9 is 12 nF, the pn junction capacitance of the entire element is 0.428 pF, and it does not contribute to light reception. The pn junction capacitance corresponding to the 1 electrode 1112 portion and the process margin 1120 portion is 0.183 pF.

On the other hand, in the semiconductor light receiving element 1, the p-type electrode 112 is disposed in the light receiving surface 119. By doing so, it is possible to eliminate the process margin 1120 that is not involved in light reception. For example, when the diameter of the mesa upper surface of the light receiving region 110 is 50 μm and the diameter of the p-type electrode 112 is 5 μm, the area of the light receiving surface 119 is 1.96 × 10 ⁻⁵ cm ² . Since the area of the portion shielded by the p-type electrode 112 is 0.02 × 10 ⁻⁵ cm ² , in the case of an APD having a semiconductor layer structure with a pn junction capacitance per 1 cm ² of 12 nF, the pn of the entire light receiving region 110 The junction capacitance is 0.245 pF. On the other hand, the pn junction capacitance corresponding to the p-type electrode 112 portion that does not contribute to light reception is 0.0025 pF, and can be about 1% of the entire light receiving region 110. Therefore, by reducing the area of the p-type electrode 112 disposed on the light receiving surface, it is possible to reduce the addition of extra pn junction capacitance.

  As described above, in the semiconductor light receiving element 1, an effect of greatly reducing the pn junction capacitance can be obtained compared to the conventional semiconductor light receiving element. In addition, since the semiconductor light receiving element 1 has a band limitation due to the CR time constant, an effect of improving the response speed by reducing the element capacity can be obtained.

  Further, the conventional semiconductor light-receiving element 9 having the front-surface incident structure shown in FIGS. 11 to 13 has a problem that it is disadvantageous for reducing the size of the element. This was caused by the ring-shaped first electrode 1112 formed on the mesa upper surface of the light receiving region 1110 so as to surround the outer periphery of the light receiving surface 1119. Thus, in addition to the area of the light receiving surface 1119 that receives light, the area of the first electrode 1112 and the area of the process margin 1120 outside the electrode necessary for manufacturing are required.

For example, when the mesa upper surface of the light receiving region 1110 is circular with a diameter of 50 μm, the width of the first electrode 1112 is 5 μm, and the process margin 1120 is 3 μm, the area of the mesa upper surface of the semiconductor light receiving element 9 is 3.42 × 10 ^−5. cm ² .

On the other hand, according to the semiconductor light receiving element 1, the p-type electrode 112 is disposed in the light receiving surface 119. By doing so, it is possible to eliminate the process margin 1120 that is not involved in light reception. For example, when the diameter of the mesa upper surface of the light receiving region 110 is 50 μm and the diameter of the p-type electrode 112 is 5 μm, the area of the upper surface of the mesa of the light receiving region 110 is 1.98 × 10 ⁻⁵ cm ² . Therefore, although the area where light can be received is the same, the area of the mesa upper surface of the light receiving region 110 is reduced by 40% or more compared to the mesa upper surface of the light receiving region 1110. Therefore, it is advantageous for reducing the size of the element, and cost reduction and space saving of the module can be achieved.

  In the semiconductor light receiving element 1, the p-type electrode 112 formed on the light receiving surface 119 and the bonding pad 114 for the p-type electrode 112 formed outside the light receiving region 110 are connected via an air bridge wiring 113. For this reason, compared to the wiring directly formed on the semiconductor surface, the incident light is likely to go around the light receiving surface under the wiring, and the shielding of the incident light is reduced. Therefore, it is possible to connect to an external circuit without increasing the portion not involved in light reception, and it is possible to maintain the uniformity of light absorption in the light receiving region 110.

  As described above, according to the semiconductor light receiving element 1, it is possible to provide a semiconductor light receiving element that has high performance and high reliability and is easy to manufacture.

(First Embodiment)
FIG. 5 is a perspective view of the semiconductor light receiving element of the first embodiment. FIG. 6 is a top view of the semiconductor light receiving element of the first embodiment. FIG. 6A is a top view of the entire semiconductor light receiving element according to the first embodiment, and FIG. 6B is a top view around the light receiving surface 619. 7 is a cross-sectional view taken along the line CC ′ of the semiconductor light receiving element shown in FIG. In the semiconductor light receiving element 2 of the present embodiment, four p-type electrodes (first electrodes) 612 are formed on the light receiving surface 619 so as to be separated from each other. As shown in FIG. 6A, the light receiving surface 619 has a circular shape. As shown in FIG. 6B, the distances (r) between the centers of the p-type electrodes 612 are equal to each other, and the shortest distance (r) between the center of the p-type electrode 612 and the outer periphery of the light receiving surface 619 is obtained. The p-type electrodes 612 are arranged at the same positions.

  The semiconductor light receiving element 2 is a mesa type APD having a surface incident structure. Hereinafter, an example of the semiconductor light receiving element 2 will be described in detail.

  The semiconductor light receiving element 2 includes an n-type InP buffer layer 602, an InAlAs multiplication layer 603, a p + -type InAlAs electric field relaxation layer 604, an InGaAs light absorption layer 605, a p-type InAlAs cap layer 606, and a p-type InGaAs. A light receiving region 610 is formed of a semiconductor layer in which contact layers 607 are sequentially stacked. The light receiving region 610 is formed with a mesa structure by wet etching or dry etching. The mesa upper surface of the light receiving region 610 is a light receiving surface 619.

  The side wall of the mesa portion of the light receiving region 610 is covered with a protective film 611. The p-type InGaAs contact layer 607 is formed with four p-type electrodes 612 that are first electrodes, and a p-type electrode lead-out wiring 625 formed on the protective film 611 outside the light receiving region 610 by the air bridge wiring 613. Connected with.

  As shown in FIG. 6B, the p-type electrode 612 has a region in which a range of a radius r in which the resistance around each electrode is a constant value R or less is overlapped (in other words, the resistance to the electrode is a constant value). Each electrode is equidistant and the shortest distance between each electrode and the outer periphery of the light receiving range is equally arranged so that a range 630) of R or less covers the entire light receiving surface 619.

  An n-type electrode 615 as a second electrode is formed on the n-type InP buffer layer 602 outside the light receiving region 610 and is electrically connected to the n-type electrode bonding pad 617 on the protective film 611. The light receiving surface 619 is all covered with an AR coat 618 except for the p-type electrode 612.

  In the semiconductor light receiving element 2, each p-type electrode 612 is located at the center of a range 630 of a radius r where the resistance from the optical carrier generation position to the electrode is a certain value R or less. The distance from the generation position of the photocarrier to the nearest electrode is a resistance in the surface direction of the light receiving surface with respect to the photocurrent, and the resistance value is a value determined by the sheet resistance of the p-type semiconductor layer and the distance to the nearest electrode. . That is, the resistance value R with respect to the photocurrent is determined by the sheet resistance of the p-type InGaAs contact layer 607 and the distance from the photocarrier generation position to the p-type electrode 612. It is obvious that the resistance value R increases as the distance increases. Since the arrival time of the generated optical carrier to the electrode is influenced by the above-described resistance value R depending on the light receiving region, the distance from the generation position of the optical carrier to the nearest electrode finally depends on the response speed of the element and the signal Influences the rise and fall time. Therefore, the response speed can be improved by reducing the distance.

  Further, in the semiconductor light receiving element 2, the air bridge wiring 613 is connected to the p-type electrode lead wiring 625 formed on the protective film 611 outside the light receiving region 610. For this reason, incident light easily goes around the light receiving surface under the wiring, and a portion not involved in light reception is reduced, and variation in light receiving sensitivity on the light receiving surface is improved.

  More preferably, the air bridge wiring 613 has a shape in which the side close to the surface of the light receiving surface 619 is narrow and widens upward like the air bridge wiring 113 shown in FIG. By doing so, it is possible to improve the wraparound of incident light and reduce the resistance of the wiring.

  The semiconductor light receiving element 2 is obtained by the same manufacturing method as the semiconductor light receiving element 1.

( Second Reference Embodiment)
FIG. 8 is a cross-sectional view showing a semiconductor light receiving element 3 according to the second embodiment. The semiconductor light receiving element 3 is a mesa PIN-PD having a front-surface incident structure.

  In this structure, an n-type InP buffer layer 1002, an undoped InGaAs layer 1003, a p-type InP layer 1004, and a p-type InGaAs contact layer 1005 are sequentially stacked on an n-type InP substrate 1001. The light receiving region 1010 formed of the semiconductor layer is formed with a mesa structure by wet etching or dry etching. The mesa upper surface of the light receiving region 1010 is a light receiving surface 1019. A side wall of the mesa portion is covered with a protective film 1011. A p-type electrode 1012, which is a first electrode, is formed in the light-receiving surface 1019 and is electrically connected to a p-type electrode bonding pad 1014 formed on the protective film 1011 outside the light-receiving region 1010 by an air bridge wiring 1013. ing.

  The p-type electrode 1012 is formed at the center of the circular light receiving surface 1019 and is equidistant from the entire outer peripheral portion of the light receiving surface 1019. An n-type electrode 1015 as a second electrode is formed on the n-type InP buffer layer 1002 outside the light receiving region 1010, and an n-type electrode bonding pad on the protective film 1011 through an n-type electrode lead-out wiring 1016. 1017 is electrically connected. All portions of the light receiving surface 1019 other than the p-type electrode 1012 are covered with an AR coat 1018.

  In the mesa PIN-PD having such a front-surface incident structure, the p-type electrode 1012 formed on the light receiving surface 1019 is formed at the center of the circular light receiving surface 1019. Therefore, from the p-type electrode 1012 to the outer periphery of the light receiving surface 1019. Is the same for any position on the circumference. Therefore, similar to the semiconductor light receiving element 1, a uniform optical response can be obtained in the light receiving surface 1019.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

  For example, in the semiconductor light receiving element 1, the p-type contact layer 107 is formed over the entire surface immediately below the light receiving surface 119. However, the p-type contact layer 107 is formed to reduce the contact resistance with the electrode metal. Therefore, as shown in the cross-sectional view of FIG. 9, the p-type InGaAs contact layer 507 in a region other than the region immediately below the first electrode 512 metal may be removed. In particular, in the wavelength band of 1 μm to 1.6 μm, which is often used for communication, etc., the absorption by InGaAs is large, so that the light receiving sensitivity can be improved by removing the InGaAs contact layer 507. Even in this case, the p-type cap layer 506 is formed directly below the light receiving surface 519. Therefore, the electric field can be applied uniformly, the rising voltage can be reduced, and the response speed can be improved.

  FIG. 9 shows a semiconductor light receiving element 5 which is a modification of the semiconductor light receiving element 1. The semiconductor light receiving element 5 includes an n-type InP buffer layer 502, an InAlAs multiplication layer 503, a p + -type InAlAs electric field relaxation layer 504, an InGaAs light absorption layer 505, a p-type InAlAs cap layer 506, and a p-type InGaAs on an n-type InP substrate 501. It has a light receiving region 510 formed of a semiconductor layer in which contact layers 507 are sequentially stacked. The mesa upper surface of the light receiving region 510 is a light receiving surface 519.

  The light receiving region 510 is formed with a mesa structure by wet etching or dry etching. The mesa upper surface of the light receiving region 510 is a light receiving surface 519. The side wall of the mesa portion of the light receiving region 510 is covered with a protective film 511. A p-type electrode 512 as a first electrode is formed on the p-type InGaAs contact layer 507 and connected to a p-type electrode bonding pad 514 formed on the protective film 511 outside the light receiving region 510 by an air bridge wiring 513. Yes. The p-type electrode 512 is formed at the center of the circular light receiving surface 519 and is located at an equal distance from the entire outer peripheral portion of the light receiving surface 519.

  An n-type electrode 515 as a second electrode is formed on the n-type InP buffer layer 502 outside the light receiving region 510, and is electrically connected via an n-type electrode bonding pad 517 on the protective film 511 and an extraction wiring 516. It is connected to the. All portions of the light receiving surface 519 other than the p-type electrode 512 are covered with an AR coat 518.

  Also in the semiconductor light receiving element 2, the purpose of the p-type InGaAs contact layer 607 is to reduce the contact resistance with the electrode metal. Therefore, the p-type InGaAs contact layer 607 in a region other than the region immediately below the first electrode metal may be removed.

  In each of the above embodiments, the p-type electrode, which is the first electrode, and the first electrode bonding pad are connected by the air bridge wiring. However, instead of the air bridge wiring, a lead wiring 913 formed on a pedestal 921 made of a trapezoidal insulating film formed on the light receiving surface as shown in FIG. 10 is adopted as the lead wiring for the first electrode 912. May be. In this way, incident light can easily go around the light receiving surface under the wiring and can be prevented from being blocked by the wiring. Therefore, the portion not involved in light reception is reduced, and the variation in light reception sensitivity on the light receiving surface is improved.

  Here, in the manufacturing method in which the electrode wiring is formed on the pedestal made of the insulating film, an insulating film of the same quality as the AR coating 518 is formed before the step of forming the AR coating 518 in the manufacturing method described above. By forming a film and etching, a wiring base is formed on the light receiving region.

  Moreover, in the said embodiment, although the n-type semiconductor substrate was used with respect to the mesa type semiconductor light receiving element, a semi-insulating semiconductor substrate may be used.

  In the above embodiments, APDs and PIN photodiodes have been described. However, the same effect can be obtained with other photodiodes as long as they are semiconductor light-receiving elements having a front-illuminated structure.

  In the above-described embodiments, the mesa type is described. However, a planar type or a pseudo-planar type may be used as long as it is a semiconductor light-receiving element having a surface incidence structure.

  Moreover, in the said embodiment, although the semiconductor light receiving element formed by the compound semiconductor layer of InP, InAlAs, and InGaAs is illustrated, the compound chosen from the group which consists of In, Ga, Al, As, P, Sb, N You may be comprised with the semiconductor.

  Needless to say, the above-described embodiment and a plurality of modifications can be combined within a range in which the contents do not conflict with each other. Further, in the above-described embodiments and modifications, the structure of each part has been specifically described, but the structure and the like can be changed in various ways within the scope of the present invention.

  Specific embodiments of the present invention will be described below with reference to the drawings.

( Reference Example 1)
A first reference example will be described with reference to FIGS. On the n-type InP substrate 101, the n-type InP buffer layer 102 is about 1 μm, the InAlAs multiplication layer 103 is 0.2 μm to 0.5 μm, the p + -type InAlAs electric field relaxation layer 104 is 0.05 μm or less, and the InGaAs light absorption layer 105 is formed. The gas source MBE method was used to sequentially stack 0.5 μm to 1 μm, the p-type InAlAs cap layer 106 to 0.3 μm, and the p-type InGaAs contact layer 107 to 0.1 μm. Next, the outside of the circular light-receiving region 110 having a diameter of 50 μm is etched with an etchant such as a bromine system so as to reach the inside of the n-type InP buffer layer 102 to form the light-receiving region 110, and then the mesa side wall of the light-receiving region 110 is made of SiNx. Covered with a protective film 111. A p-type electrode 112 as a first electrode was formed in the center on the light receiving region 110, and an n-type electrode 115 as a second electrode was formed on the n-type InP buffer layer 102 outside the light receiving region 110. Next, on the upper surface of the light receiving region 110, all parts other than the p-type electrode 112 were covered with the AR coating 118 to form the light receiving surface 119. Next, the p-type electrode 112 is electrically connected to the first electrode bonding pad 114 formed on the protective film 111 outside the light receiving region 110 by the air bridge wiring 113, and the n-type electrode 115 is protected outside the light receiving region 110. After being electrically connected to the n-type electrode bonding pad 117 formed on the film 111, the n-type InP substrate 101 was polished to about 100 to 150 μm. Through the above process, a mesa-type APD having a surface incidence structure according to the first reference example of the present invention was manufactured.

  With this device, the junction capacitance can be greatly reduced, and high-speed characteristics with a maximum bandwidth of 10 GHz were obtained.

(Example 1 )
A first embodiment will be described with reference to FIGS. On the n-type InP substrate 601, the n-type InP buffer layer 602 is about 1 μm, the InAlAs multiplication layer 603 is 0.2 μm to 0.5 μm, the p + -type InAlAs electric field relaxation layer 604 is 0.05 μm or less, and the InGaAs light absorption layer 605 is formed. 0.5 μm to 1 μm, a p-type InAlAs cap layer 606 of 0.3 μm, and a p-type InGaAs contact layer 607 of 0.1 μm were sequentially stacked by the gas source MBE method. However, the doping concentration of the p-type InAlAs cap layer 606 and the p-type InGaAs contact layer 607 of this element is set so that the sheet resistance is about half that of the element of Reference Example 1 described above. Next, the outside of the circular light-receiving region 610 having a diameter of 50 μm is etched with an etchant such as a bromine system so as to reach the inside of the n-type InP buffer layer 602, thereby forming the light-receiving region 610. Covered with a protective film 611. Four p-type electrodes 612 that are first electrodes are formed on the light-receiving region 610, and an n-type electrode 615 that is the second electrode is formed on the n-type InP buffer layer 602 outside the light-receiving region 610. Next, on the upper surface of the light receiving region 610, all parts other than the p-type electrode 612 were covered with the AR coating 618 to form a light receiving surface 619. Next, each p-type electrode is electrically connected to the p-type electrode bonding pad 614 formed on the protective film 611 outside the light receiving region 610 by the air bridge wiring 613, and the n type electrode 615 is protected outside the light receiving region 610. After being electrically connected to the n-type electrode bonding pad 617 formed on the film 611, the n-type InP substrate 601 was polished to about 100 to 150 μm. Through the above process, a mesa APD having a surface incidence structure according to the first embodiment of the present invention was manufactured.

  With this device, the junction capacitance can be greatly reduced, and high-speed characteristics with a maximum bandwidth of 10 GHz were obtained.

( Reference Example 2 )
A second reference example will be described with reference to FIG. An n-type InP buffer layer 1002 is 1 to 1.5 μm, an undoped InGaAs layer 1003 is 1 to 2 μm, a p-type InP layer 1004 is 0.3 to 0.5 μm, and a p-type InGaAs contact layer 1005 is formed on an n-type InP substrate 1001. The layers were sequentially stacked by a gas source MBE method such as 0.1 μm. Next, the outer side of the circular light-receiving region 1010 having a diameter of 50 μm is etched with an etchant such as a bromine system so as to reach the inside of the n-type InP buffer layer 1002, and then the light-receiving region 1010 is formed. Cover with a protective film 1011. A p-type electrode 1012 that is the first electrode is formed in the center on the light receiving region 1010, and an n-type electrode 1015 that is the second electrode is formed on the n-type InP buffer layer 1002 outside the light receiving region 1010. Next, all portions of the upper surface of the light receiving region 1010 other than the p-type electrode 1012 were covered with the AR coating 1018 to form a light receiving surface 1019. Next, the air bridge wiring 1013 is formed on the protective film 1011 outside the light receiving region 1010 and is electrically connected to the p-type electrode bonding pad 1014, and the n-type electrode 1015 is formed on the protective film 1011 outside the light receiving region 1010. After being electrically connected to the n-type electrode bonding pad 1017, the n-type InP substrate 1001 was polished to about 100 to 150 μm. Through the above process, a mesa PIN-PD having a front-illuminated structure according to the second reference example of the present invention was produced.

  In this device, the junction capacitance can be greatly reduced, and high-speed characteristics with a maximum bandwidth of 10 GHz or more can be obtained.

DESCRIPTION OF SYMBOLS 1 Semiconductor light receiving element 2 Semiconductor light receiving element 3 Semiconductor light receiving element 5 Semiconductor light receiving element 9 Semiconductor light receiving element 101 n type semiconductor substrate 102 n type buffer layer 103 multiplication layer 104 p + type electric field relaxation layer 105 light absorption layer 106 p type cap layer 107 p-type contact layer 110 light-receiving region 111 protective film 112 p-type electrode 113 air bridge wiring 114 p-type electrode bonding pad 115 n-type electrode 116 n-type electrode lead-out wiring 117 n-type electrode bonding pad 118 AR coating 119 light-receiving surface 501 n-type semiconductor substrate 502 n-type buffer layer 503 multiplication layer 504 p + type electric field relaxation layer 505 light absorption layer 506 p-type cap layer 507 p-type contact layer 510 light-receiving region 511 protective film 512 p-type electrode 513 air bridge wiring 514 p-type Electrode bonding pad 515 Type electrode 516 Lead-out wiring 517 n-type electrode bonding pad 518 AR coating 519 Light-receiving surface 601 n-type semiconductor substrate 602 n-type buffer layer 603 multiplication layer 604 p + electric field relaxation layer 605 light absorption layer 606 p-type cap layer 607 p-type contact Layer 610 Light-receiving region 611 Protective film 612 P-type electrode 613 Air bridge wiring 614 P-type electrode bonding pad 615 n-type electrode 617 n-type electrode bonding pad 618 AR coating 619 Light-receiving surface 625 p-type electrode lead-out wiring 630 Range 912 in which resistance is less than or equal to R 912 First electrode 913 First electrode lead-out wire 921 Base 1001 n-type semiconductor substrate 1002 n-type buffer layer 1003 n-type semiconductor layer 1004 p-type semiconductor layer 1005 p-type contact layer 1010 light-receiving region 1011 Protective film 012 p-type electrode 1013 air bridge wiring 1014 p-type electrode bonding pad 1015 n-type electrode 1016 n-type electrode lead-out wiring 1017 n-type electrode bonding pad 1018 AR coating 1019 light-receiving surface 1101 n-type semiconductor substrate 1102 n-type buffer layer 1103 Multiplier layer 1104 p + electric field relaxation layer 1105 light absorption layer 1106 p-type cap layer 1107 p-type contact layer 1110 light-receiving region 1111 protective film 1112 first electrode 1113 first electrode lead-out wiring 1114 first electrode bonding pad 1115 second electrode 1116 Second electrode lead-out wiring 1117 Second electrode bonding pad 1118 AR coating 1119 Light receiving surface 1120 Process margin

Claims (8)

A semiconductor substrate;
A semiconductor layer formed on the semiconductor substrate;
A light-receiving surface provided on the upper surface of the semiconductor layer;
A first electrode formed on the semiconductor layer;
Have
The semiconductor layer comprises a semiconductor layer of a first conductivity type;
The semiconductor layer of the first conductivity type is formed immediately below the light receiving surface;
The first electrode is disposed in the light receiving surface ;
A plurality of the first electrodes are formed on the light receiving surface to be separated from each other,
The light receiving surface is circular,
Semiconductor light receiving devices in which the distances between the centers of the first electrodes are equal to each other, and the shortest distances between the centers of the first electrodes and the outer periphery of the light receiving surface are the same. element.   The semiconductor light receiving element according to claim 1, wherein the first conductivity type semiconductor layer is a first conductivity type contact layer or a first conductivity type cap layer. The semiconductor light receiving device according to claim 1 or 2 area ratio of the first electrode with respect to the light receiving surface is 20% or less. A pad having the same potential as the first electrode formed outside the semiconductor layer;
An air bridge wiring for electrically connecting the first electrode and the pad;
Further comprising
The air-bridge wiring, the semiconductor light receiving device according to any one of claims 1 to 3 straddling the light receiving surface. The semiconductor light receiving element according to claim 4 , wherein the air bridge wiring has a relatively narrow wiring width on the side facing the light receiving surface. A pad having the same potential as the first electrode formed outside the semiconductor layer;
A lead wiring that electrically connects the first electrode and the pad;
Further comprising
The semiconductor light receiving device according to trapezoidal shape of the insulating film is any one of claims 1 to 3 is formed between the lead-out wiring and the light receiving surface. The semiconductor light receiving device according to any one of claims 1 to 6 wherein the semiconductor layer is formed in a mesa shape. Forming a semiconductor layer on the substrate;
Providing a light receiving surface on an upper surface of the semiconductor layer;
Forming a first electrode on the semiconductor layer;
Including
In the step of forming the semiconductor layer, the semiconductor layer including a semiconductor layer of a first conductivity type is formed immediately below the light receiving surface,
In the step of forming the first electrode, the first electrode is disposed in the light receiving surface ,
In the step of forming the first electrode, a plurality of the first electrodes are formed apart from each other on the light receiving surface,
The light receiving surface is circular,
In the step of forming the first electrode, the distance between the centers of the first electrodes is equal to each other, and the shortest distance between the center of the first electrode and the outer periphery of the light receiving surface is the same, A method for manufacturing a semiconductor light-receiving element in which a first electrode is disposed .

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