JP5181696B2 - Image processing apparatus, image processing method, and program - Google Patents

Description

  The present invention relates to an image processing apparatus, an image processing method, and a program for outputting a video corresponding to an input analog video signal.

  Recently, with the improvement in performance of computer technology including personal computers, the resolution of image data to be handled is also increasing.

  For example, the same applies to a projector-type liquid crystal television that displays a television signal, and a technique is considered in which the resolution of the image on the projection screen is increased without increasing the number of pixels of a single liquid crystal module.

. (For example, Patent Document 1)
JP-A-11-160669

  Japanese Patent Application Laid-Open No. H10-228667 is a technique for achieving high resolution using a plurality of liquid crystal modules when the number of pixels of the liquid crystal modules that can be used is limited in the output unit of the projection type liquid crystal display device.

  On the other hand, even in a data projector apparatus that performs presentation by connecting to a device that does not require such a high resolution, such as a personal computer, the resolution of the input image data is higher than the resolution of the original image data handled in the apparatus. If it is high, it is necessary to sample by sampling the image data at the input unit.

FIG. 7 shows the concept of downsampling in general A / D conversion.
FIG. 7A illustrates a case where the resolution of the input image data matches the number of samplings. In FIG. 3A, the connected rectangle indicates the resolution of each image data, and the arrow indicates the sampling position. As described above, when the resolution of the input image data matches the number of samplings, it is possible to project a natural image utilizing the resolution of the input image data.

  FIG. 7B illustrates the case of so-called half sampling, in which the number of samplings is half that of the resolution of the input image data. One pixel is sampled for every two pixels of input image data, and as a result, one pixel is skipped and thinned out. As a result, the amount of data is literally halved, and only low resolution images can be displayed (projected).

  FIG. 7C illustrates the case of downsampling to 8/10 of the input image data. As shown in the figure, the sampling position gradually shifts from the pixel position of the input image data. Therefore, for example, when there is a pattern such as a table ruled line in the image data, a thick line and a thin line may be mixed depending on the position, resulting in a very unnatural description.

  Therefore, an A / D converter having a resolution at least equal to the resolution of the input image data must be used, which may lead to an increase in manufacturing cost of the entire apparatus.

  In other words, this means that if the A / D conversion unit having a relatively low resolution can be used to support high resolution image data, the manufacturing cost of the entire apparatus can be reduced as a result. doing.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an image processing apparatus capable of handling high-resolution image data using an A / D conversion unit having a low resolution, An object is to provide an image processing method and program.

The invention according to claim 1 is an input means for inputting an analog image signal, a digitizing means for sampling and digitizing the image signal inputted by the input means, and a dot clock for the image signal inputted by the input means. acquires, determining means for determining whether there is a need for down-sampled from the dot clock of the image signal to be input at a sampling rate and said input means of said digitizing means, necessary for the down-sampled by said determining means If the image signal input by the input means is sampled at the first sampling position by skipping one pixel using the digitizing means, the pixel signal is shifted by one pixel from the image signal. Sampling control means for sampling at a second sampling position for skipping pixels, and the sampling control means And wherein more that equipped with storage means for storing according to the original pixel array an image signal of a digital value obtained from the digitizing means, and output means for outputting the image signal stored in the memory means.

  According to the present invention, it is possible to support high-resolution image data even when an A / D conversion unit having a low resolution is used.

  An embodiment in which the present invention is applied to a DLP (registered trademark) data projector apparatus will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a functional configuration of an electronic circuit included in the data projector device 10 according to the embodiment.
In the figure, reference numeral 11 denotes a D-sub15 type RGB input connector provided on the back side of the main body of the data projector apparatus 10, and inputs analog RGB signals from a personal computer or the like (not shown). The RGB signal input from the RGB input connector 11 is digitized by the A / D converter 12 and then input to the image converter 13 via the system bus SB.

  On the other hand, 14 is a pin jack (RCA) type video input connector 14 for inputting a composite video signal, YCbCr signal, or YPbPr signal from an external device such as a video camera or a video recorder. The video signal input from the video input connector 14 is digitized (decoded) by the video decoder 15 and then input to the image conversion unit 13 via the system bus SB.

  The image conversion unit 13 is also generally called a scaler. Based on the image signal input from the RGB input connector 11 or the video input connector 14, the image conversion unit 13 receives an image signal of a predetermined format in which the number of resolutions, the number of gradations, and the like are unified as a frame buffer. 16 is created and sent to the projection image processing unit 17.

  At this time, a character image for OSD (On Screen Display) and a symbol such as a pointer are sent to the projection image processing unit 17 in a state of being superimposed on the image signal stored in the frame buffer 16 as necessary.

  The projection image processing unit 17 develops and stores the transmitted image signal in the video RAM 18, and generates a video signal from the stored contents of the video RAM 18.

  The projected image processing unit 17 performs spatial light modulation elements by faster time-division driving that multiplies the frame rate of the video signal, for example, 60 [frames / second], the number of color component divisions, and the number of display gradations. The micromirror element 19 which is (SOM) is driven to display.

  On the other hand, a light source lamp 21 disposed in the reflector 20 using, for example, a high pressure mercury lamp emits white light with high luminance. The white light emitted from the light source lamp 21 is colored in a primary color in a time-sharing manner through the color wheel 22, is converted into a luminous flux having a uniform luminance distribution by the integrator 23, is totally reflected by the mirror 24, and is reflected on the micromirror element 19. Irradiated.

  Thus, an optical image is formed by the reflected light from the micromirror element 19, and the formed optical image is projected and displayed on the screen (not shown) to be projected through the projection lens unit 25.

  The projection lens unit 25 enlarges the optical image formed by the micromirror element 19 and projects it onto a target such as a screen, and the focus position and the zoom position (projection angle of view) can be arbitrarily changed. To do.

  That is, among a plurality of optical lenses constituting the projection lens unit 25, a focus lens and a zoom lens (not shown) are respectively controlled by moving back and forth along the optical axis direction, and these lenses are stepping motors (M ) It moves by 26 rotational drive.

  Then, the projection light processing unit 28 performs the lighting drive of the light source lamp 21, the rotation drive of the motor (M) 27 for the color wheel 22, and the rotation drive of the stepping motor 26.

  The CPU 29 controls all the operations of the above circuits. The CPU 29 executes a control operation in the data projector apparatus 10 by using a main memory 30 composed of DRAM and a program memory 31 which is an electrically rewritable nonvolatile memory storing an operation program and various fixed data. To do.

  The CPU 29 executes various projection operations in accordance with operation signals from the operation unit 32. The operation unit 32 includes a key operation unit provided in the main body of the data projector device 10 and an Ir receiving unit that receives infrared light from a remote controller (not shown) dedicated to the data projector device 10. A key code signal based on the key operated via the remote controller is directly output to the CPU 29.

  The CPU 29 is further connected to the sound processing unit 33 via the system bus SB.

  The sound processing unit 33 includes a sound source circuit such as a PCM sound source, converts the sound data given during the projection operation into an analog signal, drives the speaker unit 34 to emit a loud sound, and generates a beep sound or the like if necessary.

Next, the operation of the above embodiment will be described.
Here, it is assumed that the A / D conversion unit 12 can cope with, for example, a sampling rate of 110 [MHz]. This corresponds to a resolution of SXGA size of 1280 horizontal dots × 1024 vertical dots.

  An example in which an analog image signal of SXGA + (horizontal 1400 dots × vertical 1050 dots) size with a dot clock of 121.75 [MHz] is input from the RGB input connector 11 using the A / D converter 12 will be described. .

  FIG. 2 shows the processing contents of one sampling operation executed by the A / D converter 12 under the control of the CPU 29 for the analog image signal input from the RGB input connector 11. All the control is executed while the CPU 29 reads out the operation program stored in the program memory 31 and develops it in the main memory 30.

  At the beginning of the processing, the resolution is determined in accordance with the input timing of the image signal (step S101), and it is determined whether or not downsampling is necessary compared with the conversion (sampling) speed of the A / D converter 12. (Step S102).

  If it is determined that there is no need for downsampling and sampling at the conversion speed of the A / D converter 12 is possible, the A / D converter 12 adjusts the resolution of the horizontal line of the input image signal. After setting the conversion speed (step S103), sampling is performed according to the setting (step S104).

  If it is determined in step S102 that downsampling is necessary, the sampling number is half the resolution in the horizontal line direction of the input image signal, that is, if it is 1400 dots, 700 dots, that is, 60 dot clocks. The conversion speed of the A / D conversion unit 12 is set to be 875 [MHz] (step S105).

  Thereafter, it is determined whether or not the flag “1” is set in the offset flag register for half sampling (HF) prepared in the main memory 30 and is “0” (step S106).

  If it is determined that it is “0”, it is assumed that this is the first sampling of the horizontal line, half sampling is started, and the flag “1” is set in the offset flag register for half sampling (HF) again. It sets (step S107).

  FIG. 4A shows a sampling position of half sampling executed in the subsequent step S104. Only the odd-numbered pixels are sampled by skipping one pixel from the first pixel position at the head of the horizontal line.

Thus, when the first sampling of the horizontal line is completed, the flag “1” is set in the offset flag register for half sampling (HF).
Therefore, when this FIG. 2 is subsequently executed, it is determined in step S106 that the content of the flag register is not “0”, and the sampling start position is assumed to be the second sampling of the horizontal line. Is offset by half of one dot clock corresponding to one pixel (step S108).

  Thereafter, half sampling is started, and the flag “1” in the offset flag register for half sampling (HF) is cleared again to “0” (step S109).

  FIG. 4B shows a sampling position of half sampling executed in the subsequent step S104. Since this is the second sampling of the horizontal line, only even-numbered pixels are sampled by skipping one pixel from the second pixel shifted by one pixel from the top pixel position.

  FIG. 5 illustrates the difference in sampling position between general sampling and two half samplings according to the present invention, with the width of the dot clock Dcl aligned.

  FIG. 5A shows sampling positions in general sampling with arrows. Sampling is continuously performed at the timing of each pixel at which the dot clock Dcl is at “H” level, and as a result, all pixels are sampled by one scan per horizontal line of the input image signal. be able to.

  On the other hand, FIG. 5B and FIG. 5C show the sampling positions of the half-sampling of the present invention twice. FIG. 5B shows the first sampling position, and FIG. Show the second time. As shown in these drawings, all pixels can be sampled by scanning twice per horizontal line of the input image signal.

  Next, the processing contents of the image conversion unit 13 that temporarily stores the image signal sampled as described above in the frame buffer 16 will be described with reference to FIG. The image conversion unit 13 also executes the following processing based on the control of the CPU 29. The operation control is performed by the CPU 29 reading out the operation program stored in the program memory 31 and developing it in the main memory 30. Run.

  At the beginning of the process, it is determined from the resolution of the input image signal whether the A / D converter 12 needs to perform downsampling (step S201).

  When it is determined that there is no need for downsampling and sampling at the conversion speed of the A / D converter 12 is possible, the writing start of the frame buffer 16 is set as usual (step S202), The image signal from the A / D converter 12 is written to the frame buffer 16 as set (step S203).

  If it is determined in step S201 that downsampling is necessary during sampling by the A / D converter 12, address position control is performed so that the writing position of the image signal to the frame buffer 16 is skipped by one pixel. Setting is performed (step S204).

  Thereafter, it is determined whether the flag “1” is not set in the offset flag register for the frame buffer (FB) prepared in the main memory 30 and is “0” (step S205).

  If it is determined that the value is “0”, it is assumed that the image signal which is the first sampling result of the horizontal line is sent from the A / D conversion unit 12, and the offset flag for the frame buffer (FB) is renewed. A flag “1” is set in the register (step S206).

  Thereafter, the image signal sent from the A / D converter 12 is written by skipping one pixel from the head position of the line in the frame buffer 16 (step S203).

  FIG. 6 shows the image signals written in the frame buffer 16 divided according to the sampling timing. In the figure, the position indicated by “◯” indicates the storage position of the image signal obtained by the first sampling, and the image signal is written by skipping one pixel from the write start position SP1 positioned at the head in each horizontal line. I understand that

Thus, when the writing of the image signal obtained by the first sampling of the horizontal line to the frame buffer 16 is completed, the flag “1” is set in the offset flag register for the frame buffer (FB).
Therefore, when this FIG. 3 is subsequently executed, it is determined in step S205 that the content of the flag register is not “0”, and the second sampling result of the horizontal line is written. Is offset by one pixel (step S207).

  Thereafter, the flag “1” in the offset flag register for the frame buffer (FB) is cleared again to “0” (step S208).

  Thereafter, the image signal sent from the A / D conversion unit 12 is written by skipping one pixel from a position shifted by one pixel from the head position of the line in the frame buffer 16 (step S203).

  In FIG. 6, the position indicated by “Δ” indicates the storage position of the image signal obtained by the second sampling, and the image is skipped by one pixel from the writing start position SP2 shifted by one pixel from the head in each horizontal line. A signal is written.

  After the image signal for one frame is written in the frame buffer 16 as described above, the image conversion unit 13 performs scaling using the image signal written in the frame buffer 16, and image data suitable for projection. Is sent to the projection image processing unit 17.

  The projection image processing unit 17 drives the display of the micromirror element 19 using the video RAM 18 based on the transmitted image data, so that the light image formed by the micromirror element 19 becomes a projection target by the projection lens unit 25. Projected on the screen.

  As described above, according to the present embodiment, it is possible to cope with high-resolution image data while using the A / D conversion unit 12 that originally has a low resolution. Therefore, it is possible to use the A / D conversion unit 12 having a resolution lower than the resolution of the image signal assumed to be handled by the apparatus, and the A / D conversion unit 12 can be configured with an inexpensive LSI chip. Therefore, the manufacturing cost of the entire data projector device 10 can be further reduced.

  The above embodiment has been described for a case where the present invention is applied to a data projector device connected to a personal computer or the like. However, the present invention is not limited to this, and an analog image signal is input and digitized. Any image processing apparatus that performs processing and outputs can be applied to any apparatus that performs various image processing, such as a digital still camera, a digital movie camera, a video recorder, and a television receiver having an external input function. Become.

  In addition, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention in the implementation stage. In addition, the functions executed in the above-described embodiments may be implemented in appropriate combination as much as possible. The above-described embodiment includes various stages, and various inventions can be extracted by an appropriate combination according to a plurality of disclosed structural requirements. For example, even if several constituent requirements are deleted from all the constituent requirements shown in the embodiment, if an effect is obtained, a configuration from which the constituent requirements are deleted can be extracted as an invention.

1 is a block diagram showing a circuit configuration of a data projector device according to an embodiment of the present invention. The flowchart which shows the content of the sampling process in the A / D conversion part which concerns on the same embodiment. 7 is a flowchart showing the contents of a process for writing image data into a frame buffer in the image conversion unit according to the embodiment. The figure explaining the sampling position of two half sampling which concerns on the same embodiment. The figure explaining the difference in the sampling position by the normal sampling process which concerns on the same embodiment, and two half sampling processes. The figure which shows the difference in the sampling timing of the image signal written in the frame buffer based on the embodiment. The figure which shows the concept of the downsampling in general A / D conversion.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Data projector apparatus, 11 ... RGB input connector, 12 ... A / D conversion part, 13 ... Image conversion part, 14 ... Video input connector, 15 ... Video decoder, 16 ... Frame buffer, 17 ... Projection image process part, 18 ... Video RAM, 19 ... Micromirror element (SOM), 20 ... Reflector, 21 ... Light source lamp, 22 ... Color wheel, 23 ... Integrator, 24 ... Mirror, 25 ... Projection lens unit, 26 ... Stepping motor (M), 27 DESCRIPTION OF SYMBOLS ... Motor (M), 28 ... Projection light processing part, 29 ... CPU, 30 ... Main memory, 31 ... Program memory, 32 ... Operation part, 33 ... Sound processing part, 34 ... Speaker part, SB ... System bus.

Claims (5)

An input means for inputting an analog image signal;
Digitizing means for sampling and digitizing the image signal input by the input means;
Determination means for acquiring a dot clock of an image signal input by the input means and determining whether downsampling is necessary from the sampling speed of the digitizing means and the dot clock of the image signal input by the input means When,
If the determination means determines that the downsampling is necessary, the image signal input by the input means is sampled at the first sampling position by skipping one pixel using the digitization means, and then the same image Sampling control means for sampling at a second sampling position of skipping one pixel shifted by one pixel with respect to the signal;
Storage means for storing an image signal of a digital value obtained from the digitizing means by the sampling control means in accordance with an original pixel arrangement;
An image processing apparatus comprising: output means for outputting an image signal stored in the storage means. The storage means stores the information of the image signal sampled at the first sampling position in the first storage position skipped by one pixel when the determination means determines that the downsampling is necessary. 2. The image according to claim 1, wherein the information of the image signal sampled at the second sampling position is stored at a second storage position with one pixel skipped by one pixel with respect to the first storage position. Processing equipment. The output means is
light source,
A mirror element that reflects the light emitted from the light source and forms a light image corresponding to the image signal stored in the storage means; and a projection lens unit that projects the light image formed by the mirror element. the image processing apparatus according to claim 1 or 2, wherein. An apparatus having an input unit for inputting an analog image signal, a digitizing unit for sampling and digitizing the image signal input at the input unit, and an output unit for outputting the image signal digitized by the digitizing unit Image processing method,
Get the dot clock of the image signal to be input by the input means, it is determined whether the dot clock of the image signal to be input at a sampling rate and the input portion in the digital section need downsampling determination Process,
If it is determined in the determining step that the downsampling is necessary, the image signal input by the input unit using the digitizing unit is sampled at a first sampling position by skipping one pixel, and then the same image A sampling control step of sampling at a second sampling position of skipping one pixel with respect to the signal by one pixel;
A storage step of storing the image signal obtained from the digitizing unit by the sampling control step according to the original pixel arrangement;
And an output control step of outputting the image signal stored in the storage step from the output unit. An apparatus having an input unit for inputting an analog image signal, a digitizing unit for sampling and digitizing the image signal input at the input unit, and an output unit for outputting the image signal digitized by the digitizing unit A program executed by a built-in computer,
Get the dot clock of the image signal to be input by the input means, it is determined whether the dot clock of the image signal to be input at a sampling rate and the input portion in the digital section need downsampling determination Steps,
If it is determined in the determining step that the downsampling is necessary, the image signal input by the input unit using the digitizing unit is sampled at a first sampling position by skipping one pixel, and then the same image A sampling control step of sampling at a second sampling position of one pixel skipping that is shifted by one pixel with respect to the signal;
A storage step of storing the image signal obtained from the digitizing unit by the sampling control step according to the original pixel arrangement;
A program for causing a computer to execute an output control step of outputting the image signal stored in the storage step from the output unit.

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