JP5175517B2 - プロセッサ - Google Patents

プロセッサ Download PDF

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Publication number
JP5175517B2
JP5175517B2 JP2007263941A JP2007263941A JP5175517B2 JP 5175517 B2 JP5175517 B2 JP 5175517B2 JP 2007263941 A JP2007263941 A JP 2007263941A JP 2007263941 A JP2007263941 A JP 2007263941A JP 5175517 B2 JP5175517 B2 JP 5175517B2
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JP
Japan
Prior art keywords
instruction
unit
thread
configuration information
instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007263941A
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English (en)
Japanese (ja)
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JP2008052750A (ja
JP2008052750A5 (https=
Inventor
広之 森下
隆 橋本
督三 清原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2007263941A priority Critical patent/JP5175517B2/ja
Publication of JP2008052750A publication Critical patent/JP2008052750A/ja
Publication of JP2008052750A5 publication Critical patent/JP2008052750A5/ja
Application granted granted Critical
Publication of JP5175517B2 publication Critical patent/JP5175517B2/ja
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JP2007263941A 2005-04-12 2007-10-10 プロセッサ Expired - Fee Related JP5175517B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007263941A JP5175517B2 (ja) 2005-04-12 2007-10-10 プロセッサ

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2005114133 2005-04-12
JP2005114133 2005-04-12
JP2005309352 2005-10-25
JP2005309352 2005-10-25
JP2007263941A JP5175517B2 (ja) 2005-04-12 2007-10-10 プロセッサ

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2007513029A Division JP4102425B2 (ja) 2005-04-12 2006-04-12 プロセッサ

Publications (3)

Publication Number Publication Date
JP2008052750A JP2008052750A (ja) 2008-03-06
JP2008052750A5 JP2008052750A5 (https=) 2009-05-14
JP5175517B2 true JP5175517B2 (ja) 2013-04-03

Family

ID=39236684

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007263941A Expired - Fee Related JP5175517B2 (ja) 2005-04-12 2007-10-10 プロセッサ

Country Status (1)

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JP (1) JP5175517B2 (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5379122B2 (ja) * 2008-06-19 2013-12-25 パナソニック株式会社 マルチプロセッサ
JP5173712B2 (ja) 2008-09-30 2013-04-03 ルネサスエレクトロニクス株式会社 マルチスレッドプロセッサ
JP5173711B2 (ja) 2008-09-30 2013-04-03 ルネサスエレクトロニクス株式会社 マルチスレッドプロセッサ及びそのハードウェアスレッドのスケジュール方法
JP5173713B2 (ja) 2008-09-30 2013-04-03 ルネサスエレクトロニクス株式会社 マルチスレッドプロセッサ及びそのハードウェアスレッドのスケジュール方法
JP2010287159A (ja) * 2009-06-15 2010-12-24 Fujitsu Ltd 信号処理システム、信号処理モジュール、及びこれらの動作方法
US9698790B2 (en) * 2015-06-26 2017-07-04 Advanced Micro Devices, Inc. Computer architecture using rapidly reconfigurable circuits and high-bandwidth memory interfaces
JP2017135698A (ja) * 2015-12-29 2017-08-03 株式会社半導体エネルギー研究所 半導体装置、コンピュータ及び電子機器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2719926B1 (fr) * 1994-05-10 1996-06-07 Sgs Thomson Microelectronics Circuit électronique et procédé d'utilisation d'un coprocesseur.
US5794062A (en) * 1995-04-17 1998-08-11 Ricoh Company Ltd. System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization
US5933642A (en) * 1995-04-17 1999-08-03 Ricoh Corporation Compiling system and method for reconfigurable computing
JP4285877B2 (ja) * 1999-02-23 2009-06-24 株式会社リコー 動的再構成計算のためのメタアドレス指定アーキテクチャ及び動的再構成計算のためのメタアドレス指定方法
JP3587095B2 (ja) * 1999-08-25 2004-11-10 富士ゼロックス株式会社 情報処理装置
JP2004070869A (ja) * 2002-08-09 2004-03-04 Sony Corp 演算システム
JP4905660B2 (ja) * 2006-06-14 2012-03-28 富士ゼロックス株式会社 プログラマブルデバイス制御装置、プログラマブル論理回路装置及びプログラマブルデバイスの制御方法

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Publication number Publication date
JP2008052750A (ja) 2008-03-06

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