JP5164486B2 - Video processing apparatus and video processing method - Google Patents

Description

  The present invention relates to a video processing apparatus and a video processing method, and more particularly to a technique suitable for use in real-time processing of a digital signal.

  Various video processes are performed in a recording / reproducing apparatus or the like for recording a moving image. The processing needs to be executed at various timings, from real-time processing in which processing must be completed within a predetermined time to non-real-time processing in which processing within a unit time is not particularly required.

  For example, Patent Document 1 discloses a technique for efficiently performing video processing. For example, an optical disk playback apparatus capable of playing back moving images recorded on an optical disk such as a DVD player will be described as an example. Today, it has a function of displaying a list of recorded program contents as thumbnail images. Yes.

  In order to realize such a function, it is necessary to simultaneously process a process for generating a thumbnail image from recorded video and a process for drawing a menu screen for displaying the generated thumbnail images in a list. The former is a real-time process that must be processed in one frame time of video so as not to wait for the decoding process of the previous stage in order to display thumbnails from sequentially decoded video signals.

  On the other hand, the latter is a non-real-time process in which a thumbnail image list is displayed as a menu screen at a timing when the generated thumbnail image is instructed by a user operation and within a time that does not cause stress to the response. Therefore, in the video signal processing apparatus, such real-time processing and non-real-time processing are executed together.

  Further, the screen resolution that can be displayed on a television monitor connected to the optical disk playback apparatus may be lower than the screen resolution of the video recorded on the optical disk. For example, a standard definition video (hereinafter referred to as SD video) of 720 × 480 pixels can be displayed as a playback video of an optical disc on which a high definition video (hereinafter referred to as HD video) consisting of 1440 × 1080 pixels is recorded. May output to TV monitor. In such a case, it is necessary to convert the reproduced HD video signal into an SD video signal and output it. That is, in this case, it is necessary to convert HD video signals for n frames into SD video signals in an n frame period. In many cases, it is necessary to draw an arbitrary menu screen in accordance with a user instruction during execution of such real-time processing. Again, real-time processing and non-real-time processing are executed in a mixed manner.

  As described above, when executing real-time processing and non-real-time processing, instructions and execution are repeated independently and asynchronously, so each execution timing is set so that real-time processing does not fail. It is important to control.

  Here, in a general video signal processing apparatus in which a plurality of commands (in this case, parameter information indicating processing contents) as shown in FIG. Consider the case where real-time processing and non-real-time processing are performed.

  1 is a command buffer 101 capable of storing a plurality of commands set by a CPU. A command management unit 102 that sequentially reads commands in the command buffer 101. The command execution unit 103 executes video processing according to the command.

  The command execution unit 103 can perform video processing such as video signal enlargement / reduction processing and arbitrary video drawing by OSD (on-screen display). When processing of all the commands set in the command buffer 101 is completed, an interrupt signal is asserted to the CPU to notify the completion of processing.

  FIG. 2 shows a timing chart when execution of real-time processing and non-real-time processing is controlled by a command 1 / task for controlling non-real-time processing and a command 2 / task for controlling real-time processing.

  “Cmd” used in FIG. 2 indicates a command set by the CPU, and a number following “cmd” indicates an order set by the CPU. The command 1 / task is activated by an operation by the user or an interrupt signal from the video signal processor, and the command 2 / task is activated at the timing of the video vertical synchronization signal.

  In the timing chart of FIG. 2, the execution of real-time processing is completed within the field time in the video field 1 section and the video field 2 section. Further, in the video field 3 section, an example is shown in which “cmd14” of the real-time processing set in the command buffer cannot be executed within the same field time.

  In the video signal processing apparatus as shown in FIG. 1, it is difficult for the CPU side to accurately grasp the timing and execution time of the command set by the CPU. Further, the command execution time of the real-time processing varies greatly depending on the number of commands set as shown in FIG. 2, and the real-time processing may fail depending on the case.

  In order to solve such a problem, two video signal processing devices as shown in FIG. 1 are installed, and real-time processing and non-real-time processing are assigned to each video signal processing device. It may be possible to easily adjust the execution time.

JP-A-5-73311

However, mounting two systems of video signal processing devices having similar functions increases the circuit scale and accordingly increases the power consumption, so that it is clearly redundant from both sides. Therefore, it has been desired that both real-time and non-real-time video processing can be executed by a single video processing circuit without failure.
An object of the present invention is to make it possible to execute real-time video processing and non-real-time video processing without failure with a single circuit configuration.

  The video processing apparatus of the present invention reduces a plurality of screens of a video signal reproduced from a recording medium to the number of pixels of the display device, and outputs each screen of the reduced video signal to the display device. And issuing a plurality of first commands for drawing a menu screen in response to an arbitrary menu display instruction from the user during output of the reduced video signal to the display device. The second command for the reduction process for reducing each of the plurality of screens of the reproduced video signal to the number of pixels of the display device within the display period of one screen corresponds to the display period of the plurality of screens. Issuing means for repeatedly issuing the first command, first storage means for storing the plurality of first commands issued by the issuing means, and the second code issued by the issuing means. Second storage means for storing a command, execution means for executing drawing processing according to the first command and reduction processing according to the second command, and executing the drawing processing by the execution means If the second command is stored in the second storage means while the drawing process is being executed, the drawing process being executed is interrupted and the second command is stored in accordance with the second command stored in the second storage means After the reduction process is executed and the reduction process according to the second command is completed, the remaining command that is not executed among the plurality of first commands for the suspended drawing process Management means for controlling the execution means so as to execute drawing processing is provided.

  A video processing method according to the present invention reduces a plurality of screens of a video signal reproduced from a recording medium to the number of pixels of a display device, and outputs each screen of the reduced video signal to the display device. And issuing a plurality of first commands for drawing a menu screen in response to an arbitrary menu display instruction from the user during output of the reduced video signal to the display device. The second command for the reduction process for reducing each of the plurality of screens of the reproduced video signal to the number of pixels of the display device within the display period of one screen corresponds to the display period of the plurality of screens. An issuance step repeatedly issued in step, a step of storing a plurality of the first commands issued in the issuance step in a first storage means, and a step before being issued in the issuance step In the execution step, a step of storing the second command in the second storage means, a drawing process corresponding to the first command, and a reduction process corresponding to the second command, respectively, When the second command is stored in the second storage unit while the drawing process is being executed, the drawing process being executed is interrupted and the second command stored in the second storage unit is stored. The reduction process corresponding to the second command is executed, and after the reduction process corresponding to the second command is completed, the remaining unexecuted ones of the plurality of first commands for the drawing process interrupted And a management step for controlling the processing in the execution step so as to execute the drawing processing according to the command.

  According to the present invention, in a system in which real-time video processing and non-real-time video processing are mixed, the first storage medium for storing non-real-time video processing and the second storage medium for storing real-time video processing And provided. When instructions are stored in the second storage medium, the instructions stored in the second storage medium are executed with priority. As a result, it is possible to control the execution timing of real-time video processing and non-real-time video processing without failure, and real-time video processing and non-real-time video processing can be controlled with a single circuit configuration.

(First embodiment)
FIG. 3 is a block diagram illustrating an example of an apparatus to which the video signal processing apparatus according to the embodiment of the present invention is applied, and a configuration of an optical disk reproducing apparatus capable of reproducing an optical disk on which an encoded video signal is recorded. . Hereinafter, each processing unit included in the optical disc reproducing apparatus will be described with reference to FIG. Note that the video signal processing apparatus of the present embodiment is a video signal processing apparatus capable of executing both real-time video processing instructions and non-real-time video processing instructions.

  The operation unit 301 is a controller for the optical disc playback apparatus, and the CPU 302 controls each part of the optical disc playback apparatus based on a signal transmitted from the operation unit 301 by a user operation.

  The operation unit 301 includes menu buttons for performing various settings in addition to operation keys for instructing reproduction / stopping. The disk drive 303 is a drive unit including a demodulation and error correction processing unit corresponding to the format of the removable optical disk 303a, and can read data recorded on the disk.

  The reproduction processing unit 304 separates the encoded video signal from the reproduction data supplied from the disk drive 303 and writes the decoded video signal to the memory 306 via the memory I / F 305. The video signal processing unit 307 performs an enlargement / reduction process on the video signal written by the reproduction processing unit 304 to an arbitrary size, and a drawing process of text information and graphic information by a color table for configuring various menu screens. It is a processing unit that can be performed.

  The video output processing unit 308 is a processing unit that can arbitrarily synthesize and output the video signal written by the reproduction processing unit 304 or the video signal processing unit 307, and outputs it to the D / A (digital / analog conversion) unit 309. The output video signal is converted into an analog video signal and output.

  Next, a description will be given of a playback operation when the HD video signal is played back from the optical disc and the SD video signal is output to a display device that displays the SD video signal in the optical disc playback device of the present embodiment.

  When a playback instruction is given from the operation unit 301, the disc drive 303 reads the recorded data from the optical disc 303a, and the playback processing unit 304 extracts and decodes the encoded video signal from the input playback data. Is written into the memory 306. Next, the video signal processing unit 307 performs processing for converting the HD video signal written by the reproduction processing unit 304 into the screen resolution of the SD video signal, and writes the converted signal into the memory 306. Thus, the video signal written by the video signal processing unit 307 is read by the video output processing unit 308, converted into an analog video signal by the D / A conversion unit 309, and output.

  Here, considering the case where an arbitrary menu display is instructed by the user during playback, in addition to the video signal reduction process shown in FIG. 4A, the menu drawing process shown in FIG. There is a need to. At this time, the reduction process to the SD video signal is, for example, a real-time process in which the processing of the video signal for one field must be completed within one field time. On the other hand, the menu screen rendering process is a non-real-time process because it is not necessary to process the menu screen within a predetermined time. An operation when the real-time video processing and the non-real-time video processing are executed by the video signal processing unit 307 in FIG. 3 will be described.

FIG. 5 is a block diagram showing details of the video signal processing unit 307 in FIG. First, a configuration example of the video signal processing unit 307 will be described with reference to FIG.
The first command buffer 501 is a buffer capable of storing a plurality of commands each having a 16-byte length of 2 bytes × 8 words.

  The second command buffer 502 is a buffer capable of storing any one command, and the data buffer 503 is a font / graphic required for menu drawing as shown in FIG. A buffer for storing data.

  In the first command buffer 501, a non-real time video processing command is stored as a first processing command by the first command storage means. The second command buffer 502 stores a real-time video processing command as a second processing command by the second command storage means. The first and second instruction storage means are constituted by the CPU 302.

  The command management unit 504 interprets the commands stored in the first command buffer 501 and the second command buffer 502 and transmits the processing contents to the command execution unit 505.

  The command execution unit 505 performs enlargement / reduction processing according to the processing content transmitted by the command management unit 504. That is, the image data read from the memory 306 shown in FIG. 3 or the font / graphics data stored in the data buffer 503 is enlarged / reduced according to the designated enlargement / reduction ratio, and written to the memory 306. . A RAM 506 is a line memory used for processing of the command execution unit 505.

Next, an example of a processing procedure performed by the video signal processing unit 307 will be described with reference to the flowchart of FIG.
The video signal processing unit 307 includes a register as shown in FIG. 6, and instructs the execution of the command set in the first command buffer 501 by “RUN1” of the “COMMAND” register (step S1). Also, “RUN2” instructs execution of the command set in the second command buffer 502 (step S2).

  The command management unit 504 reads a command set in the first command buffer 501 or the second command buffer 502 according to the execution instruction. Then, the command execution unit 505 executes the commands set in the first and second command buffers (step S3). At this time, it is detected whether or not an execution instruction has been given to the first command buffer 501 and the second command buffer 502 at the same timing (step S4). As a result of this detection, if an execution instruction is issued at the same timing, the execution of the command set in the second command buffer 502 has priority.

  If an instruction to execute the command set in the second command buffer 502 is detected while the command set in the first command buffer 501 is already being executed, the following processing is performed. That is, in the currently executed instruction process, the command set in the second command buffer 502 is executed when an instruction indicating the end of a series of instructions is detected. Then, after the completion, the process proceeds to execution of the remaining commands set in the first command buffer 501 (step S5).

  However, as shown in FIG. 6, if the “TRM1” bit of the “COMMAND” register is enabled, an exception is made even if execution of the second command buffer 502 is instructed. In this case, the execution of the first command buffer 501 is continued until the “TERMINATE” command is detected. This “TRM1” is effective when a series of command processes set in the first command buffer 501 are to be executed continuously with priority.

  When the execution of all the commands set in the first command buffer 501 is completed, or when the execution of the command set in the second command buffer 502 is completed, the interrupt signal is asserted to complete the command execution to the CPU 302 Is notified (step S6).

  At this time, by reading “STA1” and “STA2” in the “STATUS” register shown in FIG. 6, it is possible to know which command execution of the first command buffer 501 or the second command buffer 502 has been completed. It is possible (step S7). In addition, each execution completion interrupt can be cleared by “IRQ1” and “IRQ2” of the “INTERRUPT” register (step S8).

Next, commands that can be executed to the command buffer will be described with reference to FIG.
As described above, the first command buffer 501 stores a 16-byte fixed length command of 2 bytes × 8 words. This command is parameter information indicating the contents of video processing executed by the command execution unit 505. Mainly “control information” indicating the type of command, “source video information” indicating information of the original video to be processed, and “target video information” being video information after processing the original video It consists of three types of information areas.

  As the command type in “control information”, “OSD: Open Source Definition” for processing OSD data, “YCC” for processing YCbCr data, “NOP” and “TERMINATE” indicating a delimiter between commands are defined. . The “NOP” and “TERMINATE” commands are used to discriminate between a command that is currently executed and a command that has been set in the past.

  The difference between “NOP” and “TERMINATE” is that “TERMINATE” can be used to mean the end of a series of commands. For example, when drawing of one OSD screen is completed with five commands, it can be defined as a series of related commands by using “TERMINATE” as a delimiter for the fifth command. This “TERMINATE” is used in combination with the aforementioned “TRM1” register.

  The “source video information” and “target video information” include frame memory numbers allocated in the memory 306 in FIG. 3, X and Y coordinates indicating the start position of the video signal, and information indicating the height and width of the video signal. included. Based on such information, the enlargement / reduction ratio of the video is calculated, and the processed video signal is written to the designated position in the designated frame memory.

  With the configuration as described above, a mechanism capable of controlling the execution timing of real-time processing and non-real-time processing is realized by using the first command buffer 501 and the second command buffer 502 properly.

  Next, referring to the timing chart shown in FIG. 8, the relationship between the control, execution timing, and execution time when the SD video signal reduction processing (real-time processing) and menu screen rendering processing (non-real-time processing) are executed. Will be explained.

  The command 1 / task shown in FIG. 8 is a task for setting a command related to menu screen rendering which is non-real time processing, and the command 2 / task is a command related to reduction processing to an SD video signal which is real time processing. It is a task to set. The command 1 / task sets a command in the first command buffer 501 in the video signal processing apparatus shown in FIG. 5, and the command 2 / task sets an instruction in the second command buffer 502. “Cmd” used in FIG. 8 indicates a command set by the CPU 302, and a number following “cmd” indicates an order set by the CPU 302.

  In the video field 1 section in FIG. 8, “cmd1” is set by command 2 and task at video vertical synchronization timing 1. When the execution of “cmd0” that has already been executed is completed, the interrupt signal is asserted, the command 1 / task is activated, and “cmd2” and “cmd3” are set. At the same time, execution of the command “cmd1” set in the command 2 buffer is started. When the execution of “cmd1” is completed, the conversion to the SD video signal is completed.

  Subsequently, “cmd2” and “cmd3” set in the command 1 buffer are sequentially executed. When the execution of “cmd3” is completed, the interrupt signal is asserted, the command 1 / task is activated, and then “cmd4” and “cmd5” are set to the command 1 / buffer, and “cmd4” is executed. Is started. In this section of the video field, instructions are sequentially executed in the set order.

  Next, when the section of the video field 2 is viewed, the command 2 / task is activated at the video vertical synchronization timing 2, and “cmd6” is set in the command 2 / buffer. Here, when the execution of “cmd4” is completed, “cmd6” set in the command 2 buffer prior to “cmd5” set in the command 1 buffer is executed with priority.

  When the execution of “cmd6” is completed, the process returns to the command 1 buffer, “cmd5” is executed, “cmd7 to cmd9” are set from the command 2 task by the execution completion interrupt, and “cmd7” is executed. Here, in the video field 2 section, an instruction for menu display is made by the user, and the command 2 / task is activated at the timing of the instruction, and “cmd 9 to cmd 13” related to the menu drawing is set in the command 1 / buffer. The The next video field 3 is entered during execution of “cmd8”.

  At the video vertical synchronization timing 3, the command 2 / task is activated and “cmd14” is set in the command 2 / buffer. When execution of “cmd8” is completed, “cmd14” set in the command 2 buffer is executed before “cmd9 to cmd13” set in the command 1 buffer first, and then sequentially from “cmd9”. Command 1 is set in the buffer and the command is executed.

  Next, the operation when “TRM1” of the “COMMAND” register is validated will be described with reference to the timing chart shown in FIG. Note that “TRM1” in the “COMMAND” register is already set to be valid, and the parts common to those explained in FIG. 8 are omitted, and the comparison is made with reference to FIG. 8 and FIG. Only the difference will be described.

  The difference between FIG. 8 and FIG. 9 is that the command is set by the command 1 / task for the execution completion interrupt 2 generated in the video field 1 section and the command 1 / task for the execution completion interrupt 3 generated in the video field 2 section. It is. The last set delimiter command is “NOP” in FIG. 8, whereas “TERMINATE” is used in FIG.

  Looking at the difference in the operation of the video signal processing apparatus due to this difference, as shown in FIG. 8, in the state where “TRM1” is disabled, the command 2 buffer is next to “cmd4” in the video field 2 section. The set “cmd6” is prioritized and executed.

  In FIG. 9, since “TRM1” is set to be valid, command execution in the command 1 buffer is continued until the “TERMINATE” command is detected, so “cmd5” is executed after “cmd4”. .

  Similarly, in FIG. 8, “cmd14” set in the command 2 buffer is executed after “cmd8” executed in the section extending from the video field 2 to the video field 3, but in FIG. “Cmd9” is executed first.

  In this way, by using the “TRM1” and “TERMINATE” commands in the “COMMAND” register, even if the command is set in the command 1 buffer, the priority for the command 2 buffer command is controlled. It becomes possible to do. The command execution delay set in the command 1 buffer can be finely adjusted, which is effective when processing is completed with a series of commands.

  As described above, even when a sudden menu display request is input by a user operation, the execution timing can be controlled without failure. For example, it can be seen that the reduction processing that requires real-time processing, that is, the command set in the command 2 buffer by the command 2 task, is surely executed within the video field time.

  In the present embodiment, when the second processing instruction is stored in the second command buffer 502 at the stage where the processing according to the first processing instruction is completed, the first processing instruction is stored in the first command buffer 501. Even if stored, an instruction management means for processing as follows is provided. As a result, the instruction execution means is controlled to preferentially execute processing according to the second processing instruction stored in the second command buffer 502. The instruction management means is constituted by the CPU 302.

(Second Embodiment)
FIG. 10 is a block diagram showing a configuration example of an imaging signal recording / reproducing apparatus which is an example of an apparatus to which the video signal processing apparatus of the present invention is applied. Hereinafter, each processing unit constituting the imaging signal recording / reproducing apparatus will be described with reference to FIG.

  The operation unit 1001 is a controller for the recording device, and the CPU 1002 controls each unit constituting the imaging signal recording / reproducing device based on a signal transmitted from the operation unit 1001 by a user operation. The operation unit 1001 includes menu buttons for performing various settings in addition to operation keys for instructing recording / playback and the like.

  The lens optical system 1003 is a lens optical system capable of optical zoom including an optical lens, a diaphragm, a focus control, and a lens driving unit.

  The image sensor 1004 converts optical information from the lens optical system into an electrical signal, and is constituted by a CCD image sensor, a CMOS sensor, or the like. An A / D conversion (analog / digital conversion) unit 1005 converts an image pickup signal obtained by the image pickup element 1004 into a digital signal.

  The video signal input / output unit 1006 converts the digital signal supplied from the A / D conversion unit 1005 into a video signal having a screen resolution defined by the recording format, and writes the video signal to the memory 1008 via the memory I / F 1007. . The video signal input / output unit 1006 includes an OSD processing unit that can convert text and graphic information from the color table read from the memory 1008 into a video signal and superimpose it on the video signal read from the memory 1008. Yes. The OSD can be displayed in a multiple display manner on the images displayed on the D / A conversion unit 1009 and the display unit 1010.

  The video signal processing unit 1011 performs an enlargement / reduction process to an arbitrary size on the video signal written in the memory 1008 by the video signal input / output unit 1006 and the video signal written by the recording / playback processing unit 1012. The processing unit is capable of performing text information and graphic information drawing processing using a color table for configuring various menu screens.

  The recording / playback processing unit 1012 has a recording processing unit that encodes a video signal read from the memory 1008 and adds an error correction code to the recording medium 1013 for recording. Also, a reproduction processing unit that performs error correction processing on the encoded data read from the recording medium 1013 and writes the decoded video signal to the memory 1008 is provided. With the above configuration, recording and reproduction of video signals are possible.

  Note that the video signal processing unit 1011 has the same configuration as the video signal processing unit 307 in the optical disc playback apparatus shown in FIG. 3 of the first embodiment, and the internal configuration, register specifications, and command definition are also shown in FIGS. The detailed description is omitted because it is the same as that shown in FIG.

  Here, when considering the reproduction operation in the imaging signal recording / reproducing apparatus, it is necessary to display the time code recorded simultaneously with the video at the time of photographing in real time. Again, considering the case where an arbitrary menu display is instructed by the user, it is necessary to simultaneously execute the time code drawing and the menu drawing process shown in FIG. The time code drawing is a real-time process in which the display is dropped if drawing for a predetermined period of time is not completed within a predetermined period of time, for example, within one field time of the video. Can be said to be non-real-time processing.

  This is in the same relationship as the video reduction processing (real-time processing) and menu screen drawing processing (non-real-time processing) shown in the first embodiment. The menu drawing process in command task 1 in FIG. 8 and the time code drawing process in command task 2 are replaced with control. Thus, it can be said that the operation shown in the timing chart of FIG. 8 is similarly applied here. Therefore, it can be seen that in this imaging signal recording / reproducing apparatus, even when a real-time video processing command and a non-real-time video processing command are performed simultaneously, real-time processing can be executed without failure.

(Another embodiment according to the present invention)
Each means constituting the video signal processing apparatus according to the above-described embodiment of the present invention can be realized by operating a program stored in a RAM or ROM of a computer. This program and a computer-readable recording medium recording the program are included in the present invention.

  In addition, the present invention can be implemented as a system, apparatus, method, program, storage medium, or the like, and can be applied to a system composed of a plurality of devices. Moreover, you may apply to the apparatus which consists of one apparatus.

  In the present invention, a software program (in the embodiment, a program corresponding to the flowchart shown in FIG. 11) for executing each process in the video signal processing method described above is directly or remotely supplied to a system or apparatus. In addition, this includes a case where the system or the computer of the apparatus is also achieved by reading and executing the supplied program code.

  Accordingly, since the functions of the present invention are implemented by computer, the program code installed in the computer also implements the present invention. In other words, the present invention includes a computer program itself for realizing the functional processing of the present invention.

  In that case, as long as it has the function of a program, it may be in the form of object code, a program executed by an interpreter, script data supplied to the OS, and the like.

  Various recording media can be used as a recording medium for supplying the program. For example, floppy (registered trademark) disk, hard disk, optical disk, magneto-optical disk, MO, CD-ROM, CD-R, CD-RW, magnetic tape, nonvolatile memory card, ROM, DVD (DVD-ROM, DVD- R).

  As another program supply method, a browser on a client computer is used to connect to an Internet home page. The computer program itself of the present invention or a compressed file including an automatic installation function can be downloaded from the homepage by downloading it to a recording medium such as a hard disk.

  It can also be realized by dividing the program code constituting the program of the present invention into a plurality of files and downloading each file from a different homepage. That is, a WWW server that allows a plurality of users to download a program file for realizing the functional processing of the present invention on a computer is also included in the present invention.

  In addition, the program of the present invention is encrypted, stored in a storage medium such as a CD-ROM, distributed to users, and key information for decryption is downloaded from a homepage via the Internet to users who have cleared predetermined conditions. Let It is also possible to execute the encrypted program by using the key information and install the program on a computer.

  In addition to the functions of the above-described embodiments being realized by the computer executing the read program, the OS running on the computer performs part or all of the actual processing. Also, the functions of the above-described embodiments can be realized.

  Further, the program read from the recording medium is written in a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer. Thereafter, the CPU of the function expansion board or function expansion unit performs part or all of the actual processing based on the instructions of the program, and the functions of the above-described embodiments are realized by the processing.

It is a block diagram which shows the general structural example of a video signal processing apparatus. It is a timing chart which showed the operation timing of the conventional video signal processing device. 1 is a block diagram illustrating a configuration example of an optical disk reproducing device according to a first embodiment of this invention. FIG. It is a figure which shows the 1st Embodiment of this invention and shows an example of the real-time process and non-real-time process in an optical disk reproducing | regenerating apparatus. 1 is a block diagram illustrating a configuration example of a video signal processing device according to a first embodiment of this invention. FIG. It is a figure which shows the 1st Embodiment of this invention and shows the register | resistor with which a video signal processing apparatus is provided. It is a figure which shows the 1st Embodiment of this invention and shows the definition of the command which can be performed to a video signal processing apparatus. 3 is a timing chart illustrating the operation of the video signal processing device according to the first embodiment of the present invention. 3 is a timing chart illustrating the operation of the video signal processing device according to the first embodiment of the present invention. It is a block diagram which shows the 2nd Embodiment of this invention and shows the structural example of an imaging signal recording / reproducing apparatus. It is a flowchart explaining an example of the process sequence performed in a video signal processing part.

Explanation of symbols

101 Command buffer 102 Command management unit 103 Command execution unit 301 Operation unit 302 CPU
303 Disk drive 303a Optical disk 304 Playback processing unit 305 Memory I / F
306 Memory (SDRAM)
307 Video signal processing unit 308 Video output processing unit 309 D / A (digital / analog conversion) unit 501 First command buffer 502 Second command buffer 503 Data buffer 504 Command management unit 505 Command execution unit 506 RAM
1001 Operation unit 1002 CPU
1003 Lens optical system 1004 Image sensor 1005 A / D conversion (analog / digital conversion) unit 1006 Video input / output unit 1007 Memory I / F
1008 Memory (SDRAM)
1009 D / A (Digital / Analog Conversion) Unit 1010 Display Unit 1011 Video Signal Processing Unit 1012 Recording / Reproduction Processing Unit 1013 Storage Medium

Claims (4)

A video processing device that reduces a plurality of screens of a video signal reproduced from a recording medium to the number of pixels of a display device, and outputs each screen of the reduced video signal to the display device,
In response to an arbitrary menu display instruction from the user during the output of the reduced video signal to the display device, a plurality of first commands for a menu screen drawing process are issued and the playback is performed. The second command for the reduction process for reducing each of the plurality of screens of the video signal within the display period of one screen to the number of pixels of the display device is repeatedly issued at a timing corresponding to the display period of the plurality of screens. Issuing means;
First storage means for storing a plurality of the first commands issued by the issuing means;
Second storage means for storing the second command issued by the issuing means;
Execution means for executing drawing processing according to the first command and reduction processing according to the second command;
If the second command is stored in the second storage unit while the drawing unit is executing the drawing process, the drawing process being executed is interrupted and stored in the second storage unit The reduction process according to the second command is executed, and after the reduction process according to the second command is completed, the first command for the suspended drawing process is executed. An image processing apparatus comprising: a management unit that controls the execution unit so as to execute a drawing process according to a remaining command that is not performed.   A holding unit that holds control information for setting whether to interrupt the drawing process, and the control information held in the holding unit is set not to interrupt the drawing process; And a plurality of first commands for the drawing process being executed when the second storage means is stored in the second storage means while the execution means is executing the drawing process. The execution means is controlled to execute the reduction process according to the second command stored in the second storage means after executing the process up to a predetermined command indicating the end of The video processing apparatus according to claim 1, wherein: A video processing method for reducing each of a plurality of screens of a video signal reproduced from a recording medium to the number of pixels of a display device, and outputting each screen of the reduced video signal to the display device,
In response to an arbitrary menu display instruction from the user during the output of the reduced video signal to the display device, a plurality of first commands for a menu screen drawing process are issued and the playback is performed. The second command for the reduction process for reducing each of the plurality of screens of the video signal within the display period of one screen to the number of pixels of the display device is repeatedly issued at a timing corresponding to the display period of the plurality of screens. Issuing process;
Storing a plurality of the first commands issued in the issuing step in a first storage means;
Storing the second command issued in the issuing step in a second storage means;
An execution step of executing drawing processing according to the first command and reduction processing according to the second command;
If the second command is stored in the second storage means while the drawing process is being executed in the execution step, the drawing process being executed is interrupted and stored in the second storage means The reduction process according to the second command is executed, and after the reduction process according to the second command is completed, the first command for the suspended drawing process is executed. And a management step for controlling the processing in the execution step so as to execute the drawing processing according to the remaining commands that are not performed.   When holding the control information for setting whether or not to interrupt the drawing process in the holding means, when it is set not to interrupt the drawing process by the control information held in the holding means, In the management step, when the second command is stored in the second storage means when the drawing process is being executed in the execution step, a plurality of second processes for the drawing process being executed are performed. The process in the execution step so as to execute the reduction process according to the second command stored in the second storage means after executing the process up to a predetermined command indicating the end of one command The video processing method according to claim 3, wherein the video processing method is controlled.

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