JP5161552B2 - 半導体メモリ装置及び半導体装置 - Google Patents
半導体メモリ装置及び半導体装置 Download PDFInfo
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- JP5161552B2 JP5161552B2 JP2007320682A JP2007320682A JP5161552B2 JP 5161552 B2 JP5161552 B2 JP 5161552B2 JP 2007320682 A JP2007320682 A JP 2007320682A JP 2007320682 A JP2007320682 A JP 2007320682A JP 5161552 B2 JP5161552 B2 JP 5161552B2
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Classifications
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- H10B99/00—Subject matter not provided for in other groups of this subclass
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- H—ELECTRICITY
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
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- G—PHYSICS
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- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
- H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
-
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
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- Static Random-Access Memory (AREA)
Description
「RFIDハンドブック第2版 非接触ICカードの原理とその応用」日刊工業新聞社、Klaus Finkenzeller 著、ソフト工学研究所 訳、p243−271
本実施の形態では、本発明の半導体メモリ装置の一例に関して説明する。
本実施の形態では、上記実施の形態1で示した蓄電手段が設けられたSRAMを具備し、無線通信によりデータの交信を行う半導体装置(RFID)について図面を参照して説明する。
本実施の形態では、上記実施の形態2と異なる半導体装置の構成に関して図面を参照して説明する。
本発明のSRAMの構成はRFIDに使用されるメモリに限らない。
本実施の形態では、上記実施の形態で示した半導体装置の作製方法の一例に関して、図面を参照して説明する。本実施の形態においては、半導体装置のSRAMを具備するロジック部、アンテナ回路等を有するアナログ部等の回路に含まれる素子を同一基板上に薄膜トランジスタを用いて設ける場合について説明する。また、蓄電手段を薄膜トランジスタ型の容量素子で設ける場合について説明する。もちろん、薄膜と欄持した型の容量素子の代わりに小型の二次電池等で設けた構成とすることも可能である。なお、本実施の形態では、薄膜トランジスタ等の素子を一度支持基板に設けた後、可撓性を有する基板に転置する場合に関して説明する。
本実施の形態では、上記実施の形態5とは異なる半導体装置の作製方法に関して、図面を参照して説明する。本実施の形態においては、半導体装置のSRAMを具備するロジック部、アンテナ回路等を有するアナログ部等の回路に含まれる素子を同一の半導体基板上に設ける場合について説明する。また、蓄電手段を小型の二次電池を用いた例について説明する。もちろん、二次電池の代わりにコンデンサー等で設けた構成とすることも可能である。
本実施の形態では、上記実施の形態で示した半導体メモリ装置が設けられ無線で情報の送受信が可能な半導体装置の利用形態の一例であるRFIDタグの用途について説明する。RFIDタグは、例えば、紙幣、硬貨、有価証券類、無記名債券類、証書類(運転免許証や住民票等)、包装用容器類(包装紙やボトル等)、記録媒体(DVDソフトやビデオテープ等)、乗物類(自転車等)、身の回り品(鞄や眼鏡等)、食品類、植物類、動物類、人体、衣類、生活用品類、電子機器等の商品や荷物の荷札等の物品に設けることができ、いわゆるIDラベル、IDタグ、IDカードとして使用することができる。電子機器とは、液晶表示装置、EL表示装置、テレビジョン装置(単にテレビ、テレビ受像機、テレビジョン受像機とも呼ぶ)及び携帯電話等を指す。以下に、図13を参照して、本発明の応用例、及びそれらを付した商品の一例について説明する。
102 蓄電手段
103 ワード線
104 データ線
105 データ線
106 トランジスタ
107 トランジスタ
108 トランジスタ
109 トランジスタ
110 トランジスタ
111 トランジスタ
112 ノード
113 ノード
118 コード抽出回路
120 メモリセルアレイ
121 SRAMセル
122 デコーダ
123 回路
200 半導体装置
202 CPU
203 マスクROM
204 SRAM
205 コントローラ
206 ロジック部
207 アンテナ
208 共振回路
209 電源回路
210 リセット回路
211 クロック生成回路
212 復調回路
213 変調回路
214 電源管理回路
215 アナログ部
216 CPUIF
217 制御レジスタ
218 コード抽出回路
219 符号化回路
220 受信信号
221 送信信号
222 受信データ
223 送信データ
224 アンテナ回路
226 電源部
243 p
251 ノード
252 ダイオード素子
Claims (5)
- 第1の回路と、第2の回路と、SRAMと、を有し、
前記SRAMは、第1の配線、第2の配線、及び第3の配線と電気的に接続され、
前記SRAMは、電力を充電することができる機能を有する手段と電気的に接続され、
前記第1の回路は、前記第1の配線と電気的に接続され、
前記第2の回路は、前記第2の配線及び前記第3の配線と電気的に接続され、
前記第1の回路は、前記SRAMを選択するための信号を供給することができる機能を有し、
前記第2の回路は、前記SRAMの書き込み又は読み出しを行うことができる機能を有し、
前記SRAMの書き込み又は読み出しが行われる際に、前記手段への充電が行われることを特徴とする半導体メモリ装置。 - 第1の回路と、第2の回路と、SRAMと、を有し、
前記SRAMは、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、第4のトランジスタと、第5のトランジスタと、第6のトランジスタと、を有し、
前記第1のトランジスタのゲートは、第1の配線と電気的に接続され、
前記第1のトランジスタのソース又はドレインの一方は、第2の配線と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、前記第3のトランジスタのゲート、前記第4のトランジスタのゲート、前記第5のトランジスタのソース又はドレインの一方、及び前記第6のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第2のトランジスタのゲートは、前記第1の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの一方は、第3の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、前記第3のトランジスタのソース又はドレインの一方、前記第4のトランジスタのソース又はドレインの一方、前記第5のトランジスタのゲート、及び前記第6のトランジスタのゲートと電気的に接続され、
前記第3のトランジスタのソース又はドレインの他方は、第4の配線と電気的に接続され、
前記第4のトランジスタのソース又はドレインの他方は、前記第6のトランジスタのソース又はドレインの他方、及び電力を充電することができる機能を有する手段と電気的に接続され、
前記第5のトランジスタのソース又はドレインの他方は、第5の配線と電気的に接続され、
前記第1の回路は、前記第1の配線と電気的に接続され、
前記第2の回路は、前記第2の配線、及び前記第3の配線と電気的に接続され、
前記第1の回路は、前記SRAMを選択するための信号を供給することができる機能を有し、
前記第2の回路は、前記SRAMの書き込み又は読み出しを行うことができる機能を有し、
前記SRAMの書き込み又は読み出しが行われる際に、前記手段への充電が行われることを特徴とする半導体メモリ装置。 - 請求項1又は2において、
前記手段は、コンデンサー、又は二次電池であることを特徴とする半導体メモリ装置。 - 請求項1乃至3のいずれか一項に記載の半導体メモリ装置と、
通信信号を受信することができる機能を有する第3の回路と、
前記第3の回路からの電力を整流して、前記手段に電力を供給することができる機能を有する第4の回路と、を有することを特徴とする半導体装置。 - 請求項4において、
前記第4の回路は、ダイオード素子を介して前記手段と電気的に接続されていることを特徴とする半導体装置。
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