JP5145208B2 - Wireless communication terminal, decoding method, and decoder - Google Patents

Description

  The present invention relates to a radio communication terminal, a decoding method, and a decoder, and more particularly, to a radio communication terminal, a decoding method, and a decoder with reduced processing load for error correction decoding.

  Conventionally, in the mobile communication field, data is encoded using an error correction code such as a turbo code or LDPC (low density parity check code) on the transmission side, and error correction decoding is performed on the reception side. In general, control for increasing resistance to transmission errors due to fading or the like is performed. On the receiving side, the number of repetitions for which the decoding characteristic sufficiently converges is set in advance, and error correction decoding is generally repeated for the number of repetitions.

  In the prior art, transmission data is divided into a plurality of code blocks, and an error correction code is added to each divided code block (see, for example, Patent Document 1). This prior art will be briefly described with reference to the drawings.

  5A and 5B are block diagrams of a transmitter and a receiver in Patent Document 1, respectively. As shown in FIG. 5A, the transmitter in Patent Document 1 includes a code block division unit 501, a CRC addition unit (error detection code addition unit) 502, an error correction coding unit 503, an interleaving unit 504, and a mapping unit 505. Is provided. The code block dividing unit 501 divides transmission data into a plurality of code blocks. Error detection code adding section 502 adds a parity bit (CRC) for error detection to each data divided into code blocks. The error correction encoding unit 503 performs error correction encoding processing on each data to which the parity bit is added. The interleaving unit 504 performs interleaving processing on the error-corrected encoded data. The mapping unit 505 maps each code block subjected to the above processing to a physical channel. 5B includes a demapping unit 609, a deinterleaving unit 610, an error correction decoding unit 611, an error detection unit 612, and a code block connection unit 613. On the other hand, the reverse process of the transmitter is performed. That is, deinterleaving, error correction decoding, and error detection are performed on the received data divided into the code blocks by the demapping unit 609, and the code blocks are connected to be received data.

  Even when code blocks are used as in Patent Document 1, it is general to perform error correction decoding for each code block by the number of repetitions set in advance as described above. However, in such a case, there is a problem in that the error correction decoding process is unnecessarily continued even if almost no error occurs, and the process is delayed by an unnecessary time. In order to solve this problem, some conventional techniques estimate communication quality and reduce the number of repetitions of error correction decoding if the estimated quality is good (see, for example, Patent Document 2 and Patent Document 3).

JP 2006-203355 A JP 2001-230679 A JP 2002-152056 A

  However, in the conventional technique, when the estimation accuracy of the communication quality of the receiver is poor, if the actual communication quality is better than the estimated communication quality, unnecessary error correction decoding is repeatedly performed. Conversely, if the actual communication quality is worse than the estimated communication quality, there is a possibility that error correction decoding will not be repeated as many times as necessary to sufficiently converge the decoding result. In communication using a code block, when data consisting of a plurality of code blocks is transmitted in a single frame (such as an OFDM frame), the reception quality of the code block transmitted at the same timing included in that frame Are considered to be approximately the same. Accordingly, the number of repetitions of error correction decoding for each code block is approximately the same. That is, it is not advantageous from the viewpoint of processing load and time to repeat error correction decoding while determining whether or not there is an error in the decoding result for each code block.

  Accordingly, an object of the present invention is to solve the above-described problems and to reduce the useless arithmetic processing and improve the efficiency when performing error correction decoding by dividing received data into a plurality of code blocks. It is to provide a method and a decoder.

In order to solve the above-described problems, a wireless communication terminal according to the present invention provides:
A dividing unit that divides received data composed of a plurality of code blocks each subjected to error detection and error correction coding (CRC, turbo code, LDPC, etc.) into the plurality of code blocks;
A selection unit for selecting one code block from a plurality of code blocks divided by the division unit;
A first error correction decoding unit that repeatedly performs error correction decoding on the code block selected by the selection unit until no error is detected in the decoding result;
A storage unit for storing the number of repetitions of error correction decoding by the first error correction decoding unit as a reference number of repetitions;
A second code block that performs error correction decoding of the remaining code blocks that have not been subjected to error correction decoding by the first error correction decoding unit among the plurality of code blocks, for a reference number of repetitions stored in the storage unit; And an error correction decoding unit.

In addition, a wireless communication terminal according to an embodiment of the present invention includes:
The received data is included in a single frame;
The selecting unit selects one code block from the plurality of code blocks divided by the dividing unit at a rate of once per a plurality of frames among the frames including the received data,
The storage unit stores the latest number of iterations of error correction decoding performed by the first error correction decoding unit as the reference number of iterations.

A wireless communication terminal according to another embodiment of the present invention includes:
The selection unit includes:
One code block is selected from a plurality of code blocks divided by the dividing unit based on communication quality information for each code block divided by the dividing unit.

A wireless communication terminal according to yet another embodiment of the present invention provides:
The first error correction decoding unit includes:
When an error is detected in a decoding result of error correction decoding by the second error correction decoding unit, the error correction decoding is performed on a code block constituting the received data, and the reference repetition count is updated. .

  As described above, the solution of the present invention has been described as an apparatus. However, the present invention can be realized as a method, a program, and a storage medium storing the program, which are substantially equivalent to these. It should be understood that these are also included. Note that each step of the method or program uses an arithmetic processing unit such as a CPU or a DSP as necessary in data processing, and the input data, processed / generated data, etc. are stored in an HDD, memory, etc. Is stored in the storage device.

For example, a decoding method that implements the present invention as a method is:
Dividing received data composed of a plurality of code blocks each subjected to error detection and error correction coding into the plurality of code blocks;
Selecting one code block from a plurality of code blocks divided by the dividing step;
A first error correction decoding step of repeatedly performing error correction decoding on the code block selected by the selecting step until no error is detected in the decoding result;
Storing the number of repetitions of error correction decoding in the first error correction decoding step in a storage unit as a reference number of repetitions;
A second error in which error correction decoding of the remaining code blocks not subjected to error correction decoding by the first error correction decoding step among the plurality of code blocks is performed for the reference number of repetitions stored in the storage unit And a correction decoding step.

Furthermore, the decoder according to the present invention (used in a receiving / transmitting device such as a portable terminal or a base station)
A dividing unit that divides received data composed of a plurality of code blocks each subjected to error detection and error correction coding (CRC, turbo code, LDPC, etc.) into the plurality of code blocks;
A selection unit for selecting one code block from a plurality of code blocks divided by the division unit;
A first error correction decoding unit that repeatedly performs error correction decoding on the code block selected by the selection unit until no error is detected in the decoding result;
A storage unit for storing the number of repetitions of error correction decoding by the first error correction decoding unit as a reference number of repetitions;
A second code block that performs error correction decoding of the remaining code blocks that have not been subjected to error correction decoding by the first error correction decoding unit among the plurality of code blocks, for a reference number of repetitions stored in the storage unit; And an error correction decoding unit.

  As described above, according to the present invention, when error correction decoding is performed by dividing received data into a plurality of code blocks, it is possible to reduce useless arithmetic processing and increase efficiency.

  Hereinafter, a wireless communication apparatus according to an embodiment of the present invention will be described in detail with reference to the drawings. The wireless communication terminal 100 includes an RF unit 110, a baseband unit BB, a data processing unit 140, an interface unit IF, a control unit 170, and an antenna ANT. The RF unit 110 includes a reception unit 112 and a transmission unit 114, and performs processing for transmitting and receiving a high-frequency signal (RF signal). The baseband unit BB includes a demodulation unit 120, a decoder 130, an encoder 150, and a modulation unit 160, and performs baseband signal processing. The interface unit IF includes a microphone MIC, a speaker SP, and a display unit DIS. At the time of reception, the demodulator 120 demodulates the analog signal received by the receiver 112 and converts it into digital data. The decoder 130 performs error correction decoding and error detection on the output data from the demodulation unit 120. The data processed by the decoder 130 undergoes predetermined processing by the data processing unit 140, and the audio data is output from the speaker SP and the text data is output from the display unit DIS to the user. At the time of transmission, data input from a user input unit such as a microphone MIC or a button (not shown) is subjected to predetermined processing by the data processing unit 140 and output to the baseband unit BB as transmission data. The encoder 150 divides the transmission data into a plurality of code blocks, and encodes each code block by adding an error correction code and an error detection code. Modulation section 160 modulates the encoded transmission data and converts it into a high frequency signal. The control unit 170 controls each unit.

  Examples of the error correction code applied by the encoder 150 include a block code such as a turbo code, an LDPC (low-density parity-check code), and a convolutional code. Since an error correction code and a decoding method using the same are known techniques, details are omitted here.

  Next, the decoder 130 which is a characteristic component of the present invention will be described in detail. FIG. 2 is a schematic block diagram of the decoder 130 according to the first embodiment of the present invention. The data received by the decoder 130 includes a plurality of code blocks that have been subjected to error correction coding and error detection coding. The plurality of code blocks are included in, for example, one OFDM frame received by the wireless communication apparatus, and the wireless communication apparatus receives the plurality of code blocks at the same timing. Examples of error correction codes used for error correction coding of code blocks include block codes such as turbo codes, LDPC (low-density parity-check codes), and convolutional codes. An error detection code includes CRC. Since these error correction / detection codes and error correction encoding / decoding using them are known techniques, their details are omitted here.

  As shown in FIG. 2, the decoder 130 includes a code block division unit 131, an error correction decoding unit 132, a code block combination unit 133, a storage unit 134, a CRC check unit 135, and a retransmission request generation unit 136. In addition, the error correction decoding unit 132 includes a selection unit 132-1, a first error correction decoding unit 132-2, and a second error correction decoding unit 132-3. The code block division unit 133 divides the demodulated data demodulated by the demodulation unit 120 or the like into a plurality of code blocks. The code block dividing unit 131 divides the data included in one frame received by the receiving unit 112 into code blocks. The code block division method is specified on the transmission side.

  The selection unit 132-1 selects one code block from the plurality of code blocks divided by the code block division unit 131. For example, if it is divided into code blocks A, B, and C, the selection unit 132-1 selects the code block A. The first error correction decoding unit 132-2 repeatedly performs error correction decoding on the code block selected by the selection unit 132-1 until no error is detected in the decoding result. That is, the first error correction decoding unit 132-2 performs error detection of the decoding result every time error correction decoding is performed, and stops error correction decoding when no error is detected. In FIG. 2, the selection unit 132-1 and the first error correction decoding unit 132-2 are shown separately. However, the selection unit 132-1 is included in the first error correction decoding unit 132-2. May be included.

  The storage unit 134 stores the number of repetitions of error correction decoding performed by the first error correction decoding unit 132-2 as the reference number of repetitions. The second error correction decoding unit 132-3 performs error correction decoding by using the first error correction decoding unit 132-2 out of a plurality of code blocks included in one frame divided by the code block dividing unit 131. Error correction decoding of the remaining code blocks that have not been performed is repeated for the number of reference repetitions stored in the storage unit 134. For example, if the code block A has already been selected as described above, the remaining code blocks B and C are sequentially subjected to error correction decoding. The CRC checker 135 performs error detection (CRC check) on the code block for which the error correction decoding unit 132 has finished error correction decoding. The retransmission request generation unit 136 generates a retransmission request when an error is detected by the CRC checking unit 135 and outputs the retransmission request to the transmission unit 114 so as to be transmitted to the transmission side. When no error is detected in each code block, the code block combining unit 133 combines all the code blocks and outputs them as decoded data after error correction and error detection are performed on all the divided code blocks. To do.

  Next, processing of the decoder 130 according to the embodiment of the present invention will be described using a flowchart. FIG. 3 is a flowchart illustrating an example of processing of the decoder 130 according to the embodiment of the present invention. This flowchart is performed for each received frame. First, in step S11, the code block dividing unit 131 divides the demodulated data (received data) demodulated by the demodulating unit 120 or the like into a plurality of code blocks. Next, in step S12, the selection unit 132-1 selects a code block for calculating the reference repetition count, and first sets reference repetition count = 0. In the example described above, the code block A is selected. In step S13, the first error correction decoding unit 132-2 performs error correction decoding once on the code block selected by the selection unit 132-1. Note that error correction / detection codes and error correction encoding / decoding using them are well-known techniques, and the details are omitted here. In step S14, the reference repetition count stored in the storage unit 134 is incremented by one. In step S15, the CRC checking unit 135 performs error detection on the decoding result by the first error correction decoding unit 132-2, and determines whether or not there is an error in the decoded code block. If there is an error (error), in step S16, the first error correction decoding unit 132-2 determines whether or not the current reference iteration number is equal to the maximum iteration number. Here, the “maximum number of repetitions” refers to the number of repetitions set in advance on the receiving side as the number of repetitions for which the decoding characteristics sufficiently converge. If it is determined in step S16 that the reference number of repetitions has reached the maximum number of repetitions, the process proceeds to step S22, and the retransmission request generation unit 136 makes a retransmission request. If it is determined in step S16 that the reference number of repetitions has not reached the maximum number of repetitions, the process returns to step S13, and error correction decoding and counting of the number of times are repeated until it is determined in step S15 that the error detection result is normal. Repeat.

  If it is determined in step S15 that the CRC inspection result is normal, the process proceeds to step S17, and loop processing (steps S17 to S20) is started. The second error correction decoding unit 132-3 stores the remaining code blocks that have not been error correction decoded by the first error correction decoding unit 132-2 (in the above example, the code block B or C). Error correction decoding is repeated for the reference number of repetitions stored in unit 134 (step S18). When error correction decoding is completed for one code block, the CRC checking unit 135 detects an error and determines whether or not there is an error in the decoded code block (step S19). If there is an error (error), error correction decoding / error detection is stopped even if there is a code block that has not been subjected to error correction decoding / error detection, and the retransmission request generator 136 makes a retransmission request (step S22). . If it is determined in step S19 that there is no error (normal), error correction decoding and error detection in steps S18 and S19 are performed on the next code block. If no error is found in all code blocks, the loop process is terminated. Thereafter, in step S21, the code block combining unit 133 combines all the code blocks decoded by the first error correction decoding unit 132-2 and the second error correction decoding unit 132-3.

  Code blocks included in the same communication frame have a small difference in communication quality depending on the communication channel, and it is expected that the number of repetitions necessary for error correction decoding will be approximately the same. Therefore, as in the embodiment of the present invention, the minimum necessary to prevent an error from being detected in the error correction decoding result for one of a plurality of code blocks included in the same communication frame. If the number of iterations is obtained, the number of iterations is sufficient for the decoding characteristics of error correction decoding for the remaining code blocks to converge. In other words, the decoder 130 can prevent repetition of error correction decoding, which has been conventionally performed excessively. Further, according to the embodiment of the present invention, error detection for the remaining code blocks is performed after error correction decoding is performed for a predetermined number of repetitions, not while determining whether there is an error in the decoding result. Therefore, the processing load can be reduced. Furthermore, according to the embodiment of the present invention, instead of estimating communication quality and setting the number of repetitions as in the prior art, the number of repetitions capable of error correction decoding is obtained in real time by calculation on received data. . In other words, there is an advantage that the number of repetitions can be set reliably in accordance with the current reception quality.

  If the communication quality is expected to be stable over several frames, the applicable range of the reference repetition count obtained for the code block included in a certain frame is included not only in the frame but also in subsequent frames. It can be expanded to code blocks. In this embodiment, the processing of the decoder 130 according to the present invention will be described with reference to a flowchart. FIG. 4 is a flowchart in the case where the frame for obtaining the reference repetition count is set to a ratio of once per a plurality of frames. First, in step S31, the selection unit 132-1 determines whether or not the frame in which the code block divided by the code block division unit 131 is included is a frame for calculating the reference repetition count. This determination is made, for example, when the difference in the reference repetition number obtained over several frames is within a range of ± n (= 1, 2, 3,. A flag or the like indicating not to be set is set in the storage unit 134, and the presence or absence of the flag can be determined.

  If it is determined in step S31 that the frame is the frame for which the reference repetition count is calculated, the process proceeds to step S32, and the process of the flowchart shown in FIG. 3 is performed. If it is determined in step S31 that the frame is not a frame for calculating the reference repetition count, the process proceeds to step S33, and the code block dividing unit 131 divides the received data into a plurality of code blocks. Next, the process proceeds to step S34, and loop processing (steps S34 to S37) is started for each divided code block. The second error correction decoding unit 132-3 repeats the error correction decoding for the reference number of repetitions stored in the storage unit 134 (step S35). In other words, the second error correction decoding unit 132-3 performs an error corresponding to the number of repetitions of the latest error correction decoding performed by the first error correction decoding unit 132-2 on the code block included in the preceding frame. Repeat correction decoding. When error correction decoding is completed for one code block, the CRC checking unit 135 detects an error and determines whether or not there is an error in the decoded code block (step S36). If there is an error (error), error correction decoding / error detection is stopped even if there is a code block for which error correction decoding / error detection has not been performed, and the retransmission request generation unit 136 makes a retransmission request (step S39). . If it is determined in step S36 that there is no error (normal), error correction decoding and error detection in steps S35 and S36 are performed on the next code block. If no error is found in all code blocks, the loop process is terminated. Thereafter, in step S38, the code block combining unit 133 combines all the code blocks decoded by the second error correction decoding unit 132-3.

  In the present embodiment, it is possible to further prevent repetition of error correction decoding which has been conventionally performed, and to significantly reduce the processing load of error correction decoding and error detection. In addition, when a frame in which an error is detected as a result of performing error correction decoding for the number of reference repetitions is several frames, the calculation of the number of reference repetitions is performed for the subsequent frames. What is necessary is just to delete the flag mentioned above.

  In the above-described embodiment, a case has been described in which a retransmission request is made to the transmission side when an error is detected in the decoding result after error correction decoding for the remaining code blocks has been performed for the reference number of repetitions. The invention is not limited to this. That is, when an error is detected in the decoding result, error correction decoding is performed on the code block more than the current reference repetition count. Then, the number of times that no error is detected in the decoding result of the code block may be newly updated and set as the reference repetition number. Thereafter, error correction decoding can be performed on the code block for which error correction decoding has not been completed for the newly set reference repetition count.

  In the above-described embodiment, the case where error correction decoding is sequentially performed on the remaining code blocks has been described. However, the present invention is not limited to this, and error correction decoding on a plurality of code blocks is performed in parallel. Also good.

  Here, a method of selecting a code block by the selection unit 132-1 will be described. The selection unit 132-1 randomly selects a code block that is error-correction-decoded by the first error-correction decoding unit 132-2 from a plurality of code blocks divided by the code block division unit 131 in order to obtain a reference repetition count. You can choose. Alternatively, the selection unit 132-1 may select the reference repetition count based on the communication quality information for each code block divided by the code block division unit 131. For example, the communication quality information can be obtained from likelihood information of each bit included in the demodulated data input to the code block dividing unit 131. For example, the range of the numerical value representing likelihood information is set to −10 to 10, and if the possibility that the bit is 0 is high, the negative value is increased, and conversely, if the possibility that the bit is 1 is high, the positive value is set. Set to increase. That is, the demodulated data input to the code block dividing unit 131 is a soft value of each bit, and the communication quality of each code block can be obtained using the soft value as an example of likelihood information.

  This will be described more specifically. For example, it is assumed that a soft value of −10 to 10 is calculated for the bits constituting each code block divided by the code block dividing unit 131. The selection unit 132-1 calculates the average value of the absolute values of the soft values of the bits constituting each code block, and determines that the communication quality is poor if the average value of the absolute values is small. For example, when the soft value range is −10 to 10 as described above, it is uncertain whether the bit is “0” or “1” as the soft value is near “0”. Therefore, the smaller the average value of absolute values (closer to 0) among a plurality of code blocks, the more uncertain whether the bit is “0” or “1”, and there is a higher possibility of an error. When the reference repetition count is calculated for a code block that is highly likely to have an error among the code blocks, error correction decoding can be reliably performed on the remaining code blocks. On the other hand, when the reference number of repetitions is calculated for a code block that is unlikely to have an error among the code blocks, error correction decoding for the remaining code blocks is not repeated an extra number of times.

  Note that there may be a case where the communication quality is good when receiving a code block for which the number of reference iterations has been calculated, and the decoding characteristics may not sufficiently converge with respect to the remaining code blocks at that reference number of iterations. Accordingly, a minimum threshold value for the reference iteration number is set in advance, and when the reference iteration number obtained by the first error correction decoding unit 132-2 is lower than the minimum threshold value, the minimum threshold value is set as the reference iteration number. It can also be stored in the storage unit 134.

  In the above-described embodiment, the case where error detection (CRC check) is performed every time error correction decoding is performed when calculating the reference number of repetitions has been described. However, the present invention is not limited to this. Error detection may be performed every time error correction decoding is repeated several times. In this case, the accuracy of the reference repetition number is lowered, but the load of error detection can be reduced. Further, error correction decoding by the first error correction decoding unit 132-2 may be performed on a plurality of code blocks, and an average value of the number of repetitions may be set as a reference number of repetitions. In this case, the accuracy of the reference number of repetitions can be increased.

  The advantages of the present invention will be described again. As described above, according to the decoder 130, when error correction decoding is performed by dividing received data into a plurality of code blocks, it is possible to reduce useless arithmetic processing and increase efficiency. Furthermore, the code blocks included in the same communication frame are expected to have the same difference in communication quality, and the number of repetitions required for error correction decoding is approximately the same. Therefore, the minimum number of iterations necessary to prevent an error from being detected in the error correction decoding result for one of a plurality of code blocks included in the same communication frame as in the decoder 130 The number of repetitions is sufficient for the decoding characteristics of error correction decoding for the remaining code blocks to converge. In other words, the decoder 130 can prevent repetition of error correction decoding, which has been conventionally performed excessively. Further, according to the embodiment of the present invention, error detection for the remaining code blocks is performed after error correction decoding is performed for a predetermined number of repetitions, not while determining whether there is an error in the decoding result. Therefore, the processing load can be reduced. Furthermore, according to the embodiment of the present invention, instead of estimating communication quality and setting the number of repetitions as in the prior art, the number of repetitions capable of error correction decoding is obtained in real time by calculation on received data. . In other words, there is an advantage that the number of repetitions can be set reliably in accordance with the current reception quality.

  Although the present invention has been described based on the drawings and examples, it should be noted that those skilled in the art can easily make various modifications and corrections based on the present disclosure. Therefore, it should be noted that these variations and modifications are included in the scope of the present invention. For example, the functions included in each component, each means, etc. can be rearranged so as not to be logically contradictory, and a plurality of components can be combined into one or divided.

  The above-described decryption process is performed when the processing load of the CPU is high, such as when a plurality of applications such as mail and telephone calls are performed in the wireless communication apparatus provided with the decoder 130. Also good. That is, if the processing load on the CPU is low, error correction decoding may be performed up to the maximum number of repetitions described above.

  The decoder according to the present invention includes a wireless communication terminal (for example, a mobile phone terminal, a notebook computer, a PDA (personal digital assistance), a portable game machine, a portable audio player, a portable video player, a portable electronic dictionary, a portable electronic book viewer, etc. It is possible to apply to portable electronic devices, etc.) or base stations. Furthermore, the present invention can be applied not only to wireless communication but also as a decoder for a wired communication device.

1 is a schematic block diagram of a wireless communication terminal according to a first embodiment of the present invention. FIG. 2 is a schematic block diagram of a decoder 130 according to the first embodiment of the present invention. It is a flowchart which shows an example of the process of the decoder 130 by the Example of this invention. It is a flowchart in case the frame which calculates | requires the reference | standard repetition frequency is made into the ratio of 1 time in several frames. It is a block diagram of the transmitter and receiver in patent document 1. FIG.

Explanation of symbols

100 wireless communication terminal 110 RF unit 112 receiving unit 114 transmitting unit 120 demodulating unit 130 decoding unit 131 code block division unit 132 error correction decoding unit 132-1 selection unit 132-2 first error correction decoding unit 132-3 second Error correction decoding unit 133 Code block combination unit 134 Storage unit 135 CRC check unit 136 Retransmission request generation unit 140 Data processing unit 150 Encoding unit 160 Modulation unit 170 Control unit ANT Antenna BB Baseband unit MIC Microphone SP Speaker DIS Display unit 501 Code Block division unit 502 CRC addition unit 503 Error correction coding unit 504 Interleaving unit 505 Mapping unit 609 Demapping unit 610 Deinterleaving unit 611 Error correction decoding unit 612 Error detecting unit 613 Code block connecting unit

Claims (6)

A dividing unit that divides received data composed of a plurality of code blocks each subjected to error detection and error correction coding into the plurality of code blocks;
A selection unit for selecting one code block from a plurality of code blocks divided by the division unit;
A first error correction decoding unit that repeatedly performs error correction decoding on the code block selected by the selection unit until no error is detected in the decoding result;
A storage unit for storing the number of repetitions of error correction decoding by the first error correction decoding unit as a reference number of repetitions;
A second code block that performs error correction decoding of the remaining code blocks that have not been subjected to error correction decoding by the first error correction decoding unit among the plurality of code blocks, for a reference number of repetitions stored in the storage unit; An error correction decoding unit;
A wireless communication terminal comprising: The wireless communication terminal according to claim 1,
The received data is included in a single frame;
The selecting unit selects one code block from the plurality of code blocks divided by the dividing unit at a rate of once per a plurality of frames among the frames including the received data,
The storage unit stores, as the reference iteration number, the latest iteration number of error correction decoding performed by the first error correction decoding unit.
A wireless communication terminal characterized by the above. The wireless communication terminal according to claim 1,
The selection unit includes:
Based on the communication quality information for each code block divided by the dividing unit, one code block is selected from the plurality of code blocks divided by the dividing unit.
A wireless communication terminal characterized by the above. In the radio | wireless communication terminal as described in any one of Claims 1-3,
The first error correction decoding unit includes:
If an error is detected in the decoding result of error correction decoding by the second error correction decoding unit, the error correction decoding is performed on the code block constituting the received data, and the reference repetition count is updated.
A wireless communication terminal characterized by the above. Dividing received data consisting of a plurality of code blocks each subjected to error detection and error correction coding into the plurality of code blocks;
Selecting one code block from a plurality of code blocks divided by the dividing step;
A first error correction decoding step of repeatedly performing error correction decoding on the code block selected by the selecting step until no error is detected in the decoding result;
Storing the number of repetitions of error correction decoding in the first error correction decoding step in a storage unit as a reference number of repetitions;
A second error in which error correction decoding of the remaining code blocks not subjected to error correction decoding by the first error correction decoding step among the plurality of code blocks is performed for the reference number of repetitions stored in the storage unit A correction decoding step;
The decoding method characterized by including. A dividing unit that divides received data composed of a plurality of code blocks each subjected to error detection and error correction coding into the plurality of code blocks;
A selection unit for selecting one code block from a plurality of code blocks divided by the division unit;
A first error correction decoding unit that repeatedly performs error correction decoding on the code block selected by the selection unit until no error is detected in the decoding result;
A storage unit for storing the number of repetitions of error correction decoding by the first error correction decoding unit as a reference number of repetitions;
A second code block that performs error correction decoding of the remaining code blocks that have not been subjected to error correction decoding by the first error correction decoding unit among the plurality of code blocks, for a reference number of repetitions stored in the storage unit; An error correction decoding unit;
A decoder comprising:

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