JP5139400B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor device Download PDFInfo
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- JP5139400B2 JP5139400B2 JP2009253399A JP2009253399A JP5139400B2 JP 5139400 B2 JP5139400 B2 JP 5139400B2 JP 2009253399 A JP2009253399 A JP 2009253399A JP 2009253399 A JP2009253399 A JP 2009253399A JP 5139400 B2 JP5139400 B2 JP 5139400B2
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- 239000004065 semiconductor Substances 0.000 title claims description 75
- 238000004519 manufacturing process Methods 0.000 title claims description 37
- 229920005989 resin Polymers 0.000 claims description 70
- 239000011347 resin Substances 0.000 claims description 70
- 239000007788 liquid Substances 0.000 claims description 51
- 230000002093 peripheral effect Effects 0.000 claims description 30
- 238000000034 method Methods 0.000 claims description 22
- 230000001681 protective effect Effects 0.000 claims description 4
- 239000004642 Polyimide Substances 0.000 claims description 3
- 229920001721 polyimide Polymers 0.000 claims description 3
- 238000007789 sealing Methods 0.000 description 19
- 239000000945 filler Substances 0.000 description 18
- 239000000758 substrate Substances 0.000 description 12
- 238000007599 discharging Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 5
- 238000002161 passivation Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
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- H—ELECTRICITY
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
本発明は、半導体装置の製造方法に関し、特に、基板に半導体チップをフリップチップ実装した導体記装置の製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a conductor recording device in which a semiconductor chip is flip-chip mounted on a substrate.
近年、電子機器の高機能化や軽薄短小化の要求に伴って電子部品の高密度集積化や高密度実装化が進み、それにつれてフリップチップ実装を用いたＭＣＭ（マルチチップモジュール）又はＳＩＰ（システムインパッケージ） タイプの半導体装置が主流になりつつある。この種の半導体装置の中には、インターポーザと称される実装基板に半導体チップをフリップチップ実装した構成を採用したものがある。 In recent years, along with the demand for higher functionality and lighter, thinner and smaller electronic devices, electronic components have been densely integrated and densely mounted, and MCM (multichip module) or SIP (system using flip chip mounting) has been developed accordingly. In-package) type semiconductor devices are becoming mainstream. Some semiconductor devices of this type employ a configuration in which a semiconductor chip is flip-chip mounted on a mounting substrate called an interposer.
図１０は従来の半導体装置（例えば、特許文献１参照）の構成を示すもので、図中（Ａ）はその平面図、（Ｂ）はその断面図である。図示した半導体装置９００は、実装基板９１０、チップ９０３、ダム９０５、バンプ９０１、液状樹脂９０４によって構成されるものである。チップ９０３は、チップ実装領域の所定の辺と当該所定の辺に対応するダム９０５との間の距離Ｌ１１０が、前記チップ実装領域の他の辺と当該他の辺に対応するダム９０５との間の距離Ｌ１１２よりも長いことを特徴とするものである。 FIG. 10 shows a configuration of a conventional semiconductor device (for example, see Patent Document 1), in which (A) is a plan view and (B) is a cross-sectional view. The illustrated semiconductor device 900 includes a mounting substrate 910, a chip 903, a dam 905, a bump 901, and a liquid resin 904. The chip 903 has a distance L110 between a predetermined side of the chip mounting area and the dam 905 corresponding to the predetermined side between the other side of the chip mounting area and the dam 905 corresponding to the other side. It is characterized by being longer than the distance L112.
液状樹脂９０４は前記Ｌ１１０を表す領域に吐出され、チップ９０３と基板９１０との間の微小な空間に毛細管現象により引き込まれ、充填される。
しかしながら、前記微小な空間に充填され、尚且つチップの側面を覆うように、さらに液状樹脂９０４を吐出すると、液状樹脂９０４がダム９０５を乗り越え、電極パッド９０１まで到達し、さらには基板の側面にも流出する問題がある。
また、ダム９０５は基板９１０の一部分しか覆われていないが、基板９１０が代わりに配線が形成されたチップである場合には、液状樹脂９０４が流出すると、前記配線に液状樹脂が付着することになる。
さらには、最終的に製品にするために、チップ全体をフィラーが混入されている封止樹脂で封止するが、このフィラーが前記配線を覆っているパッシベーション膜を破壊し、該封止樹脂中のフィラーと前記配線とがショートする恐れがある。
The liquid resin 904 is discharged to the region representing the L110, and is drawn into the minute space between the chip 903 and the substrate 910 by capillary action and filled.
However, when the liquid resin 904 is further discharged so as to fill the minute space and cover the side surface of the chip, the liquid resin 904 passes over the dam 905 and reaches the electrode pad 901, and further on the side surface of the substrate. There is also a problem of leaking.
Further, the dam 905 covers only a part of the substrate 910, but when the substrate 910 is a chip in which wiring is formed instead, the liquid resin adheres to the wiring when the liquid resin 904 flows out. Become.
Furthermore, in order to finally make a product, the entire chip is sealed with a sealing resin in which a filler is mixed. This filler destroys the passivation film covering the wiring, and the sealing resin contains There is a possibility that the filler and the wiring are short-circuited.
本発明は、前記問題点に鑑みなされたものであり、以下の目的を達成することを課題とする。
即ち、本発明の目的は、液状樹脂の流出を防止し、チップ表面の配線を保護することにより、信頼性の高い半導体装置の製造方法を提供することにある。
This invention is made | formed in view of the said problem, and makes it a subject to achieve the following objectives.
That is, an object of the present invention is to provide a highly reliable manufacturing method of a semiconductor device by preventing the liquid resin from flowing out and protecting the wiring on the chip surface.
本発明者は鋭意検討した結果、下記の半導体装置の製造方法を用いることにより、上記問題を解決できることを見出し、上記目的を達成するに至った。 As a result of intensive studies, the present inventor has found that the above problem can be solved by using the following method for manufacturing a semiconductor device, and has achieved the above object.
即ち、請求項１に記載の半導体装置の製造方法は、表面に、配線、電極パッド、及びチップ実装領域が設けられた第１平面視矩形状チップを準備する工程と、前記配線を覆う保護膜を形成する工程と、前記第１平面視矩形状チップの前記表面において、前記電極パッド、及び前記チップ実装領域の周囲に設けられた前記保護膜を覆い、且つ前記チップ実装領域を離間して囲み、該チップ実装領域の所定の辺と該所定の辺に対向する辺との距離が前記チップ実装領域の他の辺と該他の辺に対向する辺との距離よりも長くなる位置に第１ダムを形成する工程と、前記チップ実装領域に第２平面視矩形状チップをフリップチップ実装する工程と、前記チップ実装領域の所定の辺と前記第１ダムの該所定の辺に対向する辺との間の領域に液状樹脂を吐出し、前記第２平面視矩形状チップと前記第１平面視矩形状チップとの間に該液状樹脂を充填してアンダーフィルを形成する工程と、前記アンダーフィルを形成する工程の前に、前記チップ実装領域の所定の辺と前記第１ダムの該所定の辺に対向する辺との間の領域に、前記チップ実装領域の側面に沿うように第２ダムを形成する工程と、を含むことを特徴とする。
請求項１に記載の半導体装置の製造方法によると、液状樹脂を充填しても、第１ダムが設けられていることにより、前記第１ダムの内周部から液状樹脂が流出することがない半導体装置の製造方法が提供される。また、前記配線は第１ダムで覆われているので、チップ全体をフィラーが混入した封止樹脂で覆っても、前記配線を覆っているパッシベーション膜の破壊を抑制することができる半導体装置の製造方法が提供される。また、請求項１に記載の半導体装置の製造方法によると、液状樹脂を吐出する位置が広く設けられていることになるため、液状樹脂を吐出する際に、前記第２平面視矩形状チップ、又は第１ダムに液滴が接触することがなく、確実に液状樹脂を開口部に吐出することができる半導体装置の製造方法が提供される。
請求項２に記載の半導体装置の製造方法は、前記アンダーフィルは、前記液状樹脂を前記チップ実装領域の全面に充填して形成したことを特徴とする。
請求項３に記載の半導体装置の製造方法は、前記第１ダムは、ポリイミドからなることを特徴とする。
That is, the method for manufacturing a semiconductor device according to claim 1 includes a step of preparing a first rectangular chip in a plan view in which wiring, electrode pads, and a chip mounting region are provided on a surface, and a protective film covering the wiring And the surface of the rectangular chip in the first plan view covers the electrode pad and the protective film provided around the chip mounting area, and surrounds the chip mounting area in a spaced manner. The first position is such that the distance between the predetermined side of the chip mounting area and the side facing the predetermined side is longer than the distance between the other side of the chip mounting area and the side facing the other side. A step of forming a dam, a step of flip-chip mounting a rectangular chip in a second plan view on the chip mounting region, a predetermined side of the chip mounting region, and a side facing the predetermined side of the first dam. Discharge liquid resin in the area between And a step of forming an underfill filled with the liquid resin between said second rectangular chip with said first rectangular chip, prior to the step of forming the underfill, the Forming a second dam along a side surface of the chip mounting region in a region between a predetermined side of the chip mounting region and a side of the first dam facing the predetermined side. It is characterized by.
According to the method for manufacturing a semiconductor device according to claim 1, even if the liquid resin is filled, the liquid resin does not flow out from the inner peripheral portion of the first dam because the first dam is provided. A method for manufacturing a semiconductor device is provided. In addition, since the wiring is covered with the first dam, even if the entire chip is covered with a sealing resin mixed with a filler, the semiconductor device can be prevented from being broken by covering the wiring. A method is provided. According to the method for manufacturing a semiconductor device according to claim 1, since the position for discharging the liquid resin is widely provided, when discharging the liquid resin, the rectangular chip in the second plan view, Alternatively, there is provided a method for manufacturing a semiconductor device capable of reliably discharging liquid resin into the opening without causing droplets to contact the first dam.
The method of manufacturing a semiconductor device according to claim 2 is characterized in that the underfill is formed by filling the entire surface of the chip mounting region with the liquid resin.
The method of manufacturing a semiconductor device according to claim 3 is characterized in that the first dam is made of polyimide.
請求項４に記載の半導体装置の製造方法は、前記第１ダムは、内周部の少なくとも一隅に面取り部を有するよう形成したことを特徴とする。
請求項４に記載の半導体装置の製造方法によると、請求項１の効果に加えて、面取り部を有することにより、第１平面視矩形状チップと第２平面視矩形状チップとの間に充填され周囲に広がるのと同時に、液状樹脂が第１ダムの境界に沿って全周に広がり易くなるため、前記内周部の全体に液状樹脂が行き渡り、チップ実装領域のすべてを液状樹脂で覆うことができる半導体装置の製造方法が提供される。
The method of manufacturing a semiconductor device according to claim 4 is characterized in that the first dam is formed so as to have a chamfered portion at least at one corner of the inner peripheral portion.
According to the method for manufacturing a semiconductor device according to claim 4, in addition to the effect of claim 1, by having a chamfered portion, filling is performed between the rectangular chip in the first planar view and the rectangular chip in the second planar view. At the same time, the liquid resin easily spreads all around the boundary of the first dam, so that the liquid resin spreads over the entire inner peripheral portion and covers the entire chip mounting area with the liquid resin. A method for manufacturing a semiconductor device is provided .
請求項５に記載の半導体装置の製造方法は、前記第２ダムの長さが、前記第２平面視矩形状チップの側面の長さの３５％以上４８％以下であり、前記第２ダムの幅が、前記チップ実装領域の所定の辺と前記第１ダムの該所定の辺に対向する辺との間の距離の２％以上２４％以下であることを特徴とする。
請求項６に記載の半導体装置の製造方法は、前記アンダーフィルを形成する工程の前に、前記チップ実装領域の他の辺と前記第１ダムの該他の辺に対向する辺との間、の少なくとも一つに、前記チップ実装領域の側面に沿うように第３ダムを形成する工程を有することを特徴とする。
請求項７に記載の半導体装置の製造方法は、前記第３ダムの長さが、前記第２平面視矩形状チップの側面の長さの８０％以上１２０％以下であり、第３ダムの幅が、前記チップ実装領域の他の辺と前記第１ダムの該他の辺に対向する辺との間の距離の８％以上３３％以下であることを特徴とする。
請求項８に記載の半導体装置の製造方法は、前記アンダーフィルを形成する工程の前に、前記第１ダムの内周部の側面の少なくとも一つから、前記第２平面視矩形状チップに向けて突出するように第４ダムを形成する工程を有することを特徴とする。
請求項１〜請求項８に記載の半導体装置の製造方法によると、前記の効果に加えて、開口部に吐出された液状樹脂が表面張力によりダムに沿って開口部中に広がるため、開口部全体をさらに覆いやすくなる半導体装置の製造方法が提供される。
The method of manufacturing a semiconductor device according to claim 5 , wherein a length of the second dam is not less than 35% and not more than 48% of a length of a side surface of the rectangular chip in the second plan view. The width is 2% or more and 24% or less of a distance between a predetermined side of the chip mounting region and a side of the first dam facing the predetermined side.
The method of manufacturing a semiconductor device according to claim 6 , before the step of forming the underfill, between the other side of the chip mounting region and the side facing the other side of the first dam, At least one of the above has a step of forming a third dam along the side surface of the chip mounting region.
The method of manufacturing a semiconductor device according to claim 7 , wherein a length of the third dam is 80% or more and 120% or less of a side length of the rectangular chip in the second plan view, and a width of the third dam. Is not less than 8% and not more than 33% of the distance between the other side of the chip mounting region and the side opposite to the other side of the first dam.
The method for manufacturing a semiconductor device according to claim 8 , wherein, prior to the step of forming the underfill, from at least one side surface of the inner peripheral portion of the first dam toward the rectangular chip in the second plan view. And a step of forming the fourth dam so as to protrude.
According to the method for manufacturing a semiconductor device according to any one of claims 1 to 8 , in addition to the above effect, the liquid resin discharged to the opening spreads into the opening along the dam due to surface tension. A method of manufacturing a semiconductor device that makes it easier to cover the entire device is provided.
本発明によれば、液状樹脂の流出を防止し、チップ表面の配線を保護することにより、信頼性の高い半導体装置の製造方法を提供することができる。 According to the present invention, it is possible to provide a highly reliable manufacturing method of a semiconductor device by preventing the liquid resin from flowing out and protecting the wiring on the chip surface.
以下に、本発明の半導体装置の製造方法の最良の形態について、図面により説明する。なお、重複する説明は省略する場合がある。 The best mode of the method for manufacturing a semiconductor device of the present invention will be described below with reference to the drawings. In addition, the overlapping description may be omitted.
＜半導体装置＞
〔参考第１実施形態〕
まず、参考例としての参考第１実施形態について示す。
図１（Ａ）は、参考例の参考第１実施形態に係る半導体装置１００の上面図であり、図１（Ｂ）は、前記上面図におけるＡ−Ａ断面図である。また、図２は、半導体装置１００が、フィラーが混入している封止樹脂によりモールドされている図である。
図１（Ａ）では、配線（不図示）、電極パッド１４、及びチップ実装領域が設けられた第１平面視矩形状チップ１０と、第１平面視矩形状チップ１０上に、電極パッド１４、及び内周部２０ａを有し、前記配線（不図示）を覆うように形成された第１ダム１６と、前記チップ実装領域にフリップチップ実装された第２平面視矩形状チップ１２と、第１平面視矩形状チップ１２と、の間に液状樹脂が充填されて形成されたアンダーフィル１８と、を有する。
図１（Ｂ）で、第１ダム１６は、電極パッド１４、及び内周部２０ａを有する。
図２では、第１平面視矩形状チップ１０の電極パッド１４と、第１平面視矩形状チップ１０の底面に配置されている配線基板２２上の電極パッド２４と、がボンディングワイヤ２６で電気的に接続されており、電極パッド１４、第１ダム１６、ボンディングワイヤ２６、アンダーフィル１８、第１平面視矩形状チップ１０、第２平面視矩形状チップ１２を覆うように、フィラーが混入された封止樹脂２８で封止されている。
各構成部位について詳述する。
<Semiconductor device>
[ Reference First Embodiment]
First, reference 1st Embodiment as a reference example is shown.
1 (A) is a top view of the semiconductor device 100 according to the reference first embodiment of the reference example, FIG. 1 (B) is an A-A sectional view of the top view. FIG. 2 is a diagram in which the semiconductor device 100 is molded with a sealing resin mixed with a filler.
In FIG. 1A, the first planar view rectangular chip 10 provided with the wiring (not shown), the electrode pad 14 and the chip mounting region, and the electrode pad 14 on the first planar view rectangular chip 10, A first dam 16 having an inner peripheral portion 20a and covering the wiring (not shown), a second chip 12 in a plan view that is flip-chip mounted on the chip mounting region, and a first An underfill 18 formed by filling a liquid resin between the rectangular chips 12 in plan view.
In FIG. 1B, the first dam 16 has an electrode pad 14 and an inner peripheral portion 20a.
In FIG. 2, the electrode pads 14 of the first planar view rectangular chip 10 and the electrode pads 24 on the wiring substrate 22 arranged on the bottom surface of the first planar view rectangular chip 10 are electrically connected by bonding wires 26. The filler is mixed so as to cover the electrode pad 14, the first dam 16, the bonding wire 26, the underfill 18, the first planar view rectangular chip 10, and the second planar view rectangular chip 12. Sealed with a sealing resin 28.
Each component will be described in detail.
〔第１平面視矩形状チップ〕
図１（Ｂ）において、第１平面視矩形状チップ１０は、略中央部にチップ実装領域が設けられており、その周囲には電極パッド１４が配置されている。また、第１平面視矩形状チップ１０の表面には配線（不図示）が設けられており、チップ実装領域のうち第２平面視矩形状チップ１２との接続部及び電極パッド１４が露出するようにパッシベーション膜（不図示）が設けられている。
[First plan view rectangular chip]
In FIG. 1B, the first planar view rectangular chip 10 is provided with a chip mounting area at a substantially central portion, and an electrode pad 14 is disposed around the chip mounting area. In addition, wiring (not shown) is provided on the surface of the first planar view rectangular chip 10 so that the connection portion and the electrode pad 14 with the second planar view rectangular chip 12 in the chip mounting region are exposed. Is provided with a passivation film (not shown).
〔第１ダム〕
図１（Ｂ）において、第１ダム１６は、電極パッド１４、及び内周部２０を設けており、図１（Ａ）より、その内周部は矩形状を有している。
第１ダム１６の材質は、絶縁性の材料であれば特に限定されないが、ダムの成形性、及び耐熱性の観点からポリイミドであることが好ましい。また、第２平面視矩形状チップ１２はパッシベーション膜で覆われているため、電極部とショートしなければ、導電性材料であっても構わない。
第１ダム１６の高さは、後述する液状樹脂が吐出後、アンダーフィル１８が形成されるまでの間に、電極パッド１４の方に流出しないような高さであれば特に限定されない。なお、第２平面視矩形状チップ１２が縦方向に複数段積層されている形態は、後述する実施形態２〜実施形態４でも同様である。
第１ダム１６は、第１平面視矩形状チップ１０の表面に形成されている配線を、前述した封止樹脂２８中のフィラーから保護する目的をも有する。
第１ダム１６は、前述した高さ、及び面積を有し、尚且つ、配線保護の観点から、第１平面視矩形状チップ１０上に形成された電気パッド１４と第１平面視矩形状チップ１０の端部との間の領域をも覆うように形成されている。
[First dam]
In FIG. 1B, the first dam 16 is provided with an electrode pad 14 and an inner peripheral portion 20, and the inner peripheral portion has a rectangular shape as shown in FIG.
Although the material of the 1st dam 16 will not be specifically limited if it is an insulating material, From the viewpoint of the moldability and heat resistance of a dam, it is preferable that it is a polyimide. In addition, since the second chip 12 having a rectangular shape in plan view is covered with a passivation film, a conductive material may be used as long as it does not short-circuit with the electrode portion.
The height of the first dam 16 is not particularly limited as long as it does not flow out toward the electrode pad 14 until the underfill 18 is formed after the liquid resin described later is discharged. Note that the form in which the second planar view rectangular chips 12 are stacked in a plurality of stages in the vertical direction is the same in the second to fourth embodiments described later.
The first dam 16 also has a purpose of protecting the wiring formed on the surface of the rectangular chip 10 in the first plan view from the filler in the sealing resin 28 described above.
The first dam 16 has the height and area described above, and from the viewpoint of wiring protection, the electrical pad 14 formed on the first planar view rectangular chip 10 and the first planar view rectangular chip. It is formed so as to cover the area between the 10 end portions.
〔アンダーフィル、液状樹脂〕
図１（Ｂ）において、アンダーフィル１８は、第１平面視矩形状チップ１０と第２平面視矩形状チップ１２との間、及び第２平面視矩形状チップ１２の側面部を覆うように形成されている。液状樹脂は、第２平面視矩形状チップ１２が後述するフリップチップ実装された後、第１ダム１６と第２平面視矩形状チップ１２との間に吐出され、毛細管現象により第１平面視矩形状チップ１０と第２平面視矩形状チップ１２との間に引き込まれ、第２平面視矩形状チップ１２の側面部を覆うようにアンダーフィル１８が形成される。
この液状樹脂の材質は、チップ間隔が１０μｍ〜３０μｍである領域に注入する観点から、微小フィラーおよび低粘度であることが挙げられる。
[Underfill, liquid resin]
In FIG. 1B, the underfill 18 is formed so as to cover the side surface of the rectangular chip 12 between the first planar view rectangular chip 10 and the second planar view rectangular chip 12. Has been. The liquid resin is ejected between the first dam 16 and the second planar view rectangular chip 12 after the second planar view rectangular chip 12 is flip-chip mounted as will be described later, and the first planar view rectangular chip 12 by the capillary phenomenon. An underfill 18 is formed so as to be drawn between the shape chip 10 and the second planar view rectangular chip 12 so as to cover the side surface portion of the second plan view rectangular chip 12.
From the viewpoint of injecting the liquid resin into a region having a chip interval of 10 μm to 30 μm, a fine filler and a low viscosity can be mentioned.
〔第１平面視矩形状チップ、第２平面視矩形状チップ、チップ実装領域、フリップチップ実装〕
図１（Ｂ）において、第２平面視矩形状チップ１２は、第１平面視矩形状チップ１０のチップ実装領域にフリップチップ実装されている。このフリップチップ実装とは、第２平面視矩形状チップ１２の活性面を第１平面視矩形状チップ１０に向けた、いわゆるフェースダウンで第１平面視矩形状チップ１０に実装することをいう。また、第１平面視矩形状チップ１０との接続部は、半田等により電気的に接続されている。
また、第１平面視矩形状チップ１０上のチップ実装領域は、第２平面視矩形状チップ１２の面積と同程度の平面視矩形状に区画されている。
第１平面視矩形状チップ１０と第２平面視矩形状チップ１２との間隔は、前述した液状樹脂が毛細管現象により第１平面視矩形状チップ１０と第２平面視矩形状チップ１２との間に引き込まれるような間隔であれば特に限定されない。
[First plane view rectangular chip, second plane view rectangular chip, chip mounting area, flip chip mounting]
1B, the second planar view rectangular chip 12 is flip-chip mounted on the chip mounting area of the first planar view rectangular chip 10. The flip chip mounting means that the active surface of the rectangular chip 12 in the second plan view is mounted on the first chip 10 in the so-called face-down direction with the active surface facing the rectangular chip 10 in the first plan view. In addition, the connection portion with the first planar view rectangular chip 10 is electrically connected by solder or the like.
Further, the chip mounting area on the first planar view rectangular chip 10 is partitioned into a rectangular shape in plan view that is approximately the same as the area of the second chip 12 in plan view rectangular shape.
The distance between the first planar view rectangular chip 10 and the second plan view rectangular chip 12 is such that the liquid resin described above is between the first planar view rectangular chip 10 and the second plan view rectangular chip 12 by capillary action. There is no particular limitation as long as it is an interval that can be drawn into.
〔配線、電極パッド〕
本発明の半導体装置において、第１平面視矩形状チップ１０上には、配線（不図示）、及び電極パッド１４が設けられている。
配線（不図示）、及び電極パッド１４の材質としては、Ａｌ、Ｃｕ、Ａｕ等の従来の金属を用いることができる。
[Wiring, electrode pads]
In the semiconductor device of the present invention, wiring (not shown) and electrode pads 14 are provided on the first chip 10 that is rectangular in plan view.
As a material for the wiring (not shown) and the electrode pad 14, a conventional metal such as Al, Cu, or Au can be used.
〔封止樹脂〕
図２では、図１に示した半導体装置１００をフィラーが混入された封止樹脂２８で封止されている。
封止樹脂２８の材質としては、例えば、エポキシ樹脂等が挙げられる。
また、封止樹脂２８には、耐環境性（ヒートサイクル等）を向上させる観点から、フィラーが混入される。ここで用いられるフィラーとしては、Ａｌ２Ｏ３、シリカ 等の粒子を用いることができる。これらの形状は、球状が望ましいが、異形状であってもよい。
[Sealing resin]
In FIG. 2, the semiconductor device 100 shown in FIG. 1 is sealed with a sealing resin 28 mixed with a filler.
Examples of the material of the sealing resin 28 include an epoxy resin.
In addition, a filler is mixed into the sealing resin 28 from the viewpoint of improving environmental resistance (heat cycle or the like). As a filler used here, particles such as Al 2 O 3 and silica can be used. These shapes are preferably spherical, but may be different shapes.
〔参考第２実施形態〕
次いで、参考例としての参考第２実施形態について示す。
参考例の第２実施形態を図３に示す。図３（Ａ）〜（Ｃ）は、参考例の第２実施形態に係る半導体装置２００の上面図であり、図４は、半導体装置２００が、フィラーが混入している封止樹脂４２によりモールドされている断面図である。
図３（Ａ）の領域３６に液状樹脂を吐出すると、図３（Ｂ）のように液状樹脂が、第２平面視矩形状チップ１２の下部、及び内周部４０ａの側面に沿って広がり、図３（Ｃ）に示すように内周部４０ａの全面に液状樹脂が充填される。
図３に示す半導体装置２００は、チップ実装領域が矩形状に露出された内周部４０ａの少なくとも一隅に面取り部３４を有する。液状樹脂が内周部全面に広がり易くなる点で好ましい。従って、面取り部３４は、図３に示すように、４隅に設けられていることがより好ましい態様として挙げられる。
面取り部３４は、Ｃ面であってもＲ面であってもよい、
Ｃ面の場合、Ｃ面部の長さがＬ１で、角度が４５°であることが好ましい。Ｒ面の場合、Ｒ面の半径がＬ１の１５０％〜１８０％であることが好ましく、１６０％〜１７０％であることが特に好ましい。
[ Reference Second Embodiment]
Next, a reference second embodiment as a reference example will be described.
A second embodiment of the reference example is shown in FIG. 3A to 3C are top views of the semiconductor device 200 according to the second embodiment of the reference example , and FIG. 4 is a diagram in which the semiconductor device 200 is molded with a sealing resin 42 in which a filler is mixed. FIG.
When the liquid resin is discharged to the region 36 in FIG. 3A, the liquid resin spreads along the lower portion of the rectangular chip 12 in the second plan view and the side surface of the inner peripheral portion 40a as shown in FIG. As shown in FIG. 3C, the entire surface of the inner peripheral portion 40a is filled with the liquid resin.
The semiconductor device 200 shown in FIG. 3 has a chamfered portion 34 at least at one corner of the inner peripheral portion 40a where the chip mounting region is exposed in a rectangular shape. The liquid resin is preferable in that it easily spreads over the entire inner peripheral portion. Therefore, as shown in FIG. 3, it is mentioned as a more preferable aspect that the chamfered part 34 is provided in four corners.
The chamfer 34 may be a C surface or an R surface.
In the case of the C plane, it is preferable that the length of the C plane portion is L1 and the angle is 45 °. In the case of the R plane, the radius of the R plane is preferably 150% to 180% of L1, and particularly preferably 160% to 170%.
さらに、参考例の第２実施形態は、前記第２平面視矩形状チップ１２の所定の辺と前記第１ダムとの間の距離が、前記第２平面視矩形状チップの他の辺と前記第１ダム３２との間の距離よりも長い領域を有する。
ここで、「前記第２平面視矩形状チップの所定の辺と前記第１ダムとの間の距離」とは、例えば、図３（Ａ）中のＬ１を表す。また、「前記第２平面視矩形状チップの他の辺と前記第１ダムとの間の距離」とは、例えば、図３（Ａ）中のＬ２を表す。
「前記平面視矩形状チップの所定の辺と該所定の辺に対応する前記基板の端部との間の距離が、前記平面視矩形状チップの他の辺と該他の辺に対応する前記基板の端部との間の距離よりも長い領域」とは、領域３６で表される領域を示す。
このＬ１とＬ２との関係は、Ｌ１＞Ｌ２であり、その比は、Ｌ１：Ｌ２＝７：２〜６：１であることが好ましい。この範囲にすることにより、液状樹脂を吐出する位置を容易に設定することができ、液状樹脂を吐出する際の漏れ等を抑制することができる。
このようにして設けられた内周部４０ａを有する半導体装置における第２実施形態の断面図を図４に示す。
内周部４０ａに設けられた第２平面視矩形状チップ１２は、領域３６を設けたことにより、偏った箇所に配置されていることがわかる。
また、液状樹脂により形成されたアンダーフィル４２が内周部４０ａの全面を覆っているので、第１平面視矩形状チップ１０の表面を覆っているパッシベーション膜が破壊されることなく、信頼性の高い半導体装置を提供することができる。
Furthermore, in the second embodiment of the reference example, the distance between the predetermined side of the second planar view rectangular chip 12 and the first dam is the same as the other side of the second planar view rectangular chip. It has a region longer than the distance from the first dam 32.
Here, the “distance between the predetermined side of the second planar view rectangular chip and the first dam” represents, for example, L1 in FIG. The “distance between the other side of the rectangular chip in the second plan view and the first dam” represents, for example, L2 in FIG.
“The distance between the predetermined side of the rectangular chip in plan view and the end of the substrate corresponding to the predetermined side corresponds to the other side of the rectangular chip in plan view and the other side. The “region longer than the distance from the edge of the substrate” indicates a region represented by the region 36.
The relationship between L1 and L2 is L1> L2, and the ratio is preferably L1: L2 = 7: 2 to 6: 1. By setting it within this range, it is possible to easily set the position for discharging the liquid resin, and to suppress leakage and the like when discharging the liquid resin.
FIG. 4 shows a cross-sectional view of the second embodiment of the semiconductor device having the inner peripheral portion 40a thus provided.
It can be seen that the second planar view rectangular chip 12 provided in the inner peripheral portion 40a is disposed at a biased location by providing the region 36.
Further, since the underfill 42 formed of the liquid resin covers the entire surface of the inner peripheral portion 40a, the passivation film covering the surface of the rectangular chip 10 in the first plan view is not destroyed, and the reliability is improved. A high semiconductor device can be provided.
〔第３実施形態〕
以下においては、本発明の半導体装置の製造方法によって製造された半導体装置を、単に「本発明の半導体装置」と称す。
本発明の半導体装置における好ましい態様である第３実施形態を図５に示す。図５（Ａ）〜（Ｃ）は、本発明の第３実施形態に係る半導体装置３００の上面図であり、図６は、半導体装置３００が、フィラーが混入している封止樹脂６２によりモールドされている断面図である。
図５に示す半導体装置３００は、領域５６に、第２平面視矩形状チップ１２の側面に沿うように形成された第２ダム５０を有する。また、第２平面視矩形状チップ１２の他の辺と第１ダム３２との間、の少なくとも一つに、第２平面視矩形状チップ１２の側面に沿うように形成された第３ダム５２を有する。さらに、内周部６０ａの側面の少なくとも一つから、第２平面視矩形状チップ１２に向けて突出するように形成された第４ダム５４を有する。
これらのダムを形成することにより、領域５６に吐出された液状樹脂の流れを制御することができ、内周部６０ａ中に広がるため、液状樹脂により内周部６０ａ全体をさらに覆いやすくなる。
[Third Embodiment]
Hereinafter, the semiconductor device manufactured by the method for manufacturing a semiconductor device of the present invention is simply referred to as “semiconductor device of the present invention”.
FIG. 5 shows a third embodiment which is a preferable aspect of the semiconductor device of the present invention. FIGS. 5A to 5C are top views of a semiconductor device 300 according to the third embodiment of the present invention. FIG. 6 is a plan view of the semiconductor device 300 molded with a sealing resin 62 mixed with a filler. FIG.
The semiconductor device 300 shown in FIG. 5 has a second dam 50 formed in the region 56 along the side surface of the rectangular chip 12 in the second plan view. The third dam 52 is formed at least one of the other sides of the rectangular chip 12 in the second plan view 12 and the first dam 32 along the side surface of the rectangular chip 12 in the second plan view. Have Furthermore, it has the 4th dam 54 formed so that it might protrude toward the 2nd planar view rectangular chip 12 from at least one of the side surfaces of the inner peripheral part 60a.
By forming these dams, the flow of the liquid resin discharged to the region 56 can be controlled and spread in the inner peripheral portion 60a, so that the entire inner peripheral portion 60a is more easily covered with the liquid resin.
−第２ダム−
第２ダム５０の長さＬ３は、第２平面視矩形状チップ１２の側面の長さの３５％以上４８％以下であることが好ましい。第２ダム５０の幅Ｌ４は、前記第２平面視矩形状チップ１２の所定の辺と前記第１ダム３２との間の距離Ｌ１の２％以上２３％以下であることが好ましい。このような第２ダム５０は、領域５６において複数存在してもよい。第２ダム５０の長さＬ３が、第２平面視矩形状チップ１２の側面の長さの１／２未満である場合には、図５に示すように、第２平面視矩形状チップ１２の側面に沿って、複数並べて配置されていてもよい。さらに好ましくは、第２平面視矩形状チップ１２の側面に並列に複数配置されていてもよい。
第２ダムが複数配置されている場合には、隣接する第２ダム５０の距離は、液状樹脂の毛細管現象を発現させる観点から、第２ダム５０の幅Ｌ４の９％以上４００％以下であることが好ましい。
-Second dam-
The length L3 of the second dam 50 is preferably not less than 35% and not more than 48% of the length of the side surface of the rectangular chip 12 in the second plan view. The width L4 of the second dam 50 is preferably not less than 2% and not more than 23% of the distance L1 between the predetermined side of the second planar view rectangular chip 12 and the first dam 32. A plurality of such second dams 50 may exist in the region 56. When the length L3 of the second dam 50 is less than ½ of the length of the side surface of the second planar view rectangular chip 12, as shown in FIG. A plurality of them may be arranged side by side along the side surface. More preferably, a plurality of chips 12 may be arranged in parallel on the side surface of the rectangular chip 12 in the second plan view.
When a plurality of second dams are arranged, the distance between adjacent second dams 50 is 9% or more and 400% or less of the width L4 of the second dam 50 from the viewpoint of causing capillary action of the liquid resin. It is preferable.
−第３ダム−
第３ダム５２は、図５中のＬ２で表される領域に配置されている。この第３ダム５２を配置することにより、液状樹脂の流れを内周部６０ａの外周部に沿って広げるように制御することができる。
第３ダム５２の長さＬ５は、第２平面視矩形状チップ１２の側面の長さの８０％以上１２０％以下であることが好ましい。また、第３ダム５２の幅Ｌ６は、第２平面視矩形状チップ１２の側面から第１ダム３２までの長さＬ２の８％以上３３％以下であることが好ましい。
-Third dam-
The third dam 52 is disposed in a region represented by L2 in FIG. By disposing the third dam 52, the flow of the liquid resin can be controlled to spread along the outer peripheral portion of the inner peripheral portion 60a.
The length L5 of the third dam 52 is preferably not less than 80% and not more than 120% of the length of the side surface of the rectangular chip 12 in the second plan view. The width L6 of the third dam 52 is preferably 8% or more and 33% or less of the length L2 from the side surface of the rectangular chip 12 in the second plan view to the first dam 32.
−第４ダム−
第４ダム５４は、内周部６０ａの側面の少なくとも一つから、第２平面視矩形状チップ１２に向けて突出するように形成されている。
第２ダム５０の長さＬ３が、第２平面視矩形状チップ１２の側面の長さの１／２未満である場合には、図５に示すように第４ダム５４を設けることが好ましい。この第４ダム５０により、液状樹脂の流れをさらに制御し、内周部６０ａの全域に広げることができる。
第４ダム５４の幅Ｌ８は、ダム加工上の観点から、第２ダム５０の幅と同様であることが望ましい。第４ダム５４の長さＬ７は、液状樹脂流動の観点からの観点から、第２平面視矩形状チップ１２の側面と第１ダム３２との間の長さＬ１の２０％〜５０％であることが好ましい。
第４ダム５４は、第２平面視矩形状チップ１２と第１ダム３２との間の距離にもよるが、内周部６０ａのいずれの側面にも形成されていることが好ましい。また、第４ダム５４の位置は、液状樹脂が均一に広がるように、内周部６０ａの側面の中央部に位置することが好ましい。
-Fourth Dam-
The fourth dam 54 is formed so as to protrude from at least one of the side surfaces of the inner peripheral portion 60a toward the rectangular chip 12 in the second plan view.
When the length L3 of the second dam 50 is less than ½ of the length of the side surface of the rectangular chip 12 in the second plan view, the fourth dam 54 is preferably provided as shown in FIG. By the fourth dam 50, the flow of the liquid resin can be further controlled and spread over the entire inner peripheral portion 60a.
The width L8 of the fourth dam 54 is desirably the same as the width of the second dam 50 from the viewpoint of dam processing. The length L7 of the fourth dam 54 is 20% to 50% of the length L1 between the side surface of the rectangular chip 12 in the second plan view and the first dam 32 from the viewpoint of liquid resin flow. It is preferable.
The fourth dam 54 is preferably formed on any side surface of the inner peripheral portion 60a, depending on the distance between the rectangular chip 12 and the first dam 32 in the second plan view. Moreover, it is preferable that the position of the 4th dam 54 is located in the center part of the side surface of the inner peripheral part 60a so that liquid resin may spread uniformly.
第２ダム５０、第３ダム５２、及び第４ダム５４の材質、高さは、製造を容易に行う観点から、前述した第１の材質と同様である。 The materials and heights of the second dam 50, the third dam 52, and the fourth dam 54 are the same as those of the first material described above from the viewpoint of easy manufacturing.
〔参考第４実施形態〕
参考例の第４実施形態を図７に示す。図７（Ａ）、（Ｂ）は、参考例の第４実施形態に係る半導体装置４００の上面図であり、図８は、半導体装置４００が、フィラーが混入している封止樹脂８２によりモールドされている断面図である。
参考例の半導体装置である弟４実施形態は、図７に示すように、チップ実装領域の同一平面上に、複数の前記第２平面視矩形状チップ７２（チップ実装領域に実装された第２平面視矩形状チップと他のチップ実装領域に実装された第２平面視矩形状チップ）を備え、隣接する第２平面視矩形状チップ７２間の距離（前記チップ実装領域の所定の辺と前記他のチップ実装領域の該所定の辺に対向する辺との間の距離）Ｌ７０が第２平面視矩形状チップ７２と第１ダム１６との間の距離（前記チップ実装領域と前記第１ダムとの間の距離および前記他のチップ実装領域と前記第１ダムとの間の距離）Ｌ８０より長いことを特徴とする。
二つの隣接する第２平面視矩形状チップ７２間の領域７４が、チップ実装領域の略中央部に配置されている。これにより、チップ実装領域に複数の第２平面視矩形状チップ７２を設けても、液状樹脂が第１平面視矩形状チップ１０と第２平面視矩形状チップ７２との間に同時に充填されるため、内周部８０ａ全体に渡り均一なアンダーフィルを形成することができる。
領域７４が、第２平面視矩形状チップ７２と第１ダム１６との間に位置していると、液状樹脂を吐出した後、隣接する第２平面視矩形状チップ７２との間で毛細管現象により、液状樹脂が第２平面視矩形状チップ７２の下部に充填され難いためである。
隣接する複数の前記第２平面視矩形状チップ７２の距離Ｌ７０は、液状樹脂を確実に内周部８０ａに吐出する観点から、第２平面視矩形状チップ７２と第１ダム１６との間の距離Ｌ８０の１００％以上４００％以下であることが好ましい。
また、第２平面視矩形状チップ７２の数は、第２平面視矩形状チップ７２の面積とチップ実装面積とに依存するものであるので、特に個数に限定されるものではない。
[ Reference Fourth Embodiment]
A fourth embodiment of the reference example is shown in FIG. FIGS. 7A and 7B are top views of the semiconductor device 400 according to the fourth embodiment of the reference example , and FIG. 8 is a diagram in which the semiconductor device 400 is molded with a sealing resin 82 in which filler is mixed. FIG.
As shown in FIG. 7, the fourth embodiment of the younger brother, which is the semiconductor device of the reference example , has a plurality of second planar view rectangular chips 72 (second mounted in the chip mounting area) on the same plane of the chip mounting area. A plan view rectangular chip and a second plan view rectangular chip mounted on another chip mounting area), and a distance between adjacent second plan view rectangular chips 72 (predetermined side of the chip mounting area and the predetermined side) The distance L70 between the other chip mounting region and the side facing the predetermined side) is the distance between the rectangular chip 72 and the first dam 16 in the second plan view (the chip mounting region and the first dam). And a distance between the other chip mounting region and the first dam) L80.
A region 74 between two adjacent second planar view rectangular chips 72 is disposed at a substantially central portion of the chip mounting region. As a result, even if a plurality of second planar view rectangular chips 72 are provided in the chip mounting region, the liquid resin is simultaneously filled between the first planar view rectangular chips 10 and the second planar view rectangular chips 72. Therefore, a uniform underfill can be formed over the entire inner peripheral portion 80a.
When the region 74 is positioned between the second planar view rectangular chip 72 and the first dam 16, after discharging the liquid resin, a capillary phenomenon occurs between the adjacent second planar view rectangular chips 72. This is because the liquid resin is difficult to be filled in the lower part of the rectangular chip 72 in the second plan view.
The distance L70 between the plurality of adjacent second planar view rectangular chips 72 is set between the second planar view rectangular chips 72 and the first dam 16 from the viewpoint of reliably discharging the liquid resin to the inner peripheral portion 80a. The distance L80 is preferably 100% or more and 400% or less.
The number of the second planar view rectangular chips 72 depends on the area and the chip mounting area of the second planar view rectangular chips 72 and is not particularly limited to the number.
＜半導体装置の製造方法＞
本発明の半導体装置の製造方法は、例えば、以下のように製造することができる。例として、参考第１実施形態の製造工程の略を説明する。
−第１工程−
図９（Ａ）に示すように、所定の半導体製造プロセス（成膜プロセス等）を経て得られた電極パッド１４が形成された第１平面視矩形状チップ１０を準備し、第１平面視矩形状チップ１０上には、電極パッド１４、及びチップ実装領域が露出するような内周部２０ａを有する第１ダム１６を形成する。
−第２工程−
次いで、チップ実装領域に、第２平面視矩形状チップ１２をフリップチップ実装し、第２平面視矩形状チップ１２と第１ダム１６との間に液状樹脂を吐出する。この吐出された液状樹脂は、第１平面視矩形状チップ１０と第２平面視矩形状チップ１２との間に毛細管現象により引き込まれ、引き込まれた液状樹脂が、吐出した面とは反対側の面にも流れ出る。その後、熱硬化しアンダーフィル１８を形成する。
次いで、第１平面視矩形状チップ１０を配線基板２２上に搭載する。
−第３工程−
その後、第１平面視矩形状チップ１０の電極パッド１４と配線基板２２上の電極パッド２４とをボンディングワイヤ２６で電気的に接続する。
−第４工程−
最後に、シリカからなる粒子が混入した封止樹脂２８で全面を覆い、第１実施形態の半導体装置が完成する。
<Method for Manufacturing Semiconductor Device>
The semiconductor device manufacturing method of the present invention can be manufactured as follows, for example. As an example, illustrating the substantially Reference first embodiment forms state of the manufacturing process.
-First step-
As shown in FIG. 9A, a first planar view rectangular chip 10 on which an electrode pad 14 obtained through a predetermined semiconductor manufacturing process (film formation process or the like) is prepared is prepared. On the shape chip 10, the electrode pad 14 and the first dam 16 having the inner peripheral portion 20a that exposes the chip mounting region are formed.
-Second step-
Next, the second planar view rectangular chip 12 is flip-chip mounted in the chip mounting area, and the liquid resin is discharged between the second planar view rectangular chip 12 and the first dam 16. The discharged liquid resin is drawn by capillarity between the rectangular chip 10 in the first plan view and the rectangular chip 12 in the second plan view, and the drawn liquid resin is on the opposite side of the discharged surface. Also flows out to the surface. Thereafter, it is thermally cured to form the underfill 18.
Next, the first planar view rectangular chip 10 is mounted on the wiring board 22.
-Third step-
Thereafter, the electrode pads 14 of the first rectangular chip 10 in plan view and the electrode pads 24 on the wiring substrate 22 are electrically connected by bonding wires 26.
-Fourth step-
Finally, the entire surface is covered with a sealing resin 28 in which particles made of silica are mixed to complete the semiconductor device of the first embodiment.
上記工程の他、第１の工程で第１平面視矩形状チップ１０をウエハ状態で準備し、前記第２工程のアンダーフィル１８を形成した後、該ウエハをダイシングすることにより、第２平面視矩形状チップ１２が搭載された第１平面視矩形状チップ１０を作製し、その後、第１平面視矩形状チップ１０を配線基板２２上に搭載してよい。 In addition to the above steps, the first planar view rectangular chip 10 is prepared in a wafer state in the first step, and after forming the underfill 18 in the second step, the wafer is diced to obtain a second plan view. The first planar view rectangular chip 10 on which the rectangular chip 12 is mounted may be manufactured, and then the first planar view rectangular chip 10 may be mounted on the wiring board 22.
以上のように、本発明の半導体装置は、液状樹脂の流出を防止し、尚且つ、配線上にパッシベーション膜を保護するようにダムが形成されていることにより、信頼性の高い半導体装置を提供することができる。 As described above, the semiconductor device of the present invention provides a highly reliable semiconductor device by preventing the liquid resin from flowing out and forming a dam on the wiring so as to protect the passivation film. can do.
なお、本実施形態は、限定的に解釈されるものではなく、本発明の要件を満足する範囲内で実現可能であることは、言うまでもない。 Needless to say, the present embodiment is not construed in a limited manner and can be realized within a range that satisfies the requirements of the present invention.
１０ 第１平面視矩形状チップ
１２、７２ 第２平面視矩形状チップ
１４、２４ 電極パッド
１６、３２ 第１ダム
１８ アンダーフィル
２０ａ、４０ａ、６０ａ、８０ａ 内周部
２２ 配線基板
２６ ボンディングワイヤ
２８、４２、６２、８２ 封止樹脂
３４ 面取り部
３６、５６、７４ 領域
５０ 第２ダム
５２ 第３ダム
５４ 第４ダム
１００、２００、３００、４００ 半導体装置
10 First planar view rectangular chip 12, 72 Second planar view rectangular chip 14, 24 Electrode pad 16, 32 First dam 18 Underfill 20a, 40a, 60a, 80a Inner peripheral portion 22 Wiring substrate 26 Bonding wire 28, 42, 62, 82 Sealing resin 34 Chamfer 36, 56, 74 Region 50 Second dam 52 Third dam 54 Fourth dam 100, 200, 300, 400 Semiconductor device
Claims (8)
前記配線を覆う保護膜を形成する工程と、
前記第１平面視矩形状チップの前記表面において、前記電極パッド、及び前記チップ実装領域の周囲に設けられた前記保護膜を覆い、且つ前記チップ実装領域を離間して囲み、該チップ実装領域の所定の辺と該所定の辺に対向する辺との距離が前記チップ実装領域の他の辺と該他の辺に対向する辺との距離よりも長くなる位置に第１ダムを形成する工程と、
前記チップ実装領域に第２平面視矩形状チップをフリップチップ実装する工程と、
前記チップ実装領域の所定の辺と前記第１ダムの該所定の辺に対向する辺との間の領域に液状樹脂を吐出し、前記第２平面視矩形状チップと前記第１平面視矩形状チップとの間に該液状樹脂を充填してアンダーフィルを形成する工程と、
前記アンダーフィルを形成する工程の前に、前記チップ実装領域の所定の辺と前記第１ダムの該所定の辺に対向する辺との間の領域に、前記チップ実装領域の側面に沿うように第２ダムを形成する工程と、
を含むことを特徴とする半導体装置の製造方法。 Preparing a first planar view rectangular chip provided with wiring, electrode pads, and a chip mounting area on the surface;
Forming a protective film covering the wiring;
The front surface of the rectangular chip in the first plan view covers the electrode pad and the protective film provided around the chip mounting area, and surrounds the chip mounting area separately, Forming a first dam at a position where the distance between the predetermined side and the side facing the predetermined side is longer than the distance between the other side of the chip mounting region and the side facing the other side; ,
Flip chip mounting a second planar view rectangular chip on the chip mounting area;
Liquid resin is discharged to a region between a predetermined side of the chip mounting region and a side of the first dam facing the predetermined side, and the second planar view rectangular chip and the first planar view rectangular shape Filling the liquid resin between the chips to form an underfill;
Before the step of forming the underfill, a region between a predetermined side of the chip mounting region and a side facing the predetermined side of the first dam is along the side surface of the chip mounting region. Forming a second dam;
A method for manufacturing a semiconductor device, comprising:
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