JP5116372B2 - Image processing apparatus, image processing method, and program - Google Patents

Description

  The present invention relates to an image processing apparatus and an image processing method for processing an input image signal using a contour correction signal, and a program for causing a computer to execute the image processing method.

  In imaging devices such as digital video cameras and digital cameras, the high-frequency component of the image signal deteriorates due to the characteristics of the optical system and the aperture ratio of the image sensor. Therefore, the contour is compensated by modulating the high-frequency component extracted from the image signal. Thus, contour correction processing is performed to increase the sharpness of the image.

  Here, if the high-frequency component extracted from the image signal is a signal having a small amplitude, it is highly possible that the image signal is not a contour of the subject but a noise component. The image may be emphasized and the S / N of the image may be deteriorated.

  In order to prevent such image quality degradation associated with the contour correction processing, processing for modulating the amplitude of the high-frequency component extracted from the image signal with a non-linear characteristic (non-linear processing) is performed in the contour correction processing. At this time, if the waveform of the contour correction signal is distorted by non-linear processing, harmonics are generated, and there is a problem that the image quality deteriorates due to the harmonic aliasing component being superimposed on the image.

  Therefore, conventionally, a contour correction processing device has been proposed that suppresses the aliasing component of the harmonics generated in the diagonal direction by up-sampling, nonlinear processing, band limiting, and down-sampling in the horizontal direction with respect to the contour signal in the vertical direction. (For example, refer to Patent Document 1).

JP-A-5-176286

  However, in the above prior art, up-sampling, band limiting, and down-sampling are performed in a direction orthogonal to the contour signal (contour correction signal), so that the harmonic aliasing component generated in the direction of the contour signal is reduced. There was a problem that it was difficult to suppress.

  The present invention has been made in view of such problems, and an object of the present invention is to remove a harmonic aliasing component generated by nonlinear processing on a contour correction signal and to generate a high-quality image. .

The image processing apparatus of the present invention is an image processing apparatus that processes an input image signal using a contour correction signal, and the image signal is processed with respect to a frequency axis in the same direction as the contour correction signal. Up-sampling is performed at a sampling frequency n times that of the signal, and a high-frequency component extracting unit that extracts a high-frequency component in the same direction from the image signal, and the high-frequency component extracted by the high-frequency component extracting unit or the high-frequency component An orthogonal direction band limiting unit that limits a band in an orthogonal direction orthogonal to the same direction, and a nonlinear process that performs a nonlinear process on the high frequency component extracted by the high frequency component extracting unit And the same direction band limiting means for band limiting the high frequency component nonlinearly processed by the nonlinear processing means in the same direction. A high-frequency component band-limited by the same-direction band-limiting means, down-sampled by 1 / n times in the same direction, and generating the contour correction signal, and the generation means generated by the generation means using a contour correction signal, have a image signal processing means for processing the image signal, the orthogonal direction band limiting means, aliasing components of the harmonics in the orthogonal direction generated by nonlinear processing of said nonlinear processing means Perform bandwidth limitation to reduce .

Another aspect of the image processing apparatus according to the present invention is an image processing apparatus that performs processing on an input image signal using a first contour correction signal and a second contour correction signal. Is up-sampled at a sampling frequency n times that of the image signal with respect to the frequency axis in the first direction, which is the same direction as the first contour correction signal, and a high frequency component in the first direction is extracted from the image signal. The first high-frequency component extracting means to extract and the high-frequency component extracted by the first high-frequency component extracting means or the image signal before the high-frequency component is extracted are orthogonal to the first direction. a first orthogonal direction band limiting means for band limitation in the orthogonal direction, the first nonlinear processing means for performing nonlinear processing on the high-frequency component extracted by the first high-frequency component extracting means The high-frequency component nonlinearly processed by the first non-linear processing means is band-limited by first co-directional band limiting means for limiting the band in the same direction as the first direction, and by the first co-directional band limiting means. First generation means for down-sampling the restricted high-frequency component by 1 / n times in the first direction to generate the first contour correction signal; and the image signal, the first contour Up-sampling is performed at a sampling frequency n times that of the image signal with respect to the frequency axis in the second direction, which is the same direction as the second contour correction signal, which is different from the direction of the correction signal, and the second signal is extracted from the image signal. the image signal before the second high-frequency component extracting means for extracting a high frequency component in a direction, the high frequency component or the frequency component extracted by the second high frequency component extraction means is extracted The carried out, a second orthogonal direction band limiting means for band limitation in the perpendicular direction perpendicular to the second direction, the non-linear processing on the high-frequency component extracted by the second high-frequency component extraction unit against 2 non-linear processing means, second high-frequency band limiting means for limiting the high-frequency component nonlinearly processed by the second non-linear processing means in the same direction as the second direction, and the second same A second generating means for generating the second contour correction signal by down-sampling the high-frequency component band-limited by the direction band-limiting means to 1 / n times in the second direction; using said second contour correction signal generated by the generated first contour correction signal and the second generating means by generating means, have a image signal processing means for processing the image signal The first The orthogonal direction band limiting unit performs band limitation to reduce a harmonic aliasing component in the orthogonal direction generated by the nonlinear processing of the first nonlinear processing unit, and the second orthogonal direction band limiting unit includes the first orthogonal band limiting unit. Band limiting is performed to reduce the harmonic folding component in the orthogonal direction generated by the nonlinear processing of the second nonlinear processing means .

The image processing method of the present invention is an image processing method for processing an input image signal using a contour correction signal, and the image signal is processed with respect to a frequency axis in the same direction as the contour correction signal. A high-frequency component extraction step of up-sampling at a sampling frequency of n times the signal and extracting a high-frequency component in the same direction from the image signal; and the high-frequency component extracted by the high-frequency component extraction step or the high-frequency component is extracted An orthogonal direction band limiting step for band limiting in an orthogonal direction orthogonal to the same direction, and a nonlinear process for performing a nonlinear process on the high frequency component extracted by the high frequency component extraction step Step and the high frequency component nonlinearly processed by the nonlinear processing step in the same direction. The same direction band limiting step, and the generation step of generating the contour correction signal by down-sampling the high frequency component band-limited by the same direction band limiting step to 1 / n times in the same direction, and the generation using the contour correction signal generated by step, the orthogonal direction have a image signal processing step of performing processing of the image signal, the orthogonal direction band limiting step is generated by non-linear processing of the nonlinear processing step The band is limited to reduce the harmonic aliasing component at .

The program of the present invention is a program for causing a computer to execute an image processing method for processing an input image signal using a contour correction signal, and the image signal is directed in the same direction as the contour correction signal. A high frequency component extraction step of upsampling at a sampling frequency n times that of the image signal with respect to the frequency axis and extracting a high frequency component in the same direction from the image signal, and a high frequency component extracted by the high frequency component extraction step or For the image signal before the high frequency component is extracted, an orthogonal direction band limiting step for band limiting in an orthogonal direction orthogonal to the same direction, and for the high frequency component extracted by the high frequency component extraction step Non-linear processing step for performing non-linear processing, and non-linear processing by the non-linear processing step The same direction band limiting step for band limiting the high frequency component in the same direction, and the high frequency component band limited by the same direction band limiting step is down-sampled 1 / n times in the same direction, A generation step of generating a contour correction signal and an image signal processing step of processing the image signal using the contour correction signal generated by the generation step are executed by a computer, and the orthogonal direction band limiting step includes Then, band limitation is performed to reduce a harmonic aliasing component in the orthogonal direction generated by the nonlinear processing in the nonlinear processing step .

  According to the present invention, it is possible to remove the aliasing component of harmonics generated in the same direction as the contour correction signal by nonlinear processing on the contour correction signal. As a result, a high-quality image can be generated.

  Furthermore, since band limitation is performed in the orthogonal direction orthogonal to the direction of the contour correction signal, it is also possible to suppress aliasing components due to sampling of pixels from the orthogonal direction orthogonal to the direction of the contour correction signal.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

(First embodiment)
FIG. 1 is a block diagram showing an example of a schematic configuration of an image processing apparatus 1 according to the first embodiment of the present invention.
As shown in FIG. 1, the image processing apparatus 1 according to the present embodiment includes a vertical contour correction processing unit 10, an image signal input terminal (video signal input terminal) 41, an image signal output terminal (video signal output terminal) 42, A system control unit 50 is included.

  Here, the vertical contour correction processing unit 10 generates a vertical contour correction signal and performs processing on the image signal (video signal) input from the image signal input terminal 41 using the vertical contour correction signal. It is.

  In FIG. 1, an image signal source (video signal source) (not shown) is connected to the image signal input terminal 41, and the image signal (one pixel at a time) at the rising timing of the system clock 51 supplied from the system control unit 50. Video signal) is read out. All processes in the present embodiment are controlled by a system clock 51 supplied from the system control unit 50.

  The vertical contour correction processing unit 10 includes a vertical delay circuit 101, a vertical upsampling circuit 102, horizontal LPF circuits 103 and 104, non-linear processing circuits 105 and 106, a vertical LPF / vertical downsampling circuit 107, and a gain adjustment circuit. 108 and an adder circuit 109.

  The image signal input from the image signal input terminal 41 is supplied to the vertical delay circuit 101 and the adder circuit 109.

FIG. 2 is a block diagram illustrating an example of the internal configuration of the vertical delay circuit 101.
As shown in FIG. 2, the vertical delay circuit 101 includes a plurality of line memories (101a to 101c), for example. Specifically, the vertical delay circuit 101 uses the line memories (101a to 101c) in the vertical direction for the image signal input from the image signal input terminal 41 for the number of lines necessary for the vertical upsampling circuit 102 in the subsequent stage. Delay. The output signals L0, L1, L2, and L3 of the vertical delay circuit 101 are input to the vertical upsampling circuit 102.

  FIG. 3 is a diagram illustrating an example of an internal configuration of the vertical upsampling circuit 102. FIG. 4 is a schematic diagram illustrating an example of the concept of upsampling processing in the vertical upsampling circuit 102.

  As shown in FIG. 3, the vertical upsampling circuit 102 includes, for example, vertical BPF circuits 1020 and 1021.

  4, L0, L1, L2, and L3 indicate pixel positions in the vertical direction of the output signal of the vertical delay circuit 101, and L0.5, L1.5, L2.5, and L3.5 indicate the vertical delay circuit 101. The position of the pixel zero-inserted in the vertical direction with respect to the output signal is shown.

  The vertical upsampling circuit 102 obtains continuous interpolated pixel values at all the pixel positions L0, L0.5, L1, L1.5, L2, L2.5, L3 and L3.5 shown in FIG. Interpolation processing is performed by the vertical BPF circuits 1020 and 1021 in FIG.

  The vertical BPF circuit 1020 uses the pixels at the positions L0, L0.5, L1, L1.5, L2, L2.5, and L3 shown in FIG. 4 and corresponds to the position L1.5 of the zero-inserted pixel. An interpolated pixel value V0 is generated.

  The vertical BPF circuit 1021 uses the pixels at the positions of L0.5, L1, L1.5, L2, L2.5, L3, and L3.5 shown in FIG. 4 to the pixel position L2 of the original image signal. A corresponding interpolated pixel value V1 is generated.

  FIG. 5 is a diagram illustrating an example of frequency amplitude characteristics of the interpolation processing performed in the vertical BPF circuits 1020 and 1021 illustrated in FIG. In FIG. 5, fs is the sampling frequency of the image signal input from the image signal input terminal 41. Here, the horizontal axis of FIG. 5 shows the frequency on the frequency axis in the same direction (vertical direction in the present embodiment) as the contour correction signal to be generated.

  The vertical BPF circuits 1020 and 1021 have zero frequency amplitude response in the frequency band from fs / 2 to 3fs / 2 shown in FIG. 5 and have bandpass characteristics in the frequency band from 0 to fs / 2. Indispensable in the interpolation processing in. By performing interpolation processing in the vertical BPF circuits 1020 and 1021 having such filter characteristics, vertical sampling is performed at the same time, and at the same time, the vertical contour correction signal in the vertical direction (that is, the same direction as the vertical contour correction signal). High frequency components can be extracted.

  Since the pixels at the positions of L0.5, L1.5, L2.5, and L3.5 shown in FIG. 4 are always 0, the vertical BPF circuit 1020 has L0, L1 as shown in FIG. , L2 and L3 only need to be calculated with the filter coefficient. Similarly, in the vertical BPF circuit 1021, as shown in FIG. 3, the calculation with the filter coefficient may be performed only for the pixels at the positions L1, L2, and L3.

  Through the processing described above, the vertical upsampling circuit 102 outputs high-frequency components (interpolated pixel values) V0 and V1 in the vertical direction upsampled twice in the vertical direction.

  The high frequency components V0 and V1 output from the vertical upsampling circuit 102 are input to the horizontal LPF circuits 103 and 104, respectively, and low-pass filter processing is performed in the horizontal direction.

  FIG. 6 is a diagram illustrating an example of frequency amplitude characteristics of processing performed in the horizontal LPF circuits 103 and 104 illustrated in FIG. Here, the horizontal axis of FIG. 6 shows the frequency on the frequency axis in the orthogonal direction (horizontal direction in the present embodiment) orthogonal to the direction of the generated contour correction signal.

  The frequency amplitude characteristics of the low-pass filter used in the horizontal LPF circuits 103 and 104 are such that the amplitude response becomes 0 at the Nyquist frequency fs / 2 of the input image signal, and the amplitude response in a frequency band lower than the Nyquist frequency fs / 2. The characteristic is to suppress as much as possible.

  The high-frequency components V0 and V1 in the vertical direction are band-limited in the horizontal direction with a low-pass filter characteristic as shown in FIG. The aliasing component due to pixel sampling can be suppressed. In addition, before the nonlinear processing by the nonlinear processing circuits 105 and 106 to be described later is performed, sufficient band limitation is performed, so that harmonic aliasing components generated by the nonlinear processing can be reduced.

  Output signals (VH0 and VH1) of the horizontal LPF circuits 103 and 104 are input to the nonlinear processing circuits 105 and 106, respectively, and nonlinear processing is performed. Here, the non-linear processing is, for example, processing for modulating the amplitude level of the input signal with non-linear characteristics.

FIG. 7 is a diagram showing an example of characteristics of nonlinear processing performed by the nonlinear processing circuits 105 and 106 shown in FIG.
In FIG. 7, when the amplitude levels (input amplitude levels) of the output signals (VH0 and VH1) of the horizontal LPF circuits 103 and 104 are equal to or higher than −TH1 and lower than TH1, the nonlinear processing circuits 105 and 106 change the output amplitude level. Output as 0.

  When the input amplitude level of the output signals (VH0 and VH1) is greater than or equal to TH1 and less than TH2, or greater than or equal to -TH2 and less than -TH1, the nonlinear processing circuits 105 and 106 output the input amplitude level as it is. Output as amplitude level.

  When the input amplitude level of the output signals (VH0 and VH1) is greater than or equal to TH2 and less than TH3, or greater than or equal to -TH3 and less than -TH2, the non-linear processing circuits 105 and 106 increase the input amplitude level by a factor α. The signal modulated by is output as an output amplitude level.

  When the input amplitude level of the output signals (VH0 and VH1) is greater than or equal to TH3 or less than -TH3, the non-linear processing circuits 105 and 106 output the predetermined level Lmax as the output amplitude level. In this case, however, | TH1 | <| TH2 | <| TH3 | and 0 <TH2-TH1 <Lmax.

  By performing such non-linear processing, a noise component included in the contour correction signal (in this embodiment, the vertical contour correction signal) can be suppressed.

FIG. 8 is a block diagram showing an example of the internal configuration of the vertical LPF / vertical downsampling circuit 107 shown in FIG.
As shown in FIG. 8, the vertical LPF / vertical downsampling circuit 107 includes, for example, vertical delay circuits 1070 and 1071 and a vertical LPF circuit 1072.

  As shown in FIG. 8, the vertical delay circuit 1070 includes, for example, a plurality of line memories (1070a to 1070c). The vertical delay circuit 1070 outputs the output signal (VN0) of the nonlinear processing circuit 105 and a signal obtained by delaying the output signal (VN0) one line at a time by each line memory (1070a to 1070c) to the vertical LPF circuit 1072. To do. In the example shown in FIG. 8, the output signal (VN0) from the nonlinear processing circuit 105 is output as a 1.5H signal, and the signals delayed by one line by each line memory (1070a to 1070c) are 2 respectively. .5H, 3.5H and 4.5H signals are output. The output signals (1.5H to 4.5H) of the vertical delay circuit 1070 are input to odd taps T1, T3, T5, and T7 of the vertical LPF circuit 1072, respectively.

  As shown in FIG. 8, the vertical delay circuit 1071 has a plurality of line memories (1071a to 1071b), for example. The vertical delay circuit 1071 outputs the output signal (VN1) of the non-linear processing circuit 106 and a signal obtained by delaying the output signal (VN1) one line at a time by each line memory (1071a and 1071b) to the vertical LPF circuit 1072. To do. In the example shown in FIG. 8, the output signal (VN1) from the nonlinear processing circuit 106 is output as a 2H signal, and the signals delayed by one line by the respective line memories (1071a and 1071b) are 3H and 4H, respectively. Is output as a signal. The output signals (2H to 4H) of the vertical delay circuit 1071 are input to the even-numbered taps T2, T4, and T6 of the vertical LPF circuit 1072, respectively.

  FIG. 9 is a diagram illustrating an example of frequency amplitude characteristics of processing performed in the vertical LPF circuit 1072 illustrated in FIG. Here, the horizontal axis of FIG. 9 shows the frequency on the frequency axis in the same direction (vertical direction in the present embodiment) as the generated contour correction signal.

  The frequency amplitude characteristic of the vertical LPF circuit 1072 shown in FIG. 9 is a low-pass characteristic in which the frequency amplitude response is 0 in the frequency band from fs / 2 to 3fs / 2 in the vertical direction. Therefore, the processing in the vertical LPF circuit 1072 can suppress the aliasing component in the vertical direction (that is, the same direction as the vertical contour correction signal) of the harmonics generated by the nonlinear processing by the nonlinear processing circuits 105 and 106 in the previous stage. .

  Further, by combining the output signals of the vertical delay circuit 1070 and the vertical delay circuit 1071 and processing them by the vertical LPF circuit 1072, a signal that has been upsampled by a factor of 2 in the vertical direction by parallel processing becomes 1 in the vertical direction. Downsampled by / 2. At this time, the vertical LPF circuit 1072 performs processing under the control of the system clock 51 from the system control unit 50.

  Here, with reference to FIG. 10, FIG. 11 and FIG. 12, the influence of the nonlinear processing on the vertical contour correction signal and the effect on the vertical contour correction signal by the countermeasure of this embodiment will be described.

  FIG. 10 is a diagram showing an example of the frequency distribution in the vertical direction for the outputs of the nonlinear processing circuits 105 and 106 shown in FIG. FIG. 11 is a diagram showing an example of the vertical frequency distribution for the output of the vertical LPF / vertical downsampling circuit 107 shown in FIG. FIG. 12 is a diagram showing an example of a horizontal frequency distribution for the outputs of the nonlinear processing circuits 105 and 106 shown in FIG.

  Here, the horizontal axis of FIGS. 10 and 11 shows the frequency on the frequency axis in the same direction as the generated contour correction signal (vertical direction in the present embodiment). In addition, the horizontal axis of FIG. 12 shows the frequency on the frequency axis in the orthogonal direction (horizontal direction in the present embodiment) orthogonal to the direction of the generated contour correction signal.

  In FIG. 10, the vertical component 1500 of the fundamental wave in the output signals of the nonlinear processing circuits 105 and 106 is distributed in the frequency band of the frequency fa. Further, the vertical component 1501 of the second harmonic in the output signals of the nonlinear processing circuits 105 and 106 is distributed in the frequency band of the frequency 2fa. The vertical component 1502 of the third harmonic in the output signals of the nonlinear processing circuits 105 and 106 is distributed in the frequency band of frequency 3fa. At this time, fs is a sampling frequency of the input image signal, and 0 <fa <fs / 2.

  Also, in FIG. 10, the vertical component 1503 of the fundamental first sideband in the output signals of the nonlinear processing circuits 105 and 106 is generated in the frequency band of frequency 2fs-fa. The vertical component 1504 of the second harmonic first sideband in the output signals of the nonlinear processing circuits 105 and 106 is generated in the frequency band of frequency 2fs-2fa. Further, the vertical component 1505 of the third harmonic first sideband in the output signals of the nonlinear processing circuits 105 and 106 is generated in the frequency band of frequency 2fs-3fa.

  As described above, in this embodiment, high frequency components are extracted by upsampling twice in the vertical direction. As a result, the sidebands of the fundamental wave, the second harmonic, and the third harmonic fold back to the low frequency side with the frequency 2fs as a reference, and are mixed in a frequency band lower than the Nyquist frequency fs / 2 of the input image signal. Can be prevented.

  The vertical wave components of the fundamental wave, the second harmonic wave, the third harmonic wave, and their first sidebands in the output signals of the nonlinear processing circuits 105 and 106 are input to the input image by the vertical LPF / vertical downsampling circuit 107. The band is limited to a band up to the Nyquist frequency fs / 2 of the signal. Then, the vertical direction component is thinned out by a factor of 1/2 in the vertical direction. As a result, as shown in FIG. 11, harmonics and harmonic aliasing components due to nonlinear processing are removed from the vertical component of the vertical contour correction signal.

  In FIG. 12, the horizontal component 1600 of the fundamental wave in the output signals of the nonlinear processing circuits 105 and 106 is distributed in the frequency band of the frequency fa. Further, the horizontal component 1601 of the second harmonic in the output signals of the nonlinear processing circuits 105 and 106 is distributed in the frequency band of the frequency 2fa. The horizontal component 1602 of the third harmonic in the output signals of the nonlinear processing circuits 105 and 106 is distributed in the frequency band of the frequency 3fa.

  Here, in the present embodiment, since the horizontal LPF circuits 103 and 104 perform sufficient band limitation in the horizontal direction, horizontal waveform distortion in the nonlinear processing circuits 105 and 106 hardly occurs. . Therefore, also for the horizontal component of the vertical contour correction signal, as shown in FIG. 12, it is possible to reduce image quality degradation due to nonlinear processing.

  As described above, the vertical LPF / vertical downsampling circuit 107 suppresses harmonics and harmonic folding components generated by nonlinear processing, and generates a vertical contour correction signal having the same number of pixels as the input image signal. Is done.

  The output signal (vertical contour correction signal) of the vertical LPF / vertical downsampling circuit 107 is input to the gain adjustment circuit 108 shown in FIG. The gain adjustment circuit 108 amplifies the output signal (vertical contour correction signal) of the vertical LPF / vertical downsampling circuit 107 with a predetermined gain.

  The vertical contour correction signal output from the gain adjustment circuit 108 shown in FIG. 1 is the original image signal (video signal) input from the image signal input terminal (video signal input terminal) 41 in the addition circuit 109 shown in FIG. And the contour correction process is performed on the image signal. The image signal (video signal) after the contour correction processing is output from the addition circuit 109 to the image signal output terminal (video signal output terminal) 42.

Next, a processing flow of the image processing method by the image processing apparatus 1 according to the first embodiment will be described.
FIG. 13 is a flowchart showing a process flow of the image processing apparatus 1 according to the first embodiment of the present invention.

  When the processing illustrated in FIG. 13 is started, an image signal is input from the image signal input terminal 41 to the vertical delay circuit 101 and the addition circuit 109 of the vertical contour correction processing unit 10. The vertical delay circuit 101 delays the input image signal in the vertical direction and outputs the delayed image signal to the vertical upsampling circuit 102 as described above.

  First, in step S1, the vertical upsampling circuit (high-frequency component extracting means) 102 calculates a high-frequency component in the vertical direction (that is, the same direction as the vertical contour correction signal) from the image signal input from the vertical delay circuit 101. A high frequency component extraction process is performed. At this time, the vertical upsampling circuit 102 upsamples the input image signal at a sampling frequency n times that of the image signal with respect to the frequency axis in the vertical direction (that is, the same direction as the vertical contour correction signal). Perform component extraction processing. Here, as for n times n in the upsampling processing, in the above description, an example in the case of “n = 2” has been described. However, in the present invention, n may be an integer of 2 or more. If applicable.

  Here, the vertical upsampling circuit 102 of the present embodiment has a frequency characteristic for extracting a high frequency component of the image signal on the vertical frequency axis, and a frequency for upsampling the image signal at a sampling frequency n times that of the image signal. It has a filter circuit (vertical BPF circuits 1020 and 1021) having both characteristics.

  The high frequency component processed by the vertical upsampling circuit 102 is input to the horizontal LPF circuits 103 and 104. Thereafter, the horizontal LPF circuits (orthogonal direction band limiting means) 103 and 104 perform band limitation on the input high frequency components in the orthogonal direction orthogonal to the direction of the vertical contour correction signal. That is, the horizontal LPF circuits 103 and 104 perform low-pass filter processing in the horizontal direction on the input high frequency components.

  Subsequently, in step S2, the nonlinear processing circuits (nonlinear processing means) 105 and 106 perform nonlinear processing on the high frequency components input from the horizontal LPF circuits 103 and 104, respectively.

  Subsequently, in step S3, the vertical LPF / vertical downsampling circuit 107 limits the band of the high-frequency component nonlinearly processed by the nonlinear processing circuits 105 and 106 in the same direction as the vertical contour correction signal (that is, the vertical direction). The same direction band limiting process is performed.

  Subsequently, in step S4, the vertical LPF / vertical downsampling circuit 107 downsamples the high-frequency component band-limited in the same direction by 1 / n times in the same direction to generate a vertical contour correction signal. I do. Thereafter, the generated vertical contour correction signal is amplified with a predetermined gain in the gain adjustment circuit 108 and then output to the addition circuit 109.

  Subsequently, in step S 5, the adder circuit (image signal processing means) 109 uses the vertical contour correction signal generated by the vertical LPF / vertical downsampling circuit 107 to output the image signal input from the image signal input terminal 41. Process. Specifically, the adder circuit 109 adds the vertical contour correction signal to the input image signal and performs contour correction processing on the image signal.

  Thereafter, the image signal after the contour correction processing is output from the addition circuit 109 to the image signal output terminal 42, and the flowchart shown in FIG.

  As described above, the image processing apparatus 1 according to the present embodiment can remove harmonics generated by nonlinear processing on image signals (video signals) and aliasing components of the harmonics. As a result, a high-quality contour correction signal can be generated, so that a high-quality image can be generated. Further, the upsampling of the image signal only needs to be performed in the contour direction, and the interpolation filter for upsampling and the extraction filter for the high frequency component in the vertical direction can be shared, so that the redundant circuit scale does not increase. The adverse effects of nonlinear processing can be eliminated.

(Second Embodiment)
FIG. 14 is a block diagram showing an example of a schematic configuration of the image processing apparatus 2 according to the second embodiment of the present invention.
As shown in FIG. 14, the image processing apparatus 2 of the present embodiment includes a horizontal contour correction processing unit 20, an image signal input terminal (video signal input terminal) 41, an image signal output terminal (video signal output terminal) 42, A system control unit 50 is included. That is, the image processing apparatus 2 of the present embodiment is configured by configuring a horizontal contour correction processing unit 20 instead of the vertical contour correction processing unit 10 in the image processing apparatus 1 of the first embodiment shown in FIG.

  In the second embodiment, the input image signal input from the image signal input terminal 41 has a high frequency component in the horizontal direction in the processing system from the vertical delay circuit 101 to the gain adjustment circuit 108 of the horizontal contour correction processing unit 20. A horizontal contour correction signal is generated. Then, the adder circuit 109 adds the horizontal contour correction signal to the input image signal input from the image signal input terminal 41 to perform contour correction processing.

  Here, the configuration and operation of the image signal input terminal 41 and the image signal output terminal 42, the system control unit 50, the vertical delay circuit 101, the gain adjustment circuit 108, and the addition circuit 109 are shown in FIG. Is the same as In the present embodiment, system clocks 52 and 53 are supplied from the system control unit 50 shown in FIG. 14 to the horizontal contour correction processing unit 20.

  An output signal (image signal) delayed in the vertical direction by the vertical delay circuit 101 is input to the vertical LPF circuit 201 and subjected to a low-pass filter process in the vertical direction. The frequency amplitude characteristic of the vertical LPF circuit 201 is the same as that of FIG. 6 in the horizontal LPF circuits 103 and 104 of the first embodiment. By performing band limitation in the vertical direction with the low-pass filter characteristics as shown in FIG. 6, the aliasing component by sampling pixels from the orthogonal direction orthogonal to the direction (horizontal direction) in which the high-frequency component for contour correction is extracted in the subsequent stage Can be suppressed. Also in the present embodiment, by performing band limitation sufficiently before performing nonlinear processing by the nonlinear processing circuit 204 described later, it is possible to reduce the harmonic aliasing component generated by nonlinear processing.

  FIG. 15 is a block diagram showing an example of the internal configuration of the horizontal delay circuit 202 shown in FIG. As shown in FIG. 15, the horizontal delay circuit 202 includes, for example, a plurality of delay elements (202a to 202c).

  The output signal of the vertical LPF circuit 201 is input to the horizontal delay circuit 202. As shown in FIG. 15, the horizontal delay circuit 202 delays the output signal of the vertical LPF circuit 201 pixel by pixel in the horizontal direction using delay elements (202a to 202c). Output signals D0, D1, D2, and D3 of the horizontal delay circuit 202 are input to the horizontal upsampling circuit 203.

FIG. 16 is a block diagram showing an example of the internal configuration of the horizontal upsampling circuit 203 shown in FIG.
As shown in FIG. 16, the horizontal upsampling circuit 203 includes horizontal BPF circuits 2030 and 2031 and a selection circuit 2032. The horizontal upsampling circuit 203 is controlled by a system clock 52 supplied from the system control unit 50 and a double-speed system clock 53 that is double the system clock 52.

FIG. 17 is a schematic diagram showing an example of the concept of the upsampling process in the horizontal upsampling circuit 203 shown in FIG.
In FIG. 17, D0, D1, D2, and D3 indicate horizontal pixel positions of the output signal of the horizontal delay circuit 202, and D0.5, D1.5, D2.5, and D3.5 indicate the horizontal delay circuit 202. The position of the pixel zero-inserted in the horizontal direction with respect to the output signal is shown.

  The horizontal upsampling circuit 203 obtains continuous interpolated pixel values at the positions of all pixels D0, D0.5, D1, D1.5, D2, D2.5, D3, and D3.5 shown in FIG. Interpolation processing is performed by the horizontal BPF circuits 2030 and 2031 in FIG.

  The horizontal BPF circuit 2030 corresponds to the position D1.5 of the zero-inserted pixel using the pixels at the positions D0, D0.5, D1, D1.5, D2, D2.5, and D3 shown in FIG. An interpolated pixel value H0 is generated.

  The horizontal BPF circuit 2031 uses the pixels at the positions of D0.5, D1, D1.5, D2, D2.5, D3, and D3.5 shown in FIG. 17 to the pixel position D2 of the original image signal. A corresponding interpolated pixel value H1 is generated.

  The frequency amplitude characteristics of the interpolation processing performed by the horizontal BPF circuits 2030 and 2031 are as shown in FIG. 5, for example, as in the vertical BPF circuits 1020 and 1021 in the first embodiment. In FIG. 5, fs is the sampling frequency of the image signal input from the image signal input terminal 41 as described above. Here, the horizontal axis of FIG. 5 shows the frequency on the frequency axis in the same direction (horizontal direction in the present embodiment) as the generated contour correction signal.

  The horizontal BPF circuits 2030 and 2031 have zero frequency amplitude response in the frequency band from fs / 2 to 3fs / 2 shown in FIG. 5 and have bandpass characteristics in the frequency band from 0 to fs / 2. Indispensable in the interpolation processing in. By performing interpolation processing in the horizontal BPF circuits 2030 and 2031 having such filter characteristics, horizontal upsampling is performed, and at the same time, the horizontal direction in the horizontal contour correction signal (that is, the same direction as the horizontal contour correction signal). High frequency components can be extracted.

  Since the pixels at the positions D0.5, D1.5, D2.5, and D3.5 shown in FIG. 17 are always 0, the horizontal BPF circuit 2030 has D0, D1 as shown in FIG. , D2 and D3 need only be calculated with the filter coefficients for the pixels at the positions. Similarly, in the horizontal BPF circuit 2031, as shown in FIG. 16, the calculation with the filter coefficient may be performed only for the pixels at the positions of D 1, D 2, and D 3.

  The processing results (H0 and H1) of the horizontal BPF circuits 2030 and 2031 are input to the selection circuit 2032 and are alternately output according to the system clock 52 and the double speed system clock 53 in the selection circuit 2032.

FIG. 18 is a timing chart showing an example of the processing operation of each internal configuration of the horizontal upsampling circuit 203 shown in FIG.
In FIG. 18, the horizontal BPF circuits 2030 and 2031 output the processing result at the rising timing of the system clock 51. In FIG. 18, the selection circuit 2032 selects and outputs the processing result of the horizontal BPF circuit 2030 when the system clock 52 is 1 and the double speed system clock 53 rises. The selection circuit 2032 selects and outputs the result of the horizontal BPF circuit 2031 when the system clock 52 is 0 and the double speed system clock 53 rises.

  Through the above-described processing, the horizontal upsampling circuit 203 outputs the high-frequency component in the horizontal direction upsampled twice in the horizontal direction at the double-speed timing of the system clock 52.

  The output signal of the horizontal upsampling circuit 203 is input to the non-linear processing circuit 204, where non-linear processing is performed. The characteristics of the nonlinear processing performed by the nonlinear processing circuit 204 are the same as those of the nonlinear processing circuits 105 and 106 of the first embodiment, as shown in FIG. In addition, since the signal up-sampled twice in the horizontal direction is input to the non-linear processing circuit 204, the processing timing is controlled based on the double-speed system clock 53.

  The output signal of the nonlinear processing circuit 204 is input to the horizontal LPF / horizontal downsampling circuit 205.

  FIG. 19 is a block diagram showing an example of the internal configuration of the horizontal LPF / horizontal downsampling circuit 205 shown in FIG. FIG. 20 is a timing chart showing an example of the processing operation of each internal configuration of the horizontal LPF / horizontal downsampling circuit 205 shown in FIG.

  The horizontal LPF / horizontal downsampling circuit 205 includes, for example, a horizontal delay circuit 2050 having a plurality of delay elements (2050a to 2050f), a horizontal LPF circuit 2051, and a thinning circuit 2052, as shown in FIG. It is configured.

  The horizontal delay circuit 2050 outputs a signal obtained by delaying the output signal of the nonlinear processing circuit 204 one pixel at a time in the horizontal direction by the delay elements (2050a to 2050f). The output signal output from the horizontal delay circuit 2050 is input to the horizontal LPF circuit 2051.

  The horizontal LPF circuit 2051 performs low-pass filtering in the horizontal direction on the output signal output from the horizontal delay circuit 2050. The frequency amplitude characteristics of the horizontal LPF circuit 2051 are as shown in FIG. 9 as in the vertical LPF circuit 1072 in the first embodiment. In this case, the horizontal LPF circuit 2051 has a low-pass characteristic in which the frequency amplitude response is 0 in the frequency band from fs / 2 to 3fs / 2 in the horizontal direction, as shown in FIG. The horizontal LPF circuit 2051 outputs the processing result at the rising timing of the double speed system clock 53 as shown in the timing chart of FIG.

  The thinning circuit 2052 thins out the processing result of the horizontal LPF circuit 2051 in the horizontal direction and outputs it in accordance with the system clock 52 and the double speed system clock 53 supplied from the system control unit 50. For example, as shown in the timing chart of FIG. 20, the processing result of the horizontal LPF circuit 2051 is output only when the system clock 52 is 1 and the double speed system clock 53 rises.

  Here, with reference to FIG. 10, FIG. 11 and FIG. 12, the influence of the non-linear processing on the horizontal contour correction signal and the effect on the horizontal contour correction signal by the countermeasure of this embodiment will be described.

  Here, in the present embodiment, FIG. 10 is a diagram illustrating an example of a horizontal frequency distribution for the output of the nonlinear processing circuit 204 illustrated in FIG. 14. In the present embodiment, FIG. 11 is a diagram illustrating an example of a horizontal frequency distribution for the output of the horizontal LPF / horizontal downsampling circuit 205 illustrated in FIG. In this embodiment, FIG. 12 is a diagram illustrating an example of a vertical frequency distribution for the output of the nonlinear processing circuit 204 illustrated in FIG.

  Here, the horizontal axis of FIG. 10 and FIG. 11 shows the frequency on the frequency axis in the same direction as the generated contour correction signal (horizontal direction in the present embodiment). Also, the horizontal axis of FIG. 12 shows the frequency on the frequency axis in the orthogonal direction (vertical direction in the present embodiment) orthogonal to the direction of the generated contour correction signal.

  In FIG. 10, the horizontal component 1500 of the fundamental wave in the output signal of the nonlinear processing circuit 204 is distributed in the frequency band of the frequency fa. Further, the horizontal component 1501 of the second harmonic in the output signal of the nonlinear processing circuit 204 is distributed in the frequency band of the frequency 2fa. Further, the horizontal component 1502 of the third harmonic in the output signal of the nonlinear processing circuit 204 is distributed in the frequency band of the frequency 3fa. At this time, fs is a sampling frequency of the input image signal, and 0 <fa <fs / 2.

  In FIG. 10, the horizontal component 1503 of the fundamental first sideband in the output signal of the nonlinear processing circuit 204 is generated in the frequency band of frequency 2fs-fa. Further, the horizontal component 1504 of the second harmonic first sideband in the output signal of the nonlinear processing circuit 204 is generated in the frequency band of frequency 2fs-2fa. Further, the horizontal component 1505 of the third harmonic first sideband in the output signal of the nonlinear processing circuit 204 is generated in the frequency band of frequency 2fs-3fa.

  As described above, in this embodiment, high frequency components are extracted by upsampling twice in the horizontal direction. As a result, the sidebands of the fundamental wave, the second harmonic, and the third harmonic fold back to the low frequency side with the frequency 2fs as a reference, and are mixed in a frequency band lower than the Nyquist frequency fs / 2 of the input image signal. Can be prevented.

  The horizontal component of the fundamental wave, the second harmonic, the third harmonic, and the first sidebands in the output signal of the nonlinear processing circuit 204 are input to the input image signal in the horizontal LPF / horizontal downsampling circuit 205. The band is limited to the band up to the Nyquist frequency fs / 2. Then, the horizontal direction component is thinned out by a factor of 1/2 in the horizontal direction. As a result, as shown in FIG. 11, harmonics and harmonic folding components due to nonlinear processing are removed from the horizontal component of the horizontal contour correction signal.

  In FIG. 12, the vertical component 1600 of the fundamental wave in the output signal of the nonlinear processing circuit 204 is distributed in the frequency band of the frequency fa. The vertical component 1601 of the second harmonic in the output signal of the nonlinear processing circuit 204 is distributed in the frequency band of frequency 2fa. Further, the vertical component 1602 of the third harmonic in the output signal of the nonlinear processing circuit 204 is distributed in the frequency band of the frequency 3fa.

  Here, in the present embodiment, since the vertical LPF circuit 201 further performs band limitation sufficiently in the vertical direction, the distortion of the vertical waveform in the nonlinear processing circuit 204 hardly occurs. Therefore, also for the vertical direction component of the horizontal contour correction signal, as shown in FIG. 12, image quality deterioration due to nonlinear processing can be reduced.

  As described above, the horizontal LPF / horizontal downsampling circuit 205 suppresses harmonics and harmonic folding components generated by nonlinear processing, generates a horizontal contour correction signal having the same number of pixels as the input image signal, and outputs it. Is done.

  The output signal (horizontal contour correction signal) of the horizontal LPF / horizontal downsampling circuit 205 is input to the gain adjustment circuit 108 shown in FIG. The gain adjustment circuit 108 amplifies the output signal (horizontal contour correction signal) of the horizontal LPF / horizontal downsampling circuit 205 with a predetermined gain.

  The horizontal contour correction signal output from the gain adjustment circuit 108 shown in FIG. 14 is the original image signal (video signal) input from the image signal input terminal (video signal input terminal) 41 in the addition circuit 109 shown in FIG. And the contour correction process is performed on the image signal. The image signal (video signal) after the contour correction processing is output from the addition circuit 109 to the image signal output terminal (video signal output terminal) 42.

  Next, a processing flow of the image processing method by the image processing apparatus 2 according to the second embodiment will be described with reference to FIG.

  When the process shown in FIG. 13 is started, an image signal is input from the image signal input terminal 41 shown in FIG. 14 to the vertical delay circuit 101 and the adder circuit 109 of the horizontal contour correction processing unit 20. The vertical delay circuit 101 delays the input image signal in the vertical direction and outputs the delayed image signal to the vertical LPF circuit 201 as described above.

  Thereafter, the vertical LPF circuit (orthogonal direction band limiting means) 201 performs band limitation in the orthogonal direction orthogonal to the direction of the horizontal contour correction signal with respect to the input image signal before the high frequency component is extracted. That is, the vertical LPF circuit 201 performs low-pass filter processing in the vertical direction on the input image signal. Thereafter, the horizontal delay circuit 202 delays the image signal input from the vertical LPF circuit 201 in the horizontal direction and outputs the delayed image signal to the horizontal upsampling circuit 203 as described above.

  First, in step S <b> 1, the horizontal upsampling circuit (high frequency component extracting means) 203 calculates a high frequency component in the horizontal direction (that is, the same direction as the horizontal contour correction signal) from the image signal input from the horizontal delay circuit 202. A high frequency component extraction process is performed. At this time, the horizontal upsampling circuit 203 upsamples the input image signal at a sampling frequency n times that of the image signal with respect to the frequency axis in the horizontal direction (that is, the same direction as the horizontal contour correction signal). Perform component extraction processing. Here, n times n in the upsampling process is the same as that described in the first embodiment.

  Here, the horizontal upsampling circuit 203 of the present embodiment has a frequency characteristic for extracting a high frequency component of the image signal on the horizontal frequency axis, and a frequency for upsampling the image signal at a sampling frequency n times that of the image signal. The filter circuit (horizontal BPF circuits 2030 and 2031) having both characteristics is included.

  Subsequently, in step S <b> 2, the nonlinear processing circuit (nonlinear processing means) 204 performs nonlinear processing on the high frequency component extracted by the horizontal upsampling circuit 203.

  Subsequently, in step S3, the horizontal LPF / horizontal downsampling circuit 205 limits the high-frequency component nonlinearly processed by the nonlinear processing circuit 204 in the same direction as the horizontal contour correction signal (that is, in the horizontal direction). Perform restriction processing.

  Subsequently, in step S4, the horizontal LPF / horizontal downsampling circuit 205 downsamples the high-frequency component band-limited in the same direction by 1 / n times in the same direction to generate a horizontal contour correction signal. I do. Thereafter, the generated horizontal contour correction signal is amplified with a predetermined gain in the gain adjustment circuit 108 and then output to the addition circuit 109.

  Subsequently, in step S5, the adder circuit (image signal processing means) 109 uses the horizontal contour correction signal generated by the horizontal LPF / horizontal downsampling circuit 205 to output the image signal input from the image signal input terminal 41. Process. Specifically, the addition circuit 109 adds the horizontal contour correction signal to the input image signal, and performs the contour correction processing on the image signal.

  Thereafter, the image signal after the contour correction processing is output from the addition circuit 109 to the image signal output terminal 42, and the flowchart shown in FIG.

  As described above, also in the image processing apparatus 2 of the present embodiment, the harmonics generated by the nonlinear processing and the aliasing components of the harmonics are removed without increasing the redundant circuit scale, that is, the adverse effect of the nonlinear processing. Can be removed.

(Third embodiment)
FIG. 21 is a block diagram illustrating an example of a schematic configuration of an image processing device 3 according to the third embodiment of the present invention.
As shown in FIG. 21, the image processing apparatus 3 of the present embodiment includes an outline correction processing unit 30, an image signal input terminal (video signal input terminal) 41, an image signal output terminal (video signal output terminal) 42, and a system. A control unit 50 is included. That is, in the image processing device 3 of the present embodiment, the contour correction processing unit 30 generates contour correction signals from the input image signal in two different directions, the vertical direction and the horizontal direction, and outputs them as input image signals. Are combined to perform contour correction processing. In FIG. 21, the same reference numerals are given to the same components as those of the image processing apparatus 1 according to the first embodiment shown in FIG.

Hereinafter, the configuration and operation of the image processing apparatus 3 of the present embodiment will be described.
In FIG. 21, an image signal source (video signal source) (not shown) is connected to the image signal input terminal 41, and the image signal (one pixel at a time) at the rising timing of the system clock 54 supplied from the system control unit 50. Video signal) is read out. Also, all processes in the present embodiment are controlled by the system clock 54 supplied from the system control unit 50.

  The contour correction processing unit 30 includes a vertical LPF circuit 301, a horizontal delay circuit 302, a horizontal upsampling circuit 303, nonlinear processing circuits 304 and 305, and a horizontal LPF in addition to the circuits 101 to 108 shown in FIG. A horizontal downsampling circuit 306, a gain adjustment circuit 307, and addition circuits 308 and 309 are included.

  An image signal (video signal) input from the image signal input terminal (video signal input terminal) 41 is supplied to the vertical delay circuit 101 and the adder circuit 309. Here, the configuration and operation of the vertical delay circuit 101 are the same as those in the first embodiment. That is, the internal configuration of the vertical delay circuit 101 is as shown in FIG. The output signals (L0 to L3) of the vertical delay circuit 101 are input to the vertical upsampling circuit 102 and the vertical LPF circuit 301, respectively.

  The processing from the vertical upsampling circuit 102 to the gain adjustment circuit 108 is the same as in the first embodiment, and a vertical contour correction signal having a high frequency component in the vertical direction is generated by the processing of these circuits.

  On the other hand, the vertical LPF circuit 301 performs low-pass filter processing on the output signal of the vertical delay circuit 101 in the vertical direction. Here, the frequency amplitude characteristic of the low-pass filter used in the vertical LPF circuit 301 is the same as the characteristic of FIG. 6 in the horizontal LPF circuits 103 and 104 of the first embodiment. By subjecting the input image signal to vertical band limitation with a low-pass filter having characteristics as shown in FIG. 6, the high-frequency component for contour correction is extracted from the orthogonal direction orthogonal to the direction (horizontal direction) to be extracted in the subsequent stage. The aliasing component due to pixel sampling can be suppressed. Also in the present embodiment, by performing band limitation sufficiently before performing nonlinear processing by nonlinear processing circuits 304 and 305, which will be described later, it is also possible to reduce harmonic aliasing components generated by nonlinear processing.

  The output signal of the vertical LPF circuit 301 is input to the horizontal delay circuit 302. The internal configuration of the horizontal delay circuit 302 is the same as that of the horizontal delay circuit 202 of the second embodiment, and is as shown in FIG. Output signals (D0 to D3) of the horizontal delay circuit 302 are input to the horizontal upsampling circuit 303.

FIG. 22 is a block diagram showing an example of the internal configuration of the horizontal upsampling circuit 303 shown in FIG.
As shown in FIG. 22, the horizontal upsampling circuit 303 includes horizontal BPF circuits 3030 and 3031.

  Further, an example of the concept of the upsampling process in the horizontal upsampling circuit 303 is as shown in FIG. 17 as in the horizontal upsampling circuit 203 of the second embodiment. That is, the horizontal BPF circuit 3030 uses the pixels at the positions of D0, D0.5, D1, D1.5, D2, D2.5, and D3 shown in FIG. An interpolation pixel value H0 corresponding to is generated. Further, the horizontal BPF circuit 3031 uses the pixels at the positions D0.5, D1, D1.5, D2, D2.5, D3, and D3.5 shown in FIG. An interpolation pixel value H1 corresponding to D2 is generated.

  The frequency amplitude characteristics of the interpolation processing performed in the horizontal BPF circuits 3030 and 3031 are as shown in FIG. 5, for example, as in the vertical BPF circuits 1020 and 1021 in the first embodiment. In FIG. 5, fs is the sampling frequency of the image signal input from the image signal input terminal 41 as described above. Here, the horizontal axis of FIG. 5 shows the frequency on the frequency axis in the same direction (horizontal direction in the present embodiment) as the generated contour correction signal.

  The horizontal BPF circuits 3030 and 3031 have a frequency amplitude response of 0 in the frequency band from fs / 2 to 3fs / 2 shown in FIG. 5 and a bandpass characteristic in the frequency band from 0 to fs / 2. Indispensable in the interpolation processing in. By performing interpolation processing in the horizontal BPF circuits 3030 and 3031 having such filter characteristics, horizontal upsampling is performed, and at the same time, the horizontal direction in the horizontal contour correction signal (that is, the same direction as the horizontal contour correction signal). High frequency components can be extracted.

  Note that the pixels at the positions of D0.5, D1.5, D2.5, and D3.5 shown in FIG. 17 are always 0. Therefore, in the horizontal BPF circuit 3030, as shown in FIG. 22, D0, D1 , D2 and D3 need only be calculated with the filter coefficients for the pixels at the positions. Similarly, in the horizontal BPF circuit 3031, as shown in FIG. 22, the calculation with the filter coefficient may be performed only for the pixels at the positions of D 1, D 2, and D 3.

  Through the processing described above, the horizontal upsampling circuit 303 outputs the high-frequency components H0 and H1 in the horizontal direction upsampled twice in the horizontal direction (that is, in the same direction as the horizontal contour correction signal).

  Output signals H0 and H1 of the horizontal upsampling circuit 303 are input to the nonlinear processing circuits 304 and 305, respectively, and nonlinear processing is performed. The configurations and operations of the nonlinear processing circuits 304 and 305 are the same as those of the nonlinear processing circuits 105 and 106. The output signals (HN0, HN1) of these nonlinear processing circuits 304 and 305 are input to the horizontal LPF / horizontal downsampling circuit 306.

FIG. 23 is a block diagram showing an example of the internal configuration of the horizontal LPF / horizontal downsampling circuit 306 shown in FIG.
As shown in FIG. 23, the horizontal LPF / horizontal downsampling circuit 306 includes, for example, horizontal delay circuits 3060 and 3061 and a horizontal LPF circuit 3062. In the example shown in FIG. 23, delay elements 3060a to 3060c are configured in the horizontal delay circuit 3060, and delay elements 3061a and 3061b are configured in the horizontal delay circuit 3061.

  The horizontal delay circuit 3060 outputs the output signal (HN0) of the nonlinear processing circuit 304 and a signal obtained by delaying the output signal (HN0) pixel by pixel by the delay elements (3060a to 3060c). 5 is output to the horizontal LPF circuit 3062. The horizontal delay circuit 3061 outputs the output signal (HN1) of the nonlinear processing circuit 305 and a signal obtained by delaying the output signal (HN1) pixel by pixel by the delay elements (3061a and 3061b) as output signals D2 to D4. Output to the horizontal LPF circuit 3062.

  Specifically, the output signals D1.5, D2.5, D3.5, and D4.5 of the horizontal delay circuit 3060 are input to odd taps T1, T3, T5, and T7 of the horizontal LPF circuit 3062, respectively. The output signals D2, D3, and D4 of the horizontal delay circuit 3061 are input to the even-numbered taps T2, T4, and T6 of the horizontal LPF circuit 3062, respectively.

  The frequency / amplitude characteristics of the horizontal LPF circuit 3062 are as shown in FIG. 9 as in the vertical LPF circuit 1072 shown in FIG. 8 of the first embodiment. The frequency amplitude characteristic of the horizontal LPF circuit 3062 shown in FIG. 9 is a low-pass characteristic in which the frequency amplitude response is 0 in the frequency band from fs / 2 to 3fs / 2 in the horizontal direction. Therefore, by the processing in the horizontal LPF circuit 3062, the horizontal folding component of the harmonics generated by the nonlinear processing by the nonlinear processing circuits 304 and 305 in the previous stage can be suppressed.

  Further, by combining the output signals of the horizontal delay circuit 3060 and the horizontal delay circuit 3061 and processing by the horizontal LPF circuit 3062, a signal that has been up-sampled twice in the horizontal direction by parallel processing is converted to 1 in the horizontal direction. Downsampled by / 2. At this time, the horizontal LPF circuit 3062 performs processing under the control of the system clock 54 from the system control unit 50.

  As described above, in the horizontal LPF / horizontal downsampling circuit 306, the horizontal folding component of the harmonics generated by the nonlinear processing of the nonlinear processing circuits 304 and 305 is suppressed, and the horizontal number having the same number of pixels as the input image signal. A contour correction signal is generated and output. Note that the influence of the nonlinear processing on the horizontal contour correction signal and the effect on the horizontal contour correction signal by the countermeasure of the present embodiment are the same as those described in the second embodiment.

  An output signal (horizontal contour correction signal) of the horizontal LPF / horizontal downsampling circuit 306 is input to the gain adjustment circuit 307. The gain adjustment circuit 307 amplifies the output signal (horizontal contour correction signal) of the horizontal LPF / horizontal downsampling circuit 306 with a predetermined gain.

  The horizontal contour correction signal output from the gain adjustment circuit 307 and the vertical contour correction signal output from the gain adjustment circuit 108 are added by the adding circuit 308 to generate a final contour correction signal.

  The adder circuit 309 adds the contour correction signal output from the adder circuit 308 to the original image signal (video signal) input from the image signal input terminal (video signal input terminal) 41, and Contour correction processing is performed on the image signal. The image signal (video signal) after the contour correction processing is output from the addition circuit 309 to the image signal output terminal (video signal output terminal) 42.

  Next, a processing flow of the image processing method by the image processing apparatus 3 according to the third embodiment will be described with reference to FIG.

  When the processing shown in FIG. 13 is started, an image signal is input from the image signal input terminal 41 to the vertical delay circuit 101 and the addition circuit 309 of the contour correction processing unit 30. The vertical delay circuit 101 delays the input image signal in the vertical direction as described above. Thereafter, the image signal processed by the vertical delay circuit 101 is output to the vertical upsampling circuit 102 and the vertical LPF circuit 301.

  Here, in this embodiment, in the processing system from FIG. 21 to the vertical upsampling circuit 102 to the gain adjustment circuit 108, the vertical contour correction signal having the high-frequency component in the vertical direction (first direction) (first (Contour correction signal) is generated. Hereinafter, the processing system that generates the vertical contour correction signal is referred to as a “first processing system”. In the processing system from the vertical LPF circuit 301 to the gain adjustment circuit 307, a horizontal contour correction signal (second contour correction signal) having a high-frequency component in the horizontal direction (second direction) is generated. Hereinafter, the processing system that generates the horizontal contour correction signal is referred to as a “second processing system”.

  Thereafter, in the second processing system, the vertical LPF circuit (second orthogonal direction band limiting unit) 301 is orthogonal to the input image signal before the high frequency component is extracted, orthogonal to the direction of the horizontal contour correction signal. Band limit in the direction. That is, the vertical LPF circuit 301 performs low-pass filter processing in the vertical direction on the input image signal. This vertical LPF circuit (second orthogonal direction band limiting means) is provided in the subsequent stage of the horizontal upsampling circuit 303, and the low-pass filter process is performed in the vertical direction on the high frequency component extracted by the horizontal upsampling circuit 303. The form which performs is also possible. Thereafter, the horizontal delay circuit 302 delays the image signal input from the vertical LPF circuit 301 in the horizontal direction and outputs the delayed image signal to the horizontal upsampling circuit 303 as described above.

  In such a processing state, the high-frequency component extraction processing in step S1 shown below is performed for each processing system.

  First, in the first processing system, in step S 1, the vertical upsampling circuit (first high frequency component extracting means) 102 uses the image signal input from the vertical delay circuit 101 in the vertical direction (first direction). A high frequency component extraction process for extracting a high frequency component is performed. At this time, the vertical upsampling circuit 102 increases the input image signal at a sampling frequency n times that of the image signal with respect to the frequency axis in the vertical direction (that is, the same direction as the vertical contour correction signal, the first direction). Sampling and high frequency component extraction processing are performed. Here, n times n in the upsampling process is the same as that described in the first embodiment.

  Further, the vertical upsampling circuit 102 of the present embodiment has a frequency characteristic for extracting a high frequency component of the image signal on the vertical frequency axis, and a frequency characteristic for upsampling the image signal at a sampling frequency n times that of the image signal. And a filter circuit (vertical BPF circuits 1020 and 1021).

  The high frequency component processed by the vertical upsampling circuit 102 is input to the horizontal LPF circuits 103 and 104. Thereafter, the horizontal LPF circuits (first orthogonal direction band limiting means) 103 and 104 perform band limitation on the input high frequency components in the orthogonal direction orthogonal to the direction of the vertical contour correction signal. That is, the horizontal LPF circuits 103 and 104 perform low-pass filter processing in the horizontal direction on the input high frequency components. This horizontal LPF circuit (first orthogonal band limiting means) is provided in the preceding stage of the vertical upsampling circuit 102, and low-pass filter processing is performed in the horizontal direction on the image signal before the high-frequency component is extracted. The form to perform may be sufficient.

  On the other hand, in the second processing system, in step S1, the horizontal upsampling circuit (second high-frequency component extracting means) 303 uses the horizontal direction (second direction) from the image signal input from the horizontal delay circuit 302. A high frequency component extraction process for extracting a high frequency component is performed. At this time, the horizontal upsampling circuit 303 increases the input image signal at a sampling frequency n times that of the image signal with respect to the frequency axis in the horizontal direction (that is, the same direction as the horizontal contour correction signal and the second direction). Sampling and high frequency component extraction processing are performed.

  Further, the horizontal upsampling circuit 303 of the present embodiment has a frequency characteristic for extracting a high frequency component of the image signal on the horizontal frequency axis, and a frequency characteristic for upsampling the image signal at a sampling frequency n times that of the image signal. Are included in the filter circuit (horizontal BPF circuits 3030 and 3031).

  Subsequently, the non-linear process of step S2 shown below is performed for each processing system.

  First, in the first processing system, in step S2, the nonlinear processing circuits (first nonlinear processing means) 105 and 106 perform nonlinear processing on the high-frequency components input from the horizontal LPF circuits 103 and 104, respectively. .

  On the other hand, in the second processing system, in step S2, the nonlinear processing circuits (second nonlinear processing means) 304 and 305 perform nonlinear processing on the high-frequency components extracted by the horizontal upsampling circuit 303, respectively.

  Subsequently, for each processing system, the same direction band limiting process of step S3 shown below is performed.

  First, in the first processing system, in step S3, the vertical LPF / vertical downsampling circuit 107 applies the high-frequency component nonlinearly processed by the nonlinear processing circuits 105 and 106 in the same direction (vertical direction) as the vertical contour correction signal. In the same direction, the bandwidth is limited. In this case, the vertical LPF / vertical downsampling circuit 107 constitutes a first same-direction band limiting unit.

  On the other hand, in the second processing system, in step S3, the horizontal LPF / horizontal downsampling circuit 306 causes the high-frequency component subjected to nonlinear processing by the nonlinear processing circuits 304 and 305 to be in the same direction (horizontal direction) as the horizontal contour correction signal. The same direction band limiting process for band limiting is performed. In this case, the horizontal LPF / horizontal downsampling circuit 306 constitutes a second same-direction band limiting unit.

  Subsequently, the contour correction signal generation process of step S4 shown below is performed for each processing system.

  First, in the first processing system, in step S4, the vertical LPF / vertical downsampling circuit 107 downsamples the high-frequency component band-limited in the vertical direction (first direction) by 1 / n times in the vertical direction. Then, a process of generating a vertical contour correction signal is performed. In this case, the vertical LPF / vertical downsampling circuit 107 constitutes first generation means for generating a vertical contour correction signal that is a first contour correction signal. Thereafter, the generated vertical contour correction signal is amplified with a predetermined gain in the gain adjustment circuit 108 and then output to the addition circuit 308.

  On the other hand, in the second processing system, in step S4, the horizontal LPF / horizontal downsampling circuit 306 downsamples the high-frequency component band-limited in the horizontal direction (second direction) by 1 / n times in the horizontal direction. Then, a process of generating a horizontal contour correction signal is performed. In this case, the horizontal LPF / horizontal downsampling circuit 306 constitutes second generation means for generating a horizontal contour correction signal which is a second contour correction signal. Thereafter, the generated horizontal contour correction signal is amplified with a predetermined gain in the gain adjustment circuit 307 and then output to the addition circuit 308.

  Thereafter, the adder circuit 308 adds the vertical contour correction signal output from the gain adjustment circuit 108 and the horizontal contour correction signal output from the gain adjustment circuit 307 to generate a final contour correction signal.

  Subsequently, the adder circuit (image signal processing means) 309 performs image signal processing in step S5 described below.

  In step S <b> 5, the adder circuit 309 processes the image signal input from the image signal input terminal 41 using the contour correction signal output from the adder circuit 308. Specifically, the addition circuit 309 adds the contour correction signal output from the addition circuit 308 to the input image signal, and performs contour correction processing on the image signal.

  Thereafter, the image signal after the contour correction processing is output from the adding circuit 309 to the image signal output terminal 42, and the flowchart shown in FIG.

  Also in this embodiment, before nonlinear processing, the image signal is up-sampled in the contour direction to extract high-frequency components, and after nonlinear processing, the bandwidth is limited to the Nyquist frequency of the original image signal in the contour direction. Downsampling is performed in the contour direction. As a result, harmonics generated by nonlinear processing and harmonic folding components can be removed. In addition, by limiting the band of the contour correction signal in the direction orthogonal to the contour direction before the non-linear processing, the harmonics of the contour correction signal generated in the direction orthogonal to the contour direction by the non-linear processing, and harmonic folding components Can be sufficiently attenuated.

  Further, in this embodiment, when generating a contour correction signal having high-frequency components in a plurality of directions, the direction of upsampling processing for suppressing the folding component of the contour direction due to nonlinear processing, the contour direction due to nonlinear processing, The direction of the band limiting process for suppressing the folding component in the orthogonal direction is limited by the contour direction. As a result, it is not necessary to two-dimensionally upsample the image signal in order to generate the contour correction signal, and the adverse effects of nonlinear processing can be eliminated without causing an increase in redundant circuit scale.

  1, FIG. 14 and FIG. 21 constituting the image processing apparatus according to each embodiment described above, and each step of FIG. 13 showing the image processing method is executed by a program stored in a RAM or ROM of a computer. It can be realized by operating. This program and a computer-readable storage medium storing the program are included in the present invention.

  Specifically, the program is recorded in a storage medium such as a CD-ROM, or provided to a computer via various transmission media. As a storage medium for recording the program, a flexible disk, a hard disk, a magnetic tape, a magneto-optical disk, a nonvolatile memory card, and the like can be used in addition to the CD-ROM. On the other hand, as the transmission medium of the program, a communication medium in a computer network (LAN, WAN such as the Internet, wireless communication network, etc.) system for propagating and supplying program information as a carrier wave can be used. In addition, examples of the communication medium at this time include a wired line such as an optical fiber, a wireless line, and the like.

  Further, the present invention is not limited to an aspect in which the functions of the image processing apparatus according to each embodiment are realized by executing a program supplied by a computer. Such a program is also included in the present invention even when the function of the image processing apparatus according to each embodiment is realized in cooperation with an OS (operating system) or other application software running on the computer. Further, even when all or part of the processing of the supplied program is performed by the function expansion board or function expansion unit of the computer and the functions of the image processing apparatus according to each embodiment are realized, such a program is not limited to the present invention. include.

  In addition, all of the above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed as being limited thereto. . That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

1 is a block diagram illustrating an example of a schematic configuration of an image processing apparatus according to a first embodiment of the present invention. It is a block diagram which shows an example of an internal structure of a vertical delay circuit. It is a figure which shows an example of an internal structure of a vertical upsampling circuit. It is a schematic diagram which shows an example of the concept of the upsampling process in a vertical upsampling circuit. FIG. 23 is a diagram illustrating an example of frequency amplitude characteristics of interpolation processing performed by the vertical BPF circuit illustrated in FIG. 3 (or the horizontal BPF circuit illustrated in FIG. 16 or FIG. 22). It is a figure which shows an example of the frequency amplitude characteristic of the process performed by the horizontal LPF circuit (or vertical LPF circuit shown in FIG. 14 or FIG. 21) shown in FIG. It is a figure which shows an example of the characteristic of the nonlinear process performed by the nonlinear processing circuit shown in FIG. 1 (or the nonlinear processing circuit shown in FIG. 14 or FIG. 21). FIG. 2 is a block diagram illustrating an example of an internal configuration of a vertical LPF / vertical downsampling circuit illustrated in FIG. 1. It is a figure which shows an example of the frequency amplitude characteristic of the process performed by the vertical LPF circuit shown in FIG. 8 (or horizontal LPF circuit shown in FIG. 19 or FIG. 23). It is a figure which shows an example of the frequency distribution of a perpendicular direction (or horizontal direction) about the output of the nonlinear processing circuit (or nonlinear processing circuit shown in FIG. 14 or FIG. 21) shown in FIG. FIG. 22 is a diagram illustrating an example of a frequency distribution in the vertical direction (or horizontal direction) with respect to the output of the vertical LPF / vertical downsampling circuit shown in FIG. 1 (or the horizontal LPF / horizontal downsampling circuit shown in FIG. 14 or FIG. 21). is there. It is a figure which shows an example of frequency distribution of a horizontal direction (or vertical direction) about the output of the nonlinear processing circuit (or nonlinear processing circuit shown in FIG. 14 or FIG. 21) shown in FIG. It is a flowchart which shows the flow of a process of the image processing apparatus which concerns on each embodiment of this invention. It is a block diagram which shows an example of schematic structure of the image processing apparatus which concerns on the 2nd Embodiment of this invention. FIG. 15 is a block diagram illustrating an example of an internal configuration of the horizontal delay circuit illustrated in FIG. 14 (or the horizontal delay circuit illustrated in FIG. 21). It is a block diagram which shows an example of an internal structure of the horizontal upsampling circuit shown in FIG. It is a schematic diagram which shows an example of the concept of the upsampling process in the horizontal upsampling circuit (or horizontal upsampling circuit shown in FIG. 21) shown in FIG. FIG. 17 is a timing chart showing an example of a processing operation of each internal configuration of the horizontal upsampling circuit shown in FIG. 16. FIG. 15 is a block diagram illustrating an example of an internal configuration of a horizontal LPF / horizontal downsampling circuit illustrated in FIG. 14. FIG. 20 is a timing chart showing an example of the processing operation of each internal configuration of the horizontal LPF / horizontal downsampling circuit shown in FIG. 19. FIG. It is a block diagram which shows an example of schematic structure of the image processing apparatus which concerns on the 3rd Embodiment of this invention. FIG. 22 is a block diagram showing an example of an internal configuration of a horizontal upsampling circuit shown in FIG. 21. FIG. 22 is a block diagram illustrating an example of an internal configuration of a horizontal LPF / horizontal downsampling circuit illustrated in FIG. 21.

Explanation of symbols

1-3 Image processing apparatus 10 Vertical contour correction processing unit 41 Image signal input terminal (video signal input terminal)
42 Image signal output terminal (Video signal output terminal)
50 System controller 51 to 54 System clock 101 Vertical delay circuit 102 Vertical upsampling circuit 103, 104 Horizontal LPF circuit 105, 106, 204, 304, 305 Nonlinear processing circuit 107 Vertical LPF / vertical downsampling circuit 108, 307 Gain adjustment circuit 109, 308, 309 Adder circuit 201, 301 Vertical LPF circuit 202, 302 Horizontal delay circuit 203, 303 Horizontal upsampling circuit 205, 306 Horizontal LPF / horizontal downsampling circuit

Claims (8)

An image processing apparatus that processes an input image signal using a contour correction signal,
High-frequency component extraction means for up-sampling the image signal at a sampling frequency n times that of the image signal with respect to the frequency axis in the same direction as the contour correction signal, and extracting a high-frequency component in the same direction from the image signal;
An orthogonal direction band limiting unit that limits a band in an orthogonal direction orthogonal to the same direction with respect to the high frequency component extracted by the high frequency component extracting unit or the image signal before the high frequency component is extracted;
Nonlinear processing means for performing nonlinear processing on the high-frequency component extracted by the high-frequency component extraction means;
A high-frequency component nonlinearly processed by the non-linear processing means, the same direction band limiting means for band limiting the same direction,
Generating means for down-sampling the high-frequency component band-limited by the same-direction band limiting means to 1 / n times in the same direction to generate the contour correction signal;
Using the contour correction signal generated by the generation unit, it has a image signal processing means for processing said image signal,
The image processing apparatus according to claim 1, wherein the orthogonal direction band limiting unit performs band limitation for reducing a harmonic aliasing component in the orthogonal direction generated by the nonlinear processing of the nonlinear processing unit. The high-frequency component extracting means has a frequency characteristic for extracting the high-frequency component of the image signal on the frequency axis in the same direction, and a frequency characteristic for up-sampling the image signal at a sampling frequency n times that of the image signal. The image processing apparatus according to claim 1 , further comprising a filter processing unit. An image processing apparatus that performs processing on an input image signal using a first contour correction signal and a second contour correction signal,
The image signal is up-sampled at a sampling frequency n times that of the image signal with respect to the frequency axis in the first direction that is the same direction as the first contour correction signal, and the image signal in the first direction is First high frequency component extraction means for extracting high frequency components;
A first orthogonality that limits a band in an orthogonal direction orthogonal to the first direction with respect to the high-frequency component extracted by the first high-frequency component extraction unit or the image signal before the high-frequency component is extracted. Direction band limiting means;
First nonlinear processing means for performing nonlinear processing on the high-frequency component extracted by the first high-frequency component extracting means;
First high-frequency band limiting means for band-limiting the high-frequency component nonlinearly processed by the first nonlinear processing means in the same direction as the first direction;
First generation means for down-sampling the high-frequency component band-limited by the first same-direction band limiting means to 1 / n times in the first direction to generate the first contour correction signal; ,
The image signal is up-sampled at a sampling frequency that is n times that of the image signal with respect to the frequency axis in the second direction that is the same direction as the second contour correction signal that is different in direction from the first contour correction signal. Second high frequency component extraction means for extracting a high frequency component in the second direction from the image signal;
A second orthogonality that limits a band in an orthogonal direction orthogonal to the second direction with respect to the high-frequency component extracted by the second high-frequency component extraction unit or the image signal before the high-frequency component is extracted. Direction band limiting means;
Second nonlinear processing means for performing nonlinear processing on the high frequency component extracted by the second high frequency component extracting means;
Second co-directional band limiting means for band limiting the high-frequency component nonlinearly processed by the second non-linear processing means in the same direction as the second direction;
Second generation means for generating the second contour correction signal by down-sampling the high-frequency component band-limited by the second same-direction band limiting means by 1 / n times in the second direction; ,
Image signal processing means for processing the image signal using the first contour correction signal generated by the first generation means and the second contour correction signal generated by the second generation means. It has a door,
The first orthogonal direction band limiting unit performs band limitation to reduce harmonic aliasing components in the orthogonal direction generated by the nonlinear processing of the first nonlinear processing unit, and the second orthogonal direction band limiting unit Is an image processing apparatus for performing band limitation to reduce harmonic aliasing components in the orthogonal direction generated by the nonlinear processing of the second nonlinear processing means . The image processing apparatus according to claim 3 , wherein the first direction and the second direction are orthogonal to each other. It said first high frequency component extraction means and the second high frequency component extracting means, respectively, in the frequency axis of the first direction and the second direction, and the frequency characteristic for extracting the high frequency component of the image signal 5. The image processing apparatus according to claim 3 , further comprising a filter processing unit having frequency characteristics for up-sampling the image signal at a sampling frequency n times that of the image signal. The first direction is a vertical direction, the second direction is an image processing apparatus according to any one of claims 3 to 5, characterized in that a horizontal direction. An image processing method for processing an input image signal using a contour correction signal,
A high-frequency component extraction step of up-sampling the image signal at a sampling frequency n times that of the image signal with respect to a frequency axis in the same direction as the contour correction signal, and extracting a high-frequency component in the same direction from the image signal;
An orthogonal direction band limiting step for band limiting in an orthogonal direction orthogonal to the same direction with respect to the high frequency component extracted by the high frequency component extraction step or the image signal before the high frequency component is extracted;
A non-linear processing step for performing non-linear processing on the high-frequency component extracted by the high-frequency component extraction step;
A high-frequency component nonlinearly processed by the non-linear processing step, the same direction band limiting step of band limiting the same direction,
A step of generating the contour correction signal by down-sampling the high-frequency component band-limited by the same-direction band limiting step by 1 / n times in the same direction;
Using the contour correction signal generated by the generation step, it possesses an image signal processing step of performing processing of the image signal,
The orthogonal direction band limiting step performs band limitation to reduce a harmonic aliasing component in the orthogonal direction generated by the nonlinear processing of the nonlinear processing step . A program for causing a computer to execute an image processing method for processing an input image signal using a contour correction signal,
A high-frequency component extraction step of up-sampling the image signal at a sampling frequency n times that of the image signal with respect to a frequency axis in the same direction as the contour correction signal, and extracting a high-frequency component in the same direction from the image signal;
An orthogonal direction band limiting step for band limiting in an orthogonal direction orthogonal to the same direction with respect to the high frequency component extracted by the high frequency component extraction step or the image signal before the high frequency component is extracted;
A non-linear processing step for performing non-linear processing on the high-frequency component extracted by the high-frequency component extraction step;
A high-frequency component nonlinearly processed by the non-linear processing step, the same direction band limiting step of band limiting the same direction,
A step of generating the contour correction signal by down-sampling the high-frequency component band-limited by the same-direction band limiting step by 1 / n times in the same direction;
Using the contour correction signal generated by the generating step, causing the computer to execute an image signal processing step of processing the image signal ,
The orthogonal direction band limiting step performs band limitation to reduce a harmonic aliasing component in the orthogonal direction generated by the nonlinear processing of the nonlinear processing step .

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