JP5106457B2 - Electronic component joining method, bump forming method and apparatus therefor - Google Patents

Electronic component joining method, bump forming method and apparatus therefor Download PDF

Info

Publication number
JP5106457B2
JP5106457B2 JP2009071064A JP2009071064A JP5106457B2 JP 5106457 B2 JP5106457 B2 JP 5106457B2 JP 2009071064 A JP2009071064 A JP 2009071064A JP 2009071064 A JP2009071064 A JP 2009071064A JP 5106457 B2 JP5106457 B2 JP 5106457B2
Authority
JP
Japan
Prior art keywords
conductive particles
electrode
amount
substrate
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009071064A
Other languages
Japanese (ja)
Other versions
JP2010225821A (en
Inventor
法人 塚原
雅義 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2009071064A priority Critical patent/JP5106457B2/en
Priority to CN201010157047.0A priority patent/CN101853794B/en
Publication of JP2010225821A publication Critical patent/JP2010225821A/en
Application granted granted Critical
Publication of JP5106457B2 publication Critical patent/JP5106457B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29344Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/759Means for monitoring the connection process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83874Ultraviolet [UV] curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83908Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving monitoring, e.g. feedback loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

An electronic components jointing method includes: supplying a fluid (4) to a circuit substrate (1), performing image process to images shot by a camera (22) so as to measure quantity of conductive particles (3) in the fluid (4); and controlling a value of a gap between a first electrode (2) of the circuit substrate (1) and a second electrode (6) of the electronic components (5) to be a proper value in the jointing procedure according to the measured value. Thereby, it is able to joint electronic components even if the supplying quantity of the jointing material has a deviation and form a salient point on the electrode without open circuit short circuit owing to bad scolder.

Description

本発明は、電子部品を回路基板に実装したり、電極の上にバンプを形成する方法に関するものである。   The present invention relates to a method of mounting an electronic component on a circuit board or forming a bump on an electrode.

図9(e)に示すように回路基板1に電子部品5を実装する場合には、図9(a)〜(e)に示す半田自己集合方法が知られている。この場合、回路基板1の上に形成されている電極2のピッチと、電子部品5の上に形成されている電極6のピッチとは同一である。   When the electronic component 5 is mounted on the circuit board 1 as shown in FIG. 9E, the solder self-assembly method shown in FIGS. 9A to 9E is known. In this case, the pitch of the electrodes 2 formed on the circuit board 1 and the pitch of the electrodes 6 formed on the electronic component 5 are the same.

図9(a)では、回路基板1の上に半田粉3を含む流動体4が供給される。流動体4の供給は、ディスペンサ、スクリーン印刷、転写等の一般的な粘性材料の供給法により行われる。   In FIG. 9A, the fluid 4 including the solder powder 3 is supplied onto the circuit board 1. The fluid 4 is supplied by a general viscous material supply method such as dispenser, screen printing, or transfer.

図9(b)では、流動体4が供給された回路基板1を加熱ステージ9に載置するとともに、電子部品5を電子部品吸着ツール7で吸着保持して、電子部品5の電極6を流動体4に押し付け、電極2と電極6の隙間Hを確保するよう保持する。   In FIG. 9B, the circuit board 1 supplied with the fluid 4 is placed on the heating stage 9 and the electronic component 5 is sucked and held by the electronic component suction tool 7 to flow the electrode 6 of the electronic component 5. It is pressed against the body 4 and held so as to secure a gap H between the electrode 2 and the electrode 6.

この状態で電子部品吸着ツール7を加熱ヒータ8で加熱し、加熱ステージ9を加熱ヒータ10で加熱して所定の温度プロファイルを実行することによって、図9(c)に示すよう半田粉3が溶融し、かつ電極2と電極6との隙間Hおよびその周辺において、溶融半田12および流動体4の樹脂成分が対流Aする。   In this state, the electronic component suction tool 7 is heated by the heater 8 and the heating stage 9 is heated by the heater 10 to execute a predetermined temperature profile, whereby the solder powder 3 is melted as shown in FIG. In addition, the molten solder 12 and the resin component of the fluid 4 convect A in and around the gap H between the electrode 2 and the electrode 6.

これによって、液体の表面張力による電極への粒子集積化現象によって、電極2と電極6間に溶融半田12が自己集合する。
図9(d)では、回路基板1および電子部品5を半田粉3の融点以下に冷却することで、電極2と電極6の間に自己集合した溶融半田12は凝固し、電極2と電極6が半田金属接合20される。11は流動体4の中の硬化した樹脂成分を示しており、半田接合後の電子部品5と回路基板1との接合部の保護、および接合強度を確保するアンダーフィルの役割を果たす。
As a result, the molten solder 12 is self-assembled between the electrode 2 and the electrode 6 due to the particle integration phenomenon on the electrode due to the surface tension of the liquid.
In FIG. 9D, by cooling the circuit board 1 and the electronic component 5 below the melting point of the solder powder 3, the molten solder 12 self-assembled between the electrode 2 and the electrode 6 is solidified, and the electrode 2 and the electrode 6 are solidified. Is solder-metal bonded 20. Reference numeral 11 denotes a cured resin component in the fluid 4, which serves as an underfill for protecting the joint between the electronic component 5 and the circuit board 1 after solder joining and securing the joint strength.

図9(a)〜(d)においては、回路基板1に電子部品5を実装する工程について説明を行ったが、この「半田自己集合方式」を用いれば、図10(b)に示すように、回路基板1の電極2の上にバンプ31を形成することもできる。この場合には、図9(a)と同じように回路基板1の上へ流動体4を供給した後、図10(a)に示すように、加熱ツール7aと電極2との間に一定の隙間Hを確保し、保持し、加熱することで行うことによって、回路基板1の電極2に半田が自己集合され半田バンプ31が形成される。なお、流動体4の樹脂成分は、半田バンプ31を形成した後に、洗浄して除去することによって、図10(b)に示す状態になる。
特開2006−100775号公報
9A to 9D, the process of mounting the electronic component 5 on the circuit board 1 has been described. If this “solder self-assembly method” is used, as shown in FIG. The bumps 31 can also be formed on the electrodes 2 of the circuit board 1. In this case, after supplying the fluid 4 onto the circuit board 1 in the same manner as in FIG. 9A, a constant amount is provided between the heating tool 7a and the electrode 2 as shown in FIG. By securing, holding, and heating the gap H, solder is self-assembled on the electrodes 2 of the circuit board 1 to form solder bumps 31. Note that the resin component of the fluid 4 is cleaned and removed after the solder bumps 31 are formed, so that the state shown in FIG.
JP 2006-100775 A

従来の電子部品接合方法によって回路基板1に電子部品5を実装する場合には、半田粉3の量によって半田ショート不良や接合オープン不良が発生し、安定した量産が行えないという課題がある。   When the electronic component 5 is mounted on the circuit board 1 by the conventional electronic component bonding method, there is a problem that a solder short defect or a bonding open defect occurs due to the amount of the solder powder 3 and stable mass production cannot be performed.

図11(b)に半田オープン不良Bの例を示す。図12(b)に半田ショート不良Cの例を示す。半田オープン不良は、供給された流動体4内の半田粉3の量が図11(a)の模式図に示すように少ない場合に発生する。半田ショート不良は、供給された流動体4内の半田粉3の量が図12(a)の模式図に示すように多い場合に発生する。   FIG. 11B shows an example of a solder open defect B. FIG. 12B shows an example of a solder short defect C. The solder open failure occurs when the amount of the solder powder 3 in the supplied fluid 4 is small as shown in the schematic diagram of FIG. The solder short-circuit failure occurs when the amount of the solder powder 3 in the supplied fluid 4 is large as shown in the schematic diagram of FIG.

回路基板1の電極2の上にバンプ31を形成する場合も同様であり、半田量過多による電極間のバンプショート不良や半田量過小によるバンプ体積小等のバンプ形状不良が発生し、安定した量産が行えないという課題がある。   The same applies when the bumps 31 are formed on the electrodes 2 of the circuit board 1, and bump shape defects such as bump shorts between the electrodes due to excessive amount of solder and small bump volumes due to excessive amount of solder occur, resulting in stable mass production. There is a problem that cannot be done.

本発明は、前記従来の課題を解決するもので、半田粉3などの導電性粒子の供給量のばらつきに関わらず、回路基板と電子部品との接合を半田ショート、オープン不良等の品質不良なく安定的に実施できる電子部品接合方法とその装置と、電極の上へのバンプ形成の品質不良なく安定的に実施できるバンプ形成方法とその装置を提供することを目的とする。   The present invention solves the above-described conventional problems, and does not cause quality defects such as solder shorts and open defects, regardless of variations in the amount of conductive particles such as solder powder 3 supplied. It is an object of the present invention to provide an electronic component bonding method and apparatus capable of being stably implemented, and a bump forming method and apparatus capable of being stably implemented without poor quality of bump formation on an electrode.

本発明の電子部品接合方法は、基板と電子部品の間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の第1電極と前記電子部品の第2電極との間の隙間に保持した状態で加熱された前記流動体が流動して前記第1電極と前記第2電極の間に溶融した前記導電性粒子が自己集合し、その後に前記導電性粒子の凝固温度以下に冷却して前記電子部品を前記基板に実装するに際し、前記基板または前記電子部品に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程と、記計測した実際の導電性粒子の量に基づき前記隙間の値を決定して制御する工程と、前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する工程とを含んでいることを特徴とする。   According to the electronic component joining method of the present invention, a fluid containing conductive particles is interposed between the substrate and the electronic component, and is held in the gap between the first electrode of the substrate and the second electrode of the electronic component. In this state, the heated fluid flows and the conductive particles melted between the first electrode and the second electrode are self-assembled, and then cooled below the solidification temperature of the conductive particles. When mounting the electronic component on the substrate, the step of imaging the fluid supplied to the substrate or the electronic component and measuring the amount of conductive particles by image recognition, and the actual conductive particles measured A step of determining and controlling the value of the gap based on the amount, and determining an appropriate target gap value based on the measured actual amount of conductive particles and controlling the gap to approach the target gap And including a process That.

本発明の電子部品接合装置は、基板と電子部品の間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の第1電極と前記電子部品の第2電極との間の隙間に保持した状態で加熱された流動体が流動して溶融した前記導電性粒子が前記第1電極と前記第2電極の間に自己集合し、その後に前記導電性粒子の凝固温度以下に冷却して前記電子部品を前記基板に実装する電子部品接合装置であって、前記基板または前記電子部品に供給された流動体を撮像して導電性粒子の量を画像認識により計測するカメラと、前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する処理装置とを設けたことを特徴とする。   In the electronic component bonding apparatus according to the present invention, a fluid containing conductive particles is interposed between the substrate and the electronic component, and is held in the gap between the first electrode of the substrate and the second electrode of the electronic component. The conductive particles that are heated and melted in a heated state are self-assembled between the first electrode and the second electrode, and then cooled below the solidification temperature of the conductive particles to An electronic component bonding apparatus for mounting an electronic component on the substrate, the camera for imaging the fluid supplied to the substrate or the electronic component and measuring the amount of conductive particles by image recognition, and the measured actual And a processing device for determining an appropriate target gap value based on the amount of the conductive particles and controlling the gap to approach the target gap.

本発明のバンプ形成方法は、基板と平板状のツールとの間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の電極と前記ツールとの間の隙間に保持した状態で加熱された前記流動体が流動して溶融した前記導電性粒子が前記電極と前記ツールの間に自己集合し、その後に前記ツールを前記基板から離間させるとともに前記導電性粒子の固化温度以下に冷却して、前記電極にバンプを形成するに際し、前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程と、前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する工程とを含んでいることを特徴とする。
本発明のバンプ形成装置は、基板と平板状のツールとの間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の電極と前記ツールとの間の隙間に保持した状態で加熱された前記流動体が流動して溶融した前記導電性粒子が前記電極と前記ツールの間に自己集合し、その後に前記ツールを前記基板から離間させるとともに前記導電性粒子の固化温度以下に冷却して、前記電極にバンプを形成するバンプ形成装置であって、前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測するカメラと、前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する処理装置とを設けたことを特徴とする。
In the bump forming method of the present invention, a fluid containing conductive particles is interposed between a substrate and a flat tool, and the bump is formed while being held in a gap between the electrode of the substrate and the tool. The conductive particles melted by the fluid flowing are self-assembled between the electrode and the tool, and then the tool is separated from the substrate and cooled below the solidification temperature of the conductive particles. When forming bumps on the electrodes, an image of the fluid supplied to the substrate and measuring the amount of conductive particles by image recognition and an appropriate amount based on the measured actual amount of conductive particles And a step of determining a value of a target gap and controlling the gap to approach the target gap.
The bump forming apparatus of the present invention is heated in a state where a fluid containing conductive particles is interposed between the substrate and the flat tool and is held in a gap between the electrode of the substrate and the tool. The conductive particles melted by the fluid flowing are self-assembled between the electrode and the tool, and then the tool is separated from the substrate and cooled below the solidification temperature of the conductive particles. A bump forming apparatus for forming bumps on the electrodes, wherein the fluid supplied to the substrate is imaged and the amount of conductive particles is measured by image recognition; and the measured actual conductive particles And a processing device that determines an appropriate target gap value based on the amount and controls the gap to approach the target gap.

この構成によると、量産において、接合材料の供給量に僅かなばらつきが生じた際にも、供給された接合材料の量に応じて、最適な前記隙間の値が接合工程、もしくはバンプ形成工程にフィードバックされて回路基板と電子部品との接合や、電極の上へのバンプ形成を、ショート、オープン不良等の品質の不良なく、安定的に実施できる。   According to this configuration, even in the case of a slight variation in the supply amount of the bonding material in mass production, the optimum value of the gap is determined in the bonding process or the bump formation process according to the amount of the supplied bonding material. It is possible to stably carry out the bonding between the circuit board and the electronic component and the bump formation on the electrode without any quality defect such as short circuit or open defect.

以下、本発明の電子部品接合方法とバンプ形成方法を具体的な実施の形態に基づいて説明する。
図1(a)は本発明の電子部品接合方法を実行する電子部品接合装置を示す。
Hereinafter, the electronic component bonding method and the bump forming method of the present invention will be described based on specific embodiments.
FIG. 1 (a) shows an electronic component bonding apparatus that executes the electronic component bonding method of the present invention.

マイクロコンピュータを主要部として構成されている処理装置20は、図2に示すようにステップS1〜ステップS4で構成されている。
ステップS1では、回路基板1の上へ図3(a)(b)に示すように流動体4を電極2を覆う形状に供給するように供給装置21を運転する。この例では回路基板1の上に9個の電極2が所定間隔で設けられている。供給装置21は、ディスペンサ、印刷等の一般的な粘性材料の供給手段である。流動体4には、接合に寄与する導電性粒子としての半田粉3が含有されている。
As shown in FIG. 2, the processing device 20 configured with a microcomputer as a main part includes steps S1 to S4.
In step S1, the supply device 21 is operated so that the fluid 4 is supplied onto the circuit board 1 in a shape that covers the electrode 2 as shown in FIGS. In this example, nine electrodes 2 are provided on the circuit board 1 at a predetermined interval. The supply device 21 is a general viscous material supply means such as a dispenser or printing. The fluid 4 contains solder powder 3 as conductive particles that contribute to bonding.

流動体4に含まれている導電性粒子としてこの実施の形態では半田粉3の場合を説明するが、導電性粒子としては半田がコートされたAgやCuやAuなどの導電性粒子なども同様に使用できる。   In this embodiment, the case where the solder powder 3 is used as the conductive particles contained in the fluid 4 will be described, but the conductive particles such as Ag coated with solder, Cu, Au, and the like are also the same. Can be used for

また、流動体4の樹脂成分としては、室温から導電性粒子の溶融温度の範囲内において流動可能な程度の粘度を有するものであれば良く、又、加熱することによって流動可能な粘度に低下するものも含む。代表的な例としては、エポキシ樹脂、フェノール樹脂、シリコーン樹脂、ジアリルフタレート樹脂、フラン樹脂、メラミン樹脂等の熱硬化性樹脂、ポリエステルエストラマ、フッ素樹脂、ポリイミド樹脂、ポリアミド樹脂、アラミド樹脂等の熱可塑樹脂、または光(紫外線)硬化樹脂等、あるいはそれらを組み合わせた材料を使用することができる。   Further, the resin component of the fluid 4 may be any resin component that has a viscosity that can flow within a range of room temperature to the melting temperature of the conductive particles. Including things. Typical examples include thermosetting resins such as epoxy resins, phenol resins, silicone resins, diallyl phthalate resins, furan resins, and melamine resins, polyester elastomers, fluororesins, polyimide resins, polyamide resins, and aramid resins. A plastic resin, a light (ultraviolet) curable resin, or the like, or a combination thereof can be used.

ステップS2では、ステップS1で回路基板1の上に盛られた流動体4を図1(b)に示すように撮影するカメラ22から撮影情報を取得して、流動体4の中にある半田粉3の量を計算する。   In step S2, photographing information is acquired from a camera 22 that photographs the fluid 4 deposited on the circuit board 1 in step S1 as shown in FIG. 1B, and solder powder in the fluid 4 is obtained. Calculate the quantity of 3.

具体的には、回路基板1の上に供給された流動体4をカメラ22にて画像認識し、流動体4の中に分布する半田粉3を輝度の違いにより、色抽出し、半田粉3のみを識別した半田粉画像データ15とする。図3(c)に半田粉画像データ15の模式図を示す。   Specifically, the fluid 4 supplied onto the circuit board 1 is image-recognized by the camera 22, the color of the solder powder 3 distributed in the fluid 4 is extracted based on the difference in luminance, and the solder powder 3. Only the solder powder image data 15 is identified. FIG. 3C shows a schematic diagram of the solder powder image data 15.

次に処理装置20は、この半田粉画像データ15を次のように処理する。
処理装置20は、回路基板1の上に形成された電極2を、図3(d)に示すように電極2毎に等ピッチで9個の分割エリアE1〜E9に分割し、分割エリア毎に半田粉画像データ15の面積を算出する。半田粉画像データ15の面積計算は、抽出した半田粉画像データ15が占める画素数をカウントする手法により行う。
Next, the processing device 20 processes the solder powder image data 15 as follows.
The processing apparatus 20 divides the electrode 2 formed on the circuit board 1 into nine divided areas E1 to E9 at an equal pitch for each electrode 2 as shown in FIG. The area of the solder powder image data 15 is calculated. The area calculation of the solder powder image data 15 is performed by a method of counting the number of pixels occupied by the extracted solder powder image data 15.

そして、分割エリアE1〜E9毎に計測した半田粉3の量の平均値を計算し、この平均値を予め決め規定されている目標量と比較して過不足の量を計算する。半田粉3の量の平均値が規定の範囲内の場合には適正量であるとして、適正の半田量に対する目標隙間H0をデータベース23から読み出して、この目標隙間H0に前記隙間Hが近づくようにステップS3で昇降装置24を運転して電子部品吸着ツール7を昇降させて隙間Hを制御して、ステップS4で電子部品5を回路基板1に接合する前記接合動作を実施する。ここで、電子部品5は半導体チップである。   Then, an average value of the amount of solder powder 3 measured for each of the divided areas E1 to E9 is calculated, and the average value is compared with a predetermined target amount to calculate an excess / deficiency amount. When the average value of the amount of the solder powder 3 is within a specified range, the target gap H0 corresponding to the appropriate solder amount is read from the database 23, and the gap H approaches the target gap H0. In step S3, the lifting device 24 is operated to raise and lower the electronic component suction tool 7 to control the gap H. In step S4, the joining operation for joining the electronic component 5 to the circuit board 1 is performed. Here, the electronic component 5 is a semiconductor chip.

半田粉3の量の平均値が規定の範囲を超えて過多である場合には、その過多の程度に応じて目標隙間H0をデータベース23から読み出して、この目標隙間H0に前記隙間Hが近づくようにステップS3で昇降装置24を制御しながらステップS4の前記接合動作を実施する。この半田粉3の量の平均値が規定の範囲を超えて過多である場合の目標隙間H0は、半田粉3の量の平均値が適正である場合の目標隙間H0よりも大きい。   If the average value of the amount of the solder powder 3 exceeds the specified range and is excessive, the target gap H0 is read from the database 23 according to the degree of excess, and the gap H approaches the target gap H0. In step S3, the joining operation in step S4 is performed while controlling the lifting device 24. The target gap H0 when the average value of the amount of the solder powder 3 exceeds the specified range and is excessive is larger than the target gap H0 when the average value of the amount of the solder powder 3 is appropriate.

半田粉3の量の平均値が規定の範囲よりも不足している場合には、その不足の程度に応じて前記目標隙間H0をデータベース23から読み出して、この目標隙間H0に前記隙間Hが近づくようにステップS3で昇降装置24を制御しながらステップS4の前記接合動作を実施する。この半田粉3の量の平均値が規定の範囲よりも不足している場合の目標隙間H0は、半田粉3の量の平均値が適正である場合の目標隙間H0よりも小さい。   When the average value of the amount of the solder powder 3 is less than the specified range, the target gap H0 is read from the database 23 according to the degree of the shortage, and the gap H approaches the target gap H0. Thus, the joining operation of step S4 is performed while controlling the lifting device 24 in step S3. The target gap H0 when the average value of the amount of solder powder 3 is less than the specified range is smaller than the target gap H0 when the average value of the amount of solder powder 3 is appropriate.

その結果、従来例のように回路基板1の上への流動体4の供給量のばらつきに関わらず、常に隙間Hを一定にして量産を行うのでは無く、都度、隙間Hを最適値に変更しながら接合を行っているので、安定した品質で生産が行える。   As a result, the gap H is changed to an optimum value every time, instead of always performing mass production with the gap H kept constant, regardless of variations in the amount of fluid 4 supplied onto the circuit board 1 as in the prior art. However, since the joining is performed, it is possible to produce with stable quality.

隙間Hを一定にして量産した比較例と、上記のように隙間Hを最適値に変更しながら量産した実施例を説明する。隙間Hの他の接合条件は、比較例も実施例も同じである。
ここでは図5(a)に示すように回路基板1には、ピッチP=200μm、電極サイズL=100μm□、電極高さ18μmの電極2を484ピン、エリア配置形状に形成した。電子部品5には、回路基板1と対向する位置に回路基板1の電極2と同様のピッチ、電極サイズ、電極配置により高さ15μmの電極6を形成した。流動体4には、平均粒径20μmの半田粉3が50wt%、エポキシ樹脂22wt%、硬化剤22wt%、活性剤5wt%、硬化促進剤1wt%、含有された組成比のものを用いた。
A comparative example in which the gap H is constant and mass production will be described, and an embodiment in which the gap H is changed to an optimum value as described above will be described. The other joining conditions of the gap H are the same in the comparative example and the example.
Here, as shown in FIG. 5A, on the circuit board 1, the electrodes 2 having a pitch P = 200 μm, an electrode size L = 100 μm □, and an electrode height 18 μm are formed in an 484-pin area arrangement shape. In the electronic component 5, an electrode 6 having a height of 15 μm was formed at a position facing the circuit board 1 by the same pitch, electrode size, and electrode arrangement as those of the electrode 2 of the circuit board 1. As the fluid 4, a solder powder 3 having an average particle diameter of 20 μm, 50 wt%, epoxy resin 22 wt%, curing agent 22 wt%, activator 5 wt%, curing accelerator 1 wt%, and a composition ratio contained was used.

流動体4の回路基板1の上への供給をディスペンス法により行った後、図5(b)に示すように、回路基板1の上に供給した流動体4中に含まれる半田粉3の量を画像認識により色抽出し、電極2ごとの分割エリア毎に半田粉3の量を面積換算し、算出した。   After supplying the fluid 4 onto the circuit board 1 by the dispensing method, the amount of the solder powder 3 contained in the fluid 4 supplied onto the circuit board 1 as shown in FIG. Was extracted by image recognition, and the amount of solder powder 3 was converted into an area for each divided area for each electrode 2 and calculated.

− 比較例 −
比較例では、回路基板1の電極2と電子部品5の電極6との隙間Hを20μm一定で接合処理した場合の図5(b)に示す分割エリアE1の接合結果を確認した。その確認結果が図5(c)である。これは半田粉3の量を横軸にプロットし、縦軸に分割エリアE1の電極のショート、オープン不良率をプロットしたものである。
− Comparative Example −
In the comparative example, the bonding result of the divided area E1 shown in FIG. 5B when the gap H between the electrode 2 of the circuit board 1 and the electrode 6 of the electronic component 5 was fixed at 20 μm was confirmed. The confirmation result is shown in FIG. In this graph, the amount of solder powder 3 is plotted on the horizontal axis, and the short-circuit and open defect rates of the electrodes in the divided area E1 are plotted on the vertical axis.

図5(c)の結果からは、一定の隙間H(=20μm)の接合では、半田粉3の量が0.045mm以下と少ない領域では半田オープン不良が発生し、半田粉3の量が0.27mm以上と多い領域では、半田ショート不良が発生することが明らかとなった。 From the result of FIG. 5 (c), in the joining with a constant gap H (= 20 μm), the solder open defect occurs in the region where the amount of the solder powder 3 is as small as 0.045 mm 2 or less. It has been clarified that a solder short defect occurs in an area as large as 0.27 mm 2 or more.

流動体の供給量の最適値は、電極2と電極6の隙間H=20μmでは、接合に必要な半田、樹脂の体積量の計算により、2.0mgと算出されるが、実際の生産工程では、2.0mgを目標値として供給しても、2mg±0.1mgでの管理が限界であり、その結果、分割エリアE1に存在する半田粉3の量は、0.04mmから0.29mmの間でとばらつくので、図5(c)のように半田ショート、オープン不良が発生する半田粉3量との関係と合わせると、隙間Hを20μm一定として量産した場合には接合不良が避けられないことがわかる。 The optimum value of the fluid supply amount is calculated to be 2.0 mg by calculation of the volume of solder and resin necessary for bonding when the gap H between the electrode 2 and the electrode 6 is 20 μm, but in the actual production process, Even if 2.0 mg is supplied as a target value, management at 2 mg ± 0.1 mg is the limit, and as a result, the amount of solder powder 3 present in the divided area E1 is 0.04 mm 2 to 0.29 mm 2 and therefore, when combined with the relationship with the amount of solder powder 3 that causes solder shorts and open defects as shown in FIG. 5 (c), joint failure is avoided when mass production is performed with a constant gap H of 20 μm. I can't understand.

− 実施例 −
次に図5と同様の回路基板1、電子部品5、流動体4の構成のもと、図6(a)に示すように、分割エリアE1の半田粉3の量を0.3mmと一定にし、前記隙間Hを変動させて接合を実施した。
− Examples −
Next, based on the configuration of the circuit board 1, the electronic component 5, and the fluid 4 similar to FIG. 5, as shown in FIG. 6A, the amount of the solder powder 3 in the divided area E1 is constant at 0.3 mm 2. Then, the gap H was varied to perform bonding.

その結果、図6(b)に示すように、隙間H=26μm以下では、接合に必要は半田量に対し半田過多となり、ショート不良が発生した。見方を換えれば、供給された半田粉3の量に対して、接合不良を起こさない隙間Hの範囲が存在することとなり、隙間Hを制御して接合することによって、接合不良を防げることが分かる。ショート不良に着目したが、オープン不良に対しても供給された半田粉3の量に対して、不良を防げる隙間Hの範囲が存在すると言える。   As a result, as shown in FIG. 6 (b), when the gap H was 26 μm or less, excessive solder was required for the amount of solder necessary for joining, and a short circuit occurred. In other words, there is a range of gap H that does not cause poor bonding with respect to the amount of supplied solder powder 3, and it can be understood that poor bonding can be prevented by controlling the gap H to be bonded. . Although attention is paid to short-circuit defects, it can be said that there is a range of gaps H that can prevent defects with respect to the amount of supplied solder powder 3 even for open defects.

その相関を検証した結果を示したものが図7である。
図7は、分割エリアE1の半田粉3量と隙間Hを因子とし、マトリクス的に接合実験を行い、オープン不良、ショート不良が発生しない、隙間Hと半田粉3の量の相関関係をプロットした図である。流動体4の供給量は、2.0mg±0.1mgとした。
FIG. 7 shows the result of verifying the correlation.
FIG. 7 plots a correlation between the amount of the gap H and the amount of the solder powder 3 in which the open test and the short-circuit defect do not occur by performing a joining experiment in a matrix using the amount of the solder powder 3 in the divided area E1 and the gap H as factors. FIG. The supply amount of the fluid 4 was 2.0 mg ± 0.1 mg.

その結果、流動体4の目標値として2mgを供給した際の半田粉3の量のばらつき範囲内(0.04mmから0.29mm)において、半田粉3の量に応じて隙間Hを10〜30μmの間で適切に変動、制御することにより、ショート不良、オープン不良のない良好な接合を行えることが確認された。 As a result, the gap H is set to 10 according to the amount of the solder powder 3 within the variation range (0.04 mm 2 to 0.29 mm 2 ) of the amount of the solder powder 3 when 2 mg is supplied as the target value of the fluid 4. It was confirmed that good bonding without short-circuit failure and open failure could be achieved by appropriately varying and controlling between ˜30 μm.

上記の実施の形態では、回路基板1の上に形成された個々の電極2毎に半田粉画像データ15から面積を算出したが、回路基板1の上に形成された個々の電極2毎ではなく、図4に示すように複数の電極2が含まれる分割エリアE01〜E03などに分割しても良い。図4の事例では、回路基板1の上に形成された電極2のエリアを3個に分割した場合を示しているが、接合する対象物の接合エリアの大きさ、電極ピッチ、サイズ等により、分割するエリアの範囲を設定する。   In the above embodiment, the area is calculated from the solder powder image data 15 for each individual electrode 2 formed on the circuit board 1, but not for each individual electrode 2 formed on the circuit board 1. 4 may be divided into divided areas E01 to E03 including a plurality of electrodes 2 as shown in FIG. In the case of FIG. 4, the area of the electrode 2 formed on the circuit board 1 is divided into three, but depending on the size, the electrode pitch, the size, etc. of the bonding area of the objects to be bonded, Set the area range to be divided.

また、半田粉画像データ15の面積計算は、抽出した半田粉画像データ15を3次元的に画像処理して半田体積を算出することもできる。
また、各実施の形態では複数の分割エリアごとの半田粉3の量の計測値の平均値を、前記隙間Hの制御にフィードバックす場合を例に挙げて説明したが、複数の分割エリアごとの半田粉3の量の計測値の最小値と最大値を計算し、この最大値と最小値に基づいて前記供給された半田粉3の過不足を判定して、それに応じて適正の半田量に対する目標隙間H0をデータベース23から読み出して、この目標隙間H0に前記隙間Hが近づくようにステップS3で昇降装置24を制御しながらステップS4の前記接合動作を実施することもできる。
Further, the area calculation of the solder powder image data 15 can also calculate the solder volume by three-dimensionally image processing the extracted solder powder image data 15.
Moreover, in each embodiment, although the case where the average value of the measured value of the amount of the solder powder 3 for each of the plurality of divided areas is fed back to the control of the gap H has been described as an example, The minimum value and the maximum value of the measured value of the amount of the solder powder 3 are calculated, the excess or deficiency of the supplied solder powder 3 is determined based on the maximum value and the minimum value, and the appropriate amount of solder is correspondingly determined accordingly. It is also possible to read the target gap H0 from the database 23 and perform the joining operation in step S4 while controlling the lifting device 24 in step S3 so that the gap H approaches the target gap H0.

また、各実施の形態では複数の分割エリアごとの半田粉3の量の計測値の平均値を、前記隙間Hの制御にフィードバックする場合を例に挙げて説明したが、接合する対象物に応じて事前に不良と前記分割エリアにおける半田粉3の量の相関を求めておき、半田粉3の量の過不足の判定に効果的な分割エリアを規定しておき、
その有効な一つの分割エリアの半田粉3の量、
またはその有効な複数の分割エリアの平均値、
またはその有効な複数の分割エリアの最大値、
またはその有効な複数の分割エリアの最小値など
に基づいて、前記隙間Hの制御にフィードバックすることによっても実施できる。つまりこの場合も、回路基板1に供給された流動体4を撮像して半田粉の量を画像認識により計測するステップS2では、電極2毎の領域に分割、もしくは電極2を含む複数の領域に分割し、複数の領域の内の予め設定した特定の領域の半田粉3の量に基づいて前記供給された半田粉3の過不足を判定するに含まれる。
Moreover, in each embodiment, although the case where the average value of the measured value of the amount of the solder powder 3 for each of the plurality of divided areas is fed back to the control of the gap H has been described as an example, depending on the objects to be joined In advance, a correlation between the defect and the amount of solder powder 3 in the divided area is obtained in advance, and an effective divided area for determining whether the amount of solder powder 3 is excessive or insufficient is defined.
The amount of solder powder 3 in one effective divided area,
Or the average value of its active subdivisions,
Or the maximum of its valid multiple divided areas,
Alternatively, it can be implemented by feeding back to the control of the gap H based on the minimum value of the effective divided areas. That is, also in this case, in step S <b> 2 in which the fluid 4 supplied to the circuit board 1 is imaged and the amount of solder powder is measured by image recognition, it is divided into regions for each electrode 2 or a plurality of regions including the electrodes 2. This is included in determining whether the supplied solder powder 3 is excessive or insufficient based on the amount of the solder powder 3 in a specific area set in advance among a plurality of areas.

上記の各実施の形態では、流動体4を回路基板1に供給して電子部品5を回路基板1に接合したが、流動体4を電子部品5に供給して回路基板1に電子部品5を接合する場合も同様に実施できる。   In each of the above embodiments, the fluid 4 is supplied to the circuit board 1 and the electronic component 5 is joined to the circuit board 1. However, the fluid 4 is supplied to the electronic component 5 and the electronic component 5 is attached to the circuit board 1. The same can be done when joining.

上記の各実施の形態では、電子部品5は半導体チップであったが、電子部品5は例えば、電極がペリフェラル配置された半導体素子であっても良い。また、電子部品5は、半導体素子に限定されるわけでなく、その他の能動部品、受動部品や、リジットタイプの基板、フレキタイプの基板であっても良い。   In each of the above-described embodiments, the electronic component 5 is a semiconductor chip. However, the electronic component 5 may be, for example, a semiconductor element in which electrodes are arranged in a peripheral manner. The electronic component 5 is not limited to a semiconductor element, and may be other active components, passive components, a rigid type substrate, or a flexible type substrate.

上記の各実施の形態では回路基板1に電子部品5を実装する工程について説明を行ったが、回路基板1の電極2の上にバンプ31を形成するバンプ形成において、電極2と加熱ツール7aと回路基板電極2との隙間Hを、同様に半田粉3の量の過不足に応じて制御することによって、ショート不良、盛り上がり不良のない良好なバンプ形成を、安定した品質で形成できる。   In each of the above embodiments, the process of mounting the electronic component 5 on the circuit board 1 has been described. However, in the bump formation in which the bump 31 is formed on the electrode 2 of the circuit board 1, the electrode 2, the heating tool 7a, Similarly, by controlling the gap H with the circuit board electrode 2 according to the excess or deficiency of the amount of the solder powder 3, it is possible to form a good bump without a short-circuit defect and a rising defect with stable quality.

この場合の処理装置20は、電子部品接合装置の処理装置の構成を示す図2におけるステップS4が、接合処理からバンプ形成処理のステップS4Aに変更されるだけであって、その他の構成は電子部品接合装置の処理装置と同じである。バンプ形成処理は、隙間Hにして半田粉3の溶融温度以上に加熱しながら隙間Hを大きくして加熱ツール7aを回路基板1から離間させ、半田粉3の凝固温度以下に冷却するものである。図8はバンプ形成装置の処理装置20の構成を示している。   In the processing apparatus 20 in this case, step S4 in FIG. 2 showing the configuration of the processing apparatus of the electronic component bonding apparatus is merely changed from the bonding process to step S4A of the bump formation process, and the other configuration is the electronic component. It is the same as the processing apparatus of the joining apparatus. In the bump forming process, the heating tool 7a is separated from the circuit board 1 by cooling the solder powder 3 below the solidification temperature of the solder powder 3 by increasing the gap H while heating the solder powder 3 above the melting temperature. . FIG. 8 shows the configuration of the processing apparatus 20 of the bump forming apparatus.

また、回路基板1の電極2の上にバンプ31を形成する場合だけでなく、電子部品の基板の電極の上にバンプ31を形成する場合も同様に実施できる。この場合の電子部品は、半導体素子に限定されるわけでなく、その他の能動部品、受動部品や、リジットタイプの基板、フレキタイプの基板であっても良い。   Further, not only when the bumps 31 are formed on the electrodes 2 of the circuit board 1, but also when the bumps 31 are formed on the electrodes of the substrate of the electronic component, the same can be performed. In this case, the electronic component is not limited to a semiconductor element, and may be another active component, a passive component, a rigid type substrate, or a flexible type substrate.

つまり、本発明のバンプ形成方法ならびにバンプ形成装置は、次のように構成できる。
先ず、バンプ形成方法を実行するバンプ形成装置は、基板と平板状のツールとの間に半田粉を含んだ流動体を介在させるとともに、基板の電極と前記ツールとの間の隙間に保持した状態で加熱された前記流動体が流動して溶融した前記半田粉が前記電極と前記ツールの間に自己集合し、その後に前記ツールを前記基板から離間させるとともに前記半田粉の固化温度以下に冷却して、前記電極にバンプを形成するバンプ形成装置であって、前記基板に供給された流動体を撮像して半田粉の量を画像認識により計測するカメラと、前記計測した実際の半田粉の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する処理装置とを設けて構成されている。
That is, the bump forming method and the bump forming apparatus of the present invention can be configured as follows.
First, a bump forming apparatus that executes a bump forming method is a state in which a fluid containing solder powder is interposed between a substrate and a flat tool and is held in a gap between the electrode of the substrate and the tool. The solder powder, which is heated and melted by the fluid, is self-assembled between the electrode and the tool, and then the tool is separated from the substrate and cooled to a temperature lower than the solidification temperature of the solder powder. A bump forming apparatus for forming bumps on the electrodes, the camera for imaging the fluid supplied to the substrate and measuring the amount of solder powder by image recognition, and the actual amount of solder powder measured And a processing device for determining an appropriate target gap value and controlling the gap to approach the target gap.

本発明のバンプ形成方法は、基板と平板状のツールとの間に半田粉を含んだ流動体を介在させるとともに、前記基板の電極と前記ツールとの間の隙間に保持した状態で加熱された前記流動体が流動して溶融した前記半田粉が前記電極と前記ツールの間に自己集合し、その後に前記ツールを前記基板から離間させるとともに前記半田粉の固化温度以下に冷却して、前記電極にバンプを形成するに際し、前記基板に供給された流動体を撮像して半田粉の量を画像認識により計測する工程と、前記計測した実際の半田粉の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する工程とを含んでいることを特徴とする。   According to the bump forming method of the present invention, a fluid containing solder powder is interposed between a substrate and a flat tool, and the bump is formed while being held in a gap between the electrode of the substrate and the tool. The solder powder melted by flowing the fluid is self-assembled between the electrode and the tool, and then the tool is separated from the substrate and cooled to a temperature lower than the solidification temperature of the solder powder. In forming a bump on the substrate, an image of the fluid supplied to the substrate and measuring the amount of solder powder by image recognition, and an appropriate target gap value based on the actual amount of solder powder measured. And determining to control the gap to approach the target gap.

本発明のバンプ形成方法において、前記基板に供給された流動体を撮像して半田粉の量を画像認識により計測する工程では、半田粉を画像認識により識別、色抽出した後、画素数をカウントし面積に換算することにより実施する。   In the bump forming method of the present invention, in the step of imaging the fluid supplied to the substrate and measuring the amount of solder powder by image recognition, the number of pixels is counted after the solder powder is identified and color extracted by image recognition. It is carried out by converting it into an area.

本発明のバンプ形成方法において、前記基板に供給された流動体を撮像して半田粉の量を画像認識により計測する工程では、前記電極毎の領域に分割、もしくは前記電極を含む複数の領域に分割し、前記領域毎の半田粉の量に基づいて前記供給された半田粉の過不足を判定することにより実施する。   In the bump forming method of the present invention, in the step of imaging the fluid supplied to the substrate and measuring the amount of solder powder by image recognition, the method is divided into regions for each electrode or a plurality of regions including the electrodes. It divides | segments and it implements by determining the excess and deficiency of the supplied said solder powder based on the quantity of the solder powder for every said area | region.

本発明のバンプ形成方法において、前記領域毎の半田粉の量に基づいて前記供給された半田粉の過不足を判定するとは、前記領域毎に計測した半田粉の量の平均値に基づいて前記供給された半田粉の過不足を判定することにより実施する。   In the bump forming method of the present invention, determining whether the supplied solder powder is excessive or insufficient based on the amount of solder powder for each region is based on an average value of the amount of solder powder measured for each region. This is done by determining whether the supplied solder powder is excessive or insufficient.

本発明のバンプ形成方法において、前記領域毎の半田粉の量に基づいて前記供給された半田粉の過不足を判定するとは、前記領域毎に計測した半田粉の量の最大値と最小値に基づいて前記供給された半田粉の過不足を判定することにより実施する。   In the bump forming method of the present invention, determining whether the supplied solder powder is excessive or insufficient based on the amount of solder powder for each region is based on the maximum value and the minimum value of the amount of solder powder measured for each region. Based on this, it is determined by determining whether the supplied solder powder is excessive or insufficient.

本発明のバンプ形成方法において、前記基板に供給された流動体を撮像して半田粉の量を画像認識により計測する工程では、前記電極毎の領域に分割、もしくは前記電極を含む複数の領域に分割し、複数の前記領域の内の予め設定した特定の領域の半田粉の量に基づいて前記供給された半田粉の過不足を判定することにより実施する。   In the bump forming method of the present invention, in the step of imaging the fluid supplied to the substrate and measuring the amount of solder powder by image recognition, the method is divided into regions for each electrode or a plurality of regions including the electrodes. This is performed by dividing and determining the excess or deficiency of the supplied solder powder based on the amount of solder powder in a specific area set in advance among the plurality of areas.

バンプ形成方法ならびにバンプ形成装置において、流動体4に含まれている導電性粒子として半田粉3の場合を説明したが、導電性粒子としては半田がコートされたAgやCuやAuなどの導電性粒子なども同様に使用できる。   In the bump forming method and the bump forming apparatus, the case where the solder powder 3 is used as the conductive particles contained in the fluid 4 has been described. As the conductive particles, conductive material such as Ag, Cu, or Au coated with solder is used. Particles can be used as well.

バンプ形成方法ならびにバンプ形成装置において、流動体4の樹脂成分としては、室温から導電性粒子の溶融温度の範囲内において流動可能な程度の粘度を有するものであれば良く、又、加熱することによって流動可能な粘度に低下するものも含む。代表的な例としては、エポキシ樹脂、フェノール樹脂、シリコーン樹脂、ジアリルフタレート樹脂、フラン樹脂、メラミン樹脂等の熱硬化性樹脂、ポリエステルエストラマ、フッ素樹脂、ポリイミド樹脂、ポリアミド樹脂、アラミド樹脂等の熱可塑樹脂、または光(紫外線)硬化樹脂等、あるいはそれらを組み合わせた材料を使用することができる。さらに、バンプ形成方法ならびにバンプ形成装置の場合の流動体4としては、上記の樹脂以外にも、高沸点溶剤、オイル等も使用することができる。   In the bump forming method and the bump forming apparatus, the resin component of the fluid 4 may have any viscosity that can flow within the range of room temperature to the melting temperature of the conductive particles. Including those that fall to a flowable viscosity. Typical examples include thermosetting resins such as epoxy resins, phenol resins, silicone resins, diallyl phthalate resins, furan resins, and melamine resins, polyester elastomers, fluororesins, polyimide resins, polyamide resins, and aramid resins. A plastic resin, a light (ultraviolet) curable resin, or the like, or a combination thereof can be used. Furthermore, as the fluid 4 in the case of the bump forming method and the bump forming apparatus, a high boiling point solvent, oil, or the like can be used in addition to the above resin.

本発明は、例えば小型・軽量化が進む電子機器に使用される微小、かつ微細な電極間ピッチを有する半導体と微細な配線パターンが形成されたプリント配線板との電極間接合の接続品質の向上に寄与することができる。   The present invention improves the connection quality of interelectrode bonding between a semiconductor having a fine and fine inter-electrode pitch and a printed wiring board on which a fine wiring pattern is formed, for example, used in electronic devices that are becoming smaller and lighter. Can contribute.

本発明の実施の形態にかかわる電子部品接合装置の構成図と撮像状態を示す説明図The block diagram of the electronic component joining apparatus in connection with embodiment of this invention, and explanatory drawing which shows an imaging state 同実施の形態の処理装置の構成図Configuration diagram of processing apparatus of the embodiment 同実施の形態の要部断面を示した模式図と画像処理の説明図Schematic diagram showing a cross section of the main part of the embodiment and an explanatory diagram of image processing 別の実施の形態の画像処理の説明図Explanatory drawing of image processing of another embodiment 隙間を一定で接合した比較例の要部断面と接合結果の説明図Explanatory drawing of the main part cross section of the comparative example joined with a constant gap and the joining result 本発明の実施の形態にかかわる電子部品接合方法の接合結果の説明図Explanatory drawing of the joining result of the electronic component joining method in connection with embodiment of this invention 同実施の形態にかかわる電子部品接合方法の接合結果の説明図Explanatory drawing of the joining result of the electronic component joining method concerning the embodiment 同実施の形態の処理装置の構成図Configuration diagram of processing apparatus of the embodiment 従来の電子部品接合方法の工程図Process diagram of conventional electronic component joining method 従来のバンプ形成方法の工程図Process diagram of conventional bump formation method 従来の電子部品接合方法によって発生するオープン不良の説明図Explanatory diagram of open defects caused by conventional electronic component joining methods 従来の電子部品接合方法によって発生するショート不良の説明図Explanatory diagram of short-circuit defects that occur due to conventional electronic component joining methods

1 回路基板
2,6 電極
3 半田粉(導電性粒子)
4 流動体
5 電子部品
7 電子部品吸着ツール
7a 加熱ツール
H 電極2と電極6の隙間
8,10 加熱ヒータ
9 加熱ステージ
11 流動体4の中の硬化した樹脂成分
12 溶融半田
15 半田粉画像データ
20 処理装置
21 供給装置
22 カメラ
23 データベース
24 昇降装置
E1〜E9 分割エリア
31 バンプ
1 Circuit board 2, 6 Electrode 3 Solder powder (conductive particles)
DESCRIPTION OF SYMBOLS 4 Fluid 5 Electronic component 7 Electronic component adsorption | suction tool 7a Heating tool H The clearance gap between the electrode 2 and the electrode 8, 10, Heater 9 Heating stage 11 The hardened resin component 12 in the fluid 4 Molten solder 15 Solder powder image data 20 Processing device 21 Supply device 22 Camera 23 Database 24 Lifting devices E1 to E9 Dividing area 31 Bump

Claims (14)

基板と電子部品の間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の第1電極と前記電子部品の第2電極との間の隙間に保持した状態で加熱された前記流動体が流動して前記第1電極と前記第2電極の間に溶融した前記導電性粒子が自己集合し、その後に前記導電性粒子の凝固温度以下に冷却して前記電子部品を前記基板に実装するに際し、
前記基板または前記電子部品に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程と、
前記計測した実際の導電性粒子の量に基づき前記隙間の値を決定して制御する工程と、
前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する工程と
を含んでいることを特徴とする
電子部品接合方法。
The fluid heated in a state where a fluid containing conductive particles is interposed between the substrate and the electronic component and is held in a gap between the first electrode of the substrate and the second electrode of the electronic component The conductive particles melted between the first electrode and the second electrode are self-assembled and then cooled below the solidification temperature of the conductive particles to mount the electronic component on the substrate. On the occasion
Imaging the fluid supplied to the substrate or the electronic component and measuring the amount of conductive particles by image recognition; and
Determining and controlling the value of the gap based on the measured actual amount of conductive particles;
And a step of determining an appropriate target gap value based on the measured actual amount of conductive particles and controlling the gap to approach the target gap.
前記基板または前記電子部品に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程では、
導電性粒子を画像認識により識別、色抽出した後、画素数をカウントし面積に換算することにより実施する
請求項1記載の電子部品接合方法。
In the step of imaging the fluid supplied to the substrate or the electronic component and measuring the amount of conductive particles by image recognition,
The electronic component joining method according to claim 1, wherein the conductive particles are identified and color extracted by image recognition, and then the number of pixels is counted and converted into an area.
前記基板または前記電子部品に供給された流動体を撮像して半田粉の量を画像認識により計測する工程では、
前記第1電極または前記第2電極毎の領域に分割、もしくは前記第1電極または前記第2電極を含む複数の領域に分割し、
前記領域毎の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定する
請求項1記載の電子部品接合方法。
In the step of imaging the fluid supplied to the substrate or the electronic component and measuring the amount of solder powder by image recognition,
Divided into regions for each of the first electrode and the second electrode, or divided into a plurality of regions including the first electrode or the second electrode,
The electronic component joining method according to claim 1, wherein an excess or deficiency of the supplied conductive particles is determined based on an amount of conductive particles for each region.
前記領域毎の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定するとは、
前記領域毎に計測した導電性粒子の量の平均値に基づいて前記供給された導電性粒子の過不足を判定することである
請求項3記載の電子部品接合方法。
To determine the excess or deficiency of the supplied conductive particles based on the amount of conductive particles for each region,
The electronic component joining method according to claim 3, wherein an excess or deficiency of the supplied conductive particles is determined based on an average value of the amount of conductive particles measured for each region.
前記領域毎の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定するとは、
前記領域毎に計測した導電性粒子の量の最大値と最小値に基づいて前記供給された導電性粒子の過不足を判定することである
請求項3記載の電子部品接合方法。
To determine the excess or deficiency of the supplied conductive particles based on the amount of conductive particles for each region,
The electronic component joining method according to claim 3, wherein an excess or deficiency of the supplied conductive particles is determined based on a maximum value and a minimum value of the amount of conductive particles measured for each region.
前記基板または前記電子部品に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程では、
前記第1電極または前記第2電極毎の領域に分割、もしくは前記第1電極または前記第2電極を含む複数の領域に分割し、
複数の前記領域の内の予め設定した特定の領域の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定する
請求項1記載の電子部品接合方法。
In the step of imaging the fluid supplied to the substrate or the electronic component and measuring the amount of conductive particles by image recognition,
Divided into regions for each of the first electrode and the second electrode, or divided into a plurality of regions including the first electrode or the second electrode,
The electronic component joining method according to claim 1, wherein an excess or deficiency of the supplied conductive particles is determined based on a predetermined amount of conductive particles in a specific region among the plurality of regions.
基板と電子部品の間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の第1電極と前記電子部品の第2電極との間の隙間に保持した状態で加熱された流動体が流動して溶融した前記導電性粒子が前記第1電極と前記第2電極の間に自己集合し、その後に前記導電性粒子の凝固温度以下に冷却して前記電子部品を前記基板に実装する電子部品接合装置であって、
前記基板または前記電子部品に供給された流動体を撮像して導電性粒子の量を画像認識により計測するカメラと、
前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する処理装置と
を設けた電子部品接合装置。
While the fluid containing conductive particles is interposed between the substrate and the electronic component, the fluid heated while being held in the gap between the first electrode of the substrate and the second electrode of the electronic component is The electroconductive particles that have flowed and melted are self-assembled between the first electrode and the second electrode, and are then cooled below the solidification temperature of the electroconductive particles to mount the electronic component on the substrate. A component joining device,
A camera that images the fluid supplied to the substrate or the electronic component and measures the amount of conductive particles by image recognition;
An electronic component joining apparatus provided with a processing device that determines an appropriate target gap value based on the measured actual amount of conductive particles and controls the gap to approach the target gap.
基板と平板状のツールとの間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の電極と前記ツールとの間の隙間に保持した状態で加熱された前記流動体が流動して溶融した前記導電性粒子が前記電極と前記ツールの間に自己集合し、その後に前記ツールを前記基板から離間させるとともに前記導電性粒子の固化温度以下に冷却して、前記電極にバンプを形成するに際し、
前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程と、
前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する工程
とを含んでいるバンプ形成方法。
The fluid containing conductive particles is interposed between the substrate and the flat tool, and the fluid heated while being held in the gap between the electrode of the substrate and the tool flows. The molten conductive particles are self-assembled between the electrode and the tool, and then the tool is separated from the substrate and cooled below the solidification temperature of the conductive particle to form bumps on the electrode. On the occasion
Imaging the fluid supplied to the substrate and measuring the amount of conductive particles by image recognition; and
And a step of determining an appropriate target gap value based on the measured actual amount of conductive particles and controlling the gap so as to approach the target gap.
前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程では、
導電性粒子を画像認識により識別、色抽出した後、画素数をカウントし面積に換算することにより実施する請求項8記載のバンプ形成方法。
In the step of imaging the fluid supplied to the substrate and measuring the amount of conductive particles by image recognition,
9. The bump forming method according to claim 8, wherein the conductive particles are identified and color extracted by image recognition, and then the number of pixels is counted and converted into an area.
前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程では、
前記電極毎の領域に分割、もしくは前記電極を含む複数の領域に分割し、
前記領域毎の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定する
請求項8記載のバンプ形成方法。
In the step of imaging the fluid supplied to the substrate and measuring the amount of conductive particles by image recognition,
Divided into regions for each electrode, or divided into a plurality of regions including the electrodes,
The bump forming method according to claim 8, wherein excess or deficiency of the supplied conductive particles is determined based on an amount of conductive particles for each region.
前記領域毎の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定するとは、
前記領域毎に計測した導電性粒子の量の平均値に基づいて前記供給された導電性粒子の過不足を判定することである
請求項10記載のバンプ形成方法。
To determine the excess or deficiency of the supplied conductive particles based on the amount of conductive particles for each region,
The bump forming method according to claim 10, wherein an excess or deficiency of the supplied conductive particles is determined based on an average value of the amount of conductive particles measured for each region.
前記領域毎の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定するとは、
前記領域毎に計測した導電性粒子の量の最大値と最小値に基づいて前記供給された導電性粒子の過不足を判定することである
請求項10記載のバンプ形成方法。
To determine the excess or deficiency of the supplied conductive particles based on the amount of conductive particles for each region,
The bump forming method according to claim 10, wherein an excess or deficiency of the supplied conductive particles is determined based on a maximum value and a minimum value of the amount of conductive particles measured for each region.
前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測する工程では、
前記電極毎の領域に分割、もしくは前記電極を含む複数の領域に分割し、
複数の前記領域の内の予め設定した特定の領域の導電性粒子の量に基づいて前記供給された導電性粒子の過不足を判定する
請求項8記載のバンプ形成方法。
In the step of imaging the fluid supplied to the substrate and measuring the amount of conductive particles by image recognition,
Divided into regions for each electrode, or divided into a plurality of regions including the electrodes,
The bump forming method according to claim 8, wherein an excess or deficiency of the supplied conductive particles is determined based on a predetermined amount of conductive particles in a specific region among the plurality of regions.
基板と平板状のツールとの間に導電性粒子を含んだ流動体を介在させるとともに、前記基板の電極と前記ツールとの間の隙間に保持した状態で加熱された前記流動体が流動して溶融した前記導電性粒子が前記電極と前記ツールの間に自己集合し、その後に前記ツールを前記基板から離間させるとともに前記導電性粒子の固化温度以下に冷却して、前記電極にバンプを形成するバンプ形成装置であって、
前記基板に供給された流動体を撮像して導電性粒子の量を画像認識により計測するカメラと、
前記計測した実際の導電性粒子の量に基づき適切な目標隙間の値を決定して前記隙間が前記目標隙間に近づくように制御する処理装置と
を設けたバンプ形成装置。
The fluid containing conductive particles is interposed between the substrate and the flat tool, and the fluid heated while being held in the gap between the electrode of the substrate and the tool flows. The molten conductive particles are self-assembled between the electrode and the tool, and then the tool is separated from the substrate and cooled below the solidification temperature of the conductive particle to form bumps on the electrode. A bump forming device,
A camera that images the fluid supplied to the substrate and measures the amount of conductive particles by image recognition;
A bump forming apparatus provided with a processing device that determines an appropriate target gap value based on the measured actual amount of conductive particles and controls the gap to approach the target gap.
JP2009071064A 2009-03-24 2009-03-24 Electronic component joining method, bump forming method and apparatus therefor Expired - Fee Related JP5106457B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009071064A JP5106457B2 (en) 2009-03-24 2009-03-24 Electronic component joining method, bump forming method and apparatus therefor
CN201010157047.0A CN101853794B (en) 2009-03-24 2010-03-23 Electronic components jointing method and salient point forming method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009071064A JP5106457B2 (en) 2009-03-24 2009-03-24 Electronic component joining method, bump forming method and apparatus therefor

Publications (2)

Publication Number Publication Date
JP2010225821A JP2010225821A (en) 2010-10-07
JP5106457B2 true JP5106457B2 (en) 2012-12-26

Family

ID=42805190

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009071064A Expired - Fee Related JP5106457B2 (en) 2009-03-24 2009-03-24 Electronic component joining method, bump forming method and apparatus therefor

Country Status (2)

Country Link
JP (1) JP5106457B2 (en)
CN (1) CN101853794B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7477446B2 (en) 2020-12-28 2024-05-01 古河産機システムズ株式会社 Fixture for shaft assembly of horizontal rotating machinery

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7352378B2 (en) 2019-05-23 2023-09-28 株式会社東芝 Manufacturing control device, manufacturing control method and program

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3964911B2 (en) * 2004-09-03 2007-08-22 松下電器産業株式会社 Manufacturing method of substrate with bumps
JP4408905B2 (en) * 2004-09-03 2010-02-03 パナソニック株式会社 Manufacturing method of substrate with bumps
WO2006112383A1 (en) * 2005-04-14 2006-10-26 Matsushita Electric Industrial Co., Ltd. Electronic circuit device and method for manufacturing same
KR101257977B1 (en) * 2006-03-16 2013-04-24 파나소닉 주식회사 Bump forming method and bump forming apparatus
TWI473245B (en) * 2006-10-31 2015-02-11 Sumitomo Bakelite Co Semiconductor electronic component and semiconductor device using the same
JP5010990B2 (en) * 2007-06-06 2012-08-29 ソニーケミカル&インフォメーションデバイス株式会社 Connection method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7477446B2 (en) 2020-12-28 2024-05-01 古河産機システムズ株式会社 Fixture for shaft assembly of horizontal rotating machinery

Also Published As

Publication number Publication date
CN101853794B (en) 2014-04-16
CN101853794A (en) 2010-10-06
JP2010225821A (en) 2010-10-07

Similar Documents

Publication Publication Date Title
JP4477062B2 (en) Flip chip mounting method
US10667387B2 (en) Accurate positioning and alignment of a component during processes such as reflow soldering
TW200419273A (en) Circuit substrate, installing structure of semiconductor component with bump, electro-optic device and electronic machinery
US11765832B2 (en) Printed circuit board and electronic device
KR20220158082A (en) Alignment method, method for connecting electronic component, method for manufacturing connection body, connection body, anisotropic electroconductive film
CN112823448B (en) Method for producing connector, anisotropic bonding film, and connector
US7422973B2 (en) Method for forming multi-layer bumps on a substrate
US7905011B2 (en) Bump forming method and bump forming apparatus
JP5106457B2 (en) Electronic component joining method, bump forming method and apparatus therefor
US20100244283A1 (en) Method of joining electronic component and the electronic component
US20090041990A1 (en) Method for attachment of solder powder to electronic circuit board and soldered electronic circuit board
TW201519718A (en) Paste printing apparatus and paste printing method
TW201639116A (en) Multilayer substrate
CN114502685B (en) Method for producing connector, anisotropic conductive bonding material, and connector
Joo et al. Development of simultaneous transferring and bonding (SITRAB) process for µLED arrays using Anisotropic Solder Paste (ASP) and Laser-Assisted Bonding (LAB) Technology
JP6168586B2 (en) Bonding method and semiconductor module manufacturing method
CN109994433A (en) Semiconductor device packages
CN103635076B (en) Electronic component installation system, electronic component mounting equipment and electronic component mounting method
JP2016139721A (en) Observation apparatus
WO2023162666A1 (en) Connection structure manufacturing method, film structure, and film structure manufacturing method
WO2023189416A1 (en) Electroconductive film, connection structure and manufacturing method for same
US20210136967A1 (en) Method of manufacturing electronic module, electronic module, and electronic device
Lee et al. Development of low contact resistance interconnection for display applications
JP2005045284A (en) Method of mounting elecronic component
Firsov et al. Using Underfill Materials for Electrical and Mechanical Protection of Crystals

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110805

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120815

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120904

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20121002

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20151012

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees