JP5105866B2 - Capacitor electrode manufacturing method, etching method and etching system, and storage medium - Google Patents

Description

  In the present invention, a silicon oxide film formed on a substrate is etched to form a hole, a conductor film is formed on the inner wall of the hole, the silicon oxide film is removed to expose the conductor film, and a capacitor electrode The present invention relates to a method of manufacturing a capacitor electrode, an etching method and an etching system used therefor, and a storage medium storing a program for performing the etching method.

  In recent years, the pattern size has been remarkably miniaturized with the high integration of semiconductor devices. For example, in the manufacturing process of DRAM, the capacitor electrode formed in a cylindrical shape (cylinder type) is becoming increasingly thin, and its The height is getting higher and higher to increase the capacitance.

  When manufacturing such a cylinder type capacitor electrode, first, a storage node hole is patterned in a silicon oxide film such as a BPSG film previously formed on a substrate. Then, a conductive material such as TiN or polysilicon is formed on the inner surface of the storage node hole to form a cylindrical capacitor electrode. Thereafter, the silicon oxide film remaining around the capacitor electrode is removed by etching. Since the etching of the remaining silicon oxide film has conventionally achieved a high etching rate, a chemical solution such as buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF) is used as an etching solution. The wet etching used as is generally adopted.

  However, since the cylindrical capacitor electrode is thin and high as described above, when the silicon oxide film is wet-etched to expose the capacitor electrode, the capacitor is removed when the etching solution is removed and dried. The electrodes are pulled by the surface tension of the etching solution, and the capacitor electrode falls, so-called leaning.

  In order to solve such a problem of leaning, Patent Document 1 discloses a technique for reducing surface tension during drying using an additive obtained by adding a surfactant to dilute hydrofluoric acid, and an adjacent capacitor electrode. A technique for forming a support film made of a nitride film such as SiN is disclosed.

  However, even when a surfactant is added to the etching solution, the tension when the etching solution is removed is only reduced to some extent, and the effect is limited, and the problem of leaning cannot be fundamentally solved. Absent. Further, the method of forming the support film adds a step of forming a nitride film, leading to a decrease in throughput and an increase in manufacturing cost. In addition, the support film is etched by the etching solution, and the effect may be insufficient.

Although the problem of leaning due to such surface tension does not essentially occur in the dry process, the height of the capacitor electrode is extremely high as described above. It is not realistic.
JP 2005-328067 A

The present invention has been made in view of such circumstances, and provides a capacitor electrode manufacturing method, an etching method and an etching system used therefor, which can essentially eliminate the problem of leaning while ensuring a desired etching rate. The purpose is to do.
It is another object of the present invention to provide a computer-readable storage medium storing a control program for executing such an etching method.

In order to solve the above problems, in a first aspect of the present invention, a step of etching a silicon oxide film formed on a substrate to form a hole, and a step of forming a conductor film on the inner surface of the hole, And a step of removing the silicon oxide film to expose the conductor film to form a capacitor electrode, wherein the step of removing the silicon oxide film to expose the conductor film is provided. The silicon oxide film is removed by a wet process using a chemical solution to a height at which a support portion is left to the extent that no leaning occurs in the conductor film, and then the dry process using a gas is not concerned with the leaning. There is provided a method of manufacturing a capacitor electrode, wherein the conductive film is exposed by removing a remaining support portion of silicon oxide.

In the first aspect, the silicon oxide film containing at least one of B and P can be used. The dry process can be performed without using plasma containing HF and N ₂ gas . Further, the wet process can be performed using a treatment liquid containing buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF). Furthermore, the method may further include a step of heating the substrate after the dry process. Furthermore, a cylinder type can be given as a typical example of the capacitor electrode. Furthermore, the dry process can be performed under reduced pressure.

According to a second aspect of the present invention, there is provided an etching method in which a conductive film is formed on an inner wall of a hole formed in a silicon oxide film on a substrate and then the silicon oxide film is etched to expose the conductive film. The silicon oxide film is removed by a wet process using a chemical solution to a height at which the support portion is left to the extent that no leaning occurs in the conductor film, and then a dry process that does not have a concern about the leaning using a gas. An etching method is provided in which the conductive film is exposed by removing the remaining silicon oxide support .

In the second aspect, the silicon oxide film containing at least one of B and P can be used. The dry process can be performed without using plasma containing HF and N ₂ gas . Further, the wet process can be performed using a treatment liquid containing buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF). Furthermore, the substrate can be heated after the dry process. Furthermore, a cylinder-type capacitor electrode can be formed by the conductor remaining after the etching. Furthermore, the dry process can be performed under reduced pressure.

According to a third aspect of the present invention, there is provided an etching system in which a conductive film is formed on an inner wall of a hole formed in a silicon oxide film on a substrate and then the silicon oxide film is etched to expose the conductive film. A wet etching apparatus for removing the silicon oxide film by a wet process using a chemical solution, a dry etching apparatus for removing the silicon oxide film by a dry process using a gas, and the conductive film by removing the silicon oxide film by the wet etching apparatus. After removing the supporting portion to such an extent that no leaning occurs in the film, the remaining silicon oxide supporting portion is removed by the dry etching apparatus with no concern about leaning to expose the conductive film. And an etching system characterized by comprising: To.

In the third aspect, at least one of B and P can be used as the silicon oxide film. The dry etching apparatus may include a chamber that accommodates the substrate and a gas supply mechanism that supplies a gas for dry etching into the chamber. Furthermore, the dry etching apparatus can perform dry etching without plasma using a gas containing HF and N ₂ gas . Furthermore, a processing solution containing buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF) can be used as the chemical solution for the wet etching. Furthermore, after the said dry process, the heating apparatus which heats a board | substrate can be further provided. Furthermore, the dry etching apparatus may further include a pressure reducing mechanism for reducing the pressure in the chamber, and the dry etching process may be performed under reduced pressure.

According to a fourth aspect of the present invention, there is provided a computer-readable storage medium that operates on a computer and stores a control program for controlling an etching system, and the control program executes the second program at the time of execution . as the etching method according to the aspect is performed, to provide a computer-readable storage medium, characterized in that to control the etching system to the computer.

  According to the present invention, when the silicon oxide film is etched after the capacitor electrode is formed, the wet process is performed halfway, and then the dry process is performed. Therefore, the wet process is performed until the capacitor electrode is not leaned. After that, it becomes possible to perform etching by a dry process, and the problem of leaning can be essentially solved while ensuring a desired etching rate.

  In particular, when the dry process is performed without using plasma containing HF, a high etching rate can be obtained without causing plasma damage to the base, and good etching characteristics can be obtained at a higher etching rate. it can.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Here, an example of a capacitor electrode manufacturing process which is performed as a part of the DRAM manufacturing process will be described.
FIG. 1 is a flowchart showing a manufacturing process of a capacitor electrode according to an embodiment of the present invention, and FIG. 2 is a process cross-sectional view for explaining each process.

  First, a silicon oxide film 200 including at least one of B and P as a silicon oxide film is formed on the surface of a semiconductor wafer (hereinafter simply referred to as a wafer) W shown in FIG. A silicon oxide film 200 is prepared in which a cylindrical storage node hole 201 is patterned so as to reach the storage node 202 on the surface of the wafer W (step 1). As such a silicon oxide film 200 containing at least one of B and P, a BPSG (Boro-Phospho Silicate Glass) film containing both B and P, a BSG (Boro Silicate Glass) film containing B, and a PSG containing P (Phospho Silicate Glass) film. Hereinafter, a case where BPSG is used as such a silicon oxide film will be described as an example. The storage node hole 201 can be formed through a photolithography process and an etching process after the BPSG film 200 is formed on the surface of the wafer W.

  Next, as shown in FIG. 2B, a conductor film 203 such as TiN or polysilicon, which becomes a capacitor electrode, is formed in a cylindrical shape on the inner surface of the storage node hole 201 (step 2). For the film formation at this time, any film formation method applicable in this field can be employed, for example, CVD can be employed.

Thereafter, the BPSG film 200 remaining around the conductor film 203 is removed by etching.
At this time, in this embodiment, first, as shown in FIG. 2C, the BPSG film 200 is partially etched away by a wet process (step 3). At this time, the etching is performed to such a height that a support portion is left to the extent that no leaning occurs in the conductor film 203. In this wet process, a conventionally known chemical solution such as a processing solution containing buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF) can be used as an etching solution. As such a treatment liquid, buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF) may be used alone, but in addition to these, a surfactant and other chemicals may be mixed and used. . By this wet process, the BPSG film 200 can be etched at a high etching rate similar to the conventional one. However, it is preferable to increase this wet process as much as possible from the viewpoint of throughput, and the wet process is performed to the limit where no leaning occurs. It is preferable. However, it is preferable to have some margin from the viewpoint of process margin.

  After performing such a wet process, as shown in FIG. 2D, the remaining part of the BPSG film is etched and completely removed by a dry process to completely expose the conductor film 203, and each storage node A cylindrical capacitor electrode 204 corresponding to 202 is obtained (step 4).

As etching by the dry process at this time, dry etching by plasma that is usually performed can be used, but it is preferable to perform plasmaless etching using a gas containing HF. Thereby, the BPSG film can be selectively etched at a high etching rate. Further, since it is plasmaless, there is also an advantage that the capacitor electrode 204 and the base are not damaged. Since the BPSG film 200 adsorbs moisture, it is considered that HF gas is supplied in the presence of the moisture and reacts with them to obtain a high etching rate. Even when a BSG film or a PSG film is used, these adsorb moisture, and thus can be etched at a high etching rate due to the reaction between moisture and HF. The gas containing HF may be HF gas alone or a mixture of HF gas and an inert gas such as N ₂ gas or Ar gas. Furthermore, another etching gas may be included.

  After the BPSG film 200 is removed by etching as described above, heat treatment is performed for the purpose of removing the reaction product generated by the dry etching in Step 4 as necessary (Step 5).

  After the capacitor electrode 204 is manufactured in this manner, an insulating film is formed on the surface of the capacitor electrode 204, and a counter capacitor electrode facing the capacitor electrode 204 is further formed, so that the capacitor as a component of the DRAM can be obtained. It is formed. In this case, as the insulating film, it is preferable to use a so-called High-k film having a high dielectric constant such as a transition metal oxide film or a rare earth oxide film.

  Next, an example of an etching system for etching a BPSG film, which is a silicon oxide film, which is a characteristic part of the present invention in the manufacturing process of the capacitor electrode will be described in detail. FIG. 3 is a schematic diagram showing a schematic configuration of such an etching system.

  The etching system 10 includes a wet etching apparatus 11 that removes a BPSG film, which is a silicon oxide film, by a chemical wet process, a dry etching apparatus 12 that removes a BPSG film by a gas dry process, and a wafer W between them. A transport mechanism 13 that transports the carrier C in a state of being stored in the carrier C; and a control unit 14 that controls processing in the wet etching apparatus 11, processing in the dry etching apparatus 12, and transport processing in the transport mechanism 13. Yes.

  As the wet etching apparatus 11, for example, an apparatus as shown in FIG. 4 can be used. This apparatus has a processing tank 20 having a box-shaped inner tank 21 and an outer tank 22 that are large enough to accommodate wafers W. From the upper opening of the inner tank 21 by a transfer mechanism 23. The wafer W is put in and out of the inner tank 21. One wafer or two or more wafers W may be used, and the wafer W is loaded into the inner tank 21 while being supported by the support member 24. An etchant supply nozzle 25 is inserted into the inner tank 21, and an etchant supply pipe 26 is connected to the etchant supply nozzle 25. The etchant supply pipe 26 is connected to an etchant supply source 27 that supplies a chemical such as buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF) as an etchant. The etchant supply pipe 26 is provided with an open / close valve 28. The outer tank 22 is mounted so as to surround the opening of the inner tank 21 so as to receive the etching solution overflowed from the upper end of the inner tank 21.

  A drain line 29 is connected to the bottom of the inner tank 21, and an opening / closing valve 30 is provided in the middle of the inner tank 21, and etching in the inner tank 21 is performed via the drain line 29 when the etchant is replaced. The liquid is discharged. Further, a drain line 31 is connected to the bottom of the outer tub 22, and an open / close valve 32 is provided in the drain line 31 so that the chemical liquid in the outer tub 22 is also discharged. Yes.

  The support member 24 can be moved up and down by the transport mechanism 23, and the wafer W is immersed in the etching solution by lowering the support member 24 that supports the wafer W while the etching solution is stored in the inner tank 21. Then, by raising the support member 24, the wafer W can be pulled up from the etching solution.

  Therefore, the wet etching process of the BPSG film of the wafer W proceeds by lowering the support member 24 while the wafer W is supported by the support member 24 and immersing the wafer W in the etching solution.

  The rinsing process and the drying process after the wet etching are performed in another tank (not shown).

  As the wet etching apparatus 11, a single wafer type apparatus as shown in FIG. 5 may be used. This apparatus has a chamber 41, and a spin chuck 42 for adsorbing and holding the wafer W in a horizontal state is provided in the chamber 41. The spin chuck 42 is rotated by a motor 43. A cup 44 is provided in the chamber 41 so as to cover the wafer W held by the spin chuck 42. An exhaust / drain pipe 44 a for exhaust and drainage is provided at the bottom of the cup 44.

  An etching solution supply nozzle 45 is provided above the wafer W held by the spin chuck 42 so as to be movable by a drive mechanism (not shown). An etchant supply pipe 46 is connected to the etchant supply nozzle 45, and an etchant supply source 47 that supplies the above-described chemical liquid as an etchant is connected to the etchant supply pipe 46. . In addition, an opening / closing valve 48 is provided in the etching solution supply pipe 46. The etching solution is supplied to the wafer W while rotating the wafer W by the motor 43, whereby the BPSG film of the wafer W is wet etched.

  On the other hand, a cleaning / drying nozzle 49 is movably provided by a driving mechanism (not shown) so as to be movable above the wafer W. A pipe 50 is connected to the cleaning / drying nozzle 49, and an open / close valve 51 is provided in the pipe 50. Further, a switching valve 52 is provided at the end of the pipe 50, and a pipe 54 extending from the rinse liquid supply source 53 and a pipe 56 extending from the IPA supply source 55 are connected to the switching valve 52. By operating the valve 53, either the rinse liquid or IPA is discharged onto the wafer W from the cleaning / drying nozzle 49 through the pipe 50. Then, the wafer W is rinsed by supplying a rinsing liquid, for example, pure water, to the wafer W through the nozzle 49 while rotating the wafer W by the motor 43, and then the wafer W is supplied with IPA. Dry W.

  Although not shown, the wet etching apparatus 11 has a loading / unloading section on which a carrier containing a plurality of wafers W can be placed, and the carrier shown in FIG. 4 or FIG. It is possible to carry in a wafer.

  As the dry etching apparatus 12, an apparatus as shown in FIG. 6 can be used. This apparatus includes a loading / unloading unit 61 for loading / unloading a wafer W, a load lock chamber 62 provided adjacent to the loading / unloading unit 61, an etching processing unit 63 for performing an actual etching process, and after etching is completed. And a heat treatment section 64 that performs heat treatment.

  The dry etching apparatus 12 includes two load lock chambers 62, an etching processing unit 63, and a heat treatment unit 64. The load lock chamber 62, the heat treatment apparatus unit 64, and the etching processing unit are provided with respect to the loading / unloading unit 61. 63 are arranged in a straight line in this order. A gate valve (not shown) is provided between the loading / unloading unit 61 and the load lock chamber 62, between the load lock chamber 62 and the heat treatment apparatus 64, and between the heat treatment unit 64 and the etching processing unit 63. Thus, the space between these can be opened and closed.

  The loading / unloading unit 61 has a transfer chamber 71 having a transfer mechanism (not shown) capable of transferring the wafer W, and a mounting table 72 is provided on the side of the transfer chamber 71 in the longitudinal direction. The mounting table 72 includes, for example, three carriers C that can store a plurality of wafers W side by side. In addition, an orienter 73 is installed adjacent to the transfer chamber 71 for rotating and aligning the wafer W optically. The transfer mechanism in the transfer chamber 71 can transfer the wafers W one by one between the three carriers C, the orienter 73 and the two load lock chambers 62.

  The load lock chamber 62 has a transfer mechanism (not shown) inside, and is configured to be switchable between an atmospheric state and a vacuum state. Then, the inside is brought into the atmospheric state, the gate valve on the loading / unloading section 61 side is opened, the wafer W is transferred from the carrier C to the transfer mechanism of the load lock chamber 62 by the transfer mechanism of the transfer chamber 71, and The gate valve is closed and evacuated to the same degree of vacuum as the heat treatment section 64, and then the gate valve on the heat treatment section 64 side and the gate valve between the heat treatment section 64 and the etching treatment section 63 are opened and the wafer W is moved by the transfer mechanism. Can be transferred to the etching processing unit 63. Further, the wafer W after the heat treatment by the heat treatment unit 64 is returned by the transfer mechanism, the gate valve on the heat treatment unit 64 side is closed and the inside thereof is brought into the atmospheric state, and then the gate valve on the carry-in / out unit 61 side is opened and the carry-in / out unit is opened. It is possible to transfer the wafer W to 61.

  As shown in FIG. 7, the etching processing unit 63 includes a chamber 80 having a sealed structure that accommodates the wafer W, and a mounting table 81 on which the wafer W is mounted in a horizontal state is provided in the chamber 80. ing. The mounting table 81 is provided with a temperature adjustment mechanism 82 that adjusts the wafer W to a desired temperature. A loading / unloading port (not shown) for loading / unloading the wafer W to / from the heat treatment unit 64 is provided on the side wall of the chamber 80.

The etching processing unit 63 includes an HF gas supply line 85 that supplies hydrogen fluoride (HF) gas as an etching gas into the chamber 80, and an inert gas such as nitrogen (N ₂ ) as a dilution gas in the chamber 80. An N ₂ gas supply line 86 for supplying gas and an exhaust line 87 are connected. The HF gas supply line 85 is connected to an HF gas supply source 90, and the HF supply line 85 is provided with a flow rate adjustment valve 91 that can be opened and closed and the supply flow rate of HF gas can be adjusted. The N ₂ gas supply line 86 is connected to an N ₂ gas supply source 95, and the N ₂ gas supply line 86 is provided with a flow rate adjustment valve 96 that can be opened and closed and the supply flow rate of the N ₂ gas can be adjusted.

The ceiling wall of the chamber 80, the HF gas and N ₂ gas supplied through the HF gas supply line 85 and the N ₂ gas supply line 86, uniformly supplied to the entire surface of the wafer W placed on the table 81 A shower head 97 is provided.

  The exhaust line 87 is provided with a pressure controller 100 and an exhaust pump 101 for performing forced exhaust. By adjusting the pressure controller 100 while operating the exhaust pump 101, the pressure in the chamber 80 can be controlled to a predetermined reduced pressure state.

  As shown in FIG. 8, the heat treatment unit 64 includes a chamber 110 having a sealed structure that accommodates the wafer W, and a mounting table 111 on which the wafer W is mounted in a horizontal state is provided in the chamber 110. Yes. The mounting table 111 is provided with a heater 112 for heating the wafer W to a predetermined temperature. On the side wall of the chamber 110, a loading / unloading port (not shown) for loading / unloading the wafer W to / from the etching processing unit 63 and a loading / unloading port for loading / unloading the wafer W to / from the load lock chamber 62 are provided. (Not shown).

In addition, an N ₂ gas supply line 115 for supplying an inert gas such as N ₂ gas as an atmospheric gas into the chamber 110 and an exhaust line 116 for exhausting the chamber 110 are connected to the heat treatment section 64. The N ₂ gas supply line 115 is connected to an N ₂ gas supply source 120, and the N ₂ gas supply line 115 is provided with a flow rate adjusting valve 121 that can be opened and closed and the supply flow rate of the N ₂ gas can be adjusted.

The ceiling wall of the chamber 110, the N ₂ gas supplied through the N ₂ gas supply line 115, a shower head 122 for uniformly supplied to the entire surface of placed on the stage 111 by the wafer W is provided ing.

  The exhaust line 116 is provided with a pressure controller 125 and an exhaust pump 126 for performing forced exhaust. By adjusting the pressure controller 125 while operating the exhaust pump 126, the pressure in the chamber 110 can be controlled to a predetermined reduced pressure state.

  The control unit 14 includes a process controller 15 having a microprocessor (computer) that actually controls the wet etching apparatus 11, the dry etching apparatus 12, and the transfer mechanism 13 of the etching system 10. Connected to the process controller 15 is a user interface 16 including a keyboard for an operator to input commands and the like for managing the processing system 1 and a display for visualizing and displaying the operating status of the etching system 10. . Further, the process controller 15 executes predetermined processes on each component of the etching system 10 in accordance with a control program and processing conditions for realizing various processes executed by the etching system 1 under the control of the process controller 15. A storage unit 17 in which a control program, i.e., a recipe, various databases, and the like are stored is connected. The recipe is stored in a storage medium in the storage unit 17. The storage medium may be a fixed medium such as a hard disk or a portable medium such as a CDROM, DVD, or flash memory. Moreover, you may make it transmit a recipe suitably from another apparatus via a dedicated line, for example.

  Then, if necessary, an arbitrary recipe is called from the storage unit 17 by an instruction from the user interface 16 and is executed by the process controller 15, so that a desired process in the etching system 10 can be performed under the control of the process controller 15. Processing is performed.

  In the etching system 10 configured as described above, when the capacitor electrode 204 is formed by etching the BPSG film 200 formed on the wafer W as shown in FIG. The carried carrier C is carried into a carry-in / out section (not shown) of the wet etching apparatus 11. Then, the wafers W are taken out one by one, and the BPSG film 200 is wet-etched with a predetermined etching solution in either the apparatus shown in FIG. 4 or FIG.

  In this case, the wet etching is performed until the conductive film 203 serving as the capacitor electrode is exposed to the extent that no leaning occurs as described above. The stop timing of the wet etching is controlled by the process controller 15. That is, the relationship between the processing time and the etching amount is obtained in advance and stored in the storage unit 17 and controlled by the process controller 15 so that the etching is stopped when a time for obtaining a desired etching amount has elapsed.

  After performing the wet etching process in this manner, a rinsing process and a drying process are performed, and the processed wafer W is stored in the carrier C. After the wet etching is completed for the predetermined number of wafers W in this way, the carrier C is transferred to the dry etching apparatus 12 by the transfer mechanism 13.

  In the dry etching apparatus 12, the carrier C is mounted on the mounting table 72 of the loading / unloading unit 61, and one wafer W is taken out from the carrier C by the transfer mechanism in the transfer chamber 71 and transferred into the load lock chamber 62. Is done. When the wafer W is loaded into the load lock chamber 62, the gate valve is closed and the inside thereof is hermetically sealed, and is evacuated to a vacuum state equivalent to the chamber 80 of the etching processing unit 63 and the chamber 110 of the heat processing unit 64. Thus, the gate valve can be opened to communicate with them.

  In this state, the wafer W is first carried into the chamber 80 of the etching processing unit 63. And it mounts on the mounting base 81 in the state which made the device formation surface the upper surface. Thereafter, the gate valve is closed to make the chamber 80 hermetically sealed, and the temperature of the wafer W is adjusted to a predetermined temperature of, for example, 40 ° C. or less by the temperature adjustment mechanism 82. The inside of the chamber 80 is controlled to 400 to 4000 Pa (3 to 30 Torr), for example, by adjusting the exhaust pump 101 and the pressure controller 100.

In this state, HF gas and, if necessary, N ₂ gas as a dilution gas are supplied into the chamber 80. At this time, the supply amount of HF gas is adjusted to 1000 to 3000 mL / min (sccm) by the flow rate adjusting valve 91. In addition, by supplying the N ₂ gas chamber 80 in addition to the HF gas as an etching gas, the heat of the temperature control mechanism 82 in the mounting table 81 is efficiently conducted to the wafer W, and the temperature of the wafer W is accurately controlled. can do. In the case of supplying N ₂ gas, the supply amount is set to 500 to 3000 mL / min (sccm).

When the HF gas is supplied under reduced pressure in this way, the BPSG film 200 removed halfway by wet etching reacts with the HF gas, and etching proceeds. At this time, a fluorosilicic acid-based reaction product is generated as a reaction product. However, as described above, the BPSG film adsorbs moisture, so that the reaction is promoted in the presence of water, and the etching rate is high. Etching proceeds. After such dry etching processing is completed, the flow rate adjustment valve 91 is closed and the supply of HF gas is stopped. At this time, the supply of N ₂ gas is continued, whereby the inside of the chamber 80 is purged with N ₂ gas.

  After the processing by the etching processing unit 63, the reaction product generated by HF is in a state of being easily volatilized due to the presence of moisture and can be volatilized to some extent in the chamber 80, but the reaction product remaining on the etching surface. The wafer W after the etching process is transferred to the heat treatment unit 64 for the purpose of removing. At this time, the gate valve between the chamber 80 and the chamber 110 is opened to communicate with each other, and in this state, the wafer W in the chamber 80 is transferred to the chamber 110 of the heat treatment section 64 by the transfer mechanism in the load lock chamber 62. Transport to.

In the heat treatment unit 64, the wafer W is mounted on the mounting table 111 in the chamber 110 with the device formation surface as the upper surface. Then, the gate valve is closed, the chamber 110 is sealed, and the heat treatment process is started. At this time, the temperature of the wafer W is set to a predetermined temperature of 100 to 400 ° C. by the heater 112. The inside of the chamber 80 is controlled to, for example, 133 to 400 Pa (1 to 3 Torr) by adjusting the exhaust pump 101 and the pressure controller 100. Then, N ₂ gas is supplied into the chamber 110 at a predetermined flow rate. The supply amount of N ₂ gas at this time is adjusted to, for example, 500 to 3000 mL / min (sccm). Thereby, the heat of the heater 112 provided on the mounting table 111 is efficiently transmitted to the wafer W, and the temperature of the wafer W is accurately controlled.

  By performing such heat treatment, the fluorosilicic acid-based reaction product generated during the previous etching treatment is decomposed and vaporized by heating, and is removed from around the conductor film 203. As a result, the BPSG film 200 is completely removed, and a cylindrical capacitor electrode 204 corresponding to each storage node 202 is obtained.

When such heat treatment is completed, the flow rate adjustment valve 121 is closed and the supply of N ₂ gas is stopped. Then, the gate valve between the heat treatment unit 64 and the load lock chamber 62 is opened, and the wafer W is carried into the load lock chamber 62 from the heat treatment unit 64. Then, the gate valve is closed to bring the load lock chamber 62 into a sealed state and the atmospheric pressure is set. Then, the load lock chamber 62 and the loading / unloading section 61 are communicated to store the wafer W in the carrier C of the loading / unloading section 61. To do. When the processing of the predetermined number of wafers W is completed as described above, the carrier C storing the processed wafers W is unloaded from the etching system 10 by the transport mechanism 13.

  In the BPSG film etching process as described above, first, etching is performed at a high speed to the extent that no leaning occurs due to wet etching, and then etching is performed to the end by a dry process with no concern about leaning, so that a practical etching rate is maintained. However, the problem of leaning can be solved.

  Further, in the dry etching apparatus 12, since the plasma-less dry etching is performed using the gas containing HF, a high etching rate can be obtained without causing plasma damage to the base, and a higher etching rate can be obtained. Etching characteristics can be obtained.

The present invention can be variously modified without being limited to the above embodiment. For example, in the above-described embodiment, a case where a BPSG film is used as the silicon oxide film has been described, but another silicon oxide film may be used. As described above, in the case of a BPSG film, etching can be performed at a high speed by reaction with HF gas containing water, but similarly, silicon oxide formed using TEOS having a high water content as a raw material. The film can also be etched at high speed with HF gas. In the case of a thermal oxide film with little moisture adsorption, the reaction product is difficult to vaporize with HF gas alone, but by adding NH ₃ gas to HF gas, ammonium fluorosilicate which is more easily vaporized. ((NH ₄ ) ₂ SiF ₆ ) can be generated, and etching removal becomes easy. The NH ₃ gas may be introduced by the etching processing unit 63 or may be introduced by the heat treatment unit 64.

Further, in the above embodiment, the N ₂ gas as the inert gas used for dilution gas or the like, other inert gas, such as Ar gas, He gas, the use of other inert gas such as Xe gas it can.

  Furthermore, in the above-described embodiment, the case where a plasmaless process using a gas containing HF is used in the dry etching after the wet etching has been described. However, other gas may be used, or plasma is used. Also good.

  The present invention is suitable for manufacturing a capacitor electrode in a semiconductor device manufacturing process.

The flowchart which shows the manufacturing process of the capacitor electrode which concerns on one Embodiment of this invention. Process sectional drawing for demonstrating each process at the time of manufacturing a capacitor electrode. The schematic diagram which shows schematic structure of the etching system at the time of etching the silicon oxide film at the time of manufacturing a capacitor electrode. Sectional drawing which shows an example of the wet etching apparatus mounted in the etching system of FIG. Sectional drawing which shows the other example of the wet etching apparatus mounted in the etching system of FIG. The side view which shows schematic structure of the dry etching apparatus mounted in the etching system of FIG. Sectional drawing which shows the etching process part mounted in the dry etching apparatus of FIG. Sectional drawing which shows the heat processing part mounted in the dry etching apparatus of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10; Etching system 11; Wet etching apparatus 12; Dry etching apparatus 13; Conveying mechanism 14; Control part 15; Process controller 61; Loading / unloading part 62; Load lock chamber 63; Etching process part 64; Mounting table 82; Temperature control mechanism 90; HF gas supply source 200: BPSG film (silicon oxide film)
201; storage node hole 202; storage node 203; conductor film 204; capacitor electrode W; wafer

Claims (22)

Etching the silicon oxide film formed on the substrate to form holes;
Forming a conductive film on the inner surface of the hole;
Removing the silicon oxide film and exposing the conductor film to form a capacitor electrode,
The step of exposing the conductor film by removing the silicon oxide film is performed by removing the silicon oxide film to a height at which a support portion is left to the extent that the conductor film is not leaned by a wet process using a chemical solution. Then, the method for manufacturing a capacitor electrode is characterized in that the conductive film is exposed by removing the remaining support portion of the silicon oxide by a dry process that does not have a risk of leaning using a gas.   2. The method for manufacturing a capacitor electrode according to claim 1, wherein the silicon oxide film contains at least one of B and P. 3. The method of manufacturing a capacitor electrode according to claim 1, wherein the dry process is performed in a plasma-less manner using a gas containing HF and N ₂ gas . 4.   4. The capacitor electrode according to claim 1, wherein the wet process is performed using a processing solution containing a buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF). 5. Manufacturing method. Wherein after the dry process, method of manufacturing a capacitor electrode as claimed in any one of claims 4, characterized by further comprising a step of heating the substrate.   The method of manufacturing a capacitor electrode according to claim 1, wherein the capacitor electrode is a cylinder type.   The method for manufacturing a capacitor electrode according to claim 1, wherein the dry process is performed under reduced pressure. An etching method for etching the silicon oxide film to expose the conductor film after forming a conductor film on an inner wall of a hole formed in the silicon oxide film on the substrate,
The silicon oxide film is removed by a wet process using a chemical solution to a height at which the support portion is left to the extent that no leaning occurs in the conductor film, and then left by a dry process with no fear of leaning using a gas . An etching method, wherein the conductive film is exposed by removing a support portion of silicon oxide.   The etching method according to claim 8, wherein the silicon oxide film contains at least one of B and P. 10. The etching method according to claim 8, wherein the dry process is performed without using plasma containing HF and N ₂ gas . 11.   11. The etching method according to claim 8, wherein the wet process is performed using a processing solution containing a buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF). 11. . Wherein after the dry process, etching process according to any one of claims 11 claim 8, wherein heating the substrate.   The etching method according to any one of claims 8 to 12, wherein a cylindrical capacitor electrode is formed by a conductor remaining after the etching.   The etching method according to claim 8, wherein the dry process is performed under reduced pressure. An etching system for etching the silicon oxide film to expose the conductor film after forming the conductor film on the inner wall of the hole formed in the silicon oxide film on the substrate,
A wet etching apparatus for removing the silicon oxide film by a wet process using a chemical solution;
A dry etching apparatus for removing the silicon oxide film by a dry process using a gas;
After cleaning the silicon oxide film on the conductive film is removed to a height supporting portion at which no remaining by the wet etching apparatus, the silicon oxide mentioned above remained by the dry etching apparatus concerned is not leaning An etching system comprising: a control unit that controls to remove the support unit and expose the conductive film .   The etching system according to claim 15, wherein the silicon oxide film contains at least one of B and P.   17. The etching system according to claim 15, wherein the dry etching apparatus includes a chamber that accommodates the substrate, and a gas supply mechanism that supplies a gas for dry etching into the chamber. 18. The etching system according to claim 15, wherein the dry etching apparatus performs dry etching without plasma using a gas containing HF and N ₂ gas as gases .   19. The etching system according to claim 15, wherein a processing solution containing buffered oxide etchant (BOE) or dilute hydrofluoric acid (DHF) is used as the chemical solution for the wet etching. The etching system according to claim 15, further comprising a heating device that heats the substrate after the dry process.   The etching system according to any one of claims 15 to 20, wherein the dry etching apparatus further includes a pressure reducing mechanism for reducing the pressure in the chamber, and the dry etching process is performed under a reduced pressure.   A computer-readable storage medium that operates on a computer and stores a control program for controlling the etching system, wherein the control program is executed by the etching method according to any one of claims 8 to 14. A computer-readable storage medium that causes a computer to control the etching system.

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