JP5085773B2 - Communication device and detection cycle correction method - Google Patents

Description

  Embodiments described herein relate generally to a communication device and a detection cycle method.

  Recently, a technology related to a standby power minimization technology chip is known. Therefore, by mounting this standby power minimization technology chip (hereinafter referred to as “EcoChip”) on a communication device such as a mobile phone, the communication device can be an access point (hereinafter simply referred to as “AP”) or the like. Wireless signals transmitted from other communication devices can be constantly monitored. That is, by using EcoChip, for example, in order to perform wireless LAN communication between a mobile phone and an AP, the power of the WLAN communication module with high power consumption in the mobile phone is turned off, and EcoChip with low power consumption is used. The signal from the AP can be monitored periodically.

  Here, EcoChip in the mobile phone determines whether or not a waiting signal transmitted from an AP or the like has been detected based only on reception strength (High or Low) on the time axis. For this reason, EcoChip determines the presence or absence of the required detection based on a unique transmission sequence or the periodicity of a signal that is continuously transmitted at a constant period.

JP 2009-89434 A

  EcoChip uses, for example, a reference frequency generated by a crystal oscillator in a circuit as an operation clock for operation. It is also conceivable to use a radio clock as an operation clock for operating EcoChip. However, radio timepieces are difficult to use indoors and especially underground because they are affected by the reception status of radio waves.

  Here, the accuracy of the crystal oscillator depends on temperature (frequency temperature characteristics). In the crystal oscillator, the oscillation frequency may change in the order of several hundred ppm depending on the ambient temperature. For this reason, when a crystal oscillator is used as an operation clock for operating EcoChip, it is necessary to correct the oscillation frequency of the crystal oscillator periodically or event-driven.

  On the other hand, it is also conceivable to mount a crystal oscillator with higher accuracy in the circuit as an operation clock for operating EcoChip. However, it is necessary to secure a new space for a high-precision crystal oscillator. In addition, in the method of correcting the oscillation frequency using a feedback circuit or the like, power consumption in EcoChip increases, and it becomes difficult to realize low power consumption using EcoChip.

  The present invention has been made in view of such a situation, and provides a communication device and a detection cycle correction method capable of correcting a reference frequency with high accuracy while maintaining low power consumption in a circuit. With the goal.

  The communication device of the embodiment operates based on a reference frequency generation unit that generates a reference frequency, a high-accuracy reference frequency generation unit that generates a high-accuracy reference frequency with higher accuracy than the reference frequency, and a high-accuracy reference frequency. A transmission unit that transmits one periodic signal and a second periodic signal that operates based on a reference frequency and that is transmitted from an external device for each first period, for each second period that corresponds to the first period A wireless signal detection unit for detection. Based on the first periodic signal transmitted from the transmission unit, the wireless signal detection unit decreases or increases the second period so that the difference between the first period and the second period is equal to or less than a predetermined value. Perform correction processing.

The system block diagram of the mobile telephone which is an example of the communication apparatus in this embodiment. The circuit block diagram which shows especially the radio | wireless signal detection circuit and radio | wireless communication module of FIG. The figure which shows an example of the temperature vs. frequency tolerance of a reference frequency generation circuit. 6A and 6B illustrate a structure of a register used by a wireless signal detection circuit to detect a wireless signal. The figure which shows notionally the signal pattern obtained for every detection window. The figure explaining the shift | offset | difference of the detection time of the periodic signal in the continuous waking area. The figure which shows the structural example of a register | resistor. The figure which shows the mode of the signal pattern detected by the detection window when a radio signal detection circuit carries out intermittent operation | movement. The figure explaining the addition of a detection window when a window width does not have an error with respect to the period of a periodic signal, and integration processing. The figure explaining the addition and integration | stacking process of a detection window when a window width has an error with respect to the period of a periodic signal. The flowchart explaining the detection window correction | amendment process performed in the mobile telephone in this embodiment. The conceptual diagram at the time of calculating | requiring the difference of the width | variety of a high level area. The conceptual diagram explaining the other detection window correction process. The circuit block diagram as a modification which shows especially a radio signal detection circuit and a radio | wireless communication module.

  An embodiment of a communication device and a detection cycle correction method according to the present invention will be described with reference to the accompanying drawings.

  FIG. 1 is a system configuration diagram of a mobile phone 1 which is an example of a communication device in the present embodiment.

  The mobile phone 1 includes a mobile communication module 11, a WLAN communication module 12, a BT communication module 13, a CPU 15, a memory 16, an input unit 17, a display unit 18, a microphone 19, a speaker 20, a wireless signal detection circuit 23, and a power supply circuit 24. . Each part of the mobile phone 1 is connected by a bus 25.

  The power supply circuit 24 generates a predetermined operating power supply voltage based on the output of the battery and supplies the operating power to each circuit unit. The cellular phone 1 operates based on this operating power supplied from the power supply circuit 24.

  The mobile communication module 11 implements transmission / reception of data such as voice and electronic mail with a base station (not shown). The mobile communication module 11 includes an antenna, and receives from the space a radio signal transmitted from a base station accommodated in the mobile communication network using a predetermined communication processing system. In addition, the mobile communication module 11 radiates a predetermined radio signal to the space via an antenna so that wireless communication can be performed with the base station using a predetermined communication processing system. The mobile communication module 11 performs predetermined processing on the received signal, and then outputs data to the CPU 15 and outputs sound from the speaker 20. Further, the mobile communication module 11 transmits the data output from the CPU 15 and the sound collected from the microphone 19 after performing a predetermined process.

  The WLAN communication module 12 performs wireless LAN communication complying with the communication standards IEEE802.11a and IEEE802.11b through a built-in antenna.

  The Bluetooth (BT, registered trademark) communication module 13 performs wireless communication with other communication devices existing in the vicinity (several meters to several tens of meters) of the mobile phone 1 via an antenna.

  A CPU (central processing unit) 15 generates various control signals and supplies them to each unit to control the mobile phone 1 in an integrated manner. The CPU 15 is a program stored in a ROM (Read Only Memory) as a memory 16 or various application programs including an operating system (OS) loaded from a ROM to a RAM (Random Access Memory) and control programs (firmware, etc.) Various processes are executed according to the above.

  The memory 16 is a storage device such as a ROM, a RAM, a flash memory element, and an HDD (Hard Disc Drive).

  The input unit 17 receives an input via an input means such as an operation key type or a touch panel type, and outputs this input signal to the CPU 15. The display unit 18 outputs data including characters and images based on instructions from the CPU 15. The display unit 18 includes, for example, an LCD (Liquid Crystal Display), an organic EL (ElectroLuminescence) display, or the like.

  The radio signal detection circuit 23 is a circuit for detecting a radio signal subjected to amplitude modulation (on / off keying). The wireless signal detection circuit 23 determines the type of signal based on the pattern and cycle of the power value on the time axis of the wireless signal received from another communication device such as an access point (AP) or a personal computer (PC). Hereinafter, the pattern and cycle of the power value on the time axis of the radio signal received by the radio signal detection circuit 23 are referred to as “specific pattern”.

  When the wireless signal detection circuit 23 determines that the specific pattern is a specific pattern of a standby wireless signal stored in advance as a result of collating the detected specific pattern, the CPU 15 or the WLAN communication module uses the predetermined control signal as an interrupt signal. 12 and output to the BT communication module 13 and the power supply circuit 24.

  The WLAN communication module 12 and the BT communication module 13 have a function of down-converting a received wireless signal and decoding it to obtain data, and a function of transmitting data (encoding, modulation, wireless signal transmission). The operating power is higher than that of the signal detection circuit 23. That is, the wireless signal detection circuit 23 uses the operating power lower than the operating power when the WLAN communication module 12 or the BT communication module 13 monitors the predetermined wireless signal transmitted from the AP or the PC, to detect the predetermined wireless signal. It is a circuit that can be awaited. For this reason, the mobile phone 1 according to the present embodiment suppresses the operating power of the WLAN communication module 12 and the like when the wireless signal detection circuit 23 waits for a wireless signal instead of the WLAN communication module 12 and the BT communication module 13. It has become. When the wireless signal detection circuit 23 detects a predetermined wireless signal, it notifies the WLAN communication module 12 or the like via the CPU 15 or directly. Thereafter, each unit such as the WLAN communication module 12 is activated and performs known connection processing and data communication.

  Each circuit of the wireless signal detection circuit 23 may be configured by applying a conventional technique capable of realizing power saving, including the technique described in the literature shown for each circuit description to be described later. it can. However, the wireless signal detection circuit 23 is not limited to the configuration described in the later-described literature, and at least from the operating power when the WLAN communication module 12 monitors a wireless signal transmitted from another device (such as a PC or AP). Any configuration is possible as long as the wireless signal can be awaited with low operating power.

  Note that the WLAN communication module 12, the BT communication module 13, and the mobile communication module 11 that perform wireless communication with the outside of the mobile phone 1 are not particularly distinguished, or when referring to at least one of the three, simply “wireless communication module” 26 ".

  FIG. 2 is a circuit configuration diagram specifically showing the wireless signal detection circuit 23 and the wireless communication module 26 of FIG.

  The wireless signal detection circuit 23 includes an RF signal reception circuit 31, a down converter (rectifier circuit) 32, a baseband (BB) signal amplification circuit 33, a signal identification circuit 34, and a control signal output circuit 35. Among these, the RF signal receiving circuit 31, the down converter (rectifier circuit) 32, and the baseband (BB) signal amplifying circuit 33 are configured by analog circuits. The signal identification circuit 34 and the control signal output circuit 35 are configured by digital circuits.

  When receiving a radio signal (radio wave) reaching a detection sensitivity sent from a communication device such as an AP or a PC, an RF (Radio Frequency) signal receiving circuit 31 amplifies this signal and outputs it to the down converter 32. The RF signal receiving circuit 31 is a circuit that can be bypassed. When the RF signal receiving circuit 31 is bypassed, the signal received by the monopole antenna 61 is output to the down converter 32 via the lumped constant matching circuit 30.

  The down converter (rectifier circuit) 32 rectifies and detects the RF signal output from the RF signal receiver circuit 31 to obtain a demodulated signal. In order to save power, the down converter (rectifier circuit) 32 does not have a local oscillator. For example, the technology described in Japanese Patent No. 4377946 (demodulator) can be applied to the configuration of the down converter (rectifier circuit) 32.

  The BB signal amplifier circuit 33 amplifies the demodulated signal output from the down converter (rectifier circuit) 32. As for the configuration of the BB signal amplifier circuit 33, for example, a technique described in Japanese Patent Application Laid-Open No. 2009-89434 (trigger signal generator) can be applied.

  The signal identification circuit 34 compares the potential of the signal amplified in the BB signal amplification circuit 33 with the comparison reference potential. Although a plurality of values can be set for the comparison reference potential, it is preferable to set a lower threshold value so that all beacons can be detected. When a signal having a potential higher than the comparison reference potential is detected, the signal identification circuit 34 recognizes a signal having a high level and a signal having a potential lower than the comparison reference potential as a low level, and acquires a signal level. That is, the signal identification circuit 34 acquires a voltage magnitude pattern and period on the time axis, that is, a specific pattern. Further, the signal identification circuit 34 identifies whether or not the obtained signal matches the specific pattern of the waiting radio signal, and outputs the identification result to the control unit 36 as necessary.

  The control signal output circuit 35 generates a control signal for notifying the occurrence of interrupt processing based on the instruction output from the control unit 36, and outputs the generated control signal to the CPU 15 or the like. The control signal output circuit 35 receives the control signal output from the CPU 15 and notifies the control unit 36 of the control signal.

  The control unit 36 controls the signal identification circuit 34 and the control signal output circuit 35. In the present embodiment, detection window correction processing (details will be described later) performed autonomously by the wireless signal detection circuit 23 is performed.

  The storage unit 37 stores information related to a specific pattern of signals that the wireless signal detection circuit 23 waits on behalf of the WLAN communication module 12 or the BT communication module 13. In addition, the storage unit 37 stores data necessary for detection window correction processing, which will be described later, and stores correction data generated for the correction processing.

  The reference frequency generation circuit 41 generates a reference frequency for operating the wireless signal detection circuit 23 and supplies the reference frequency to the oscillation / frequency division circuit 42. The oscillating / dividing circuit 42 divides the supplied reference frequency into a required frequency, and supplies it to the signal identification circuit 34. Each circuit of the wireless signal detection circuit 23, the reference frequency generation circuit 41, and the oscillation / frequency division circuit 42 operate with an operation voltage supplied from the power supply 43.

  The wireless communication module 26 (WLAN communication module 12, BT communication module 13, mobile communication module 11) as a transmission unit operates based on the reference frequency supplied from the high-accuracy reference frequency generation circuit 51. The wireless communication module 26 operates based on operating power supplied from the power supply 52.

  FIG. 3 is a diagram illustrating an example of the temperature versus frequency tolerance of the reference frequency generation circuit.

  FIG. 3 shows changes in the frequency tolerance due to changes in the ambient temperature with the frequency at 25 ° C. as a reference. As shown in FIG. 3, in the general reference frequency generation circuit, the accuracy of crystal oscillation changes with temperature change. For this reason, temperature compensation of the crystal oscillator is essential.

  Here, the high-accuracy reference frequency generation circuit 51 that supplies a reference frequency for the operation of the wireless communication module 26 is a circuit that generates a reference frequency by a crystal oscillator that operates at 1 MHz, for example. The high-accuracy reference frequency generation circuit 51 includes a correction circuit such as a temperature compensation circuit, and is a circuit that has a good frequency temperature characteristic depending on temperature and a large current consumption.

  On the other hand, the reference frequency generation circuit 41 that supplies a reference frequency for the operation of the wireless signal detection circuit 23 is a circuit that generates a reference frequency by a crystal oscillator that vibrates at 32.768 kHz, for example. In addition, the reference frequency generation circuit 41 has a smaller frequency than the high-precision reference frequency generation circuit 51 from the viewpoint of low power consumption, and does not include a correction circuit as accurate as the high-precision reference frequency generation circuit 51 has. . That is, the reference frequency generation circuit 41 operates with lower power consumption than the high-accuracy reference frequency generation circuit 51. On the other hand, since the frequency fluctuates due to a change in ambient temperature, the accuracy is low and error is likely to occur.

  The monopole antenna 61 functions as a reception antenna of the wireless signal detection circuit 23 or a transmission / reception antenna of the wireless communication module 26 according to the state of the antenna changeover switch 62. When the state of the antenna selector switch 62 is the switch states A1 and A2, the monopole antenna 61 functions as a reception antenna of the radio signal detection circuit 23. When the state of the antenna selector switch 62 is the switch state A1, the RF signal receiving circuit 31 is bypassed, and the received signal is supplied to the down converter 32 via the lumped constant matching circuit 30. In the case of the switch state A2, the received signal is supplied to the RF signal receiving circuit 31. When the state of the antenna selector switch 62 is the switch state A3, it functions as a transmission / reception antenna of the wireless communication module 26.

  Note that the wireless communication module 26 whose transmission / reception state is switched depending on the state of the antenna switch 62 may be at least one of the WLAN communication module 12, the BT communication module 13, and the mobile communication module 11.

  In the present embodiment, the wireless signal detection circuit 23 is a signal pattern represented by a signal level for each detection window having a period corresponding to the period of a signal transmitted at a constant period (hereinafter referred to as “periodic signal”). The periodic signal is detected by acquiring. That is, the wireless signal detection circuit 23 can detect a periodic signal by identifying whether or not a substantially equal signal pattern appears for each detection window. The wireless signal detection circuit 23 stores the signal pattern for each detection window in a register.

  FIG. 4 is a diagram for explaining the configuration of a register used by the wireless signal detection circuit 23 to detect a wireless signal.

  The wireless signal detection circuit 23 outputs the signal level identified by the signal identification circuit 34 to the control unit 36 at every predetermined sampling pitch. For example, when detecting a radio signal transmitted in a 102.4 ms cycle such as a beacon signal used during wireless LAN communication, the radio signal detection circuit 23 sets a sampling pitch to 0.2 ms and a sampling point to 512 points. Perform detection. In addition, when receiving the radio signal transmitted with another period, it can respond by adjusting a sampling pitch and the number of sampling points.

  The control unit 36 sequentially stores the identified signal levels in 512 registers (storage unit 37) assigned with numbers 0 to 511. For example, when a signal having a potential higher than the comparison reference potential is detected in the signal identification circuit 34 (when a signal is detected), the control unit 36 is at a high level (1), and when a signal having a low potential is detected ( When the signal is not detected), information indicating a low level (0) is stored. When the register stores the signal level in the 0th to 511th registers, the register stores the signal level from 0th again. When the periodic signal is ideally detected, the information indicating the high level always appears at a certain position of the register. Therefore, the control unit 36 detects the periodic signal by referring to the high level position in the detection window. It can be performed.

  FIG. 5 is a diagram conceptually showing a signal pattern obtained for each detection window.

  FIG. 5A shows an example in which the window width matches the periodic signal. FIG. 5B shows an example in which the window width does not match the periodic signal.

  In the detection window, the time elapses in the direction from the left to the right in the drawing. Hereinafter, the detection time of the signal in the detection window is referred to as a signal detection position. An amount corresponding to the period of one detection window is referred to as “window width”.

  As shown in FIG. 5A, when the window width coincides with the period of the periodic signal transmitted at a period of 102.4 ms, the periodic signal appears at the same position in each window width. That is, the wireless signal detection circuit 23 can correctly detect the periodic signal.

  On the other hand, as shown in FIG. 5B, when the window width shifts with respect to the periodic signal and the window width becomes large (the detection window period becomes large), the window width and the period of the periodic signal do not match. The signal pattern (position where the periodic signal appears) in each detection window does not match. For this reason, there is a possibility that the wireless signal detection circuit 23 cannot detect the periodic signal as a wireless signal transmitted at a constant period.

  Thus, when the frequency changes due to the change in the ambient temperature generated in the reference frequency generation circuit 41, the window width and the period of the periodic signal are shifted. As a result, the wireless signal detection circuit 23 cannot recognize the periodic signal correctly by recognizing the periodic signal as a signal having a burst property such as a data signal or by recognizing it as a different periodic signal.

  Further, the wireless signal detection circuit 23 performs an intermittent operation from the viewpoint of low power consumption. For example, the wireless signal detection circuit 23 performs an intermittent operation of getting up for 1 second every 10 seconds. As described above, since the frequency changes due to the influence of the temperature change, the wireless signal detection circuit 23 may show a significant error in the detection position of the periodic signal for each wake-up section.

  FIG. 6 is a diagram for explaining a shift in the detection time of the periodic signal in the continuous wake-up section.

  FIG. 6A shows the detection position of the periodic signal in the detection window at a certain time T. FIG. FIG. 6B shows the detection position of the periodic signal in the detection window 10 seconds after time T.

  For example, when the reference frequency generation circuit 41 includes a deviation of 100 ppm, the detection time shift of the periodic signal detected after 10 seconds with respect to the reference frequency is 1 ms. When the transmission time (pulse width) of the beacon signal for wireless LAN communication is 0.8 ms (generally 0.8 ms to 1.6 ms), the detection end time of the beacon signal detected at time T and the time T The interval from the detection start time of the beacon signal detected after 10 seconds is 0.2 ms. For this reason, it is highly likely that the beacon signal detected at time T and the beacon signal detected 10 seconds after time T are different signals.

  The cellular phone 1 according to the present embodiment corresponds to the window width when an error occurs in the reference frequency supplied from the reference frequency generation circuit 41, that is, when the window width deviates from the period of the periodic signal. The window width is autonomously corrected by adjusting the number of registers used.

  FIG. 7 is a diagram illustrating a configuration example of a register.

  More registers are prepared than the reference number of 512 registers. (527 in FIG. 5) Therefore, when the reference frequency supplied from the reference frequency generation circuit 41 becomes small, that is, when the window width becomes larger than the period of the periodic signal, the radio signal detection circuit 23 Reduces the number of registers in the window width to less than 512 according to the deviation. Further, when the reference frequency is increased, that is, when the window width is smaller than the period of the periodic signal, the number of registers in the window width is increased from 512 according to the deviation.

  For example, when the reference frequency is accurate, as shown in FIG. 5A, 512 registers from No. 0 to No. 511 are used for detection of periodic signals in one detection window. When the reference frequency becomes small, 510 registers from 0 to 509 are used as shown in FIG. When the reference frequency is increased, 515 registers from No. 0 to No. 514 are used as shown in FIG.

  A detection window correction process performed by adjusting the number of registers to be used will be described below.

  The detection window correction process is performed based on a periodic signal transmitted from a circuit that operates based on a reference frequency supplied from a reference frequency generation circuit with higher accuracy than the reference frequency generation circuit 41.

  Examples of periodic signals that can be used in this correction processing include periodic signals transmitted from the WLAN communication module 12, the BT communication module 13, and the mobile communication module 11 to external devices, or wireless signal detection for correction processing. This is a periodic signal transmitted to the circuit 23. The CPU 15 switches the antenna selector switch 62 during the correction process so that the wireless signal detection circuit 23 does not erroneously detect external noise. For example, the wireless signal detection circuit 23 is not connected to the monopole antenna 61 when the antenna selector switch 62 is in the switch state A3. For this reason, the wireless signal detection circuit 23 detects the leakage current of the periodic signal transmitted from the wireless communication module 26 to the external device or the leakage current transmitted through the substrate inside the mobile phone 1 without erroneously detecting external noise. Thus, the correction process can be performed.

  The correction process is performed using a signal pattern obtained between detection windows detected by the wireless signal detection circuit 23. Specifically, the wireless signal detection circuit 23 is performed using the width (time) and detection position (detection time) of a section (high level section) indicating a high level in the detection window. The width of the high level section is obtained from the number of registers indicating the high level. Hereinafter, an example of a method for acquiring the width of the high level section will be described.

  FIG. 8 is a diagram illustrating a state of a signal pattern detected in the detection window when the wireless signal detection circuit 23 operates intermittently.

  Sections Ta <b> 1 and Ta <b> 2 are wake-up sections in the intermittent operation of the wireless signal detection circuit 23. That is, the wireless signal detection circuit 23 detects a periodic signal in the sections Ta1 and Ta2. A section Tb is a pause section in the intermittent operation of the wireless signal detection circuit 23. That is, the wireless signal detection circuit 23 does not detect a periodic signal in the section Tb.

  As described above, in the wireless signal detection circuit 23, the accuracy of the reference frequency generation circuit 41 includes a deviation with respect to the center frequency due to temperature change. Further, since the radio signal detection circuit 23 receives a periodic signal based on such an intermittent operation, the signal detected in the wakeup section Ta1 and the wakeup section Ta2 after the stop period Tb when this error is not taken into account. May be detected as different periodic signals.

  For example, the wireless signal detection circuit 23 acquires a time control signal from detection results of a predetermined number of detection windows acquired in one wake-up section, that is, a signal pattern. The time control signal is correction data used for detection window correction processing. The time control signal is a signal pattern obtained by adding or integrating the signal pattern of the detection window with respect to the time axis (hereinafter simply referred to as “addition or integration of the detection window”) (the wireless signal detection circuit 23 operates intermittently). If not, the signal pattern is a signal pattern obtained by adding or integrating a predetermined number of detection windows. Specifically, the time control signal indicates a section indicating a high level after addition or integration (hereinafter referred to as “high level section”) and a section indicating a low level (hereinafter referred to as “low level section”). Is. For example, if the number of repetitions of addition is set to 20, the wireless signal detection circuit 23 uses the signal pattern obtained by adding the signal patterns of the 20 detection windows as one time control signal. get. The number of additions and integrations is preferably determined according to an error (accuracy) of the high-precision reference frequency generation circuit 51.

  The interval between the wake-up sections is preferably determined according to the error (accuracy) of the high-precision reference frequency generation circuit 51, that is, the error of the periodic signal. This is because the accuracy of periodic signal detection in the wireless signal detection circuit 23 can be maintained by taking into account errors in the high-precision reference frequency generation circuit 51.

  FIG. 9 is a diagram illustrating detection window addition and integration processing when the window width has no error with respect to the period of the periodic signal.

  FIG. 10 is a diagram illustrating detection window addition and integration processing when the window width has an error with respect to the period of the periodic signal.

  9 and 10 show an example in which the wireless signal detection circuit 23 detects a periodic signal having a period of 102.4 ms.

  The wireless signal detection circuit 23 adds a plurality of detection windows so that they coincide on the time axis. As shown in FIG. 9, when the detection window A1 and the detection window A2 are added, a signal pattern having a width Hi_A12 of the high level section is obtained as shown in the window (A1 + A2). When the detection window A1, the detection window A2, and the detection window A3 are added, a signal pattern having the width Hi_A123 of the high level section is obtained as shown in the window (A1 + A2 + A3). When the window width has no error, the width Hi_A1 of the high level section of the detection window A1, and Hi_A12 and Hi_A123 coincide with each other.

  Further, when the theoretical product of the detection window A1 and the detection window A2 is taken, as shown in the window (A1 × A2), a signal pattern having a width Hi_A12 of the high level section is obtained. When the theoretical product of the detection window A1, the detection window A2, and the detection window A3 is taken, a signal pattern having a width Hi_A123 of a high level section is obtained as shown in the window (A1 × A2 × A3). When the window width has no error, the width ΔHi_A1 of the high level section of the window A1 and Hi_A12 and Hi_A123 coincide with each other.

  On the other hand, as shown in FIG. 10, when the detection window B1 and the detection window B2 are added, a signal pattern having a width Hi_B12 of the high level section is obtained as shown in the window (B1 + B2). When the detection window B1, the detection window B2, and the detection window B3 are added, as shown in the window (B1 + B2 + B3), a signal pattern having the width Hi_B123 of the high level section is obtained. When the window width has an error, the width Hi_B1 of the high level section of the window B1, and Hi_B12 and Hi_B123 have different values. That is, the width of the high level section after the addition gradually increases with each addition.

  Further, when a theoretical product of the detection window B1 and the detection window B2 is taken, a signal pattern having a width Hi_B12 of the high level section is obtained as shown in the window (B1 × B2). Taking the theoretical product of the detection window B1, the detection window B2, and the detection window B3, a signal pattern having a width Hi_B123 (not shown in FIG. 8) of the high level section is obtained as shown in the window (B1 × B2 × B3). It is done. When the window width has an error, the width Hi_B1 of the high level section of the detection window B1, and Hi_B12 and Hi_B123 do not match.

  The time control signal is not limited to adding or integrating a predetermined number of detection windows, and the signal pattern of one detection window may be used as it is as the time control signal.

  The detection window correction process described below is performed by changing the window width Tw by Tstep and determining the window width Tw that minimizes the shift of the window width with respect to the period of the periodic signal.

  FIG. 11 is a flowchart for explaining detection window correction processing executed in the mobile phone 1 according to the present embodiment.

  In the following correction processing, steps executed mainly by the wireless signal detection circuit 23 will be described with the wireless signal detection circuit 23 as a subject. Further, a case where the WLAN communication module 12 is used as the wireless communication module 26 that transmits a periodic signal used for correction processing will be described as an example.

  Further, the correction process is started at a predetermined timing, for example, at the time of initial setting when the WLAN communication module 12 performs wireless LAN communication with another communication device.

  In step S1, the CPU 15 determines whether or not the window width needs to be corrected. The CPU 15 makes a determination based on, for example, information (such as an interval at which correction is performed) related to the timing for performing correction set by the user. If the CPU 15 determines that correction is not necessary (NO in step S1), the CPU 15 proceeds to correction determination step S23.

  When the wireless signal detection circuit 23 determines that the correction of the window width is necessary (YES in step S1), the wireless signal detection circuit 23 initializes each value necessary for the correction stored in the storage unit 37 in step S2. Specifically, the wireless signal detection circuit 23 sets the detection window addition or integration repetition count (hereinafter simply referred to as “addition repetition count”) N to 0 (N = 0). Further, the number n of times of acquisition of the time control signal is set to 1 (n = 1). Further, the wireless signal detection circuit 23 sets the width of the high-level section and the low-level section acquired at the nth time to 0 (Hi_1 = Hi_2 =... = Hi_n = 0, L_1 = L_2 = .. * = L_n = 0). Note that the width of the high-level or low-level section is expressed using the number of registers indicating each level, for example.

  In step S3, the WLAN communication module 12 transmits a periodic signal. The WLAN communication module 12 transmits a periodic signal when receiving an instruction from the CPU 15, for example. In addition, the wireless signal detection circuit 23 stores the periodic signal received from the WLAN communication module 12 in the storage unit 37. At this time, it is preferable that the wireless signal detection circuit 23 does not detect signals other than the periodic signal transmitted from the WLAN communication module 12 by controlling the level of the input power and the threshold value of the signal identification circuit 34.

  In step S4, the wireless signal detection circuit 23 uses an S / N ratio (threshold S / N) as a threshold for determining the reception quality based on the S / N (signal-noise) ratio (reception S / N) of the received periodic signal. N) is determined (reception S / N> threshold S / N). The quality determination step S4 is performed to determine whether or not the window width can be corrected based on a signal having a certain quality. When the wireless signal detection circuit 23 determines that the S / N ratio of the received periodic signal is equal to or less than the S / N ratio as a threshold (NO in step S4), that is, the required reception quality is not obtained. When it determines, it progresses to step S20.

  When the wireless signal detection circuit 23 determines that the S / N ratio of the received periodic signal is larger than the S / N ratio as a threshold (YES in step S4), that is, when a required reception quality is obtained, In step S5, the initial window width Tw0 stored in advance in the storage unit 37 is read, and this initial window width Tw0 is set as the window width Tw used for detecting the periodic signal. The number of registers used by the wireless signal detection circuit 23 for signal detection is determined by the window width Tw0. The initial window width Tw0 is preferably set to a value obtained from the peak value of the temperature vs. frequency allowable deviation inverse square characteristic of the reference frequency generating circuit as shown in FIG. 3, for example. Since the change in the reference frequency is limited to the change in the direction of decreasing, only the correction in the direction of increasing the window width can be considered, and the correction process can be simplified. On the other hand, when the window width Tw0 is set without considering the value obtained from the peak value, two corrections, that is, the direction of increasing the window width and the direction of decreasing the window width are conceivable. For this reason, the correction time is unnecessarily increased and the circuit becomes complicated.

  In step S6, the wireless signal detection circuit 23 measures the width Hi_n of the high level section and the width L_n of the low level section from the signal pattern detected in one detection window. When a high level signal is detected, the wireless signal detection circuit 23 stores information indicating a high level in a register. When a low level is detected, the wireless signal detection circuit 23 stores information indicating the low level in a register. The wireless signal detection circuit 23 measures the width Hi_n of the high level section and the width L_n of the low level section from the information (that is, the signal pattern) indicating the signal level stored in the register.

  In step S7, the radio signal detection circuit 23 determines whether or not the width Hi_n of the high level section is within a range from a preset minimum value Hi_min to a maximum value Hi_max of the high level section (Hi_min). <Hi_n <Hi_max). Further, the wireless signal detection circuit 23 determines whether or not the width L_n of the low level section is within a range from a preset minimum value L_min to maximum value L_max of the low level section (L_min <L_n). <L_max). This step S7 determines whether the width of the high level section and the width of the low level section are within the predetermined range by determining whether the width of the high level section and the width of the low level section measured in the measurement step S6 are within the predetermined range. It is determined whether or not measurement is normal (presence of false detection). If the wireless signal detection circuit 23 determines that the width of the high level section and the width of the low level section are not within the range from the predetermined minimum value to the maximum value (NO in step S7), the process proceeds to step S20. .

  When the wireless signal detection circuit 23 determines that the width of the high level section and the width of the low level section are within the range from the predetermined minimum value to the maximum value (YES in step S7), the wireless signal detection circuit 23 determines that the high level section width is high. The value of the width Hi_n of the level section is overwritten and recorded. In step S9, the wireless signal detection circuit 23 increases the current number of addition repetitions N by 1 (N = N + 1). Note that the wireless signal detection circuit 23 preferably performs the timing of storing in the storage unit 37 at the timing when the CPU 15 is activated. This is because during the activation of the CPU 15, a large amount of power consumption is used on the host side, and the power consumption required for the correction processing by the wireless signal detection circuit 23 can be almost ignored.

  In step S10, the wireless signal detection circuit 23 determines whether or not the current number of addition repetitions N is greater than a preset number of addition repetitions Naccumulate (N ≧ Naccumulate). If the wireless signal detection circuit 23 determines that the current number of addition repetitions N is smaller than the preset number of addition repetitions Accumulate (NO in step S10), the wireless signal detection circuit 23 returns to the signal transmission step S3. That is, the wireless signal detection circuit 23 repeats the signal transmission step S3 to the repetition number determination step S10 until the current addition repetition number N becomes equal to or greater than the addition repetition number Accumulate.

  When the wireless signal detection circuit 23 determines that the current addition repetition number N is equal to or greater than the addition repetition number Naccumulate (YES in step S10), the wireless signal detection circuit 23 is included in the time control signal acquired in the nth detection in step S11. Whether or not the difference between the width Hi_n of the high level section and the width Hi_1 of the high level section included in the control signal acquired in the first detection is equal to or smaller than the predetermined value Hi_threshold (| Hi_n−Hi_1 | ≦ Hi_threshold). Judgment is made. As shown in FIG. 10, since an error occurs in the window width as the reference frequency changes, the error also increases in the width of the high-level section of the time control signal as the time control signal acquisition count n is increased. For this reason, the width Hi_1 of the first high-level section is used as the reference value. Note that the wireless signal detection circuit 23 may use a time control signal acquired other than the first time.

  FIG. 12 is a conceptual diagram when obtaining the difference in the width of the high level section.

  In FIG. 12, an example in which a signal obtained by adding three detection windows in one wake-up section is used as a time control signal will be described.

  Hi_1 is the width of the high-level section of the time control signal obtained by adding the detection windows C1, C2, and C3 in the first rising section Ta1. Hi_n is the width of the high-level section of the time control signal obtained by adding the detection windows D1, D2, and D3 in the n-th rising section Tan. The wireless signal detection circuit 23 obtains a difference between the widths Hi_1 and Hi_n of the high level section. Then, the radio signal detection circuit 23 can obtain | Hi_n-Hi_1 | as shown in the window (CD). The wireless signal detection circuit 23 determines whether or not | Hi_n-Hi_1 | is equal to or less than a predetermined value Hi_threshold.

  When the radio signal detection circuit 23 determines that the difference between the high level section Hi_n and the high level section Hi_1 is larger than the predetermined value Hi_threshold (NO in step S11), the wireless signal detection circuit 23 proceeds to the addition step S14.

  On the other hand, when the radio signal detection circuit 23 determines that the difference between the high level section Hi_n and the high level section Hi_1 is equal to or less than the predetermined value Hi_threshold (YES in step S11), the radio signal detection circuit 23 sets the high number of acquisition times n in step S12. It is determined whether or not the difference between the level interval Hi_n and the first high-level interval Hi_1 that has been acquired is greater than or equal to a predetermined value Hi_diff (| Hi_n−Hi_a | ≧ Hi_diff). The predetermined value Hi_diff is a difference between the high level interval Hi_n−1 of the time control signal acquired at the (n−1) th time and the high level interval Hi_1 of the time control signal acquired at the first time, which is set in step S14 described later. (Hereinafter referred to as “previous difference”). That is, in the previous difference determination step S12, the difference between the width Hi_n of the high level section of the time control signal obtained this time and the width Hi_1 of the high level section is the width Hi_n of the high level section of the previously acquired time control signal. This is a process for determining whether or not the difference between −1 and the width Hi_1 of the high level section is greater than or equal to.

  When the difference between the high-level widths Hi_n and Hi_1 is equal to or greater than the previous difference Hi_diff, the wireless signal detection circuit 23 has a difference between the previous and current window widths and the period of the periodic signal equal to or less than an allowable value (Hi_threshold). This is because it can be determined that the correction of the window width performed at the detection number n-1 is more appropriate.

  Note that there is no previous difference with respect to the width Hi_1 of the high level section of the time control signal acquired for the first time. For this reason, Hi_diff is set to an appropriate value (for example, Hi_diff = 100) as an initial value in advance.

  If the wireless signal detection circuit 23 determines that the difference between Hi_n and Hi_1 is smaller than the previous difference Hi_diff (NO in step S12), the previous difference Hi_diff is set to the difference between the high-level width Hi_n and Hi_1 in step S13. Update (Hi_diff = | Hi_n−Hi_1 |). That is, the wireless signal detection circuit 23 stores the new previous difference Hi_diff in the storage unit 37.

  In step S14, the time control signal acquisition count n is incremented by 1 (n = n + 1).

  In step S15, the radio signal detection circuit 23 adds (or subtracts) a predetermined value Tstep to the current window width Tw (Tw ± Tstep) from the minimum value Tw_min in which the preset window width Tw is allowed to be the maximum. It is determined whether or not the value is within the range up to the value Tw_max (Tw_min ≦ Tw ± Tstep ≦ Tw_max). The predetermined value Tstep is a window width amount (the number of registers, hereinafter referred to as “step width”) to be added or subtracted by a correction for a preset window width. When the wireless signal detection circuit 23 determines that the window width Tw ± Tstep is within the range from the minimum value Tw_min to the maximum value Tw_max (YES in step S15), the step width Tstep is added to the window width Tw in step S16. The (or subtracted) value is set as the window width Tw (Tw = Tw ± Tstep). The wireless signal detection circuit 23 proceeds to the predetermined signal transmission step S3 and repeats the process until it is determined in the previous difference determination step S12 that the optimum window width Tw has been set.

  On the other hand, when the radio signal detection circuit 23 determines that the window width Tw ± Tstep is not within the range from the minimum value Tw_min to the maximum value Tw_max (NO in step S15), the radio signal detection circuit 23 proceeds to the correction determination step S23. That is, the wireless signal detection circuit 23 considers that the correction has failed.

  When it is determined that the difference between Hi_n and Hi_1 is equal to or greater than the previous difference Hi_diff in the previous difference determination step S12 (YES in step S12), the wireless signal detection circuit 23 sets the window width Tw in step S17. Specifically, the wireless signal detection circuit 23 corrects the window width Tw by subtracting (or adding) the step width Tstep from the window width Tw (Tw = Tw ± Tstep). When the window width is added in the previous window width correction step S16, the wireless signal detection circuit 23 subtracts the step width Tstep from the current window width Tw in the window width correction step S17. In addition, when the window width is subtracted in the previous window width setting step S16, the wireless signal detection circuit 23 adds the step width Tstep from the window width Tw. That is, the window width Tw set in the window width setting step S16 in the (n-1) th detection is restored. This is because the window width Tw set in the previous correction (n-1 time) is a more appropriate value.

  In step S <b> 18, the wireless signal detection circuit 23 updates the corrected window width Tw as the initial window width Tw <b> 0, and stores the update of the window width Tw in the storage unit 37. In step S19, the wireless signal detection circuit 23 notifies the CPU 15 that the window width Tw has been corrected. As described above, the window width Tw0 based on the time based on the reference frequency supplied from the current reference frequency generation circuit 41 is determined. The wireless signal detection circuit 23 detects a specific pattern of a signal transmitted from another communication device such as an AP or a PC based on the window width Tw0. Thereafter, the process proceeds to the correction determination step S23.

  The wireless signal detection circuit 23 determines that the predetermined reception quality is smaller than the threshold S / N ratio in the reception quality determination step S4 (NO in step S4), or the width Hi_n of the high level section or the width of the low level section When it is determined that L_n is not within the predetermined range (NO in step S7), in step S20, the reception failure count M indicating the number of times the periodic signal reception has failed is increased by 1 (M = M + 1).

  In step S21, the wireless signal detection circuit 23 determines whether or not the number of reception failures M is greater than a predetermined value Overtime. This step S21 is to prevent the wireless signal detection circuit 23 from trying to receive a periodic signal indefinitely even though the required reception quality cannot be obtained. When the radio signal detection circuit 23 determines that the reception failure count M is equal to or less than the predetermined value Overtime (NO in step S21), the radio signal detection circuit 23 returns to the initial value setting step S2 and repeats the subsequent processing.

  When the radio signal detection circuit 23 determines that the reception failure count M is greater than the predetermined value Overtime (YES in step S21), in step S22, the reception failure count M is set to 0 (M = 0), and a correction determination step. Proceed to S23.

  In step S <b> 23, the CPU 15 determines whether or not the wireless signal detection circuit 23 has detected any interrupt control signal, or whether or not the timing for correcting the window width has come with the passage of a certain time. When the CPU 15 detects the interrupt control signal or determines that the timing for performing the correction has arrived (YES in step S23), the CPU 15 proceeds to the initial value setting step S2.

  On the other hand, when the CPU 15 determines that the interrupt control signal has not been detected and the timing for performing the correction has not arrived (NO in step S23), in step S24, the wireless signal detection circuit 23 determines the initial window width Tw0. Is set as the window width Tw used for signal detection.

  In step S25, the CPU 15 determines whether or not to shift the wireless signal detection circuit 23 to the hibernation state. When it is determined that the activation state of the wireless signal detection circuit 23 is to be maintained (NO in step S25), the CPU 15 returns to the correction determination step S23 and repeats the subsequent processing.

On the other hand, if the CPU 15 determines that the wireless signal detection circuit 23 is to be shifted to the hibernation state (YES in step S25), in step S26, the data necessary for the wireless signal detection circuit 23 to detect the signal is stored in a predetermined nonvolatile manner. Is written to the recording means. This writing step S26 can be omitted when the wireless signal detection circuit 23 has a non-volatile recording means.
This completes the detection window correction process.

  In the detection window correction process of FIG. 11 described above, it is determined whether or not the window width is an appropriate value based on the difference between the widths Hi_n and Hi_1 of the high level section. However, the appropriate value of the window width may be determined using another method described below.

  FIG. 13 is a conceptual diagram illustrating another detection window correction process.

  In this detection window correction processing, the wireless signal detection circuit 23 uses the past time control signal in which the start position is shifted by one sampling pitch with respect to the start position (start time) of the time control signal acquired for the nth time. Find the theoretical product of. The wireless signal detection circuit 23 obtains the shift amount of the past time control signal that has the maximum correlation with the time control signal detected for the nth time. The wireless signal detection circuit 23 can obtain a necessary detection window correction amount (shift amount) from the shift amount.

  For example, the wireless signal detection circuit 23 uses the time control signal obtained in the first wake-up section of the intermittent operation as the past time control signal. Further, the time control signal obtained in the n-th wake-up section is the current time control signal to be subjected to correction processing using the past time control signal.

  For example, as shown in FIG. 13A, the time control signal having the signal pattern shown in the detection window E is obtained at the number n of acquisitions. The wireless signal detection circuit 23 sets the first (past) time control signal having the signal pattern shown in the correction window E1 to the window start position by a predetermined amount ΔT like the correction windows E2, E3, and E4. Slide one by one (equivalent to one sampling pitch). The correction window E1 is a window whose window start time coincides with the start time TE of the detection window E. The correction window E2 is a window in which the start position of the window is slid by a predetermined amount ΔT (ΔT with respect to the detection window E) with respect to the correction window E1. The correction window E3 is a window in which the start position of the window is slid by a predetermined amount ΔT (ΔT × 2 with respect to the detection window E) with respect to the correction window E2. The same applies to the correction detection window E4.

  The wireless signal detection circuit 23 obtains theoretical products of these correction windows E1 to E4 (past time control signals whose start positions have been shifted) and the time control signal of the number of acquisition times n, respectively. The wireless signal detection circuit 23 obtains a correction window that maximizes the correlation among the correction windows E1 to E4. In FIG. 13A, a correction detection window E1 is obtained as a correction window that maximizes the correlation. Since there is no difference between the start position of the detection window E and the start position of the correction window E1, the wireless signal detection circuit 23 can determine that the correction amount is unnecessary (the correction amount is 0).

  Further, as shown in FIG. 13B, a time control signal having a signal pattern shown in the detection window F was obtained at the number of times of acquisition n. The radio signal detection circuit 23 sets the first (past) time control signal having the signal pattern shown in the correction window F1 to the window start position by a predetermined amount ΔT like the correction windows F2, F3, and F4. Slide one by one (equivalent to one sampling pitch). The wireless signal detection circuit 23 obtains theoretical products of these correction windows F1 to F4 (past time control signals) and the nth time control signal. The wireless signal detection circuit 23 obtains a correction window that maximizes the correlation among the correction windows F1 to F4.

  In FIG. 13B, a correction detection window F3 is obtained as a correction window that maximizes the correlation. The wireless signal detection circuit 23 obtains a difference ΔTF between the start position of the detection window F and the start position of the correction window F3, and obtains a correction amount based on this difference. The wireless signal detection circuit 23 can obtain an appropriate start position (deviation width) of the detection window corresponding to the correction amount, and can correct the detection window.

  According to this cellular phone 1, even if the wireless signal detection circuit 23 operates based on the reference frequency supplied from the reference frequency generation circuit 41 that has low power consumption but does not have sufficient accuracy, it is more highly The detection cycle can be corrected using a periodic signal generated based on an accurate reference frequency. As a result, the mobile phone 1 can suppress the power consumption of the wireless signal detection circuit 23 to a low level and can detect the received signal with high accuracy.

  In addition, since the wireless signal detection circuit 23 can perform correction based on a signal passing through its own circuit, the correction is performed in consideration of various factors that contribute to a shift in the detection cycle such as ambient temperature and circuit characteristics. It can be performed. As a result, the wireless signal detection circuit 23 can easily perform accurate correction.

  In addition, when the internal wireless communication module 26 is used for the correction process, the wireless signal detection circuit 23 is less susceptible to disturbance in the reception of the periodic signal and can use a known signal. The detection cycle can be corrected.

  In addition, since the mobile phone 1 starts correction processing based on the control of the CPU 15, the wireless signal detection circuit 23 and the wireless communication module 26 are transmitting periodic signals for correction, or communicating with other devices. It is possible to easily distinguish whether it is transmission of a periodic signal for establishing

  In the present embodiment, the example in which the wireless communication module 26 and the wireless signal detection circuit 23 share the monopole antenna 61 according to the state of the antenna changeover switch 62 has been described. However, the wireless communication module 26 and the wireless signal detection circuit 23 may be configured to have individual antennas.

  FIG. 14 is a circuit configuration diagram as a modified example that particularly shows the wireless signal detection circuit 23 and the wireless communication module 26.

  The circuit configuration of FIG. 14 is different from that of FIG. 2 in that a dipole antenna 81 dedicated to the radio signal detection circuit 23 is provided and a monopole antenna 61 dedicated to the radio communication module 26 is provided. The wireless signal detection circuit 23 is connected to a signal line that connects the wireless communication module 26 and the monopole antenna 82. For this reason, the wireless signal detection circuit 23 can receive the periodic signal transmitted from the wireless communication module 26 via the impedance 83. In addition, since the radio signal detection circuit 23 includes the dipole antenna 81, the RF reception circuit is omitted.

  The wireless signal detection circuit 23 can directly receive the periodic signal transmitted from the wireless communication module 26 when the correction switch 84 is turned on. The radio signal detection circuit 23 can also receive a signal transmitted from the radio communication module 26 via the monopole antenna 82 from the dipole antenna 81.

  In the present embodiment, the correction is performed by controlling the window width and the start position. However, it is not limited to this method. When a resonance filter such as an IIR (Infinite Impulse Response) filter is used, correction can be performed by switching the frequency division ratio.

  Moreover, CPU15 determined the necessity of the timing which correct | amends in step S1 or step S23. Not limited to this, the wireless signal detection circuit 23 determines the timing for performing correction processing (timing for storing the periodic signal) based on the SSID (Service Set Identifier) included in the beacon signal received by the WLAN communication module 12 from the AP or the like. You may perform after performing the collation of a connection possibility. By using the timing at which the WLAN communication module 12 is activated, the CPU 15 does not need to activate the WLAN communication module 12 for correction processing, and is effective in that it can reduce power consumption required for activation. It is.

  In addition, due to the shift of the detection cycle due to the deviation of the reference frequency with respect to the center frequency, the wireless signal detection circuit 23 detects the specific pattern related to the wrong signal as the specific pattern related to the beacon signal transmitted from the AP or the like, There is a possibility of notifying the WLAN communication module 12. As a result, the WLAN communication module 12 tries to connect to the AP or the like, but fails. That is, when the WLAN communication module 12 fails in the wireless LAN communication connection, there is a possibility that the window width of the wireless signal detection circuit 23 is shifted. Therefore, the WLAN communication module 12 transmits a periodic signal for correction processing based on an instruction from the CPU 15 or the like when the wireless LAN communication connection fails, and the wireless signal detection circuit 23 performs correction processing at this timing. Is desirable.

  Furthermore, in the present embodiment, the wireless signal detection circuit 23 acquires the time control signal using the wireless signal transmitted from the wireless communication module 26. However, the wireless signal detection circuit 23 may acquire the time control signal using a periodic signal transmitted from an external device. At this time, in order to obtain a more accurate time control signal, the wireless signal detection circuit 23 transmits a periodic signal transmitted from an external device whose period signal is known (for example, the beacon signal transmission period is known by SSID information). Is preferably used.

  Furthermore, the example in which the wireless signal detection circuit 23 generates the time control signal using the periodic signal transmitted from the WLAN communication module 12, the BT communication module 13, and the mobile communication module 11 has been described. However, when the wireless signal detection circuit 23 includes an infrared communication module or a non-contact IC card module, a periodic signal transmitted from these modules may be used.

  In the present embodiment, the example in which the wireless signal detection circuit 23 performs an intermittent operation has been described. However, the wireless signal detection circuit 23 may always wake up.

1 Mobile phone 11 Mobile communication module 12 WLAN communication module 13 BT communication module 15 CPU
16 memory 23 wireless signal detection circuit 24 power supply circuit 26 wireless communication module 31 RF signal receiving circuit 32 down converter (rectifier circuit)
33 Baseband (BB) signal amplification circuit 34 Signal identification circuit 35 Control signal output circuit 36 Control unit 37 Storage unit 41 Reference frequency generation circuit 42 Oscillation / frequency division circuit 51 High-precision reference frequency generation circuit 61 Monopole antenna

Claims (10)

A reference frequency generator for generating a reference frequency;
A high-precision reference frequency generator that generates a high-precision reference frequency with higher accuracy than the reference frequency;
A transmitter that operates based on the high-precision reference frequency and transmits a first periodic signal;
A radio signal detector that operates based on the reference frequency and detects a second periodic signal transmitted from an external device every first period, every second period corresponding to the first period; ,
The wireless signal detection unit is configured to control the second period so that a deviation between the first period and the second period is equal to or less than a predetermined value based on the first period signal transmitted from the transmission unit. A communication device characterized by performing correction processing for reducing or increasing the period. The communication device according to claim 1, wherein the wireless signal detection unit detects the second periodic signal with an operating power lower than an operating power when the transmission unit waits for the second periodic signal. An antenna for the wireless signal detector to receive the second periodic signal transmitted from the external device;
The communication apparatus according to claim 1, further comprising an antenna switching unit that cancels connection between the antenna and the wireless signal detection unit when performing the correction process. A first antenna for the transmission unit to transmit the first periodic signal to the outside of the communication device;
A second antenna for the wireless signal detector to receive the second periodic signal transmitted from the external device;
The wireless signal detection unit receives the first periodic signal transmitted from the first antenna by the second antenna, and performs the correction processing based on the received first periodic signal. Item 3. A communication device according to item 1 or 2. The communication device according to claim 1, further comprising a connection switching unit that directly connects the transmission unit and the wireless signal detection unit when performing the correction process. The radio signal detection unit outputs a time control signal having a signal pattern indicated by a signal level including a high level indicating detection of the first periodic signal and a low level indicating non-detection of the first periodic signal. When the plurality of time control signals are generated based on the time and detection time of the high level section of the time control signal generated every second period, the difference in the high level section is less than or equal to a predetermined value. The communication device according to any one of claims 1 to 5, wherein the second period is made smaller or larger so as to become. The wireless signal detection unit is a predetermined number for each second period indicated by a signal level including a high level indicating detection of the first periodic signal and a low level indicating non-detection of the first periodic signal. Is generated with respect to the time axis, or a time control signal having a signal pattern obtained by obtaining a theoretical product is generated, and based on the time of the high level section of the time control signal and the detection time 6. The communication device according to claim 1, wherein the second period is reduced or increased so that a difference between the high level sections is equal to or less than a predetermined value when a plurality of the time control signals are compared. . The radio signal detection unit outputs a time control signal having a signal pattern indicated by a signal level including a high level indicating detection of the first periodic signal and a low level indicating non-detection of the first periodic signal. The theoretical product of the time control signal generated every second period and the acquired time control signal with the past time control signal whose start time is shifted by a predetermined sampling pitch is obtained, and the correlation is maximum. The communication device according to any one of claims 1 to 5, wherein a shift amount is calculated, and the correction process of the second period with respect to the first period is performed from the shift amount. The communication device according to claim 1, wherein the transmission unit is at least one wireless communication module including a wireless LAN communication module, a Bluetooth communication module, and a mobile communication module. A reference frequency generation unit that generates a reference frequency, a high-accuracy reference frequency generation unit that generates a high-accuracy reference frequency with higher accuracy than the reference frequency, an operation based on the high-accuracy reference frequency, and a first periodic signal A transmitting unit that operates based on the reference frequency and wireless that detects a second periodic signal transmitted from an external device every first period, every second period corresponding to the first period Preparing a signal detector;
Based on the first periodic signal transmitted from the transmitting unit, the wireless signal detecting unit is configured so that a deviation between the first period and the second period is a predetermined value or less. And a step of performing a correction process for reducing or increasing the period.

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