JP5058752B2 - Filter circuit and television tuner circuit using the same - Google Patents

Description

  The present invention relates to a filter circuit for filtering an input signal and a television tuner circuit using the same, and more particularly to a filter circuit including an inductor, a capacitor, and a transistor, and a television tuner circuit using the same.

  A filter circuit including an inductor, a capacitor, and a transistor is likely to have higher performance (lower distortion and lower noise) than an active filter (gm-C filter or RC-OPAMP filter) that does not use an inductor. For example, Patent Document 1 (“Frequency Discrete LC Filter Bank”, United States Patent 7, 102, 465, Sept. 5, 2006) and Non-Patent Document 1 introduce examples of filter circuits.

FIG. 12 shows an example of the configuration of Patent Document 1. The filter circuit of Figure 12 91, a transformer TRANS which is connected to the terminal RF input signal is input, an LC tank made up of programmable inductor L1 and the capacitor C1 Prefecture, fixed inductor _{L C} and programmable inductor L2 And a programmable capacitor C2, a variable gain amplifier circuit AGC that connects both LC tanks, and a high-impedance buffer circuit BUFFER that is connected to the subsequent LC tank. This LC filter is a bandpass filter, and the center frequency of the bandpass filter can be changed by setting L1, C1, L2, and C2 to desired values.

  FIG. 13 shows an example of the filter circuit disclosed in Patent Document 2. In the filter circuit 91a shown in FIG. 13, RLC tanks 84a and 84b each having two transconductances GM1 and GM2 for converting an input voltage signal into a current signal, an inductor L1, a capacitor C1, and a resistor Rs are connected in series. The structure is provided. One terminal (a terminal having a low impedance in the handled signal frequency region) of each RLC tank component is connected to an AC ground, and the other terminal is connected to a voltage output terminal.

  An example of ideal frequency characteristics of the filter circuit 91a is shown in FIG. An enlarged view of the vicinity of the center frequency of the frequency characteristic is shown in FIG. This frequency characteristic is expressed by the following formulas 1 to 4.

Here, it is assumed that the resistance Rs, the inductor L1, and the capacitor C1 of each of the RLC tanks 84a and 84b are equal and are given by R, L, and C, respectively. Also,
ωc = 2 ・ π ・ 130MHz
It was. Q is a quality factor (Q) of one stage of the RLC filter. In order to set the center frequency of the bandpass filter to a desired value (130 MHz in this case), the values of the inductor and capacitor of the RLC tank are determined. With respect to the determined inductor and capacitor values, the value of the resistor is determined from (Equation 4) in order to set the Q value of the bandpass filter to a desired value. Here, the inductor L1 and the capacitor C1 constituting the RLC tanks 84a and 84b have parasitic resistance components, and there are also parasitic resistances between the output terminals of the transconductances GM1 and GM2 and the AC ground. In order to correct the effect of the parasitic resistance, the resistance of the RLC tank may be constituted by a negative resistance element.
US Pat. No. 7,102,465 Xin He, et al. "A 2.5-GHz Low-Power, High Dynamic Range, Self-Tuned Q-Enhanced LC Filter in SOI", IEEE Journal of Solid-State Circuits, Vol. 40, no. 8, Aug. 2005.

  The filter circuit 91 of FIG. 12 is used as a tracking filter of a wireless receiver that requires a wide tuning range such as a TV (television) tuner. However, in the filter circuit 91 of FIG. 12, a bandpass filter is realized only by a combination of the values of the inductor L and the capacitor C without using a resistor. For this reason, the resistance component of the LC tank is realized by a parasitic resistance component, and the gain and Q value of the bandpass filter vary greatly. Moreover, if the Q value becomes too large, the gain fluctuation in the band becomes large, which may degrade the signal quality. At this time, high tuning accuracy is required for the center frequency of the bandpass filter. In a radio receiver that receives such a wide band, triple harmonic mixing is one of the major issues.

  In order to avoid this triple harmonic mixing, the filters shown in FIGS. 12 and 13 are often used. 14A and 14B show the frequency selection characteristics when the Q value of the filter circuit 91a shown in FIG. 13 is 2.7 (curve C91) and 5.0 (curve C92), respectively, as a solid line and a broken line. Is shown. Furthermore, the filter specification when the third harmonic mixing is improved by 40 dB is indicated by a dotted line (curve C93) in FIG. In order to satisfy this specification, the Q value needs to be about 5, but when the Q value is increased, as shown in FIG. 14B, the frequency selectivity within the desired band varies by 1 dB or more. Occurs. Further, when the Q value of the filter is high, the Q values required for the capacitors and inductors that are each element constituting the filter also increase, leading to performance degradation and cost increase.

  An object of the present invention is to provide a filter circuit capable of setting a filter Q value to a desired value over a wide frequency range and maintaining a stable gain in a desired band, and a television tuner circuit using the same. There is.

  The filter circuit according to the present invention includes a variable transconductance for converting an input voltage signal into a current signal, and an RLC tank coupled to a subsequent stage of the variable transconductance. The RLC tank includes a variable capacitor, a variable resistor, and an inductor. A frequency tuning circuit that sets a capacitance value of the variable capacitor in inverse proportion to a square of a center frequency or a cutoff frequency indicating a frequency characteristic of the filter circuit, and a resistance of the variable resistor A gain tuning circuit that sets a value inversely proportional to the transconductance value of the variable transconductance, and the transconductance value of the variable transconductance is set to a value that depends on the center frequency or the cutoff frequency. This The features.

  According to this feature, since the capacitance value and the resistance value of the RLC tank are controlled by the frequency tuning circuit and the gain tuning circuit, respectively, and the transconductance value can be set from the outside, the inductor is made variable. Therefore, a filter circuit having a wide frequency tuning range can be realized. Further, the Q value of the filter can be set to a desired value over a wide frequency range. Further, the gain within the desired band can be kept stable over a wide frequency range.

  In the filter circuit according to the present invention, it is preferable that the gain tuning circuit sets a resistance value that compensates for a Q value deterioration due to a parasitic resistance generated in the RLC tank to the variable resistance.

  According to the above configuration, the variable resistor is set smaller than the desired value and the loss due to the parasitic resistance of the RLC tank is compensated. Therefore, even when the RLC tank has a parasitic resistance, a filter having a desired Q value is realized. can do.

  In the filter circuit according to the present invention, it is preferable that the variable resistor is constituted by a negative resistance element.

  According to the above configuration, when the loss of the RLC tank is too large and the loss cannot be compensated for by a variable resistor having a positive value, the desired Q value is set by setting the negative resistance element to a negative resistance value. It is possible to realize a filter having the same.

  In the filter circuit according to the present invention, the filter characteristic of the filter circuit is preferably a bandpass type or a lowpass type.

  According to the above configuration, bandpass and lowpass frequency characteristics can be obtained.

  In the filter circuit according to the present invention, it is preferable that at least one of the transconductance value of the variable transconductance, the capacitance value of the variable capacitor, and the resistance value of the variable resistor is programmable by a digital signal. .

  According to the above configuration, each variable element can be set by a digital signal, and a robust and simple filter circuit can be realized.

  In the filter circuit according to the present invention, it is preferable that the entire filter circuit or a part of the circuit is configured as an oscillator during the setting operation of the frequency tuning circuit and the gain tuning circuit.

  According to the above configuration, since an oscillator using a part of the filter element is tuned, it is possible to perform tuning with high accuracy. In addition, the tuning circuit is simplified.

  In the filter circuit according to the present invention, it is preferable that the inductor is a variable inductor having a variable inductance value, and includes a plurality of inductor elements and a plurality of switches, and the switches are transistors or diodes.

  According to the above configuration, since the inductance value can be changed, a filter circuit having a wider frequency tuning range can be realized.

  In the filter circuit according to the present invention, it is preferable that the variable transconductance, the variable capacitor, and the variable resistor are realized as an integrated circuit, and the inductor is configured by an off-chip component.

  According to the above configuration, since the complex elements constituting the filter circuit can be integrated, a low-cost and compact filter circuit can be realized. In addition, since an inductor with small loss and parasitic capacitance can be used, a filter circuit having a high Q and a wide frequency tuning range can be realized.

  In the filter circuit according to the present invention, it is preferable that the transconductance value of the variable transconductance is set so as to monotonously decrease as the center frequency or the cut-off frequency increases.

  According to the above configuration, since it is not necessary to set the transconductance value in inverse proportion to fc, it is easy to set the transconductance value.

  Another filter circuit according to the present invention includes a transconductance for converting an input voltage signal into a current signal, and an RLC tank coupled to a subsequent stage of the transconductance. The RLC tank includes a first capacitor and an inductor. The transconductance includes a cascode transistor, and a second capacitor disposed between a source of the cascode transistor and a ground.

  Due to this feature, the filter circuit of the present invention can improve frequency selection characteristics at high frequencies without increasing the Q value of the filter.

  Still another filter circuit according to the present invention includes a differential transconductance for converting a differential input voltage signal into a differential current signal, and a differential RLC tank coupled to a subsequent stage of the differential transconductance, The differential RLC tank is a differential filter circuit having a pair of first capacitors and a pair of inductors corresponding to the positive phase signal and the negative phase signal of the differential input voltage signal, The transconductance has a pair of cascode transistors corresponding to the positive phase signal and the negative phase signal of the differential input voltage signal, and a second capacitor disposed between the source and the ground of each cascode transistor. It is characterized by that.

  With this feature, the filter circuit of the present invention can handle differential input / output signals, and can realize a filter circuit that is resistant to disturbance noise.

  Still another filter circuit according to the present invention includes a differential transconductance for converting a differential input voltage signal into a differential current signal, and a differential RLC tank coupled to a subsequent stage of the differential transconductance, The differential RLC tank is a differential filter circuit having a pair of first capacitors and a pair of inductors corresponding to the positive phase signal and the negative phase signal of the differential input voltage signal, The transconductance has a pair of cascode transistors corresponding to the positive phase signal and the negative phase signal of the differential input voltage signal, and a second capacitor disposed between the sources of the pair of cascode transistors. It is characterized by.

  With this feature, the filter circuit of the present invention can handle differential input / output signals, and can realize a filter circuit that is resistant to disturbance noise. Furthermore, since only one second capacitor is required, the circuit area can be reduced.

  In another or further filter circuit according to the present invention, a frequency tuning circuit that sets a capacitance value of the first capacitor in inverse proportion to a square of a center frequency or a cut-off frequency indicating a frequency characteristic of the filter circuit. Preferably, the transconductance further includes a switch provided between the second capacitor and the ground, and the switch is cut off while the frequency tuning circuit is performing a tuning operation.

  According to the above configuration, the low-pass filtering effect of the second capacitor and the cascode transistor can be turned off during execution of the filter tuning operation, thereby enabling more accurate frequency / gain tuning.

  In another or further filter circuit according to the present invention, a frequency tuning circuit that sets a capacitance value of the first capacitor in inverse proportion to a square of a center frequency or a cut-off frequency indicating a frequency characteristic of the filter circuit. Preferably, the capacitance value of the second capacitor is controlled according to a signal from the frequency tuning circuit that sets the capacitance value of the first capacitor.

  According to the above configuration, since the cutoff frequency of the low-pass filter including the second capacitor and the cascode transistor is also controlled according to the center frequency or cutoff frequency of the filter circuit, a stable frequency selection characteristic is obtained in the frequency tuning range. be able to.

  The television tuner circuit according to the present invention is a television tuner circuit including a high-frequency amplifier circuit and a high-frequency mixer, and further includes a filter circuit according to the present invention arranged in a stage preceding the high-frequency mixer. .

  According to this feature, by using the filter circuit according to the present invention, mixing of the out-of-band signal into the desired band (LO harmonic mixing interference) by mixing the harmonics of the local signal of the mixer and the out-of-band signal. Since it can reduce, the passive filter arrange | positioned in the front | former stage of TV tuner can be simplified. Alternatively, since the LO harmonic mixing interference can be reduced, even if a stronger interference wave exists near the harmonic frequency of the local signal, the television signal can be received without degrading the desired signal. In addition, since signals of other channels outside the band can be attenuated, the linearity and frequency selectivity of the circuits after the filter circuit can be relaxed.

  As described above, the filter circuit according to the present invention sets the capacitance value of the variable capacitor in inverse proportion to the square of the center frequency or the cut-off frequency indicating the frequency characteristics of the filter circuit, A gain tuning circuit that sets a resistance value of the variable resistor in inverse proportion to a transconductance value of the variable transconductance, wherein the transconductance value of the variable transconductance depends on the center frequency or the cut-off frequency. Therefore, the Q value of the filter can be set to a desired value over a wide frequency range, and the gain in the desired band can be kept stable.

  In another filter circuit according to the present invention, the transconductance includes a cascode transistor and a second capacitor disposed between the source and the ground of the cascode transistor, so that the Q value of the filter is not increased. The frequency selection characteristics at high frequencies can be improved.

  In still another filter circuit according to the present invention, the differential transconductance has a pair of cascode transistors corresponding to a positive phase signal and a negative phase signal of the differential input voltage signal, and a source and a ground of each cascode transistor. Since the second capacitor is disposed between each of them, a differential input / output signal can be handled, and a filter circuit resistant to disturbance noise can be realized.

  In still another filter circuit according to the present invention, the differential transconductance includes a pair of cascode transistors corresponding to a positive phase signal and a negative phase signal of the differential input voltage signal, and the pair of cascode transistors. Since it has the 2nd capacitor arrange | positioned between sources, a differential input / output signal can be handled and the filter circuit strong against disturbance noise is realizable. Furthermore, since only one second capacitor is required, the circuit area can be reduced.

  Since the television tuner circuit according to the present invention further includes the filter circuit according to the present invention disposed in front of the high frequency mixer, the passive filter disposed in the front of the television tuner can be simplified.

  An embodiment of the present invention will be described below with reference to FIGS.

First Embodiment Bandpass Type FIG. 1 shows a configuration of a filter circuit 1 according to a first embodiment. The filter circuit 1 includes an RLC filter 14a and an RLC filter 14b connected in series. The RLC filter 14a includes a variable transconductance gm1 that converts an input voltage signal into a current signal, and an RLC tank 3a that is coupled to a subsequent stage of the variable transconductance gm1. The RLC tank 3a has a variable capacitor C1, a variable resistor R1, and an inductor L1 coupled in parallel to each other. The RLC filter 14b has a variable transconductance gm2 that converts an input voltage signal into a current signal, and an RLC tank 3b that is coupled to the subsequent stage of the variable transconductance gm2. The RLC tank 3b has a variable capacitor C2, a variable resistor R2, and an inductor L2 coupled in parallel to each other.

  The filter circuit 1 includes a gain tuning circuit 8 for tuning programmable resistors (variable resistors R1 and R2) constituting the RLC tanks 3a and 3b, and a frequency for tuning programmable capacitors (variable capacitors C1 and C2). A tuning circuit 7 is provided.

  Further, when the filter circuit 1 is tuned, the input terminal of the RLC filter 14b is connected to the output terminal of the RLC filter 14b through the inverting gain stage 16a, and the RLC filter 14b is configured as a DCO (Digitally Controlled Oscillator). Toggle switch 15a is provided.

  The frequency tuning circuit 7 includes a frequency divider 17 for frequency-dividing the output of the RLC filter 14b operating as a DCO, a counter 18 for counting the rising edges of the frequency-divided signal for a certain time, and a counter value And a comparator 19 for calculating and quantizing the difference between the filter and the external digital signal for setting the filter frequency, and an up / down counter 20 controlled by the output value of the comparator 19.

  On the other hand, the gain tuning circuit 8 includes a peak detector 21 for keeping the oscillation amplitude of the RLC filter 14b operating as a DCO constant, and two comparators 22a and 22b for comparing the output with two predetermined voltages. And an up / down counter 23 controlled by output values of the comparators 22a and 22b.

  The frequency tuning circuit 7 and the gain tuning circuit 8 are described in (Document 1) H.264. Huang, “Design of Low-Voltage CMOS Continuous-Time Filter with On-Chip Automatic Tuning”, IEEE Journal of Solid-State Circuits, vol. 36, no. 8, pp. 1168-1177, Aug. 2001. (2) F Behbahani, “A Broad-Band Tunable CMOS Channel-Select Filter for a Low-IF Wireless Receiver”, IEEE Journal of Solid-City. 35, no. 4, pp. 476-489, April. 2000. Therefore, detailed description is omitted.

  Each of the RLC filters 14a and 14b includes inductors L1 and L2 having fixed inductance values, variable resistors R1 and R2 whose values can be changed by digital signals, variable capacitors C1 and C2, and variable transconductances gm1 and gm2. The values of these elements are the same for the RLC filter 14a and the RLC filter 14b (for the sake of simplicity).

  The tuning of the filter circuit 1 is executed by the RLC filter 14b and the tuning circuits 7 and 8. The output of the tuning circuits 7 and 8 is not only the RLC filter 14b (variable resistor R2, variable capacitor C2) but also the RLC filter. 14a (variable resistor R1, variable capacitor C1) is also controlled. In the filter circuit 1, the inductors L1 and L2 constituting the RLC filters 14a and 14b are often required to have a high Q value. On the other hand, the variable resistors R1 and R2, the variable capacitors C1 and C2, and the variable transconductors gm1 and gm2 are preferably integrated so as to be finely variable. Further, since the frequency tuning circuit 7 and the gain tuning circuit 8 are configured using complex digital circuits, it is preferable to integrate them.

  Hereinafter, a tuning method of the variable resistors R1 and R2 and the variable capacitors C1 and C2 constituting the RLC filters 14a and 14b and a setting method of the variable transconductors gm1 and gm2 will be described in detail.

  From the equation (2) described above in the background art, the value of the variable capacitor C2 is controlled as shown in the following (equation 5) with respect to the desired center frequency ωc = 2 · π · fc of the filter circuit 1.

  That is, the values C1 and C2 of the variable capacitor are controlled by the frequency tuning circuit 7 in inverse proportion to the square of the center frequency ωc of the bandpass filter. Specifically, the frequency tuning circuit 7 controls the value of the variable capacitor C2 through the feedback loop so that the oscillation frequency of the DCO configured in the RLC filter 14b becomes a desired value. Relationships can be determined automatically.

  The variable resistor R2 is controlled so that the gain of the filter circuit 1 becomes 0 dB. Specifically, the gain tuning circuit 8 controls the amplitude of the DCO configured by the RLC filter 14b so that the variable transconductance gm2 does not saturate and has an amplitude value at which the DCO oscillates stably. At this time, the value of the variable resistor R2 of the RLC filter 14b converges to the value represented by the following (formula 6) (provided that the variable inductor L2, the variable capacitor C2, and the variable transconductance gm2 have ideal characteristics). Is).

  On the other hand, the transconductance value of the variable transconductance gm2 is expressed by (Expression 4) and (Expression 6):

  That is, unlike the variable capacitor C2 and the variable resistor R2, the variable transconductance gm2 is set not from the tuning circuits 7 and 8 but from the outside in inverse proportion to the frequency (fc) of the reception channel (that is, the variable transconductance). gm2 is not controlled by the tuning circuits 7 and 8). As can be seen from (Expression 7), since the variable transconductance gm2 is determined by the Q value of the filter, each Q value of the RLC filters 14a and 14b can be set by the value of the variable transconductance gm2. Further, for example, even when there is a loss due to metal wiring resistance, ON resistance of the changeover switch of the variable capacitor C2, output impedance of the variable transconductance gm2, etc., the value of the variable transconductance gm2 is set from the outside as described above. On the other hand, since the value of the variable resistor R2 is set by the gain tuning circuit 8, the impedance at the fc of the RLC tank 3b converges to 1 / gm2 by the gain tuning.

  That is, as in the first embodiment, by setting the variable transconductance gm2 from the outside and setting the variable resistor R2 by the gain tuning circuit 8, it is possible to compensate for the deterioration of the filter Q value due to the parasitic resistance described above. It is. Conversely, when the value of the variable resistor R2 is set from an external signal and the value of the variable transconductance gm2 is set by the gain tuning circuit 8, it is not possible to compensate for the deterioration of the Q value due to the parasitic resistance described above (gain is 0 dB). This is because the Q value deteriorates due to the loss due to the parasitic resistance). Here, the value of the variable resistor R2 is assumed to be a positive value. However, as shown in Document 2, the variable resistor R2 may be configured by a negative resistance element using an active circuit, or a normal variable value. A combination of a resistor and a negative resistance element may be used.

  Setting the variable transconductance gm1 · gm2 in inverse proportion to fc complicates the calculation of the set value. Therefore, if the frequency variable range is not large, the variable transconductance gm1 decreases monotonously with increasing fc. (Gm1 = −a · fc + b, a and b are appropriate constants). In addition, when it is desired to change the Q value according to fc, it may not be inversely proportional to fc.

  Here, the gain in the signal band of the bandpass filter (frequency band near fc) is set to 0 dB. However, if a gain other than 0 dB is desired, a gain of −α dB is separately provided in the feedback loop of the DCO. An amplifier circuit having the above may be arranged. Here, αdB is a desired gain within the signal band of the RLC filter 14b. Alternatively, while the gain tuning circuit 8 is operating, the value of the variable transconductance gm2 is set to be −α dB smaller than the set value at the time of normal filter operation (when the RLC filter 14b is used as a filter). Also good. Alternatively, an α dB attenuator may be added to the variable transconductance gm2.

  As described above, the variable resistor R2 and the variable capacitor C2 of the RLC filter 14b are controlled using the tuning circuits 7 and 8, and the variable transconductance gm2 of the RLC filter 14b is set by an external digital signal, so that a wide frequency tuning can be performed. A filter having a range can be obtained.

  FIG. 2 shows frequency selection characteristics (measured values) of the filter circuit 1 for two different fc = 380 MHz and 1.06 GHz. Curve C1 corresponds to fc = 380 MHz and curve C2 corresponds to fc = 1.06 GHz. As shown in FIG. 2, a filter characteristic with a substantially constant Q value and a substantially constant gain can be obtained. The frequency selection characteristic of the curve C3 corresponding to fc = 125 MHz is a frequency selection characteristic when the values of L1 and L2 are switched using a variable inductor shown in FIG.

  By adopting the filter circuit of the present embodiment, a fixed inductor can be used, so that a variable inductor composed of a plurality of inductor elements and switches is not necessary. When an off-chip inductor is used as the fixed inductor, the PCB substrate can be reduced in area and cost can be reduced. Further, when the fixed inductor is integrated, the number of inductors can be reduced, so that the chip area can be reduced and the cost can be reduced.

  In the present embodiment, the RLC filter 14b is configured as a DCO and the gain (Q value) and frequency are tuned. However, the present invention is not limited to this. Other well-known tuning methods may be used. The essence of the present invention is not in the frequency and gain (Q value) tuning circuits 7 and 8 themselves. In a filter circuit using a fixed inductor, there is an essence in how to set the dependency relationship between the values of variable resistors, variable capacitors and variable transconductors which are programmable elements and the fc of the bandpass filter.

  Although the filter circuit 1 of FIG. 1 shows a single-ended configuration with one input (input terminal) and one output (output terminal), the present invention is not limited to this. The filter circuit 1 may be configured by a fully differential circuit in which an input signal and an output signal are represented by two signals of a normal phase and a reverse phase, respectively. Details of each element constituting the RLC filters 14a and 14b will be described below, but in the following, it is assumed that the filter circuit 1 is a full differential circuit.

A configuration example of the variable transconductances gm1 and gm2 used in the RLC filters 14a and 14b is shown in FIG. The variable transconductances gm1 and gm2 shown in FIG. 3 have a configuration in which a plurality of transconductance stages gm [i] weighted by 2 to the power of i are connected in parallel (i is a positive integer). The variable transconductances gm1 and gm2 have differential inputs VINP and VINM and differential outputs vp and vn. Each transconductance stage gm [i] connected in parallel has two transistors M1 for converting a differential input signal into a differential current output, and inputs the differential output current, and outputs a differential output current. It consists of two cascode transistors M2. Each of the transconductance stages gm [i] connected in parallel can be controlled on / off by controlling the gate voltage of the cascode transistor M2 with a binary digital signal. As described above, a transconductance stage controlled by a digital signal can be easily configured. The number of bits of the digital control signal dgm is 6 bits, and the transconductance controlled by dgm [i] (transconductance of the transistor M1) is
2 ⁱ · gm _U · dgm [i]
Then, the transconductance from the input terminal VINP (VINM) in FIG. 3 to one of the differential output terminals vn (vp) to which the RLC tanks 3a and 3b are connected is expressed by the following (Equation 8).

  Here, dgm [i] takes a value of 0 or 1.

Next, a configuration method of the variable capacitors C1 and C2 is shown in FIG. The variable capacitor C1 and the variable capacitor C2 have the same configuration. The variable capacitor shown in FIG. 4 has an RLC tank differential terminal vp and a differential terminal vn, and has a configuration in which a plurality of switched capacitors cap [i] weighted by 2 to the power of i are connected in parallel. (I is a positive integer). Each switched capacitor cap [i] includes two capacitors C11 and C12 each having one terminal connected to the differential terminals vp and vn, and a transistor connected between the other terminals of the two capacitors C11 and C12. A switch M1dm, two transistor switches M1cm connected between the other terminals of the two capacitors C11 and C12 and GND, and two transistor switches connected between the other terminal of the two capacitors and VDD, respectively. And M2. Here, the signal dcap [i] is supplied to the gate terminals of the transistor switch M1dm and the transistor switch M1cm, and a signal obtained by inverting the signal dcap [i] is supplied to the transistor switch M2. When the signal dcap [i] becomes 1 (voltage equal to VDD), the other terminals of the two capacitors C11 and C12 are short-circuited to each other and connected to the GND, so that the differential terminal vp (vn) Capacitance 2 ^{i + 1} · Cu is generated between GND. For example, when the signal dcap is a 10-bit signal, the capacitance value between the differential terminal vp (vn) and GND of the capacitor in FIG. 4 is expressed by the following (Equation 9).

  Here, the signal dcap [i] has a value of 0 or 1. The transistor switch M2 pulls up the other terminal of the two capacitors C11 and C12 to a certain voltage value (VDD−Vth) when the signal dcap [i] becomes GND, and the junction of the transistor switch M1dm and the transistor switch M1cm This is to reduce the parasitic capacitance, and is arranged to increase the variable range of the capacitor by reducing the parasitic capacitance. Here, Vth is a threshold voltage of the transistor switch M2. Regarding the configuration of the capacitor in FIG. B. Kuhn, et al. "Q-enhanced LC bandpass filters for integrated wireless applications" IEEE Trans. Microwave Theory Tech. , Vol. 46, no. 12, pp. 2577-2586, Dec. 1998. The detailed description will be omitted.

  Next, the configuration of the variable resistors R1 and R2 is shown in FIG. The resistors R1 and R2 shown in FIG. 5 are composed of a plurality of switch resistors weighted by 2 to the power of i. Each switched resistor includes a resistor having one terminal connected to the differential terminals vp and vn of the RLC tank, and a P-channel transistor switch connected between the other terminal of the resistor and VDD. With this configuration, it is possible to realize a variable resistor that can be controlled by 8 bits between vp (vn) and the power supply VDD (AC ground).

  In the above example, in order to simplify the configuration, the variable transconductances gm1 and gm2, the variable capacitors C1 and C2, and the variable resistors R1 and R2 are all controlled by digital signals. However, the present invention is not limited to this. You may make it the structure controlled by an analog signal. It is considered that those skilled in the art can easily realize the variable transconductances gm1 and gm2, the variable capacitors C1 and C2, and the variable resistors R1 and R2 controlled by such analog signals. In addition, in order to control by analog signals, it is necessary to arrange a DA converter between the frequency tuning circuit 7, the gain tuning circuit 8 and the filter, or to realize the tuning circuits 7 and 8 using analog circuits. However, the engineer can easily realize the tuning circuit having such a configuration based on a plurality of conventional techniques.

  In the above-described configuration, an example in which a bandpass type is assumed as the filter characteristic is shown, but the present invention is not limited to this. The present invention can be similarly applied to other filter characteristics such as a low-pass type and a high-pass type.

  In the RLC filters 14a and 14b described above, the inductors L1 and L2 having fixed inductances are assumed, but the present invention is not limited to this. The inductors L1 and L2 may be variably configured using a plurality of inductor elements and diodes as shown in FIG.

  By adopting this configuration, the inductance value can be made variable, and a filter capable of frequency tuning over a wider range can be realized. When the terminal band select signal is set to low (0), reverse bias is applied to the two diodes D1 and D2, and the diodes D1 and D2 are cut off AC (alternating current). At this time, the inductance between the terminal vp and the terminal vn is 2 × (LL1 + LL2). On the other hand, when the terminal band select signal is set to high (1), the two diodes D1 and D2 are forward-biased, so that the diodes D1 and D2 are electrically connected. Therefore, the inductance between the terminal vp and the terminal vn is 2 × (LL1). An inductor with variable inductance can be realized as described above. Here, the off-chip inductors LL1 and LL2 and the diodes D1 and D2 are assumed as the respective constituent elements, but the present invention is not limited to this. A transistor switch may be used instead of the diodes D1 and D2. When BAND1 is set when the terminal band select signal is set to low (0), and BAND2 is set when high (1) is set, BAND2 (curve C1 and curve C2) shown in FIG. In addition to the frequency selection characteristic fc = 380 MHz and 1.06 Ghz, the frequency selection characteristic fc = 125 MHz of BAND1 (curve C3) can be obtained. The frequency selection characteristic fc = 125 MHz of BAND1 is an actual measurement value.

(Embodiment 2) Bandpass type (bandpass type) gmLPF
The second embodiment of the present invention will be described with reference to FIGS. FIG. 7 shows the configuration of the filter circuit 1a according to the second embodiment. The filter circuit 1a includes an RLC filter 14c and an RLC filter 14d connected in series. Each of the RLC filters 14c and 14d includes inductors L1 and L2, variable resistors R1 and R2, variable capacitors C1 and C2, and variable transconductances gmLPF1 and gmLPF2 equipped with a low-pass function. Since the tuning method and the control method of the variable resistors R1 and R2, the variable capacitors C1 and C2, and the variable transconductances gmLPF1 and gmLPF2 are the same as those in the first embodiment, detailed description thereof is omitted.

  Although the filter circuit 1a of FIG. 7 has shown the example of the single end structure of 1 input (input terminal) and 1 output (output terminal), this invention is not limited to this. The filter circuit 1a may be configured by a fully differential circuit in which an input signal and an output signal are each represented by two signals of a normal phase and a reverse phase.

  The essence of the present invention resides in the variable transconductances gmLPF1 and gmLPF2 arranged to obtain a steep frequency selection characteristic without setting the Q value of the filter high. Although the variable resistors R1 and R2, the variable capacitors C1 and C2, and the variable transconductances gmLPF1 and gmLPF2 are variable, the present invention is not limited to this. It may be a fixed configuration that cannot be made variable.

FIG. 8A shows a configuration example of the variable transconductances gmLPF1 and gmLPF2 (assuming a configuration of a full differential circuit). The variable transconductances gmLPF1 and gmLPF2 have the same configuration. The variable transconductance shown in FIG. 8A has a configuration in which a plurality of transconductance stages gm [i] weighted to 2 to the power of i are connected in parallel (i is a positive integer). The variable transconductance has a differential input VINP / VINM and a differential output vp / vn. Each transconductance stage gm [i] connected in parallel has two transistors M1 for converting a differential input signal into a differential current output, and inputs the differential output current, and outputs a differential output current. Two cascode transistors M2 and two transistor switches M3 for cutting off / conducting the source terminal of the transistor M1 and GND are provided. When dgm [i] = 0, no current flows through the cascode transistor M2 and the transistor M1. On the other hand, when dgm [i] = 1, a desired current flows through the cascode transistor M2 and the transistor M1, and the transconductances of the transistor M1 and the cascode transistor M2 are respectively
2 ⁱ · gmIN · dgm [i],
2 ⁱ · gmCAS · dgm [i],
It becomes.

  When the number of bits of the digital control signal dgm is 6 bits, the transconductance gmIN of the transistor M1 obtained by adding up a plurality of transconductance stages gm [i] connected in parallel and the transconductance gmCAS of the cascode transistor M2 are respectively (Equation 10) and (Equation 11).

The variable transconductance gmLPF1 · gmLPF2 in FIG. 8 (a), further comprises two variable capacitors _{C LPF,} the said variable capacitor _{C LPF} and two transistor switches M4 connected in series, the variable capacitor _{C LPF} Is arranged between the source terminal of the cascode transistor M2 and GND. By using this configuration, the transconductance from the input terminal VINP (VINM) to the output terminal vn (vp) is expressed by the following (Equation 12) (assuming that the transistor switch M4 is conductive).

  Further, the 3 dB cutoff frequency of the low-pass filter that can be realized by the transconductance stage gm [i] in FIG. 8A is expressed by the following (Equation 13).

Here, the variable capacitor C _LPF can be easily realized by using a variable capacitor C1 or C2 as shown in FIG. 9, the case of providing a variable capacitor _{C LPF} (dolpf = high) and when the absence is _{C LFP} using (dolpf = low) of the transconductance stage (8) constitutes a filter circuit 1a shown in FIG. 7 This shows the frequency selection characteristics (ideal characteristics). A curve C4 is a frequency selection characteristic of the filter circuit provided with the variable capacitor C _LPF , and a curve C5 is a frequency selection characteristic of the filter circuit not provided with the variable capacitor C _LPF . Here, the center frequency fc = 130 MHz. As can be seen from FIG. 9, by using the transconductance stage gm [i] with a low-pass function provided with the variable capacitor C _LPF shown in FIG. 8A, the attenuation can be increased at a high frequency and the Q value can be increased. A steep filter characteristic can be obtained without this. Further, the frequency characteristics of the RLC filters 14c and 14d shown in FIG. 7 at this time are expressed by the following (Expression 14) to (Expression 17).

  Here, it is assumed that the values of the elements constituting the RLC filter 14c and the RLC filter 14d are the same. Here, the circuit configuration is shown by taking MOSFET as an example of the transistor, but the present invention is not limited to this. Other transistors such as a bipolar type may be used.

In order to obtain a large attenuation characteristic at a high frequency as shown by the curve C4 in FIG. 9 over a wide center frequency fc, the 3 dB cutoff frequency of the low-pass filter shown in (Equation 13) is changed in proportion to the center frequency fc of the filter. It is necessary to let When gmCAS is changed in inverse proportion to fc, similarly to gmIN _SUM , the capacitance value of C _LPF needs to be changed in inverse proportion to the square of fc, similarly to the capacitance values of C1 and C2. Therefore, the capacitance value of the C _LPF can be controlled using the signal for controlling the capacitance values of C1 and C2, and the control signal wiring and the like can be simplified. However, since the capacitance value of C _{LPF and} the capacitance values of C1 and C2 are not exactly the same and are merely in a proportional relationship, the size of the unit capacitor constituting C _LPF is the same as that of unit capacitors constituting C1 and C1. Must be set to a different value.

Although FIG. 8A shows an example in which two variable capacitors C _LPF are connected between the source terminal and the GND terminal of the cascode transistor M2, the present invention is not limited to this. As shown in FIG. 8B, one variable capacitor _CLPF may be connected between the source terminals of the two cascode transistors M2.

  When the filter circuit 1a is operated as a normal filter, the function of the low-pass filter is realized in the variable transconductances gmLPF1 and gmLPF2 as shown in (Equation 12) by conducting the transistor switch M4 shown in FIG. However, when the filter is tuned as shown in the first embodiment, the phase changes between the input terminal and the output terminal of the variable transconductances gmLPF1 and gmLPF2, as can be seen from (Equation 12). . Due to this phase change, the oscillation frequency when the RLC filter 14d is configured as a DCO deviates from the center frequency of the bandpass filter of the RLC filter 14d. In order to eliminate this influence, it is preferable to shut off the transistor switch M4 during the tuning operation of the filter circuit 1a. By controlling the transistor switch M4 in this way, more accurate frequency tuning can be realized.

(Embodiment 3) Lowpass type (low-pass type)
The third embodiment of the present invention will be described with reference to FIG. FIG. 10 shows the configuration of the filter circuit 1c according to the third embodiment. The filter circuit 1c includes an RLC filter 14e, a gain tuning circuit 8 for tuning the programmable (variable) resistors R1 and R2 provided in the RLC filter 14e, and a programmable (variable) capacitor C1 and the like provided in the RLC filter 14e. A frequency tuning circuit 7 for tuning C2.

  The RLC filter 14e selects either the variable transconductance Gm1 for converting the input voltage signal into a current signal, the input signal input to the filter circuit 1c, or the output signal from the gain stage 16c, and the variable transconductance Gm1. Toggle switch 15c to be supplied to, two variable resistors R1 and R2, two variable capacitors C1 and C2, and an inductor L1.

  When filtering and outputting the input signal, the toggle switch 15c selects the input terminal input of the filter circuit 1c, and selects the output signal output side (output signal from the gain stage 16c) during the tuning operation of the filter circuit 1c. To do. By using the configuration of the RLC filter 14e, it is possible to obtain characteristics other than the bandpass type shown in the first embodiment, in this case, a lowpass type characteristic.

  The essence of the present invention is to determine the dependency relationship between the transconductor values of the variable resistors R1 and R2, the variable capacitors C1 and C2, and the variable transconductance Gm1, which are the programmable elements, and the cut-off frequency fc of the low-pass filter. It is in the point of how to set. This dependency relationship is the same as the dependency relationship shown in the first embodiment. That is, the values C1 and C2 of the variable capacitor are set by the frequency tuning circuit 7 in inverse proportion to the square of the cutoff frequency of the low-pass filter. The variable resistor values R1 and R2 are set so that the gain of the filter circuit is 0 dB. On the other hand, the value of the transconductor of the variable transconductance Gm1 is set not from the tuning circuits 7 and 8, but from the outside of the filter circuit 1c in inverse proportion to the cutoff frequency (fc) (Gm1 is the tuning circuits 7 and 8). Not set). However, setting Gm1 inversely proportional to fc complicates the calculation of the set value. Therefore, when the frequency variable range is not large, the setting is such that Gm1 decreases monotonously with an increase in the cutoff frequency fc. (Gm1 = −a · fc + b, a and b are appropriate constants). With the above control method, a frequency selection characteristic having a stable Q value and gain can be obtained, and at the same time, a filter circuit having a wide frequency tuning range can be realized.

  As described above, according to the first to third embodiments, it is possible to realize a filter circuit having a frequency selection characteristic having a wide frequency tuning range and stable Q value and gain. Furthermore, according to the first to third embodiments, it is possible to realize a filter circuit having a steeper frequency selection characteristic at a high frequency without increasing the Q value.

  FIG. 11 is a circuit diagram showing a configuration of a television tuner circuit 31 including the filter circuit 1 according to any one of the first to third embodiments. The TV tuner circuit 31 includes a high-frequency amplifier circuit (RF-VGA) 32, a filter circuit 1 having an RLC tank, a mixer circuit (mixer) 34 that performs frequency conversion, and a PLL circuit that generates a local signal to the mixer circuit 34. 33, an IF filter 35 for attenuating a signal other than the desired band from the output signal from the mixer circuit 34, and an IF amplification circuit 36 for amplifying the output from the IF filter 35 and outputting the amplified signal to the television demodulation circuit 37. .

  In this configuration, a Gilbert mixer is normally used as the mixer circuit 34. However, in such a mixer, local odd harmonic mixing occurs, so that a signal outside the desired signal band in the mixer input signal is mixed in the desired signal band. There is a risk of it. In order to avoid this, the filter circuit 1 for attenuating a signal outside the desired signal band is required before the mixer circuit 34. Further, since the band of the TV tuner is as wide as about 45 MHz to 900 MHz, the filter circuit 1, 1a, or 1c according to any of Embodiments 1 to 3 is suitable for the filter circuit having the RLC tank. By using the filter circuit according to the first to third embodiments for a television tuner circuit, it is possible to realize a television tuner in which the influence of local odd harmonic mixing is reduced over the entire band of the television.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The present invention can be applied to a filter circuit that filters an input signal, and in particular, can be applied to a filter circuit including an inductor, a capacitor, and a transistor, and a television tuner circuit using the filter circuit.

FIG. 3 is a circuit diagram illustrating a configuration of a filter circuit according to the first embodiment. It is a graph which shows the frequency characteristic of the said filter circuit. It is a circuit diagram which shows the structure of the variable transconductance provided in the said filter circuit. It is a circuit diagram which shows the structure of the variable capacitor provided in the said filter circuit. It is a circuit diagram which shows the structure of the variable resistance provided in the said filter circuit. It is a circuit diagram which shows the structure of the inductor provided in the said filter circuit. 6 is a circuit diagram illustrating a configuration of a filter circuit according to a second embodiment. FIG. (A) and (b) are circuit diagrams which show the structure of the differential transconductance provided in the said filter circuit. It is a graph which shows the frequency characteristic of the said filter circuit. FIG. 6 is a circuit diagram illustrating a configuration of a filter circuit according to a third embodiment. It is a circuit diagram which shows the structure of the television tuner circuit provided with the filter circuit which concerns on Embodiment 1-3. It is a circuit diagram which shows the structure of the conventional filter circuit. It is a circuit diagram which shows the structure of the other conventional filter circuit. (A) (b) is a graph which shows the frequency characteristic of the said filter circuit.

Explanation of symbols

1, 1a, 1c Filter circuit 3a, 3b RLC tank 7 Frequency tuning circuit 8 Gain tuning circuit 15a, 15c Toggle switch 16a Inversion gain stage 16c Gain stage gm1, gm2 Variable transconductance gmLPF1, gmLPF2 Variable transconductance (differential transconductance)
Gm1 Variable transconductance 3a-3e RLC tank L1, L2 Inductor C1, C2 Variable capacitor R1, R2 Variable resistance M1, M3 Transistor M2 Cascode transistor M4 Transistor switch C _LPF variable capacitor (second capacitor)

Claims (15)

A variable transconductance that converts an input voltage signal into a current signal;
An RLC tank coupled to a subsequent stage of the variable transconductance,
The RLC tank is a filter circuit having a variable capacitor, a variable resistor, and an inductor,
A frequency tuning circuit that sets a capacitance value of the variable capacitor in inverse proportion to a square of a center frequency or a cutoff frequency indicating a frequency characteristic of the filter circuit;
A gain tuning circuit that sets a resistance value of the variable resistor in inverse proportion to a transconductance value of the variable transconductance;
The filter circuit according to claim 1, wherein the transconductance value of the variable transconductance is set to a value depending on the center frequency or the cut-off frequency.   The filter circuit according to claim 1, wherein the gain tuning circuit sets a resistance value that compensates for a Q value deterioration due to a parasitic resistance generated in the RLC tank to the variable resistance.   The filter circuit according to claim 1, wherein the variable resistor includes a negative resistance element.   The filter circuit according to claim 1, wherein a filter characteristic of the filter circuit is a bandpass type or a lowpass type.   The filter circuit according to claim 1, wherein at least one of a transconductance value of the variable transconductance, a capacitance value of the variable capacitor, and a resistance value of the variable resistor is programmable by a digital signal.   2. The filter circuit according to claim 1, wherein the whole or a part of the filter circuit is configured as an oscillator during the setting operation of the frequency tuning circuit and the gain tuning circuit.   The filter circuit according to claim 1, wherein the inductor is a variable inductor having a variable inductance value, and includes a plurality of inductor elements and a plurality of switches, and the switches are transistors or diodes.   The filter circuit according to claim 1, wherein the variable transconductance, the variable capacitor, and the variable resistor are realized as an integrated circuit, and the inductor is configured by an off-chip component.   The filter circuit according to claim 1, wherein a transconductance value of the variable transconductance is set so as to monotonously decrease as the center frequency or the cutoff frequency increases. Transconductance for converting an input voltage signal into a current signal;
An RLC tank coupled to a subsequent stage of the transconductance,
The RLC tank is a filter circuit having a first capacitor and an inductor,
The transconductance includes a cascode transistor, and a second capacitor disposed between a source of the cascode transistor and a ground. Differential transconductance for converting a differential input voltage signal into a differential current signal;
A differential RLC tank coupled downstream of the differential transconductance;
The differential RLC tank is a differential filter circuit having a pair of first capacitors and a pair of inductors corresponding to a positive phase signal and a negative phase signal of the differential input voltage signal,
The differential transconductance includes a pair of cascode transistors corresponding to a positive phase signal and a negative phase signal of the differential input voltage signal, and a second capacitor disposed between the source and ground of each cascode transistor. And a filter circuit. Differential transconductance for converting a differential input voltage signal into a differential current signal;
A differential RLC tank coupled downstream of the differential transconductance;
The differential RLC tank is a differential filter circuit having a pair of first capacitors and a pair of inductors corresponding to a positive phase signal and a negative phase signal of the differential input voltage signal,
The differential transconductance includes a pair of cascode transistors corresponding to a positive phase signal and a negative phase signal of the differential input voltage signal, and a second capacitor disposed between the sources of the pair of cascode transistors. A filter circuit comprising: A frequency tuning circuit that sets a capacitance value of the first capacitor in inverse proportion to a square of a center frequency or a cutoff frequency indicating a frequency characteristic of the filter circuit;
The transconductance further includes a switch provided between the second capacitor and the ground,
The filter circuit according to claim 10 or 11, wherein the switch is cut off while the frequency tuning circuit is performing a tuning operation. A frequency tuning circuit that sets a capacitance value of the first capacitor in inverse proportion to a square of a center frequency or a cutoff frequency indicating a frequency characteristic of the filter circuit;
The filter circuit according to claim 10, 11 or 12, wherein a capacitance value of the second capacitor is controlled in accordance with a signal from the frequency tuning circuit that sets a capacitance value of the first capacitor. A television tuner circuit including a high-frequency amplifier circuit and a high-frequency mixer,
A television tuner circuit, further comprising the filter circuit according to any one of claims 1 to 14, which is disposed upstream of the high-frequency mixer.

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