JP5042766B2 - Control device and memory initialization method for control device - Google Patents

Description

  The present invention relates to a control device that controls an actuator from a sensor or an external state via a network, and more particularly to a control device having a RAM with an error correction function of a microcomputer built in the control device.

  In the automobile engine control device, the fuel amount and the injection timing are controlled based on an input such as a crank angle sensor signal. As engine control becomes more sophisticated, advanced control is required based on much information, and the number of inputs and outputs is increasing.

  In recent years, a control device for controlling an engine has a built-in microcomputer, but a built-in RAM with an error correction function is mounted to improve the reliability of the memory.

  The error correction function (ECC) error correction code (RAM) requires information for error correction, and requires initialization for ECC after power-on.

  Therefore, if the memory is used in a state where the memory is not ECC initialized, such as immediately after the power is turned on, it is determined as an ECC error. As a means for avoiding this erroneous determination, a mechanism that does not determine an error from the hardware aspect. (See Patent Documents 1 and 2). These means include a flag mechanism that indicates whether or not ECC initialization is performed.

JP 2005-63547 A Japanese Patent Laid-Open No. 11-328045

  In Patent Documents 1 and 2, an ECC initialization mechanism is provided. However, in the case of a memory without an ECC initialization mechanism, it is necessary to perform ECC initialization by software.

  The ECC error check is initialized by writing and checked by reading. In the case of an engine control device in an automobile control device, the microcomputer operation starts when the ignition switch is turned on, and the memory is initialized at that time, but since the state when the previous ignition switch was turned on is stored in the memory, every time When the ignition switch is turned on and initialization is performed by writing appropriate data for ECC initialization, the stored value is overwritten.

  In addition, when the ignition switch is turned on for the first time after the battery is connected, the memory is not initialized. Therefore, if the data is read out, an ECC error occurs. If the ECC initialization completed determination is entered using the ECC initialization completed information, an ECC error will occur if this determination is performed when ECC is not initialized.

  The present invention is configured as follows to solve the above-described problems.

  ECC error interrupt processing for storing ECC error information or the like when an ECC error occurs, ECC error invalid interrupt processing for ignoring the ECC error even if an ECC error occurs, memory read and write back, read / write back A memory initialization process, an ECC error invalid interrupt process is activated at the time of ECC initialization, and a read / write back memory initialization process is performed for ECC initialization of the memory storage area. After the conversion process, an ECC error interrupt process is started.

  According to the present invention, ECC initialization can be performed without determining whether or not ECC initialization has been performed.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 10 shows a configuration of a microcontroller 9 equipped with a memory having an ECC function.

  The microcontroller 9 includes peripheral devices such as a CPU 91, a flash ROM 92 storing programs and data, a random access memory (RAM) 93, a direct memory access function (DMA) 94, and an analog / digital converter (AD converter) 95. Is installed. Here, it is assumed that the ECC function is mounted on the RAM 93.

  FIG. 11 shows a configuration diagram of the RAM 93.

  The RAM 93 stores a value storage unit 931 that stores values, an error information storage unit 932 that stores information for error correction, and an error detection unit 933 that checks whether there is an error from the value stored in the value storage unit and information from the error information storage unit. It consists of.

  Error information is updated as soon as a value is written, and is checked when the value is read. If the error can be corrected, the automatically corrected value is output. If the error cannot be corrected, an interrupt is generated for the CPU. When the power is turned on for the first time, the value storage unit and the error method storage unit are not initialized. If the value is read before initialization, an error may not be corrected and an interrupt may occur.

  FIG. 1 is a flowchart of ECC initialization.

  In step 111 following the ECC initialization processing start 111, the ECC error is invalidated. In process 112, ECC initialization is performed. In the process 113, the ECC error is validated and becomes END114.

  With this processing flow, the ECC error at the time of ECC initialization is ignored, and no history of ECC error occurrence is left.

  FIG. 2 is a flowchart of ECC initialization processing.

  In processing 1122 following start 1121, ECC initialization is performed by memory writing outside the memory storage area. In process 1123, read / write-back processing is performed on the memory storage area, and the result becomes END 1124.

  According to this processing flow, the stored value is held as it is, and the ECC is initialized because the writing process is performed.

Incidentally, when carrying out the present process when ECC uninitialized, although ECC error occurs, since the disabled ECC error by processing 11 1, ECC error at this time is ignored. Further, the read value is an indefinite value, but since initialization has not been performed, there is no problem even if the value (indefinite value) is used for writing back.

  FIG. 3 is a flowchart of the write initialization process 1122.

  In a process 11222 following the START 11221, initialization is performed by copying an initial value from an area having an initial value in the ROM. Copying is performed from the START_ROM_ADDR, which is the start address of the ROM in which the initial value is stored, to the START_RAM_ADDR, which is the start address of the destination memory, for the size of RAM_INIT_SIZE. At this time, since reading is performed by the ROM, no ECC error occurs regardless of whether the ECC is initialized or not.

  Furthermore, normal RAM initialization processing without an ECC function is also performed, which is efficient. In the process 11223, the area to be cleared to zero is initialized, and the process becomes END11224.

  Also in this case, it is not necessary to read out the memory, and an ECC error does not occur regardless of whether or not ECC initialization is performed. Furthermore, normal RAM initialization processing without an ECC function is also performed, which is efficient.

  FIG. 4 is a flowchart of the read / write back process 1123.

  In the process 11232 following the START 11231, the copy source data address and the copy destination address are made the same, and the copy is repeated by the size of the memory storage area, RAM_NCLR_SIZE, to become the END 11233.

  With this processing flow, the memory value is retained after the ECC is performed. When ECC initialization is not performed, an error occurs during reading, but is ignored by the processing 111.

  FIG. 5 is a flowchart of ECC error interrupt processing and interrupt processing when the ECC error is invalid.

  In the ECC error interrupt processing subsequent to START 211, in processing 212, interrupt preprocessing is performed. For example, stack saving of registers and the like. In process 213, ECC error information is saved, and ECC error occurrence is left as a history. In addition, a memory recovery process is performed as necessary.

  In process 214, post-processing of the interrupt is performed. For example, a register return. Note that the process becomes END 215 through the process 214.

  On the other hand, in ECC error invalid interrupt processing following START 221, interrupt preprocessing is performed in processing 222. For example, stack saving of registers and the like. In process 223, an interrupt post-process is performed. For example, a register return. Note that END 224 is obtained after processing 223.

  FIG. 6 is a flowchart of ECC error invalidation and ECC error validation.

  In the ECC error invalidation following START 1111, in the process 1112, the ECC error interrupt vector table is set at the head of the ECC error invalid interrupt process. As a result, when an ECC error occurs, ECC processing is not performed and is ignored. Note that the processing goes to END 11113 after processing 1112.

  On the other hand, in ECC error validation following START 1131, in process 1132, the ECC error interrupt vector table is set at the head of the ECC error interrupt process. As a result, when an ECC error occurs, ECC error information is saved, and an ECC error occurrence history remains. Note that the processing goes to END 1133 after processing 1132.

  FIG. 7 shows a memory map of the ROM and the RAM with the ECC function.

  The memory map of the ROM 41 shows a start address START_ROM_ADDR in which initial values are stored and a data size RAM_INIT_SIZE thereof.

  The memory map of the RAM 42 shows START_NCLR_RAM_ADDR that is the start address of the memory storage area and its size RAM_NCLR_SIZE.

  Further, START_RAM_ADDR, which is the start address of the initial value copy destination, and its data size RAM_INIT_SIZE are shown. Furthermore, START_CLR_RAM which is the start address of the area to be cleared to zero and its data size RAM_CLR_SIZE are shown.

  In the first embodiment, the ECC initialization is not determined as to whether or not the ECC initialization is performed. However, the portion including the backup area may be determined. In this case, the ECC error invalidation process and the ECC error invalid interrupt can be unnecessary. In addition, another means that does not have an ECC function may be used as a means for not reading out the implementation results from the RAM.

  FIG. 8 shows the ECC initialization process with the ECC initialized determination process.

  In the ECC initialization process 32, the ECC initialization process 32 is performed following the start process 31 to become END 33.

  Following the start 321, the write initialization 322 is performed. In the determination process 323, it is determined that the ECC has been initialized. If the ECC has not been initialized, the initialization by the write is performed in the process 324. For example, processing 324 is skipped. In the process 325, 0x55555555 is set in the determination RAM as the executed flag value, and becomes END326.

  The flag setting RAM is a battery-backed RAM.

  In the second embodiment, whether or not ECC initialization is performed is stored in a memory that does not have an ECC function. For example, a controller having an ignition off timer function described in JP-A-2005-114555 may be used. For example, the ignition off timer function may be used.

  In this case, if the value of the ignition off timer is 0, it is determined that the ECC has not been initialized since the RAM initialization is the first time after the battery is connected.

  After the ECC initialization, when the ignition off timer is started, a value of 1 or more is returned thereafter. Therefore, at the time of the ECC initialization processing when the ignition is on, the ignition off timer value is not 0, so it can be determined that the ECC has been implemented. .

  FIG. 9 shows a flow of ECC initialization for ECC initialization completion determination based on the ignition off timer value.

  Following the start 341, write initialization 342 is performed, and it is determined in a process determination 343 whether the ignition off timer value is 0 or not. If 0, ECC initialization is performed in a write initialization process in a process 344. The ignition-off timer is started at the timing when the ignition switch is turned off, so that the ignition-off timer value becomes 1 or more. Note that the processing goes to END 346 through processing 344.

  The present invention can be applied to a control apparatus having a built-in communication function, including automobile control.

The flowchart of ECC initialization concerning the Example of this invention. The flowchart of the ECC initialization process concerning the Example of this invention. The flowchart of the write initialization process concerning the Example of this invention. The flowchart of the read-write-back process concerning the Example of this invention. FIG. 4 is a flowchart of ECC error interrupt processing and interrupt processing when an ECC error is invalid according to an embodiment of the present invention. The flowchart of ECC error invalidation and ECC error validation concerning the Example of this invention. The memory map concerning the Example of this invention. FIG. 4 is a flowchart of ECC initialization with ECC initialization determination according to the embodiment of the present invention. The flowchart of ECC initialization of the ECC initialization completion determination by the ignition off timer value concerning the Example of this invention. The figure which concerns on the Example of this invention and shows the structure of the microcontroller with a memory provided with the ECC function. The figure which concerns on the Example of this invention and shows the block diagram of RAM.

Explanation of symbols

  111 ... ECC error invalidation processing, 112 ... ECC initialization processing, 113 ... ECC error validation processing, 1122 ... Write initialization processing, 1123 ... Read / write back processing, 21 ... ECC error interrupt processing, 22 ... When ECC error is invalid Interrupt processing, 41 ... ROM memory map, 42 ... RAM memory map, 9 ... microcontroller, 91 ... CPU, 92 ... flash ROM, 93 ... RAM, 94 ... DMA, 95 ... AD converter, 931 ... value storage unit, 932 ... error information storage unit, 933 ... error detection unit.

Claims (4)

In a memory initialization method for a control device having a memory with an error correction function,
The memory with the error correction function invalidates the process when the ECC error occurs before performing the initialization process . After the memory with the error correction function is initialized, the process when the ECC error occurs is enabled. West,
A read / write-back process in which the value stored by the battery backup in the memory with error correction function is read from the memory storage area and written back as it is is performed during the initialization process,
A memory initialization method for a control device , comprising: invalidating a process at the time of occurrence of an error until an ECC initialization process of the memory storage area is completed by the read / write-back process . In a control device having a memory with an error correction function,
The memory with the error correction function invalidates the process when the ECC error occurs before performing the initialization process . After the memory with the error correction function is initialized, the process when the ECC error occurs is enabled. West,
A read / write-back process in which the value stored by the battery backup in the memory with error correction function is read from the memory storage area and written back as it is is performed during the initialization process,
Until the initialization process of the ECC of the memory storage area is terminated by the read / write-back process, the process at the time of the error is invalidated,
In the read / write-back process, there is an initialization determination unit that determines whether or not initialization has been completed,
A control device having a function of initializing the memory storage area by writing with a predetermined value only when the initialization determination means has not initialized. The control device according to claim 2, wherein
The initialized determination means has an initialized determination memory,
The determination memory has a function of holding a predetermined value after initialization and determining that initialization has been completed when the predetermined value can be read;
The control device, wherein the determination memory uses a memory that is not a memory with an error correction function. The control device according to claim 2, wherein
The initialized determination means has a function of determining that the power supplied to the memory with an error correction function by the control device has been cut off,
The initialized determination means has a function of determining that the power is turned off when the determination function indicates that the power is turned off, and setting the determined state to a state where the power is turned off after the initialization. A control device characterized by that.

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