JP5023648B2 - Print head and method for setting sub-scanning direction deviation correction value in print head - Google Patents

Description

  The present invention relates to a print head used in an image forming apparatus such as a printer, a copier, or a facsimile, and more particularly to a print head formed by arranging a plurality of recording chips each having a plurality of recording elements arranged.

  In an image forming apparatus such as a copying machine or a printer using an electrophotographic system, first, for example, the surface of a photosensitive member (photosensitive drum) formed in a drum shape is uniformly charged by a charging device. The charged photosensitive drum is exposed by an exposure device controlled based on the image data, and an electrostatic latent image is formed on the surface thereof. Subsequently, the electrostatic latent image formed on the photoreceptor is converted into a visible image (toner image) by the developing device. Thereafter, the toner image is transported to the transfer unit as the photosensitive member rotates, and is electrostatically transferred onto the recording paper. The toner image carried on the recording paper is subjected to a fixing process to become a permanent image.

  As an exposure apparatus used in such an image forming apparatus, a laser light scanning apparatus (ROS: Raster Output Scanner) that scans and exposes laser light in the main scanning direction by combining a laser diode and a polygon mirror is conventionally used. I came. However, in recent years, exposure using an LED print head (LPH: LED Print Head) configured by arranging a large number of LEDs (Light Emitting Diodes) in the main scanning direction due to demands for downsizing of the apparatus. Devices have also been adopted.

  The LPH includes an LED array in which a plurality of LED chips in which a large number of LEDs are arranged in a line are arranged in the main scanning direction (see Patent Document 1). The LPH usually also includes a rod lens array in which a large number of rod lenses are arranged in order to form an image of light output from each LED on the surface of the photoreceptor. In the image forming apparatus, each LED of the LPH is driven based on input image data to output light toward the photoconductor, and the light is imaged on the surface of the photoconductor by the rod lens array. Thereby, an electrostatic latent image for one line in the main scanning direction is formed on the photosensitive member. Then, by rotating the photoconductor, the photoconductor drum and the LPH move relative to each other, thereby forming an electrostatic latent image in the sub-scanning direction of the photoconductor.

  By the way, in such an image forming apparatus, irradiation light for one line in the main scanning direction irradiated from ROS or LPH is formed on the photosensitive drum unless it is substantially parallel to the axial direction of the photosensitive member. The electrostatic latent image is distorted. For example, if the irradiation light for one line in the main scanning direction is slanted with respect to the axial direction of the photosensitive member, the electrostatic latent image that is actually formed is formed when attempting to form a linear image parallel to the main scanning direction. The image is inclined in the sub-scanning direction. In addition, when the irradiation light for one line in the main scanning direction has an arcuate shape that is curved with respect to the axial direction of the photosensitive member, it is actually formed when an attempt is made to form a linear image parallel to the main scanning direction. The electrostatic latent image is curved in the sub-scanning direction. If the electrostatic latent image on the photoconductor is thus distorted in the sub-scanning direction, naturally, the toner image formed by developing the electrostatic latent image is also distorted in the sub-scanning direction. . In the following description, the distortion in the sub-scanning direction due to the former is referred to as skew, and the distortion in the sub-scanning direction due to the latter is referred to as bow.

  To solve such a problem, in an exposure apparatus using ROS, image data for one line in the main scanning direction is divided into a plurality of blocks, and the image data is shifted to sub-scanning for each divided block, that is, the image data is changed. There has been proposed a technique for correcting displacement in the sub-scanning direction by rearranging or changing irradiation timing (see Patent Document 2). In Patent Document 2, first, a test pattern is output using an unadjusted ROS, and the amount of deviation in the sub-scanning direction of irradiation light for one line in the main scanning direction is based on the read result of the output test pattern. Is detected. Based on the detection result of the amount of deviation in the sub-scanning direction, the number of blocks to be divided in the main scanning direction and the image data shift direction or irradiation timing shift direction in each block (upstream in the sub-scanning direction, downstream in the sub-scanning direction) To decide. In actual image formation, light irradiation is performed at the irradiation timing set for each of the divided blocks. In Patent Document 2, by performing such correction, distortion in the sub-scanning direction, that is, distortion due to skew or bow is made inconspicuous.

JP-A-6-218985 (page 4, FIG. 5) JP-A-4-317247 (5th page, FIG. 6, FIG. 7)

  However, when correcting the distortion (skew and bow) in the sub-scanning direction by applying the method described in Patent Document 2 to the LPH of Patent Document 1, the following problems occur. That is, when a halftone image is output using an image forming apparatus equipped with the corrected LPH, streaks extending in the sub-scanning direction are generated in the output halftone image.

  The present invention has been made to solve such a technical problem, and an object of the present invention is to use a print head in which a plurality of recording chips each including a plurality of recording elements are arranged. In this case, the streak generated in the sub-scanning direction is to be suppressed.

  As a result of extensive studies by the inventor on the above problem, it has been found that the above-described streaks in the halftone image do not always occur. Specifically, even when the same LPH is used, if the attachment angle with respect to the photoconductor is varied, streaks are generated in the halftone image output after correcting the distortion in the sub-scanning direction. It has been found that there are cases of cases and cases that do not occur. When this is examined in more detail, when the division position of the block divided for correcting the distortion in the sub-scanning direction and the boundary position of each LED chip constituting the LED array coincide with or approach each other, It has been found that easy streaks are likely to occur. Note that such a streak is less likely to occur as the resolution of the image shift amount is increased when rearranging the image data in the sub-scanning direction, but it requires a memory necessary for the rearrangement calculation. There is a problem that the cost becomes high. Therefore, the present inventor has found that such streak generation can be easily suppressed by shifting the block division position in the main scanning direction with respect to the boundary position of each LED chip, and has devised the present invention. It was.

  That is, according to the present invention, a recording chip in which a plurality of recording elements are arranged in the main scanning direction is arranged for each of a recording element array in which a plurality of recording chips are arranged in the main scanning direction and a predetermined block set in the main scanning direction. In a print head including a sub-scanning direction deviation correction unit that corrects a sub-scanning direction deviation by shifting image data in the scanning direction, the sub-scanning direction deviation correction unit is a boundary between recording elements in adjacent recording chips. A feature is that a sub-scanning direction shift of a recording mark is corrected using a block that can be set by shifting the division position with respect to the position. Here, “shifting the image data in the sub-scanning direction” includes concepts such as rearranging the image data and changing the supply timing of the recording signal to each recording element constituting the recording element array. Yes.

  In such a print head, the sub-scanning direction deviation correcting unit can correct the deviation of the recording mark in the sub-scanning direction using blocks set to have different lengths in the main scanning direction. Further, when the recording chips constituting the recording element array are arranged in a staggered manner, the recording signal supply timing to each recording chip constituting the recording element array is determined for each recording chip array with reference to a predetermined recording chip array. By changing, it can further include a staggered array correction unit that corrects the sub-scanning direction deviation of the recording marks recorded by the recording element array. And a setting unit that sets the division position, and a correction unit that moves the division position from the boundary position when the division position set by the setting unit matches the boundary position between adjacent recording chips. be able to. Here, the correction unit is a case where the division position and the boundary position coincide with each other, and the positional deviation in the sub-scanning direction between the recording chips corresponding to the boundary position is the sub-image of the image recorded by the recording element at the boundary position. When the scanning direction deviation is canceled, the division position can be prevented from moving from the boundary position.

  From another point of view, the present invention relates to a recording element array in which a plurality of recording chips in which a plurality of recording elements are arranged in the main scanning direction are arranged in the main scanning direction, and a recording that constitutes the recording element array. Other than the arrangement of the first sub-scanning direction deviation correction unit for correcting the deviation in the sub-scanning direction due to the arrangement of the chips by adjusting the supply timing of the recording signal to each recording element, and the arrangement of the recording chips constituting the recording element array Including a second sub-scanning direction shift correction unit that corrects the shift in the sub-scanning direction caused by shifting the image data in the sub-scanning direction. The second sub-scanning direction deviation correction unit adjusts the recording signal supply timing to each recording element from the boundary position of the recording element to the adjacent boundary position as one block. , As one block until division position adjacent the dividing position which is set at a position shifted in the main scanning direction from the boundary position, is characterized by shifting the image data in the sub-scanning direction.

  In such a print head, when a plurality of recording chips are arranged in a staggered manner, the first sub-scanning direction deviation correction unit can perform staggered arrangement correction of the recording chips. In addition, the second sub-scanning direction deviation correction unit is configured to provide a skew generated when the recording element array is inclined with respect to the recording medium, or a bow generated when the recording element array is curved with respect to the recording medium. Can be corrected.

  Further, when grasping the present invention from the category of the method, the present invention relates to a print head having a recording element array in which a plurality of recording chips in which a plurality of recording elements are arranged in the main scanning direction are arranged in the main scanning direction. A method for setting a sub-scanning direction deviation correction value, the step of obtaining a sub-scanning direction deviation amount of a recording mark recorded by the recording element array, and a main element in the recording element array based on the obtained sub-scanning direction deviation amount. The step of calculating the number of divisions of blocks in the scanning direction and the division position of each block, and the division position determined by the calculation when the division position coincides with the boundary position of the recording element in the adjacent recording chip, Shifting in the main scanning direction.

  In such a method, in the step of acquiring the amount of deviation of the recording mark in the sub-scanning direction, the recording element array is used to form the recording mark on the recording material, and the recording mark formed on the recording material is read and recorded. Based on the reading result of the mark, the shift amount in the sub-scanning direction of the recording mark can be acquired. Further, the method may further include storing the division position in a memory after the shifting step.

  According to the present invention, since the block division position in the sub-scanning direction deviation correction is shifted in the main scanning direction with respect to the boundary position in the recording chip, streaks occurring in the sub-scanning direction can be suppressed.

The best mode for carrying out the present invention (hereinafter referred to as an embodiment) will be described below in detail with reference to the accompanying drawings.
<Embodiment 1>
FIG. 1 is a diagram illustrating an overall configuration of an image forming apparatus including a print head to which the exemplary embodiment is applied. The image forming apparatus shown in FIG. 1 is a so-called tandem type digital color printer 1. The image forming apparatus includes an image forming process unit 10, a control unit 30, and an image processing unit (IPS: Image Processing System) 40. Among these, the image forming process unit 10 forms an image corresponding to the image data of each color. The control unit 30 controls the operation of the image forming process unit 10. Further, the IPS 40 is connected to, for example, a personal computer (PC) 2 or an image reading device (IIT) 3, performs predetermined image processing on image data received from these, and outputs the image data to the image forming process unit 10.

The image forming process unit 10 includes four image forming units 11Y, 11M, 11C, and 11K that are arranged in parallel at a predetermined interval. The image forming units 11Y, 11M, 11C, and 11K include a photosensitive drum 12, a charger 13, an LED print head (LPH) 14, a developing device 15, and a cleaner 16. Here, the photosensitive drum 12 forms an electrostatic latent image and carries a toner image. The charger 13 uniformly charges the surface of the photosensitive drum 12 with a predetermined potential. The LPH 14 exposes the photosensitive drum 12 charged by the charger 13 to form an electrostatic latent image. The developing device 15 develops the electrostatic latent image obtained by the LPH 14 with toner. The cleaner 16 cleans the surface of the photosensitive drum 12 after the primary transfer. Here, the image forming units 11Y, 11M, 11C, and 11K are configured in substantially the same manner except for the toner stored in the developing unit 15. The image forming units 11Y, 11M, 11C, and 11K respectively form yellow (Y), magenta (M), cyan (C), and black (K) toner images.
In addition, the image forming process unit 10 includes an intermediate transfer belt 21, a primary transfer roll 22, a secondary transfer roll 23, a fixing device 25, and an image sensor 26. To the intermediate transfer belt 21, the toner images of the respective colors formed on the photosensitive drums 12 of the image forming units 11Y, 11M, 11C, and 11K are transferred in a multiple manner. The primary transfer roll 22 as a transfer device sequentially transfers (primary transfer) the color toner images of the image forming units 11Y, 11M, 11C, and 11K to the intermediate transfer belt 21. The secondary transfer roll 23 collectively transfers (secondary transfer) the superimposed toner image transferred onto the intermediate transfer belt 21 onto the paper P as a recording material. The fixing device 25 fixes the secondary transferred image on the paper P. The image sensor 26 is attached to the downstream side in the moving direction of the intermediate transfer belt 21 from the black image forming unit 11K so as to face the toner image carrying surface of the intermediate transfer belt 21. The image sensor 26 is constituted by, for example, a reflection type optical sensor or the like, and has a function of detecting the density of the toner image primarily transferred onto the intermediate transfer belt 21 and the formation position thereof.

  Now, an image forming operation in the digital color printer 1 will be described. In the digital color printer 1, the image forming process unit 10 performs an image forming operation based on a control signal such as a synchronization signal supplied from the control unit 30. At that time, the image data input from the PC 2 or IIT 3 is subjected to image processing by the image processing unit 40 and supplied to each of the image forming units 11Y, 11M, 11C, and 11K via the interface. In the yellow image forming unit 11Y, for example, the surface of the photosensitive drum 12 uniformly charged at a predetermined potential by the charger 13 is exposed by the LPH 14 that emits light based on the image data obtained from the image processing unit 40. Thus, an electrostatic latent image is formed on the photosensitive drum 12. The formed electrostatic latent image is developed by the developing device 15, and a yellow toner image is formed on the photosensitive drum 12. Similarly, magenta, cyan, and black toner images are formed in the other image forming units 11M, 11C, and 11K.

The color toner images formed by the image forming units 11Y, 11M, 11C, and 11K are sequentially electrostatically attracted by the primary transfer roll 22 onto the intermediate transfer belt 21 that rotates in the direction of arrow A in FIG. As a result, a superimposed toner image is formed on the intermediate transfer belt 21. The formed superimposed toner image is conveyed to an area (secondary transfer portion) where the secondary transfer roll 23 is disposed as the intermediate transfer belt 21 moves. When the superimposed toner image is conveyed to the secondary transfer unit, the paper P is supplied to the secondary transfer unit in accordance with the timing at which the toner image is conveyed to the secondary transfer unit. Then, the superimposed toner images are collectively electrostatically transferred onto the conveyed paper P by the transfer electric field formed by the secondary transfer roll 23 in the secondary transfer portion.
Thereafter, the sheet P on which the superimposed toner image has been electrostatically transferred is peeled off from the intermediate transfer belt 21 and conveyed to the fixing device 25 by the conveying belt 24. The unfixed toner image on the paper P conveyed to the fixing device 25 is fixed on the paper P by being subjected to a fixing process by heat and pressure by the fixing device 25. Then, the paper P on which the fixed image is formed is conveyed to a paper discharge mounting portion (not shown) provided in the discharge portion of the image forming apparatus.

Next, the LPH 14 used in this image forming apparatus will be described in detail.
FIG. 2 is a diagram showing the configuration of the LED print head (LPH) 14. The LPH 14 includes a housing 61, an LED circuit board 62, and a self-scanning LED array (SLED) 63. The LPH 14 further includes a rod lens array 64, a holder 65, and a leaf spring 66. Among these, the housing 61 functions as a support for the LPH 14. The LED circuit board 62 is mounted with an SLED 63, a drive circuit for driving the SLED 63, and the like. Further, the SLED 63 exposes the photosensitive drum 12 by emitting light. The rod lens array 64 images the light from the SLED 63 on the surface of the photosensitive drum 12. Furthermore, the holder 65 supports the rod lens array 64 and shields the SLED 63 from the outside. The leaf spring 66 biases the housing 61 toward the rod lens array 64.

The housing 61 is formed of a block or sheet metal such as aluminum or SUS, and supports the LED circuit board 62. The holder 65 supports the housing 61 and the rod lens array 64, and is set so that the light emitting point of the SLED 63 and the focal point of the rod lens array 64 coincide. Furthermore, the holder 65 is configured to seal the SLED 63. Therefore, it is possible to prevent dust from adhering to the SLED 63 from the outside. On the other hand, the leaf spring 66 urges the LED circuit board 62 toward the rod lens array 64 via the housing 61 so as to maintain the positional relationship between the SLED 63 and the rod lens array 64.
The LPH 14 configured in this way is configured to be movable in the optical axis direction of the rod lens array 64 by an adjusting screw (not shown), and the imaging position (focal plane) of the rod lens array 64 is the surface of the photosensitive drum 12. It is adjusted so that it is located above.

  FIG. 3 is a plan view of the LED circuit board 62 shown in FIG. On the LED circuit board 62, SLEDs 63 composed of 60 SLED chips (Chip 1 to Chip 60) as recording chips are arranged in a line with high precision so as to be parallel to the axial direction of the photosensitive drum 12. Here, FIG. 4 is an enlarged view of the connecting portion of each LED chip. As shown in FIG. 4, at the end of each SLED chip (Chip 1 to Chip 60), the end boundary of the LED array is continuously arranged in the main scanning direction. That is, the LED chips (Chip 1 to Chip 58) are arranged in a staggered manner. In addition, in FIG. 4, the connection part of Chip1, Chip2, and Chip3 is shown as an example.

  In the LPH 14 according to the present embodiment, 256 LEDs as recording elements are mounted on each SLED chip (Chip 1 to Chip 60). Therefore, in the entire SLED 63 having 60 SLED chips, 15360 LEDs are provided. Further, the distance from the outer edge of the SLED chip Chip1 to the outer edge of the SLED chip Chip 60 (length in the main scanning direction of the LED array) is set to 324 mm in order to support image formation on the sheet P of A3SEF. . For this reason, the interval between adjacent LEDs is set to about 21.15 μm, and the output resolution of the LPH 14 in the main scanning direction is approximately 1200 dpi (dot per inch). Note that the output resolution of the LPH 14 in the sub-scanning direction is approximately 2400 dpi. Here, the output resolution in the sub-scanning direction is determined by the moving speed of the photosensitive drum 12 in the sub-scanning direction, and can be appropriately changed.

  The LED circuit board 62 is provided with a signal generation circuit 100 and a level shift circuit 104. Further, the LED circuit board 62 includes a power supply circuit 101 composed of a three-terminal regulator for stabilizing the output voltage, an EEPROM 102 for storing light amount correction value data in the SLED 63, a skew correction value of the LPH 14, and the digital color printer 1 main body. Is provided with a harness 103 that transmits and receives signals to and from.

  FIG. 5 is a diagram showing the configuration of the signal generation circuit 100 and the wiring configuration of the LED circuit board 62. As shown in FIG. 5, the signal generation circuit 100 includes a lighting signal generation unit 110 that outputs a lighting signal ΦI (ΦI1 to ΦI60) to each LED chip (Chip1 to Chip60). Further, the signal generation circuit 100 divides each LED chip (Chip1 to Chip60) into six groups (every 10 chips), and for each group, the transfer signal CK1 (CK1_1 to CK1_6) and the transfer signal CK2 (CK2_1 to CK2_6). Is provided.

On the LED circuit board 62, a power supply line 105 of Vcc = + 3.3V for supplying power to each SLED chip (Chip1 to Chip60) and a power supply line 106 grounded (GND) are provided. In addition, signal lines 107 (107_1 to 107_60) for transmitting lighting signals ΦI (ΦI1 to ΦI60) from the signal generation circuit 100 to the SLED chips (Chip1 to Chip60) are also provided. Further, signal lines 108 (108_1 to 108_6) for transmitting the transfer signal CK1 (CK1_1 to 1_6) are also provided. Furthermore, signal lines 109 (109_1 to 109_6) for transmitting the transfer signal CK2 (CK2_1 to 2_6) are also provided.
The lighting signals ΦI (ΦI1 to ΦI60) for the Chip1 to Chip60 are input to the SLED chips (Chip1 to Chip60) via the signal line 107. Further, the transfer signal CK1 (CK1_1 to 1_6) is input to the Chip1 to Chip60 via the signal line 108, and the transfer signal CK2 (CK2_1 to 2_6) is input to the Chip1 to Chip60 via the signal line 109, respectively.

Next, the circuit configuration of the SLED 63 will be described.
FIG. 6 is a diagram for explaining the circuit configuration of the SLED 63. The SLED 63 of this embodiment is connected to the signal generation circuit 100 via the level shift circuit 104. The level shift circuit 104 has a configuration in which a resistor R1B and a capacitor C1, and a resistor R2B and a capacitor C2 are arranged in parallel, one end of which is connected to the input terminal of the SLED 63, and the other end of the signal generating circuit 100 ( It is connected to the output terminal of the transfer signal generator 130). Based on the transfer signals CK1R and CK1C and the transfer signals CK2R and CK2C output from the signal generation circuit 100 (transfer signal generation unit 130), the transfer signal CK1 and the transfer signal CK2 are output to the SLED 63. .
In addition, although 58 SLED chips are arranged in series in the SLED 63 of the present embodiment, only one SLED chip is shown in FIG. In the following description, the SLED chip is referred to as SLED 63 for convenience.

As shown in FIG. 6, the SLED 63 includes 128 thyristors S1 to S128 as switching elements, 128 LEDs L1 to L128 as lighting elements, 128 diodes D1 to D128, and 128 resistors R1 to R128. In addition, the transfer current limiting resistors R1A and R2A are configured to prevent an excessive current from flowing through the signal line.
Here, a part mainly composed of thyristors S1 to S128 and diodes D1 to D128 for controlling supply of current to the LEDs L1 to L128 is referred to as a transfer unit.

In the SLED 63 of the present embodiment, the anode terminals (input terminals) A1 to A128 of the thyristors S1 to S128 are connected to the power supply line 105. A power supply voltage Vcc (Vcc = + 3.3 V) is supplied to the power supply line 105.
A transfer signal CK1 is transmitted from the signal generation circuit 100 via the level shift circuit 104 and the transfer current limiting resistor R1A to the cathode terminals (output terminals) K1, K3,... K127 of the odd-numbered thyristors S1, S3,. Is done.
Further, the cathode signals (output terminals) K2, K4,..., K128 of the even-numbered thyristors S2, S4,..., S128 are transferred from the signal generation circuit 100 through the level shift circuit 104 and the transfer current limiting resistor R2A. CK2 is transmitted.

On the other hand, gate terminals (control terminals) G1 to G128 of the thyristors S1 to S128 are respectively connected to the power supply line 106 via resistors R1 to R128 provided corresponding to the thyristors S1 to S128. The power supply line 106 is grounded (GND).
The gate terminals G1 to G128 of the thyristors S1 to S128 are connected to the gate terminals of the LEDs L1 to L128 provided corresponding to the thyristors S1 to S128, respectively.
Furthermore, the cathode terminals of the diodes D1 to D128 are connected to the gate terminals G1 to G128 of the thyristors S1 to S128. The gate terminals G1 to G127 of the thyristors S1 to S127 are connected to the anode terminals of the next-stage diodes D2 to D128, respectively. That is, the diodes D1 to D128 are connected in series with the gate terminals G1 to G127 interposed therebetween.
The anode terminal of the diode D1 is connected to the signal generation circuit 100 via the transfer current limiting resistor R2A and the level shift circuit 104, and the transfer signal CK2 is transmitted. Further, the cathode terminals of the LEDs L1 to L128 are connected to the signal generation circuit 100 (lighting signal generation unit 110) via the drive current setting resistor RID, and the lighting signal ΦI is transmitted.

  Further, the light shielding mask 50 is disposed in the SLED 63 so as to cover the thyristors S1 to S128 and the diodes D1 to D128 in the transfer unit. This is because during the image forming operation, light emission from the thyristors S1 to S128 in the on state and current is flowing, and from the diodes D1 to D128 in the current flow state is blocked, and unnecessary light is removed from the photoconductor. It is provided to suppress exposure of the drum 12.

Next, a signal (drive signal) for driving the SLED 63 output from the signal generation circuit 100 and the level shift circuit 104 will be described.
FIG. 7 is a timing chart showing drive signals output from the signal generation circuit 100 and the level shift circuit 104. Note that the timing chart shown in FIG. 7 shows a case where all LEDs perform optical writing (light emission).
(1) First, when a reset signal (RST) is input from the image forming apparatus to the signal generation circuit 100, the signal generation circuit 100 transfers the transfer signal CK1C to a high level (hereinafter referred to as “H”) and transfer. The signal CK1R is set to “H”, the transfer signal CK1 is set to “H”, the transfer signal CK2C is set to low level (hereinafter referred to as “L”), the transfer signal CK2R is set to “L”, and the transfer signal CK2 is set. Is set to a low level (“L”), and all thyristors S1 to S128 are set to an off state (FIG. 7A).
(2) Following the reset signal (RST), the line synchronization signal Lsync output from the signal generation circuit 100 becomes “H” (FIG. 7A), and the operation of the SLED 63 is started. Then, in synchronization with the line synchronization signal Lsync, as shown in FIGS. 7E, 7F, and 7G, the transfer signal CK2C and the transfer signal CK2R are set to “H”, and the transfer signal CK2 is set to “H”. (FIG. 7B).
(3) Next, as shown in FIG. 7C, the transfer signal CK1R is set to “L” (FIG. 7C).

(4) Subsequently, as shown in FIG. 7B, the transfer signal CK1C is set to “L” (FIG. 7D).
In this state, the gate current of the thyristor S1 starts to flow. At that time, the tri-state buffer B1R of the signal generation circuit 100 is set to high impedance (Hiz), thereby preventing current backflow.
Thereafter, the thyristor S1 starts to be turned on by the gate current of the thyristor S1, and the gate current gradually increases. At the same time, when a current flows into the capacitor C1 of the level shift circuit 104, the potential of the transfer signal CK1 also gradually increases.

(5) After the elapse of a predetermined time (the time when the transfer signal CK1 potential becomes close to GND), the tristate buffer B1R of the signal generation circuit 100 is set to “L” (FIG. 7E). As a result, the potential of the signal line Φ1 and the potential of the transfer signal CK1 rise due to the rise of the gate G1 potential, and accordingly, a current starts to flow to the resistor R1B side of the level shift circuit 104. On the other hand, the current flowing into the capacitor C1 of the level shift circuit 104 gradually decreases as the potential of the transfer signal CK1 increases.
When the thyristor S1 is completely turned on and becomes a steady state, a current for maintaining the on state of the thyristor S1 flows to the resistor R1B of the level shift circuit 104, but does not flow to the capacitor C1.
At this time, as shown in FIG. 7B, the tri-state buffer B1C of the signal generation circuit 100 is set to high impedance (Hiz) (FIG. 7E).

  (6) With the thyristor S1 completely turned on, the lighting signal ΦI is set to “L” as shown in FIG. 7 (H) (FIG. 7 (f)). At this time, since the potential of the gate G1> the potential of the gate G2, the LED L1 having a thyristor structure is turned on earlier and lights up. As the LED L1 is turned on, the potential of the signal line Φ1 rises, so that the LEDs after the LED L2 are not turned on. That is, as for the LEDs L1, L2, L3, L4,..., Only the LED L1 having the highest gate voltage is turned on (lit).

(7) Next, as shown in FIG. 7 (F), when the transfer signal CK2R is set to “L” (FIG. 7 (g)), a current flows in the same manner as in FIG. A voltage is generated across the capacitor C2 104.
(8) As shown in FIG. 7E, when the transfer signal CK2C is set to “L” in this state (FIG. 7H), the thyristor switch S2 is turned on.
(9) Then, as shown in FIGS. 7B and 7C, when the transfer signals CK1C and CK1R are simultaneously set to “H” (FIG. 7 (i)), the thyristor switch S1 is turned off and passes through the resistor R1. As a result, the potential of the gate G1 gradually decreases. At that time, the thyristor switch S2 is completely turned on. Therefore, by turning on / off the lighting signal ΦI corresponding to the image data from the lighting signal terminal ID, the LED L2 can be turned on / off.
In this case, since the potential of the gate G1 is already lower than the potential of the gate G2, the LED L1 is not turned on.

(10) The above-described operations are sequentially performed to turn on the LEDs L1 to L128 sequentially.
Then, after the “transfer operation period” in FIG. 7 in which the terminal LED L128 is extinguished, the transfer signals CK1C and CK1R are set to “H”, the transfer signal CK1 is set to “H”, and the transfer signals CK2C and CK2R are set to “H”. The transfer signal CK2 is set to “H” as “H”, and both the transfer signal CK1 and the transfer signal CK2 are kept in the “H” state for a predetermined time (“transfer thyristor is turned off” in FIG. 7). As a result, all thyristors S1 to S128 are turned off. Therefore, in this state, no current flows through all the thyristors S1 to S128, so that the thyristors S1 to S128 are held off (not lit).

(11) Further, after the transfer signals CK1 and CK2 are both kept at "H" for a predetermined time, the transfer signals CK2C and CK2R are set to "L" and the transfer signal CK2 is set to "L" (in FIG. 7, “Period during which no current flows through the transfer unit”). Thereby, since no current flows through the diodes D1 to D128, all the diodes D1 to D128 are also kept in the non-lighted state.
Accordingly, after the lighting signal ΦI is output and the image formation is completed, during the unsteady operation including the state where the photosensitive drum 12 (see FIG. 1) stops rotating, the transfer unit of the SLED 63 is operated. No current is applied. For this reason, in a state where the photoconductor 12 is stopped from rotating, current does not flow through the thyristors S1 to S128 and the diodes D1 to D128 arranged in the transfer unit together with the LEDs L1 to L128, and the thyristors S1 to S128 and Since no light is emitted from the diodes D1 to D128, unnecessary exposure of the photosensitive drum 12 is suppressed.

  Next, the configuration of the lighting signal generation unit 110 in the signal generation circuit 100 will be described in detail with reference to FIG. The lighting signal generation unit 110 receives the image data sent from the IPS 40 and the line synchronization signal Lsync sent from the control unit 30. The lighting signal generator 110 also receives light amount correction value data corresponding to each LED and a skew correction value of the LPH 14 from the EEPROM 102. On the other hand, the lighting signal generator 110 outputs the lighting signals ΦI1 to ΦI60 to the 60 SLEDs 63 (Chip1 to Chip60) constituting the LPH14.

As shown in FIG. 8, the lighting signal generation unit 110 includes a staggered array correction unit 111, a skew correction unit 112, a lighting time calculation unit 113, a serial / parallel conversion unit 114, and a pulse generator 115 (115_1 to 115_60). .
Image data is input from the IPS 40 to the staggered array correction unit 111 serving as a first sub-scanning direction shift correction unit. The staggered array correction unit 111 divides the image data input from the IPS 40 for each SLED 63 (data group for each 256 dots). Then, the staggered array correction unit 111 outputs the output timings of the data group corresponding to the odd-numbered SLED 63 (Chip1, Chip3,..., Chip59) and the data group corresponding to the even-numbered SLED63 (Chip2, Chip4,..., Chip60). The difference is output to the skew correction unit 112. Specifically, the setting is performed such that the light emission timing of the even-numbered SLEDs 63 arranged on the downstream side in the sub-scanning direction is delayed by a predetermined time from the light emission timing of the odd-numbered SLEDs 63 arranged on the upstream side in the sub-scanning direction. . This makes it possible to align the electrostatic latent image formed on the photosensitive drum 12 by the odd-numbered SLED 63 and the electrostatic latent image formed on the photosensitive drum 12 by the even-numbered SLED 63. .

  The skew correction value sent from the EEPROM 102 is input to the skew correction unit 112 as the second sub-scanning direction deviation correction unit. In addition, the staggered array correction unit 111 also receives the staggered array corrected image data from the staggered array correction unit 112. Then, the skew correction unit 112 performs skew correction on the image data that has undergone the staggered arrangement correction and outputs the image data to the lighting time calculation unit 113. Details of the skew correction unit 112 and details of the skew correction value used in the skew correction unit 112 will be described later.

  The lighting time calculation unit 113 receives the line synchronization signal Lsync sent from the control unit 30 and the light amount correction value data sent from the EEPROM 102. Further, the staggered array corrected and skew corrected image data (hereinafter simply referred to as skew corrected image data) is also input to the lighting time calculation unit 113 from the skew correction unit 112. This light quantity correction value data is set corresponding to each of 15360 LEDs constituting the LPH 14. The lighting time calculation unit 112 uses the skew corrected image data sent from the skew correction unit 112 and the light amount correction value of each LED read from the EEPROM 102 while synchronizing with the line synchronization signal Lsync. Calculate the lighting time (number of lighting clocks) of each LED. More specifically, the lighting time calculation unit 113 adds the light amount correction value to the skew-corrected image data, and the lighting time of the corresponding LED becomes longer in proportion to the magnitude of the light amount correction value. Calculate the number of lighting clocks.

  The serial / parallel converter 114 converts the number of lighting clocks for each LED calculated by the lighting time calculator 113 into parallel data. The pulse generator 115 (115_1 to 115_60) generates the lighting signals ΦI1 to ΦI60 by changing the light amount by pulse width modulation with respect to the signals converted in parallel by the serial / parallel converter 114. Then, the pulse generator 115 (115_1 to 115_60) outputs the generated lighting signals ΦI1 to ΦI60 to the SLEDs 63 (Chip1 to Chip60) of the LPH 14, respectively. Thereby, in each SLED63 of LPH14, LED used as lighting object will light for the set lighting time, respectively.

  Now, the skew correction in the skew correction unit 112 will be described in detail. In the digital color printer 1 according to the present embodiment, the LPH 14 is attached to each of the image forming units 11Y, 11M, 11C, and 11K. In each of the image forming units 11Y, 11M, 11C, and 11K, the LPH 14 is mounted with a predetermined accuracy so as to be parallel to the axial direction of the photosensitive drum 12. However, in practice, the LPH 14 may be mounted obliquely with respect to the photosensitive drum 12, and in such a case, skew occurs. In the initial state, even if the LPH 14 is mounted in parallel to the axial direction of the photosensitive drum 12, the LPH 14 may expand or contract (deform) due to a temperature change in the digital color printer 1 or the like. In some cases, skew occurs.

Consider a case where a linear electrostatic latent image (image) extending along the main scanning direction is created on the photosensitive drum 12 using the LPH 14. At this time, the IPS 40 outputs image data instructing the lighting signal generator 110 to turn on LEDs for one line in the main scanning direction.
FIG. 9A shows an electrostatic latent image formed on the photosensitive drum 12 by the LPH 14 when the LPH 14 is mounted in parallel to the axial direction of the photosensitive drum 12. In the figure, the horizontal direction is the main scanning direction, the vertical direction is the sub-scanning direction, ● is an electrostatic latent image (image part) formed by turning on the LED, and ○ is not turning on the LED. The formed electrostatic latent images (background portions) are respectively shown (the same applies to FIGS. 9B and 9C described below).
In this case, based on the input image data, the LED for one line in the main scanning direction is turned on at the m-th line in the sub-scanning direction, so that a static parallel to the main scanning direction is formed on the photosensitive drum 12. An electrostatic latent image (image portion) is formed.

FIG. 9B shows an electrostatic latent image formed on the photosensitive drum 12 by the LPH 14 when the LPH 14 is mounted obliquely with respect to the axial direction of the photosensitive drum 12.
In this case, when the LED for one line in the main scanning direction is turned on at the m-th line in the sub-scanning direction, the LED is inclined on the photosensitive drum 12 in the sub-scanning direction corresponding to the arrangement state of the LPH 14 (skew). An electrostatic latent image is formed. That is, an electrostatic latent image different from the electrostatic latent image to be originally formed is formed.

  Therefore, in the present embodiment, the skew amount of each LPH 14 is acquired in advance, a necessary skew correction value is obtained from the obtained skew amount, and a predetermined operation is performed on image data in the skew correction unit 112 using this skew correction value. By performing the above, skew correction is performed. Specifically, the skew correction unit 112 divides the image data for one line in the main scanning direction into a plurality of blocks based on the skew correction value, and the image data is divided in the sub-scanning direction for each of the divided blocks. By shifting and shifting, the skew is reduced.

  FIG. 9C shows an electrostatic latent image formed on the photosensitive drum 12 by the LPH 14 when image data subjected to such skew correction is used. FIG. 9C shows an example in which three blocks Sa-1, Sa, and Sa + 1 are divided based on the obtained skew correction value. In FIG. 9C, the boundary between the block Sa-1 and the block Sa is referred to as a division position Xa-1, and the boundary between the blocks Sa and Sa + 1 is referred to as a division position Xa.

In this example, image data for one line in the main scanning direction is divided into blocks Sa-1, Sa, and Sa + 1. In the block Sa-1, the LED corresponding to the block Sa-1 is turned on at the (m-1) th line in the sub-scanning direction. In the block Sa, the LED corresponding to the block Sa is lit on the m-th line in the sub-scanning direction. Further, in the block Sa + 1, the LED corresponding to the block Sa + 1 is turned on in the (m + 1) th line in the sub-scanning direction. That is, the block Sa-1 outputs image data one line earlier in the sub-scanning direction than the block Sa, and the block Sa + 1 outputs image data one line later in the sub-scanning direction than the block Sa.
As a result, an electrostatic latent image as shown in FIG. 9C is formed on the photosensitive drum 12. Here, when the electrostatic latent image without the skew correction shown in FIG. 9B is compared with the electrostatic latent image with the skew correction shown in FIG. 9C, the skew correction is performed. Thus, it is understood that the formed electrostatic latent image approaches the state shown in FIG.

  By the way, in the LPH 14 according to the present embodiment, as described with reference to FIGS. 3 and 4, SLEDs 63 (Chip 1 to Chip 60) in which a plurality of LEDs are arranged in a line are arranged in a staggered manner in the main scanning direction. It has an LED array. Here, a predetermined error is allowed in the mounting position of each SLED 63 constituting the LED array. As such an error, there are an error due to a deviation in the main scanning direction in which the adjacent SLEDs 63 are shifted in the main scanning direction, and an error due to a deviation in the sub scanning direction in which the adjacent SLEDs 63 are shifted in the sub scanning direction.

For this reason, if the division position of the block set in the above-described skew correction matches the LED array boundary end portion (see FIG. 4) of the adjacent SLED 63, the following problem occurs.
FIG. 10 (a) is obtained by extracting the vicinity of the dividing position Xa from FIG. 9 (c). In this example, in the block Sa on the left side of the division position Xa, the LED corresponding to this block Sa is lit on the m-th line in the sub-scanning direction, and in the block Sa + 1 on the right side of the division position Xa, In the (m + 1) th line, the LED corresponding to this block Sa + 1 is lit.

  Here, for example, as shown in FIG. 10B, when adjacent SLEDs 63 are displaced in the main scanning direction (in a direction away from each other), a gap is formed at the LED array end boundary. At this time, if the division position Xa coincides with the LED array end boundary, the discontinuity of the formed electrostatic latent image (toner image) is emphasized as shown in FIG. End up. Then, for example, when a halftone image is to be formed, this discontinuous portion (a portion where a toner image is not formed) extends in the sub-scanning direction, resulting in a streak.

  For example, as shown in FIG. 10C, when adjacent SLEDs 63 are displaced in the sub-scanning direction (in the direction away from each other), a gap is further added to the gap between the staggered arrangements at the LED array end boundary. At this time, if the division position Xa coincides with the LED array edge boundary, the discontinuity of the formed electrostatic latent image (toner image) is emphasized as shown in FIG. End up. In the present embodiment, the gap between adjacent SLEDs 63 is removed by staggered correction. However, since the newly added gap cannot be corrected even if the staggered correction is performed, a gap remains in the formed electrostatic latent image (toner image). Further, when the staggered correction is insufficient, a step may remain even if the staggered correction is performed. Then, for example, when a halftone image is to be formed, this discontinuous portion (a portion where a toner image is not formed) extends in the sub-scanning direction, resulting in a streak.

  From the above, it is understood that when the block division position in the skew correction matches the LED array end position in the adjacent SLED 63, a streak in the sub-scanning direction is likely to occur. Therefore, in this embodiment, the skew correction value is set so that the block division position in the skew correction is shifted by a predetermined amount from the LED array end position. Hereinafter, setting of the skew correction value will be described.

  FIG. 11 is a diagram illustrating a configuration of a skew correction value setting unit 140 that sets a skew correction value. Note that the skew correction value setting unit 140 is actually realized as a function of the control unit 30. The skew correction value setting unit 140 sets the skew correction value (the number of block divisions and the block division position) based on the read data sent from the image sensor 26 arranged to face the intermediate transfer belt 21 (see FIG. 1). It has a function of setting and writing to the EEPROM 102. The skew correction value setting unit 140 includes a skew amount calculation unit 141, a skew correction value calculation unit 142, and a skew correction value correction unit 143.

  The skew amount calculation unit 141 calculates the skew amount in the LPH 14 (the amount of deviation in the sub-scanning direction at both ends in the main scanning direction) based on the read data sent from the image sensor 26. The skew correction value calculation unit 142 calculates a skew correction value (number of block divisions and block division positions) based on the skew amount obtained by the skew amount calculation unit 141. Based on the skew correction value obtained by the skew correction value calculation unit 142, the skew correction value correction unit 143 sets the block division position as the main position when the block division position and the LED array end position match. Correction is performed by shifting in the scanning direction. Further, the skew correction value correcting unit 143 writes the corrected skew correction value in the EEPROM 102.

Next, the skew correction value setting process will be described in detail with reference to the flowchart shown in FIG.
In this process, first, a skew correction image is created using the digital color printer 1 (step 101). That is, an electrostatic latent image corresponding to predetermined image data is formed on the photosensitive drum 12 using the LPH 14, developed with toner, and then primarily transferred onto the intermediate transfer belt 21. At this time, the LPH 14 uses the SLEDs 63 (Chip 1 and Chip 60) provided at both ends in the main scanning direction to form an electrostatic latent image on the same main scanning direction line. As a result, on the intermediate transfer belt 21, as shown in FIG. 13, for example, the first toner image T1 and the SLED 63 (Chip 60) formed by the electrostatic latent image created by the SLED 63 (Chip 1) are created. The second toner image T2 formed by the electrostatic latent image is transferred. At this time, if the LPH 14 is mounted obliquely on the photosensitive drum 12, the skew correction image on the intermediate transfer belt 21, that is, the first toner image T1 and the second toner image T2 correspond to the inclination. Deviation in the sub-scanning direction (skew amount) occurs.

  Next, the image for skew correction, that is, the first toner image T1 and the second toner image T2 formed on the intermediate transfer belt 21 are read using the image sensor 26 (step 102). At this time, the image sensor 26 outputs a deviation amount (time) between the detection timing of the first toner image T1 and the detection timing of the second toner image T2 to the skew correction value setting unit 140.

  Then, the skew amount calculation unit 141 calculates the skew amount based on the read data (deviation amount) input from the image sensor 26 in consideration of the rotation speed of the intermediate transfer belt 21 (step 103). Next, the skew correction value calculation unit 142 calculates a skew correction value for making the skew substantially parallel to the main scanning direction based on the skew amount obtained by the skew amount calculation unit 141 (step 104). In step 104, the number n + 1 of block divisions in the main scanning direction and the division positions X1 to Xn of each block are obtained as skew correction values. A specific calculation method of the block division number n + 1 and the division positions X1 to Xn of each block will be described later.

Further, the skew correction value correcting unit 143 corrects the skew correction value obtained by the skew correction value calculating unit 142. The specific procedure is as follows. The skew correction value correcting unit 143 first sets a = 1 (step 105), and determines whether or not the skew correction value division position Xa is an integral multiple of 256 (step 106). Here, 256 is the number of SLED chips constituting the SLED 63. If the division position Xa is an integral multiple of 256, a value obtained by subtracting 64 from the division position Xa is set as a new division position Xa (step 107), and this division position Xa is stored in the EEPROM 102 which is a memory. Store (step 108). On the other hand, if the division position Xa is not an integral multiple of 256 in step 106, this division position Xa is stored in the EEPROM 102 as a memory as it is. Then, the value of a is set to a + 1 (step 109), and it is determined whether or not the value of a exceeds n, which is the number of division positions (step 110). Here, if a ≦ n, the process returns to step 106 and further continues. On the other hand, in the case of a> n, since the processing for all the divided positions has been completed, the series of processing is ended.
The skew correction value is set independently in each LPH 14 provided in the image forming units 11Y, 11M, 11C, and 11K.

Next, further explanation will be given with a specific example. In this description, it is assumed that step 101 and step 102 are executed and the skew amount obtained in step 103 is 0.5 mm.
In the LPH 14, the length of the LED array in the main scanning direction is 324 mm as described above. Further, since the resolution in the sub-scanning direction is 2400 dpi, the dot interval in the sub-scanning direction is 10.58 μm. Therefore, when the skew amount is 0.5 mm, 0.5 / 0.01058≈47.2, and it is necessary to perform skew correction for 48 steps in the sub-scanning direction. This means that the number of block divisions n + 1 obtained in step 104 is 48. Then, since LEDs for 15360 dots exist within the main scanning direction length of 324 mm, 15360/48 = 320, and the division positions X1 to X47 obtained in step 104 are 320 dot intervals, that is, 320th dot, 640. Dot eyes, 960th dot,..., 15040th dot. Therefore, the skew correction value calculation unit 142 outputs the block division number 48 and the division positions X1 to X47 as skew correction values.

  Here, Table 1 shows the calculation results (Chip positions) for the division positions (before correction) X1 to X47 obtained by the skew correction value calculation unit 142 and the division positions X1 to X47 obtained by the skew correction value correction unit 143. And division positions (after correction) X1 to X47 corrected by the skew correction value correction unit 143 are shown. The division position Xn (before correction) is obtained in step 104, the Chip position is obtained in step 106, and the division position Xn (after correction) is obtained in steps 106-108.

  In the present embodiment, the number of LEDs per SLED chip is 256 dots, and the division positions Xn are 320 dot intervals. For this reason, as shown in Table 1, the LED array boundary position and the divided position Xn (specifically, X4, X8, X12, X16, X20, X24, X28, X32, X36, X40, X44) match. In this embodiment, when the LED array boundary position coincides with the division position Xn in this way, in step 107, the division position Xn is shifted by 64 dots upstream in the main scanning direction. Then, the division position Xn (after correction) obtained in this way is stored in the EEPROM 102.

  Next, the staggered correction operation and the skew correction operation of the image data in the lighting signal generation unit 110 will be described in detail with reference to timing charts shown in FIGS. 8 and 14. In addition, this figure has shown from Chip1 to Chip11 among SLED63 which comprises LPH14, as shown to (a). Further, the horizontal axis in the figure is the dot number of each LED constituting the LPH 14, the vertical axis is time (timing), and the lower side indicates delay.

  Now, as shown in (b), it is assumed that image data for lighting all the LEDs of Chip 1 to Chip 60 (Chip 1 to Chip 11 in the figure) is input from IPS 40. Then, in the staggered array correction unit 111, as shown in (c), the output timing of the image data to the even-numbered SLED chips (Chip2, Chip4,...) Is set from the odd-numbered SLED chips (Chip1, Chip3,...). Also, staggered array correction that is delayed by a predetermined time is performed, and the staggered image data is output.

Next, the skew correction unit 112 performs skew correction on the staggered image data sent from the staggered array correction unit 111. Here, (d) shows output image data (image data after skew correction) when skew correction is performed using the division positions X1 to X47 before correction shown in Table 1. Further, (e) shows output image data (image data after skew correction) when skew correction is performed using the corrected division positions X1 to X47 shown in Table 1.
In (d), the LED array end boundary of Chip 5 and Chip 6 coincides with the block division position X4, and the LED array end boundary of Chip 10 and Chip 11 coincides with the block division position X8. On the other hand, in (e), the division positions X4 and X8 are shifted upstream by 64 dots by correcting the skew correction value in the above-described procedure. Therefore, in (e), there is no portion where the LED array end boundary and the block division position coincide with each other over the entire main scanning direction.

  Here, FIG. 15A shows the density distribution of a halftone image (toner image) formed when the skew correction (using the skew correction value before the division position correction) shown in FIG. 14D is performed. Show. FIG. 15B shows the density distribution of a halftone image (toner image) formed when the skew correction shown in FIG. 14E is performed (using the skew correction value after correcting the division position). ing. In these drawings, the horizontal axis indicates the LED dot number, and the vertical axis indicates the density difference normalized with reference to the density at a predetermined dot.

  As shown in FIG. 15A, when the skew correction is performed using the skew correction value before the division position correction, the density difference at the portion where the LED array end boundary coincides with the block division position. It is getting bigger. In particular, the density difference exceeds −0.02 at the 3840th dot, the 5120th dot, the 7680th dot, the 8960th dot, the 10240th dot, and the 12800th dot, and the density is remarkably lower than other areas. Yes. That is, visible stripes are generated in the halftone image.

  On the other hand, as shown in FIG. 15B, when the skew correction is performed using the skew correction value after the division position correction, which is the feature of the present embodiment, at the LED array end boundary. Although there is a slight difference in density (density difference less than -0.02), the level is extremely small and a substantially constant density is obtained. In this case, the streaks generated in the halftone image are hardly noticeable.

  As described above, in the present embodiment, a plurality of SLEDs 63 configured by arranging a plurality of LEDs (256 in this embodiment) are arranged in the main scanning direction (60 in the present embodiment) to form an LED. An array was constructed. Then, when forming an electrostatic latent image on the photosensitive drum 12 using the LPH 14, 15360 LEDs existing in the main scanning direction are grouped into a plurality of blocks with respect to the input image data. The skew correction was performed by shifting the lighting timing of the image data. By performing such skew correction, in the electrostatic latent image formed on the photosensitive drum 12, distortion in the sub-scanning direction due to the relative positional relationship between the LPH 14 and the photosensitive drum 12 becomes inconspicuous. be able to.

  Here, in the present embodiment, when setting the skew correction value (number of divided blocks, block division position) used for skew correction, this block is set when the block division position matches the LED array end boundary. The division position is shifted in the main scanning direction. That is, the block division position and the LED array end boundary are shifted with respect to the main scanning direction. Thereby, the shift in the sub-scanning direction due to the skew correction is not superimposed on the amount of shift in the sub-scanning direction due to the arrangement state of the adjacent SLEDs 63, and the streak in the sub-scanning direction at this portion can be made inconspicuous.

  In particular, when the SLEDs 63 are arranged in a staggered manner as in the present embodiment, if the set sub-scanning direction deviation amount and the actual sub-scanning direction deviation amount are different, the staggered arrangement correction unit 111 cannot complete the staggered arrangement, and the Deviations in the scanning direction remain. At this time, if the LED array end boundary and the block division position in the skew correction coincide with each other, the line becomes more conspicuous due to a synergistic effect. Therefore, the technique used in the present embodiment is very effective when adopting a configuration in which the SLEDs 63 are arranged in a staggered manner.

  From another viewpoint, in the present embodiment, distortion correction in the sub-scanning direction due to the arrangement state (staggered arrangement) of each SLED 63 constituting the LPH 14 is performed at the LED array end boundary, and the arrangement of the LPH 14 It can also be understood that distortion correction in the sub-scanning direction due to the state (relative positional relationship with the photosensitive drum 12) is not performed at the LED array end boundary.

  In this embodiment, the block division position is shifted only when the LED array end boundary coincides with the block division position in skew correction. However, the block is located near the LED array end boundary. Even when the division position is set, there is a concern that the streaks are conspicuous. Therefore, for example, even when the block division position is set near the LED array end boundary (for example, about 10 dots), it is preferable to shift the block division position.

<Embodiment 2>
In the first embodiment, the block division position is always shifted when the block division position coincides with the LED array end boundary. On the other hand, in the present embodiment, when a specific condition is satisfied, even if the block division position and the LED edge boundary of the LED array coincide with each other, the block division position is left as it is without being shifted. It is what I did. In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  FIG. 16 illustrates a connecting portion of Chip1, Chip2, and Chip3 among the 60 SLED chips constituting the SLED 63 according to the present embodiment. Also in the present embodiment, each of the 60 SLED chips is mounted with 256 LEDs. The odd-numbered SLED chips (Chip1, Chip3,...) And the even-numbered SLED chips (Chip2,...) Are arranged alternately, i.e., in a staggered manner.

Here, FIG. 16A shows an example in which Chip 1 and Chip 2 are arranged in an ideal state in the sub-scanning direction. At this time, the LED array of Chip 1 and the LED array of Chip 2 are arranged apart from each other by a sub-scanning direction distance D = D0. In the following description, the distance D0 is referred to as a reference distance.
On the other hand, FIG. 16B shows an example in which Chip 1 and Chip 2 are arranged in a state of being shifted in a direction away from the sub-scanning direction. At this time, the LED array of Chip 1 and the LED array of Chip 2 are arranged apart from each other by a sub-scanning direction distance D> a reference distance D0.
On the other hand, FIG. 16C shows an example in which Chip 1 and Chip 2 are arranged in a state of being shifted in a direction close to the sub-scanning direction. At this time, the LED array of Chip 2 and the LED array of Chip 3 are arranged apart from each other by a sub-scanning direction distance D <reference distance D0.

  Originally, it is preferable that the odd-numbered SLED chips (for example, Chip 1) and the even-numbered SLED chips (for example, Chip 2) are attached at the boundary between the SLED chips while being shifted by the reference distance D0 in the sub-scanning direction. However, in practice, since an allowable range is provided for the mounting accuracy, for example, a sub-scanning direction shift of about several μm may occur.

  Also in the present embodiment, the LPH 14 may be mounted obliquely with respect to the axial direction of the photosensitive drum 12 as in the first embodiment. Therefore, as in the first embodiment, for example, as shown in FIG. 9C, skew correction is performed by sequentially delaying or advancing the output timing of image data for each set division position. Yes.

  FIG. 17A shows the vicinity of the dividing position Xa as in FIG. That is, in this example, in the block Sa on the left side of the division position Xa, the LED corresponding to the block Sa is lit on the m-th line in the sub-scanning direction, and in the block Sa + 1 on the right side of the division position Xa, the sub-scanning is performed. The LED corresponding to this block Sa + 1 is lit on the (m + 1) th line in the direction. In the following description, it is assumed that the division position Xa of the left block Sa and the right block Sb coincides with the LED array end positions of Chip1 and Chip2.

  Assume that these Chip1 and Chip2 are in the ideal state (D = D0) shown in FIG. In this case, as shown in FIG. 17A, the formed electrostatic latent image (toner image) is shifted by one line in the sub-scanning direction at the LED array end position. Here, since the resolution in the sub-scanning direction is 2400 dpi, the interval between dots (lines) in the sub-scanning direction is 10.58 μm. Therefore, the electrostatic latent image (toner image) is shifted by 10.58 μm in the sub-scanning direction at the LED array end position.

  Further, it is assumed that Chip 1 and Chip 2 are in a state of being shifted in a direction away from the sub-scanning direction (D> D 0) as shown in FIGS. 16 (b) and 17 (b). In this case, at the LED array end position, the sub-scanning direction shift amount G of the electrostatic latent image (toner image) formed as shown in FIG. 17B is from one line (10.58 μm) in the sub-scanning direction. growing. That is, the lines in the sub-scanning direction are easily noticeable.

  On the other hand, it is assumed that Chip 1 and Chip 2 are in a state of being shifted in a direction close to the sub-scanning direction (D <D0) as shown in FIGS. 16 (c) and 17 (c). In this case, at the LED array end position, the sub-scanning direction shift amount G of the electrostatic latent image (toner image) formed as shown in FIG. 17C is one line (10.58 μm) in the sub-scanning direction. Get smaller. That is, the streak in the sub-scanning direction is less noticeable.

  Therefore, in the present embodiment, when the block division position coincides with the LED array end boundary in the skew correction value setting process, the sub-scanning direction with respect to the reference distance D of the SLED chip constituting the LED end boundary Reference is made to the amount of deviation (referred to as the amount of deviation Y between chips). If this inter-chip deviation amount Y is a deviation in the direction of decreasing the sub-scanning direction deviation amount G of the electrostatic latent image (toner image) to be formed, the division position is not shifted and obtained. The divided position is used as it is.

  For this reason, in the present embodiment, an inter-chip deviation amount Y between adjacent SLED chips (for example, Chip 1 and Chip 2) among the SLED chips Chip 1 to Chip 60 is acquired in advance. Since there are 60 SLED chips constituting the SLED 63, 59 inter-chip deviation amounts are acquired in total. The inter-chip deviation amount Y is obtained as a value obtained by measuring the sub-scanning direction distance D between the SLED chips after the LPH 14 is manufactured and subtracting the reference distance D0 from the obtained sub-scanning direction distance D. That is, Y = D−D0. Here, Table 2 illustrates a table in which the inter-chip position W and the inter-chip deviation amount Y are associated with each other. For example, an inter-chip position W = 1 represents an inter-chip position between Chip 1 and Chip 2, and an inter-chip position W = 59 represents an inter-chip position between Chip 59 and Chip 60, for example. The table shown in Table 2 is stored and held in advance in the EEPROM 102, for example.

The skew correction value setting process in this embodiment will be described in detail with reference to the flowchart shown in FIG.
In this process, first, a skew correction image is created using the digital color printer 1 (step 201). That is, an electrostatic latent image corresponding to predetermined image data is formed on the photosensitive drum 12 using the LPH 14, developed with toner, and then primarily transferred onto the intermediate transfer belt 21. At this time, the LPH 14 uses the SLEDs 63 (Chip 1 and Chip 60) provided at both ends in the main scanning direction to form an electrostatic latent image on the same main scanning direction line. As a result, on the intermediate transfer belt 21, as shown in FIG. 13, for example, the first toner image T1 and the SLED 63 (Chip 60) formed by the electrostatic latent image created by the SLED 63 (Chip 1) are created. The second toner image T2 formed by the electrostatic latent image is transferred. At this time, if the LPH 14 is mounted obliquely on the photosensitive drum 12, the skew correction image on the intermediate transfer belt 21, that is, the first toner image T1 and the second toner image T2 correspond to the inclination. Deviation in the sub-scanning direction (skew amount) occurs.

  Next, the skew correction images formed on the intermediate transfer belt 21, that is, the first toner image T1 and the second toner image T2 are read using the image sensor 26 (step 202). At this time, the image sensor 26 outputs a deviation amount (time) between the detection timing of the first toner image T1 and the detection timing of the second toner image T2 to the skew correction value setting unit 140.

  Then, the skew amount calculation unit 141 calculates the skew amount based on the read data (deviation amount) input from the image sensor 26 in consideration of the rotation speed of the intermediate transfer belt 21 (step 203). Next, the skew correction value calculation unit 142 calculates a skew correction value for making the skew substantially parallel to the main scanning direction based on the skew amount obtained by the skew amount calculation unit 141 (step 204). In step 204, the block division number n + 1 in the main scanning direction and the division positions X1 to Xn of each block are obtained as skew correction values. The specific calculation method of the block division number n + 1 and the division positions X1 to Xn of each block is the same as that described in the first embodiment.

Further, the skew correction value correcting unit 143 corrects the skew correction value obtained by the skew correction value calculating unit 142. The specific procedure is as follows. The skew correction value correcting unit 143 first sets a = 1 (step 205), and determines whether or not the skew correction value division position Xa is an integral multiple of 256 (step 206). Here, 256 is the number of SLED chips constituting the SLED 63. If the division position Xa is an integral multiple of 256, the interchip displacement amount Y at the interchip position W corresponding to the division position Xa is read out from the EEPROM 102 (step 207). Then, the skew correction value correcting unit 143 determines whether or not the read inter-chip deviation amount Y is 0 or more (step 208). When the inter-chip deviation amount Y is 0 or more, the skew correction value correcting unit 143 sets a value obtained by subtracting 64 from the division position Xa as a new division position Xa (step 209), and this division position Xa is stored in the memory. Is stored in the EEPROM 102 (step 210). On the other hand, if the division position Xa is not an integral multiple of 256 in step 206, and if the interchip displacement amount Y at the interchip position W corresponding to the division position Xa is smaller than 0 in step 208 (a negative value) If there is, the skew correction value correcting unit 143 stores the division position Xa as it is in the EEPROM 102 which is a memory. Then, the value of a is set to a + 1 (step 211), and it is determined whether or not the value of a exceeds n, which is the number of division positions (step 212). Here, if a ≦ n, the process returns to step 206 and further continues. On the other hand, in the case of a> n, since the processing for all the divided positions has been completed, the series of processing is ended.
The skew correction value is set independently in each LPH 14 provided in the image forming units 11Y, 11M, 11C, and 11K.

  Next, further explanation will be given with a specific example. Here, the description will be made on the premise of the same conditions as in the first embodiment. That is, the skew amount obtained in step 203 is 0.5 mm, and as a result, the division positions X1 to X47 obtained in step 204 are at intervals of 320 dots, that is, the 320th dot, the 640th dot, the 960th dot,. , 15040th dot. Therefore, the skew correction value calculation unit 142 outputs the block division number 48 and the division positions X1 to X47 as skew correction values.

  Here, Table 3 shows the calculation results (Chip position) for the division positions (before correction) X1 to X47 obtained by the skew correction value calculation unit 142 and the division positions X1 to X47 obtained by the skew correction value correction unit 143. And division positions (after correction) X1 to X47 corrected by the skew correction value correction unit 143 are shown. The division position Xn (before correction) is obtained in step 204, the Chip position is obtained in step 206, and the division position Xn (after correction) is obtained in steps 206 to 210.

  In the present embodiment, the number of LEDs per SLED chip is 256 dots, and the division positions Xn are 320 dot intervals. For this reason, as shown in Table 3, the LED array boundary position and the division position Xn (specifically, X4, X8, X12, X16, X20, X24, etc.) are obtained for every 1280 dots, which is the least common multiple of 256 dots and 320 dots. X28, X32, X36, X40, X44) match. In this embodiment, when the LED array boundary position and the division position Xn coincide with each other in this way, first, in step 208, the inter-chip deviation amount Y at the LED array boundary position, that is, the corresponding inter-chip position W is 0 or more. Judgment whether or not.

  Here, referring to Table 2, the inter-chip positions W = 5, 10, 15, 20, 25, 30, corresponding to X4, X8, X12, X16, X20, X24, X28, X32, X36, X40, X44, In 35, 40, 45, 50, and 55, the inter-chip deviation amount Y at W = 10, 20, 45, and 50 is a negative value. Further, at other inter-chip positions W = 5, 15, 25, 30, 35, 40, and 55, the inter-chip deviation amount Y is a value of 0 or more.

  Here, the fact that the inter-chip deviation amount Y is a positive value means that the sub-scanning direction distance D between adjacent chips is larger than the reference distance D0. That is, adjacent chips are arranged in a state of being shifted in a direction away from the sub-scanning direction. On the other hand, the fact that the inter-chip deviation amount Y is a negative value means that the sub-scanning direction distance D between adjacent chips is smaller than the reference distance D0. That is, adjacent chips are arranged in a state of being shifted in a direction close to the sub-scanning direction.

In this embodiment, when the LED array boundary position and the division position Xn coincide with each other and the corresponding inter-chip deviation amount Y is 0 or more, the division position Xn is set to 64 in step 209. The dots are shifted upstream in the main scanning direction. Then, the division position Xn (after correction) obtained in this way is stored in the EEPROM 102.
On the other hand, even if the LED array boundary position and the division position Xn match, if the corresponding inter-chip deviation amount Y is a negative value below 0, the division position Xn is shifted. Instead, it is stored in the EEPROM 102 as it is.

  Next, the staggered correction operation and the skew correction operation of the image data in the lighting signal generation unit 110 will be described in detail with reference to the timing charts shown in FIGS. 8 and 19. In addition, this figure has shown from Chip1 to Chip11 among SLED63 which comprises LPH14, as shown to (a). Further, the horizontal axis in the figure is the dot number of each LED constituting the LPH 14, the vertical axis is time (timing), and the lower side indicates delay.

  Now, as shown in (b), it is assumed that image data for lighting all the LEDs of Chip 1 to Chip 60 (Chip 1 to Chip 11 in the figure) is input from IPS 40. Then, in the staggered array correction unit 111, as shown in (c), the output timing of the image data to the even-numbered SLED chips (Chip2, Chip4,...) Is set from the odd-numbered SLED chips (Chip1, Chip3,...). Also, staggered array correction that is delayed by a predetermined time is performed, and the staggered image data is output.

Next, the skew correction unit 112 performs skew correction on the staggered image data sent from the staggered array correction unit 111. Here, (d) shows output image data (image data after skew correction) when skew correction is performed using the division positions X1 to X47 before correction shown in Table 1. Further, (e) shows output image data (image data after skew correction) when skew correction is performed using the corrected division positions X1 to X47 shown in Table 3.
In (d), the LED array end boundary of Chip 5 and Chip 6 coincides with the block division position X4, and the LED array end boundary of Chip 10 and Chip 11 coincides with the block division position X8. On the other hand, in (e), the division position X4 is shifted upstream by 64 dots by correcting the skew correction value in the above-described procedure. However, the division position X8 is not shifted from the LED array end boundary of Chip10 and Chip11.

  For example, when the inter-chip position W (LED array boundary position) where the inter-chip deviation amount Y is 0 or more coincides with the division position (in this example, W = 5, 15, 25, 30, 35, 40, 55) The electrostatic latent image (toner image) formed at the LED array boundary position is always shifted by one line or more in the sub-scanning direction. That is, the direction in which the lines are easily noticeable. In this case, if the division position is shifted upstream by, for example, 64 dots, the amount of deviation in the sub-scanning direction of the electrostatic latent image (toner image) formed at the new division position can be reduced by one line. . Therefore, in the present embodiment, when the inter-chip position W (LED array boundary position) where the inter-chip deviation amount Y is 0 or more coincides with the division position, the division position is shifted. .

  On the other hand, for example, when the inter-chip position W (LED array boundary position) where the inter-chip deviation amount Y is smaller than 0 coincides with the division position (W = 10, 20, 45, 50 in this example), this LED array boundary An electrostatic latent image (toner image) formed at a position always has a shift amount in the sub-scanning direction of less than one line. That is, the direction in which the lines are not conspicuous is obtained. In this case, if the division position is shifted to the upstream side by 64 dots, for example, the amount of deviation in the sub-scanning direction of the electrostatic latent image (toner image) formed at the new division position becomes one line. That is, the amount of deviation in the sub-scanning direction can be reduced if the division position is not shifted. Therefore, in the present embodiment, when the inter-chip position Y is smaller than 0 (has a negative value) and the inter-chip position W coincides with the division position, the division position is not shifted and is left as it is. Yes.

  In the present embodiment, it is determined whether or not to shift the block division position only when the LED array end boundary coincides with the block division position in skew correction. Even when the block division position is set in the vicinity of the boundary, there is a concern that the line is conspicuous. Therefore, for example, even when a block division position is set in the vicinity of the LED array end boundary (for example, about 10 dots), it is preferable to determine whether or not to shift the block division position.

  In the first and second embodiments, the skew correction performed when the photosensitive drum 12 and the LPH 14 are relatively inclined has been described. However, the present invention is not limited to this. This method can also be applied to correction of a bow caused by, for example, the LPH 14 being curvedly arranged with respect to the photosensitive drum 12. However, in this case, the electrostatic latent image (toner image) using each SLED 63 (Chip 1 to Chip 60) is used as a skew correction image created in step 101 of FIG. It is necessary to grasp the amount of deviation in the scanning direction. Then, a bow correction amount (number of block divisions, block division position) of each SLED 63 is obtained based on the obtained sub-scanning direction deviation amount of each SLED 63 so that the division position of each block does not coincide with the LED array end position. You can make corrections.

  Further, in the first and second embodiments, the LPH 14 using an LED as a recording element has been described as an example. However, the present invention is not limited to this. For example, a print using a lighting element such as a liquid crystal shutter or an organic EL element is used. It can also be applied to the head. In addition, for example, the present invention can also be applied to an ink jet print head using an ink ejection element as a recording element.

1 is a diagram illustrating an overall configuration of an image forming apparatus equipped with an LED print head (LPH) to which the exemplary embodiment is applied. It is the figure which showed the structure of LPH. It is a top view of a LED circuit board. It is a figure explaining the connection part of each SLED chip. It is the figure which showed the wiring diagram currently formed on the LED circuit board. It is a circuit diagram for demonstrating the structure of a SLED chip (SLED). 6 is a timing chart for explaining LPH driving (lighting operation) in an image forming operation. It is a figure explaining the structure of a lighting signal generation part. (a)-(c) is a figure for demonstrating the relationship between the mounting state of LPH with respect to a photoconductive drum, and the electrostatic latent image formed at that time. (a)-(c) is a figure for demonstrating a problem when the division | segmentation position of the block in skew correction | amendment, and the LED array edge part position correspond. It is a figure for demonstrating the structure of a skew correction value setting part. It is a flowchart for demonstrating the setting process of a skew correction value. FIG. 6 is a diagram for explaining a first toner image and a second toner image as skew correction images formed on an intermediate transfer belt. 6 is a timing chart for explaining a staggered correction operation and a skew correction operation of image correction data in a lighting signal generation unit. (a) is a graph showing the density distribution of a halftone image formed using a skew correction value before correction of division positions, and (b) is a half formed using a skew correction value after correction of division positions. It is a graph which shows the density distribution of a tone image. (a)-(c) is a figure explaining the connection part of each SLED chip in Embodiment 2, and the position shift of the subscanning direction. (a)-(c) is a figure for demonstrating a problem when the division | segmentation position of the block in the skew correction of Embodiment 2, and the LED array edge part position correspond. 10 is a flowchart for explaining a skew correction value setting process according to the second embodiment. 12 is a timing chart for explaining a staggered correction operation and a skew correction operation of image correction data in the lighting signal generation unit of the second embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Digital color printer, 10 ... Image formation process part, 12 ... Photoconductor drum, 13 ... Charger, 14 ... LPH, 15 ... Developing device, 21 ... Intermediate transfer belt, 26 ... Image sensor, 30 ... Control part, 40 IPS (image processing unit), 63 SLED, 100 signal generation circuit, 110 lighting signal generation unit, 111 staggered array correction unit, 112 skew correction unit, 113 lighting time calculation unit, 114 serial parallel conversion 115 (115_1-115_60) ... pulse generator 130 ... transfer signal generator 140 ... skew correction value setting unit 141 ... skew amount calculation unit 142 ... skew correction value calculation unit 143 ... skew correction value correction unit , X1 to Xn ... division positions, T1 ... first toner image, T2 ... second toner image

Claims (11)

A recording element array in which a plurality of recording chips arranged in the main scanning direction are arranged in the main scanning direction; and
In a print head including a sub-scanning direction deviation correction unit that corrects a sub-scanning direction deviation by shifting image data in the sub-scanning direction for each predetermined block set in the main scanning direction.
The sub-scanning direction deviation correcting unit corrects a sub-scanning direction deviation of a recording mark using the block that can be set by shifting a division position with respect to a boundary position between the recording elements in the adjacent recording chip. Characteristic print head.   2. The print head according to claim 1, wherein the sub-scanning direction deviation correction unit corrects the sub-scanning deviation of the recording mark using the blocks set to have different lengths in the main scanning direction. The recording chips constituting the recording element array are arranged in a staggered manner,
By changing the supply timing of the recording signal to each recording chip constituting the recording element array for each recording chip array with a predetermined recording chip array as a reference, the sub-scanning direction shift of the recording mark recorded by the recording element array The print head according to claim 1, further comprising a staggered array correction unit that corrects the error. A setting unit for setting the division position;
The image processing apparatus further includes a correction unit that moves the division position from the boundary position when the division position set by the setting unit coincides with a boundary position between adjacent recording chips. The print head according to 1.   The correction unit is an image in which a position shift in the sub-scanning direction between recording chips corresponding to the boundary position is recorded by the recording element at the boundary position when the division position and the boundary position coincide with each other. The print head according to claim 4, wherein the division position is not moved from the boundary position in a direction that cancels out the sub-scanning direction deviation. A recording element array in which a plurality of recording chips arranged in the main scanning direction are arranged in the main scanning direction; and
A first sub-scanning direction deviation correction unit that corrects a sub-scanning direction deviation caused by the arrangement of the recording chips constituting the recording element array by adjusting a recording signal supply timing to each recording element;
A second sub-scanning direction deviation correction unit that corrects a sub-scanning direction deviation caused by other than the arrangement of the recording chips constituting the recording element array by shifting image data in the sub-scanning direction;
The first sub-scanning direction deviation correction unit adjusts the supply timing of the recording signal to each recording element, with one block from the boundary position of the recording element to the adjacent boundary position in the adjacent recording chip,
The second sub-scanning direction deviation correction unit shifts the image data in the sub-scanning direction with one block from a division position set at a position shifted in the main scanning direction from the boundary position to one adjacent division position. A print head characterized by that. A plurality of the recording chips are arranged in a staggered manner,
The print head according to claim 6, wherein the first sub-scanning direction deviation correction unit performs a staggered array correction of the recording chips.   The second sub-scanning direction misalignment correction unit is configured such that a skew generated when the recording element array is inclined with respect to the recording medium, or the recording element array is curved with respect to the recording medium. The print head according to claim 6, wherein the generated bow is corrected. A method for setting a sub-scanning direction deviation correction value in a print head including a recording element array in which a plurality of recording elements are arranged in a main scanning direction.
Obtaining a sub-scanning direction deviation amount of a recording mark recorded by the recording element array;
Calculating the number of blocks divided in the main scanning direction and the division position of each block in the printing element array based on the obtained sub-scanning direction deviation amount;
A step of shifting the division position in the main scanning direction with respect to the boundary position when the division position obtained by the calculation coincides with the boundary position of the recording element in the adjacent recording chip. A method for setting a scan direction deviation correction value. In the step of obtaining the sub-scanning direction shift amount of the recording mark,
Using the recording element array, forming a recording mark on a recording material,
Read the recording mark formed on the recording material,
10. The method of setting a sub-scanning direction deviation correction value in a print head according to claim 9, wherein a sub-scanning direction deviation amount at the recording mark is acquired based on a reading result of the recording mark.   10. The method for setting a sub-scanning direction deviation correction value in a print head according to claim 9, further comprising the step of storing the division position in a memory after the shifting step.

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