JP5017990B2 - Semiconductor device and wiring joining method thereof - Google Patents
Semiconductor device and wiring joining method thereof Download PDFInfo
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- JP5017990B2 JP5017990B2 JP2006264733A JP2006264733A JP5017990B2 JP 5017990 B2 JP5017990 B2 JP 5017990B2 JP 2006264733 A JP2006264733 A JP 2006264733A JP 2006264733 A JP2006264733 A JP 2006264733A JP 5017990 B2 JP5017990 B2 JP 5017990B2
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- 238000005304 joining Methods 0.000 title claims description 91
- 239000004065 semiconductor Substances 0.000 title claims description 86
- 238000000034 method Methods 0.000 title claims description 35
- 229910052751 metal Inorganic materials 0.000 claims description 100
- 239000002184 metal Substances 0.000 claims description 100
- 239000011888 foil Substances 0.000 claims description 74
- 238000003756 stirring Methods 0.000 claims description 46
- 238000003466 welding Methods 0.000 claims description 43
- 239000000758 substrate Substances 0.000 claims description 28
- 239000004020 conductor Substances 0.000 claims description 15
- 230000013011 mating Effects 0.000 claims description 11
- 238000003825 pressing Methods 0.000 description 25
- 210000003128 head Anatomy 0.000 description 15
- 229910000679 solder Inorganic materials 0.000 description 8
- 230000008646 thermal stress Effects 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000007790 solid phase Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 230000002250 progressing effect Effects 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000035882 stress Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005243 fluidization Methods 0.000 description 1
- 229910000765 intermetallic Inorganic materials 0.000 description 1
- 210000001503 joint Anatomy 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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Description
本発明は、IGBTモジュールなどのパワー半導体装置を対象とした配線構造、およびその配線構造に適用する配線接合方法,摩擦攪拌接合装置に関する。 The present invention relates to a wiring structure for a power semiconductor device such as an IGBT module, a wiring bonding method applied to the wiring structure, and a friction stir welding apparatus.
最近では、半導体チップのシュリンク化に伴いパッケージ内部の配線を在来のボンディングワイヤから通電容量,伝熱性の高いリードフレームに変更した配線構造が多く採用されるようになっている。
次に、IGBTモジュールを例に、内部配線部材にリードフレームを採用した半導体装置の従来における組立構造を図4に示す。図において、1は放熱用金属ベース、2は絶縁基板(例えばセラミック基板2aの表裏両面に厚さ0.2〜0.25mm程度の銅箔を直接接合して導体パターン2b,2cを形成したDirect Copper Bonding基板)、3は絶縁基板2の導体パターン2bに半田マウントした半導体チップ(IGBT)、3aは半導体チップ3の電極面にスパッタ成膜した金属膜(アルミ,あるいは半田との濡れ性を高めるようにアルミ膜の表面にNi−Auのメッキを施して形成した厚さ10μm程度の金属膜)、4は半導体チップ3の上面電極(IGBTのエミッタ電極)と絶縁基板2の導体パターン2bとの間にまたがって半田接合した配線部材としてのリードフレーム、5は絶縁基板2の導体パターン2bに接合して外部に引出したリードフレーム(外部導出端子)である。
Recently, with the shrinking of semiconductor chips, a wiring structure in which wiring inside a package is changed from a conventional bonding wire to a lead frame having high current carrying capacity and high heat conductivity has been adopted.
Next, FIG. 4 shows a conventional assembly structure of a semiconductor device employing a lead frame as an internal wiring member, taking an IGBT module as an example. In the figure, 1 is a heat dissipating metal base, 2 is an insulating substrate (for example, a direct conductive pattern 2b, 2c formed by directly bonding a copper foil having a thickness of about 0.2 to 0.25 mm on both front and back surfaces of a ceramic substrate 2a) (Copper Bonding Substrate) 3 is a semiconductor chip (IGBT) mounted by soldering on the conductor pattern 2b of the
ここで、リードフレーム4,5は、半導体素子の電流容量などによって異なるが、一般には幅3mm,厚さ0.5〜1.5mm程度の銅,アルミニウムまたはその合金などで作られた導体片の両端を曲げ加工してL字形の接合脚片4a,5aを形成したもので、接合脚片4a,5aを絶縁基板2の導体パターン2b,半導体チップ3の上面側金属膜3aに重ねてリフロー半田接合している。なお、その半田層を符号6で表す。
Here, the
ところで、前記のようにリードフレーム4,5を絶縁基板2,半導体チップ3に半田接合した配線構造では、半田接合時の熱履歴により接合界面に金属間化合物が生成し、これが基で接合強度が劣化して接合部の信頼性,寿命が低下する。また、絶縁基板2のセラミック基板2a,半導体チップ(Si)3とリードフレーム(銅,アルミ材)との線膨張係数差に起因して半田層6の接合界面には、熱サイクルにより繰り返し加わる応力でクラックが発生し、パワーサイクル耐性を低下させるなどの問題もある。
By the way, in the wiring structure in which the
そこで、昨今では半田を用いない接合方法として、超音波ボンディング法がワイヤボンディング,リードフレーム配線の接合に多く採用されるようになっている。また、最近では少ない熱入力で金属間を固相接合する摩擦攪拌接合法が注目され、この摩擦攪拌接合法を電子回路部品の接合に適用する(例えば、特許文献1参照)研究も進んでいる。
この摩擦攪拌接合法は、2枚の被接合金属板を突き合わせるか、あるいは重ね合わせた上で、その接合部に高速回転するピン状の回転ツール(工具と同様な超硬合金製)を押し込み、その回転により発生する摩擦熱で金属材を軟化,塑性流動させて被接合金属板を固相接合する方法であり、一般の構造物のほかに電子部品に用いる薄板(板厚0.2mm)のアルミ材を重ね合わせて回転ツールにより接合するマイクロスポット摩擦攪拌接合法の実験例も報告されている(非特許文献1参照)。
In this friction stir welding method, two metal plates to be joined are abutted or overlapped, and then a pin-shaped rotating tool (made of cemented carbide similar to a tool) is pushed into the joint. In this method, the metal material is softened and plastically flowed by frictional heat generated by the rotation, and the metal plates to be joined are solid-phase joined. In addition to general structures, a thin plate (0.2 mm thick) used for electronic components An experimental example of a microspot friction stir welding method in which aluminum materials are superposed and joined with a rotating tool has also been reported (see Non-Patent Document 1).
そこで、発明者等は前記のマイクロスポット摩擦攪拌接合法を図4の半導体装置に適用し、そのリードフレームを半導体チップの上面に摩擦攪拌接合する方法について実験,検証を試みた。図5は発明者等が行った実験による接合部の模式図であり、ここで回転ツール7として、大径なショルダーの先端に小径なピン7bを形成したものを用いた。そして、図示のように半導体チップ3の上面電極に成層した金属膜3aにリードフレーム配線4の接合脚片4a重ね合わせた上で、上方から高速回転している回転ツール7を接合脚片4aに押し込んで複数地点をスポット接合した。
Therefore, the inventors applied the above-described micro spot friction stir welding method to the semiconductor device of FIG. 4 and tried to test and verify a method of friction stir welding the lead frame to the upper surface of the semiconductor chip. FIG. 5 is a schematic view of a joint portion obtained by an experiment conducted by the inventors. Here, a rotating
上記のように回転ツール7に加圧力Fを加えながら接合脚片4aの上に押し込むと、回転ツール7の回転による摩擦熱でツール周辺の接合部材が軟化、塑性流動して攪拌され、その後に回転ツール7を引き上げるとリードフレーム配線4の接合脚片4aと接合金属膜3aとの間がスポット接合(固相接合)される。なお、図中では接合脚片4aの厚さをt1,半導体チップ3の上面に成膜した金属膜3aの膜厚t2、摩擦攪拌接合部を符号8で表している。
As described above, when the
ところで、前記した摩擦攪拌接合の実験,考察を通じて得た知見から、半導体装置の配線構造に適用するマイクロ摩擦攪拌接合の実用化には次記のような課題のあることが判った。すなわち、
(1)半導体装置に組み込むリードフレーム4,5の両端に形成した接合脚片4a,5aの外形は高々□3mm程度であり、この脚片の微小面積に回転ツールを押し込んで絶縁基板2の導電パターン2b,半導体チップ3の電極面に成膜した金属膜3aに複数地点でスポット接合するには、回転ツール7の先端径を細くする必要がある。しかしながら、先端径の細い回転ツール7では接合部に生じる発熱量が少なく、在来品と同様に板厚t1が0.5〜1.5mmである単体部品のリードフレームでは接合部材の塑性流動化が十分進まずに高信頼性の接合強度を確保するのが困難である。
(2)また、接合界面における塑性流動範囲を拡大するために、回転ツール7に加える加圧力Fを高めて先端のピン7aがリードフレーム4の接合脚片を貫通して接合相手部材の領域まで達するように深く押し込むようにすると、特に半導体チップ3に対しては、高速回転する回転ツールがチップ表面に成膜した金属膜(厚さt2が10μm程度)を突き破って半導体チップ3の電極面を損傷するほか、回転ツールに加える加圧力の集中荷重でチップ割れを引き起こすダメージの危険がある。
(3)さらに、摩擦攪拌接合の工程で回転ツールを押し当てた際に、絶縁基板,半導体チップの上に重ね合わせたリードフレームの接合脚片が連れ回りしないように接合位置に固定しておく必要があるが、半導体装置の組立構造は絶縁基板上に回路部品が高密度で実装されていることから、単純に二枚の金属板を裸の状態で接合する場合とは異なり、クリップなどの固定治具でリードフレームの接合脚片を接合位置に固定することは実際には困難である。
(4)そのほか、半導体チップ/リードフレーム間の接合部には導体チップ(Si)とリードフレーム(Cu,Al)との線膨張係数差が原因で接合部に熱応力が作用する。この場合に、半田接合では半導体チップ,リードフレームに比べてヤング率の低い半田層が熱膨張差に起因する熱応力を吸収するが、接合摩擦攪拌接合法により線膨張率の小さな半導体チップと引っ張り剛性,曲げ剛性の大きなリードフレームとの間を複数箇所でスポット接合した構造では、半田層のような緩衝層がないために熱膨張差に起因する熱応力がスポット接合部に直接作用し、このままではスポット状の接合部が剥がれるなどの破損が生じてリードフレームの通電,放熱機能がダメージを受けるほか、半導体チップの電極面も破壊されるおそれがある。
By the way, based on the knowledge obtained through the above-described experiments and considerations of friction stir welding, it has been found that there is the following problem in the practical use of micro friction stir welding applied to the wiring structure of a semiconductor device. That is,
(1) The outer shape of the joining
(2) Further, in order to expand the plastic flow range at the joining interface, the pressure F applied to the
(3) Further, when the rotary tool is pressed in the friction stir welding process, the lead frame joining leg pieces superimposed on the insulating substrate and the semiconductor chip are fixed at the joining position so that they do not rotate. Although it is necessary, the assembly structure of a semiconductor device has circuit components mounted on an insulating substrate at a high density, so it is different from simply joining two metal plates in a bare state. In practice, it is difficult to fix the joining leg piece of the lead frame at the joining position with the fixing jig.
(4) In addition, thermal stress acts on the joint between the semiconductor chip and the lead frame due to the difference in linear expansion coefficient between the conductor chip (Si) and the lead frame (Cu, Al). In this case, the solder layer having a lower Young's modulus than the semiconductor chip or lead frame absorbs the thermal stress due to the difference in thermal expansion in solder bonding, but it is pulled with the semiconductor chip having a low linear expansion coefficient by the bonding friction stir welding method. In a structure where spot bonding is performed at multiple locations between a lead frame with high rigidity and bending rigidity, there is no buffer layer such as a solder layer, so the thermal stress due to the difference in thermal expansion acts directly on the spot bonding portion and remains as it is. In such a case, damage such as peeling off of the spot-like joint portion may occur, which may damage the energization and heat dissipation function of the lead frame, and may also destroy the electrode surface of the semiconductor chip.
本発明は上記の点に鑑みなされたものであり、スポット摩擦攪拌接合法を適用して半導体チップの上面主電極に配線部材(リードフレーム)を接合した半導体装置を対象に、先記実験の考察結果を基に配線部材として使用するリードフレームを見直し、高い通電容量,放熱性の確保と併せて、半導体チップに不当な荷重を加えずに配線部材を接合して信頼性の高い接合強度が得られるように改良した半導体装置の配線構造、およびその配線構造に適用する配線接合方法,摩擦攪拌接合装置を提供することを目的とする。 The present invention has been made in view of the above points, and considers the above-mentioned experiment for a semiconductor device in which a spot friction stir welding method is applied and a wiring member (lead frame) is bonded to an upper surface main electrode of a semiconductor chip. Based on the results, the lead frame used as a wiring member was reviewed, and in addition to ensuring high current carrying capacity and heat dissipation, the wiring member was joined without applying an undue load to the semiconductor chip, resulting in a highly reliable joint strength. An object of the present invention is to provide a wiring structure of a semiconductor device improved as described above, a wiring joining method applied to the wiring structure, and a friction stir welding apparatus.
上記目的を達成するために、本発明によれば、絶縁基板にマウントした半導体チップの上面主電極と絶縁基板の導体パターンとの間に配線部材を布設し、その両端を相手部材に重ね接合した半導体装置において、
前記配線部材として、1枚の厚さが10〜100μmであるリボン状金属箔の複数枚を組にして用い、半導体チップ/配線部材間の接合部では前記金属箔の接合代を一枚ずつ前後にずらして半導体チップの電極面に成層した金属膜の上に重ね、この位置で各枚ごとに金属箔の接合代と半導体チップの金属膜との間を複数地点でスポット状に摩擦攪拌接合するものとし(請求項1)、好ましくは前記金属箔の接合代の一部を隣接する金属箔の接合端部に重ねて接合するようにする(請求項2)。
In order to achieve the above object, according to the present invention, a wiring member is laid between the upper surface main electrode of a semiconductor chip mounted on an insulating substrate and a conductor pattern of the insulating substrate, and both ends thereof are overlapped and bonded to a mating member. In semiconductor devices,
As the wiring member, a plurality of ribbon-like metal foils each having a thickness of 10 to 100 μm are used as a set, and at the junction between the semiconductor chip and the wiring member, the metal foil joining margin is about one by one. And overlaid on the metal film layered on the electrode surface of the semiconductor chip, and at this position, the friction stir welding is performed at multiple points in a spot shape between the metal foil bonding margin and the metal film of the semiconductor chip. (Claim 1) Preferably, a part of the joining margin of the metal foil is overlapped and joined to the joining end of the adjacent metal foil (Claim 2).
一方、本発明によれば、絶縁基板にマウントした半導体チップの上面主電極と絶縁基板の導体パターンとの間に配線部材を布設し、その両端を相手部材に重ね接合する半導体装置の配線接合方法であって、前記配線部材として、1枚の厚さが10〜100μmであるリボン状金属箔の複数枚を組にして用い、半導体チップ/配線部材間の接合部では前記金属箔の接合代を一枚ずつ前後にずらして半導体チップの電極面に成層した金属膜の上に重ね、相手部材の上に重ね合わせた金属箔の接合代をその接合位置から動かないように押え込み保持し、この状態で上方から回転ツールを接合代に押し込んで各枚ごとに金属箔の接合代と半導体チップの金属膜との間を複数地点でスポット状に摩擦攪拌接合するようにし(請求項3)、また、金属箔と接合相手部材との線膨張係数差によりスポット接合部に作用する熱応力を低減策として、金属箔の接合代に対して最初の地点をスポット接合した後、次のスポット接合地点との間で接合代をアーチ状に撓ませた上で次の地点に回転ツールを押し込んでスポット接合するようにする(請求項4)。 On the other hand, according to the present invention, a wiring bonding method for a semiconductor device, in which a wiring member is laid between a top main electrode of a semiconductor chip mounted on an insulating substrate and a conductor pattern of the insulating substrate, and both ends thereof are overlapped and bonded to a mating member. In this case, as the wiring member, a plurality of ribbon-shaped metal foils each having a thickness of 10 to 100 μm are used as a set, and the joining margin of the metal foil is used at the junction between the semiconductor chip and the wiring member. Move the metal foil layered on the electrode surface of the semiconductor chip one by one and move it back and forth, and hold the metal foil stacked on the mating member in place so that it does not move from its bonding position. Then, the rotary tool is pushed into the joining allowance from above, and the friction stir welding is performed in a spot form at a plurality of points between the joining allowance of the metal foil and the metal film of the semiconductor chip for each sheet (Claim 3), Metal foil and As a measure to reduce the thermal stress acting on the spot joint due to the difference in coefficient of linear expansion from the mating member, after joining the first spot with respect to the joining margin of the metal foil, joining with the next spot joining point After bending the allowance into an arch shape, the rotary tool is pushed into the next point to perform spot joining.
さらに、前記の配線接合方法に適用する本発明の摩擦攪拌接合装置は、縦送り,横送り可能な移動テーブル機構に搭載して駆動主軸に連結した回転ツールと、回転ツールを挟んでその左右に配し、かつ押しばねを介して前記移動テーブルに吊り下げ支持した一対の押えアームと、該アームの先端に連結して金属箔の接合代をスポット接合位置に保持する押さえ込みヘッドを具備した構成とし、具体的には押え込みヘッドを次記のような態様で構成する。
(1)押え込みヘッドは、押えアームの先端に跨がって首振り自在に軸支連結するとともに、該ヘッドの中央に回転ツールの通し穴を開口する。
(2)前項(1)において、押え込みヘッドの下面を凹凸状に粗面化(表面にローレット目を形成)するか、もしくはゴムなどの摩擦係数が大きいスリップ防止層を成層する。
Further, the friction stir welding apparatus of the present invention applied to the above-described wiring joining method includes a rotary tool mounted on a movable table mechanism capable of vertical feed and lateral feed and connected to a drive spindle, and a left and right side of the rotary tool. arranged, and press and a pair of presser arms suspended and supported on the moving table via a spring, a structure in which the bonding margins of the metal foil is connected to the distal end of the arm comprises a hold-down head to hold the spot joining position the specifically hold-down head configured in such a manner the following SL.
(1) The presser head is pivotally coupled so as to swing freely across the tip of the presser arm, and a through hole of the rotary tool is opened at the center of the head .
(2) In the above item (1), the lower surface of the pressing head is roughened (formed with knurled eyes on the surface), or an anti-slip layer having a large friction coefficient such as rubber is formed .
上記した半導体装置の配線構造,およびその配線構造に適用する配線接合方法によれば、配線部材(リードフレーム)として、1枚の厚さが薄いリボン状金属箔の複数枚を組にして用い、半導体チップに対しては金属箔の接合代を一枚ずつ前後にずらして半導体チップの電極面に成層した金属膜の上に重ねて摩擦攪拌接合法でスポット接合したことにより、複数枚の金属箔で必要な通電容量と放熱性を確保しつつ、回転ツールを押し込む摩擦攪拌接合工程では半導体チップにダメージを与えるおそれなしに信頼性の高い接合が実現できる。 According to the wiring structure of the semiconductor device and the wiring bonding method applied to the wiring structure, a plurality of ribbon-shaped metal foils each having a small thickness are used as a wiring member (lead frame). For semiconductor chips, the metal foil bonding margins are shifted one by one back and forth, and are superimposed on the metal film layered on the electrode surface of the semiconductor chip and spot-bonded by the friction stir welding method. In the friction stir welding process in which the rotating tool is pushed in while ensuring the necessary current carrying capacity and heat dissipation, it is possible to achieve highly reliable bonding without fear of damaging the semiconductor chip.
また、金属箔はその接合代の一部を隣接する金属箔の接合端部に重ねて接合するようにすることにより、面積の限られた半導体チップの上面電極面に複数枚の金属箔をスペース効率よく布設接合できるほか、この接合代の重なり部分に回転ツールに加える加圧力を分散させ、半導体チップへの集中荷重を避けて安全に接合が行える。
さらに、金属箔の接合代に対して複数地点をスポット接合する際に、最初の地点をスポット接合した後、次のスポット接合地点との間で接合代をアーチ状に撓ませた上で次の地点に回転ツールを押し込んでスポット接合するようにすることで、半導体チップ/金属箔の熱膨張差に起因してスポット接合地点の間に作用する熱応力を前記アーチ形状の変形により効果的に吸収緩和することができて接合部破損を防止できる。
In addition, a part of the metal foil is overlapped and joined to the joint end part of the adjacent metal foil, so that a plurality of metal foils are spaced on the upper electrode surface of the semiconductor chip having a limited area. In addition to efficient laying and joining, the pressure applied to the rotating tool can be dispersed in the overlapping part of the joining allowance, and safe joining can be performed while avoiding concentrated loads on the semiconductor chip.
Furthermore, when spot-joining a plurality of points with respect to the joining margin of the metal foil, after spot joining the first spot, the joining margin is bent in an arch shape with the next spot joining spot, and then the next spot is joined. By inserting a rotary tool into the spot and performing spot bonding, the thermal stress acting between the spot bonding points due to the difference in thermal expansion of the semiconductor chip / metal foil is effectively absorbed by the deformation of the arch shape. It can be mitigated and joint damage can be prevented.
一方、前記した配線接合方法の実施に適用する本発明の摩擦攪拌接合装置では、回転ツールに併設して金属箔の接合代を接合位置に押さえ込む機構を設けたことにより、半導体装置の組立構造に制約されることなく配線部材の摩擦攪拌接合を作業能率よく行うことができる。また、その接合工程で移動テーブル機構の横送り機能を活用することで、金属箔の接合代にスポット接合地点間の熱応力吸収部として機能するアーチ形状を形成させることができる。 On the other hand, in the friction stir welding apparatus of the present invention applied to the implementation of the above-described wiring bonding method, a mechanism for pressing the metal foil bonding allowance to the bonding position is provided in addition to the rotary tool, so that the assembly structure of the semiconductor device is achieved. Friction stir welding of the wiring members can be performed efficiently without restriction. Further, by utilizing the lateral feed function of the moving table mechanism in the joining process, it is possible to form an arch shape that functions as a thermal stress absorbing portion between spot joining points in the joining margin of the metal foil.
以下、本発明の実施の形態を図1〜図3に示す実施例に基づいて説明する。なお、図1は半導体チップに対する配線構造を表す図、図2は図1の配線構造に適用する摩擦攪拌接合装置の構成図、図3は図2の摩擦攪拌接合装置による接合工程の説明図であり、実施例の図中で図4,図5に対応する部材には同じ符号を付してその詳細な説明は省略する。
まず、図1(a),(b)において、9は銅,アルミニウムまたはその合金で作られた厚さ10〜100μmのリボン状金属箔で、複数枚の金属箔9を組とする配線部材(リードフレーム)4を半導体チップ3の上面主電極と絶縁基板の導体パターン(図4参照)との間に布設し、以下に述べる摩擦攪拌接合法により各枚の金属箔9を相手部材に接合している。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below based on the examples shown in FIGS. 1 is a diagram showing a wiring structure for a semiconductor chip, FIG. 2 is a configuration diagram of a friction stir welding apparatus applied to the wiring structure of FIG. 1, and FIG. 3 is an explanatory diagram of a joining process by the friction stir welding apparatus of FIG. In the drawings of the embodiment, members corresponding to those in FIGS. 4 and 5 are denoted by the same reference numerals, and detailed description thereof is omitted.
First, in FIGS. 1A and 1B, 9 is a ribbon-like metal foil having a thickness of 10 to 100 μm made of copper, aluminum, or an alloy thereof, and a wiring member (set of a plurality of metal foils 9). A lead frame 4 is laid between the upper main electrode of the
すなわち、前記金属箔9はその端部をL形に折り曲げて接合代9a(接合代の幅:d)を形成し、半導体チップ3に対しては金属箔9の接合代9aを図示のように1枚ずつ前後にずらして半導体チップ3の上面電極に成膜した金属膜3aの上に重ね合わせ、この位置で接合代9aの各枚ごとに図5で述べた回転ツール7を上方から押し込んで金属膜3aとの間をスポット接合しており、図示例では3箇所をスポット接合してその接合地点をS1〜S3で示す。また、その接合手順は最初に図示の右端に並ぶ1枚の金属箔9を所定位置に重ね合わせて摩擦攪拌接合によりスポット接合する。次に2枚目の金属箔を1枚目の金属箔からずらした位置に並べ、その接合代9aの一部(Δd)が既に接合されている金属箔の接合代9aの上に重なるように配置してスポット接合する。以下、同様な手順により残る金属箔9の接合代9aをスポット接合する。
That is, the end portion of the
上記のように、配線部材4を複数枚の薄い金属箔9に分けた上で、各枚ごとに金属箔9の接合代9aを前後にずらすように配列して半導体チップ3の上面電極に成層した金属膜3aの上にスポット摩擦攪拌接合した配線構造とすることにより、複数枚の金属箔9を通電,伝熱路として半導体装置に必要な通電容量,放熱性を確保できる。また、図示例のように隣合う金属箔9の間で接合代9aの一部を互いに重ねるように配列することで、限られた半導体チップ上の接合面域に接合する金属箔の枚数を増やして通電容量を高めることができる。
As described above, after the wiring member 4 is divided into a plurality of thin metal foils 9, the joining
また、配線部材4として前記の金属箔9を用いることにより、板厚が厚い単一部品のリードフレーム(図4参照)を半導体チップ3の上面に重ねて摩擦攪拌接合する場合と比べて、回転ツール7に加える加圧力F(図5参照)を低く抑えて半導体チップ3に過度な押圧荷重を加えることなしに接合が行える。さらに、金属箔9の引っ張り,曲げ剛性は単一部品のリードフレームと比べて小さく、半導体チップ3との線膨張係数差に起因してスポット接合部に作用する熱応力を金属箔9の変形で吸収緩和することができる。
Further, by using the
なお、金属箔9の他端は図4で述べたように絶縁基板2の導体パターンに接合されるが、この導体パターンとの間の接合には必ずしも図1のように金属箔9を各枚ごとに分けて相手部材に摩擦攪拌接合する必要はなく、例えば複数枚の金属箔の接合代を束状に重ね合わせたまま一括して導体パターンに摩擦攪拌接合するようにしてもよい。すなわち、絶縁基板2のセラミック基板2aは半導体チップ3と比べて堅牢であり、導体パターン2bの金属箔厚さ(約0.25mm)は半導体チップ3の電極面に成層した金属膜3a(約10μm)と比べて厚い。したがって、回転ツール7に大きな加圧力F(図5参照)を加えても問題なく複数枚の金属箔9を一括して絶縁基板2の導体パターンに摩擦攪拌接合することが可能である。また、図4における外部端子のリードフレーム5についても、前記と同様な理由から板厚の厚い単一部品のリードフレームをそのまま採用して摩擦攪拌接合することが可能である。
The other end of the
次に、前記した配線構造に適用して金属箔9を相手部材に接合する摩擦攪拌接合装置(製造装置)の構成を図2に示す。図2(a),(b)において、10は回転ツール7および後記の金属箔押え込み機構を搭載した縦送り,横送りが可能な移動テーブル機構であり、回転ツール7は移動テーブル機構10に軸受支持した上で駆動源11の主軸に連結している。また、金属箔押え込み機構は回転ツール7を挟んでその左右両側に並ぶ一対の押えアーム12と、押えアーム12の先端に連結した押え込みヘッド13との組立体になり、前記押えアーム12は押しばね(圧縮コイルばね)14を介して移動テーブル機構10に吊り下げ支持されている。
Next, FIG. 2 shows a configuration of a friction stir welding apparatus (manufacturing apparatus) that is applied to the above-described wiring structure and joins the
ここで、押え込みヘッド13は、後述のように摩擦攪拌接合工程で金属箔9を接合位置から動かないように押さえ込む治具の役目を果たすものであり、その左右両端が支軸13aを介して押えアーム12の間に跨がって首振り自在に連結支持されており、ヘッドの中央には回転ツール4の通し穴13bが開口している。また、図示してないが、押え込みヘッド13の下面には、例えばローレット目を形成するなどして凹凸面状に粗面化しておくか、あるいはゴムなどの摩擦係数の大きな材質を成層しておき、金属箔9の接合代9aを確実に押さえ込むようにしている。
Here, the
次に、上記の摩擦攪拌接合装置を使用して半導体チップ/金属箔間を摩擦攪拌スポット接合する接合工程を図3(a)〜(d)により説明する。まず、図3(a)のように半導体チップ3の上面に1枚の金属箔9の接合代9aを所定位置に重ねた状態で、あらかじめ指定した第1の接合地点S1に向けて前記の移動テーブル機構10を移動し、P1位置で移動テーブル機構10を下降して押え込みヘッド13により金属箔9の接合代9aを半導体チップ3の上に押さえ込む。次いで高速回転している回転ツール7を下降してその先端をスポット接合地点S1に押し込み、接合地点S1をスポット接合する。
Next, a joining process for joining the semiconductor chip / metal foil with the friction stir spot using the above friction stir welding apparatus will be described with reference to FIGS. First, as shown in FIG. 3A, the above-mentioned movement toward the first joint point S1 designated in advance is performed in a state where the
なお、この場合に金属箔9は押え込みヘッド13により接合位置に押え込み保持されているので回転ツール7と一緒に連れ回りすることはない。また、押え込みヘッド13は首振り自在に軸支されており、図1で述べたように金属箔9の接合代9aの一部を隣接する接合代の上に重ねて段差が生じても、この段差に順応して接合代9aを確実に押さえ込むことができる。また、回転ツール7の下降に伴い押え込みヘッド13との当接面に一定以上の押圧力が加わると、移動テーブル機構10と押えアーム12との間に介挿した押しばね14が圧縮して半導体チップ3に過大な荷重が掛かるのを防ぐようにしている。
In this case, since the
そして、第1地点S1のスポット接合が済むと、図3(b)で示すように移動テーブル機構10を一旦引き上げて次の第2の接合地点S2に向けて移動するが、この移動過程では第2の接合地点S2を通り越した位置P2まで移動し、この位置で押え込みヘッド13を下降して金属箔9の接合代9aを押え込む。続いて接合代9aを押え込んだまま移動テーブル機構を横送りして第2の接合地点S2に対応する位置P3に移動する(図3(c)参照)。これにより、金属箔9の接合代9aは既にスポット接合済みの接合地点S1との間の領域が撓んで図示の様なアーチ形状部9bが形成される。その後に回転ツール7を下降して接合代9aに押し込み、第2の接合地点S2をスポット接合する。
After the spot joining at the first point S1, the moving
このように移動テーブル機構10の横送り機能を利用して金属箔9のスポット接合地点間にアーチ形状部9bを形成することにより、線膨張係数の異なる半導体チップ3/金属箔9の間に発生する熱応力を前記のアーチ形状部9bの変形で吸収して、スポット接合部に作用する応力を緩和できる。
なお、上記の実施例では、半導体チップ3の上面側電極の金属膜3aに配線部材として金属箔9の接合代9aを重ねて摩擦攪拌接合する場合を例に説明したが、半導体チップ3の上面側電極にヒートスプレッダを半田接合した上で、このヒートスプレッダの上面に金属箔9を摩擦攪拌接合するようにすることもできる。
As described above, the arch-shaped
In the above-described embodiment, the case where the joining
2 絶縁基板
2a セラミック基板
2b 導体パターン
3 半導体チップ
3a 金属膜
4,5 リードフレーム(配線部材)
7 回転ツール
8 摩擦攪拌接合部
9 金属箔
9a 接合代
10 摩擦攪拌接合装置(製造装置)の移動テーブル機構
12 押えアーム
13 押え込みヘッド
13a 首振り支軸
13b ツール通し穴
14 押しばね
2 Insulating substrate 2a Ceramic substrate 2b
DESCRIPTION OF
Claims (4)
前記配線部材として、1枚の厚さが10〜100μmであるリボン状金属箔の複数枚を組にして用い、半導体チップ/配線部材間の接合部では前記金属箔の接合代を一枚ずつ前後にずらして半導体チップの電極面に成層した金属膜の上に重ね、各枚ごとに金属箔の接合代と半導体チップの金属膜との間を複数地点でスポット状に摩擦攪拌接合したことを特徴とする半導体装置。 In the semiconductor device in which a wiring member is laid between the upper surface main electrode of the semiconductor chip mounted on the insulating substrate and the conductor pattern of the insulating substrate, and both ends thereof are overlapped and joined to the mating member.
As the wiring member, a plurality of ribbon-like metal foils each having a thickness of 10 to 100 μm are used as a set, and at the junction between the semiconductor chip and the wiring member, the metal foil joining margin is about one by one. It is superimposed on the metal film layered on the electrode surface of the semiconductor chip, and the friction stir welding is performed in a spot shape at multiple points between the metal foil bonding margin and the semiconductor chip metal film for each sheet. A semiconductor device.
前記配線部材として、1枚の厚さが10〜100μmであるリボン状金属箔の複数枚を組にして用い、半導体チップ/配線部材間の接合部では前記金属箔の接合代を一枚ずつ前後にずらして半導体チップの電極面に成層した金属膜の上に重ね、相手部材の上に重ね合わせた金属箔の接合代をその接合位置から動かないように押え込み保持し、この状態で上方から回転ツールを接合代に押し込んで各枚ごとに金属箔の接合代と半導体チップの金属膜との間を複数地点でスポット状に摩擦攪拌接合することを特徴とする半導体装置の配線接合方法。 A wiring bonding method of a semiconductor device in which a wiring member is laid between a top surface main electrode of a semiconductor chip mounted on an insulating substrate and a conductive pattern of the insulating substrate, and both ends thereof are overlapped and bonded to a mating member ,
As the wiring member, a plurality of ribbon-like metal foils each having a thickness of 10 to 100 μm are used as a set, and at the junction between the semiconductor chip and the wiring member, the metal foil joining margin is about one by one. The metal foil layered on the electrode surface of the semiconductor chip is placed on the surface of the semiconductor chip, and the metal foil superimposed on the mating member is pressed and held so that it does not move from its position. A wiring joining method for a semiconductor device, characterized in that a tool is pushed into a joining margin, and a friction stir welding is performed in a spot shape at a plurality of points between a joining margin of a metal foil and a metal film of a semiconductor chip for each sheet .
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