JP5016810B2 - Catalytic chemical vapor deposition apparatus, chemical vapor deposition method using this apparatus, and self-cleaning method for this apparatus - Google Patents

Catalytic chemical vapor deposition apparatus, chemical vapor deposition method using this apparatus, and self-cleaning method for this apparatus Download PDF

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JP5016810B2
JP5016810B2 JP2005345095A JP2005345095A JP5016810B2 JP 5016810 B2 JP5016810 B2 JP 5016810B2 JP 2005345095 A JP2005345095 A JP 2005345095A JP 2005345095 A JP2005345095 A JP 2005345095A JP 5016810 B2 JP5016810 B2 JP 5016810B2
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徹志 藤長
牧子 北添
博巳 伊藤
斎藤  一也
伸 浅利
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Ulvac Inc
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Description

本発明は、触媒線化学気相成長装置(以下、触媒CVD装置と称す)、この装置を用いた化学気相成長方法、及びこの装置のセルフクリーニング方法に関し、特に触媒線間に電位差を発生させる外部電源回路を備えた触媒CVD装置、この装置を用いた化学気相成長方法、及びこの装置のセルフクリーニング方法に関するものである。   The present invention relates to a catalytic line chemical vapor deposition apparatus (hereinafter referred to as a catalytic CVD apparatus), a chemical vapor deposition method using this apparatus, and a self-cleaning method for this apparatus, and in particular, generates a potential difference between catalytic lines. The present invention relates to a catalytic CVD apparatus provided with an external power supply circuit, a chemical vapor deposition method using this apparatus, and a self-cleaning method for this apparatus.

従来の触媒CVD装置は、単一の触媒線を用い、この触媒線を加熱するための通電用電源回路以外には外部電源回路を持っていないものであるため、又は触媒線と電気的に絶縁されたチャンバに対し、外部から直流若しくは高周波の電圧を付加するものであるため、アーク放電の危険やプラズマによる基板へのダメージが問題となっていた。   The conventional catalytic CVD apparatus uses a single catalyst wire and does not have an external power supply circuit other than an energizing power supply circuit for heating the catalyst wire, or is electrically insulated from the catalyst wire. Since a direct-current or high-frequency voltage is applied to the chamber from the outside, there is a problem of danger of arc discharge and damage to the substrate due to plasma.

例えば、触媒線と基板との間に直流電圧を印加し、堆積種を加速させる触媒線化学気相成長(例えば、特許文献1参照)や、触媒線と基板間にRF電圧を印加してプラズマを発生させる触媒CVD装置(例えば、特許文献2参照)が知られている。これらの装置の場合、基板のダメージが生じる等の恐れがあった。
特開2000−223421号公報(特許請求の範囲等) 特開2003−347224号公報(特許請求の範囲及び図1等)
For example, a direct-current voltage is applied between the catalyst line and the substrate to accelerate the deposition species (see, for example, Patent Document 1), or an RF voltage is applied between the catalyst line and the substrate to generate plasma. There is known a catalytic CVD apparatus (see Patent Document 2, for example). In the case of these devices, there is a risk that the substrate may be damaged.
JP 2000-223421 A (Claims etc.) JP 2003-347224 A (Claims and FIG. 1 etc.)

本発明の課題は、上述の従来技術の問題点を解決することにあり、基板上部に配置された複数の触媒線間に電位差を発生せしめ、この電位差を利用して成膜速度の向上を図ると共に、基板へのダメージを減少させることを可能とする触媒CVD装置、この装置を用いた化学気相成長方法、及びこの装置のセルフクリーニング方法を提供することにある。   An object of the present invention is to solve the above-described problems of the prior art. A potential difference is generated between a plurality of catalyst wires arranged on the upper part of the substrate, and the film formation speed is improved by using the potential difference. The present invention also provides a catalytic CVD apparatus capable of reducing damage to the substrate, a chemical vapor deposition method using this apparatus, and a self-cleaning method for this apparatus.

本発明の触媒CVD装置は、ガス導入系及び排気系を有する成膜チャンバ、該成膜チャンバ内に配置されている複数の触媒線と、各触媒線への通電用電源と、各触媒線に異なる電圧を印加し、印加した電圧の差分の電位差を触媒線間に発生させる外部電源回路とを備えることを特徴とする。 The catalytic CVD apparatus of the present invention includes a film forming chamber having a gas introduction system and an exhaust system, a plurality of catalyst wires arranged in the film forming chamber , a power supply for energizing each catalyst wire, and each catalyst wire. different voltage is applied to the difference potential difference of the applied voltage, characterized in that to obtain Bei an external power source circuit that generates between the catalyst line.

前記複数の触媒線は、成膜チャンバ内に載置される基板の表面に対して平行に配置されていることを特徴とする。   The plurality of catalyst wires are arranged in parallel to the surface of the substrate placed in the film forming chamber.

前記複数の触媒線はまた、成膜チャンバ内に載置される基板の中心に対して同心円形状又は同心多角形状の同心形状であって、かつ基板表面に対して平行に配置されていることを特徴とする。このように、同心形状とすることにより、形成する膜の物性や厚みの分布を均一にし易い。   The plurality of catalyst wires are also concentric with a concentric circle shape or a concentric polygon shape with respect to the center of the substrate placed in the film forming chamber, and are arranged parallel to the substrate surface. Features. Thus, by making it a concentric shape, it is easy to make uniform the physical property and thickness distribution of the film | membrane to form.

前記複数の触媒線はまた、成膜チャンバ内に載置される基板の表面に対して平行であって、かつ触媒線同士が交差して配置されていることを特徴とし、網目状に配置されていることが好ましい。   The plurality of catalyst wires are parallel to the surface of the substrate placed in the film forming chamber, and the catalyst wires are arranged so as to intersect with each other, and are arranged in a mesh shape. It is preferable.

上記のように、同心形状に複数の触媒線を配置させ、その内周−外周間又はその内側から外側へと交互に電位差を発生させることにより、所期の目的を達成できる。また、上記のように複数の触媒線を平行に配置させ、平行に並んだ触媒線に交互に電位差を発生させることにより、所期の目的を達成できる。さらに、水平配置−垂直配置された触媒線の間に電位差を発生させることにより、所期の目的を達成できる。   As described above, the intended purpose can be achieved by arranging a plurality of catalyst wires in a concentric shape and alternately generating a potential difference between the inner periphery and the outer periphery or from the inner side to the outer side. Moreover, the intended purpose can be achieved by arranging a plurality of catalyst wires in parallel as described above and alternately generating a potential difference between the parallel catalyst wires. Furthermore, the intended purpose can be achieved by generating a potential difference between the horizontally arranged and vertically arranged catalyst wires.

前記触媒線は、W、Mo及びTaから選ばれた少なくとも1種の金属又はこれら金属の少なくとも1種を含む合金から構成されたものであることが好ましい。   The catalyst wire is preferably composed of at least one metal selected from W, Mo and Ta or an alloy containing at least one of these metals.

前記外部電源回路は、外部印加用直流電圧電源、外部印加用交流電圧電源、又は外部印加用直流電圧電源と外部印加用交流電圧電源とを組み合わせた電源からなる電源回路であることを特徴とする。   The external power supply circuit is a power supply circuit composed of a power supply composed of a DC voltage power supply for external application, an AC voltage power supply for external application, or a combination of a DC voltage power supply for external application and an AC voltage power supply for external application. .

前記外部電源回路は、前記触媒線と通電用電源との間に接続されており、また、電源保護用回路を備えていることが好ましい。   The external power supply circuit is preferably connected between the catalyst wire and a power supply for energization, and further includes a power supply protection circuit.

本発明の触媒CVD装置は、加熱した各触媒線に原料ガスを接触させて分解せしめ、薄膜を形成せしめる方法を実施するために用いることができると共に、セルフクリーニングを行うことが可能な装置である。   The catalytic CVD apparatus of the present invention is an apparatus that can be used for carrying out a method in which a raw material gas is brought into contact with each heated catalyst wire to be decomposed to form a thin film and can be self-cleaned. .

本発明の化学気相成長方法は、成膜チャンバ内に配置されている複数の触媒線の各触媒線へ通電用電源から電流を流して各触媒線を所定の温度に加熱せしめ、外部電源回路から各触媒線に異なる電圧を印加してその印加した電圧の差分の電位差を触媒線間に発生させ、成膜用原料を成膜チャンバ内へ導入し、加熱した触媒線と接触させて、該複数の触媒線に対向して載置された基板上に成膜することを特徴とする。 Chemical vapor deposition method of the present invention, allowed heating by passing a current from the current supply source to the catalytic wire of a plurality of catalytic wire disposed in the film-forming chamber of each catalytic wire to a predetermined temperature, the external power supply circuit A different voltage is applied to each catalyst line to generate a potential difference of the difference between the applied voltages between the catalyst lines, a film forming material is introduced into the film forming chamber, and brought into contact with the heated catalyst line. A film is formed on a substrate placed opposite to a plurality of catalyst wires.

前記成膜用原料として、シラン、アンモニア、水素、酸化窒素、トリメチルアミン、トリメチルジシラン、ヘキサメチルジシラザン、及びトリシリルアミンから選ばれた少なくとも1種の化合物のガスを使用することができる。   As the film forming raw material, a gas of at least one compound selected from silane, ammonia, hydrogen, nitric oxide, trimethylamine, trimethyldisilane, hexamethyldisilazane, and trisilylamine can be used.

本発明の触媒CVD装置のセルフクリーニング方法は、成膜チャンバ内に、セルフクリーニングガスとして、三弗化窒素、弗化水素、六弗化硫黄、四弗化炭素及び三弗化塩素から選ばれた少なくとも1種のハロゲン含有ガスを導入し、そして外部電源回路から、成膜チャンバ内に設けた複数の触媒線の各触媒線に異なる電圧を印加して、その印加した電圧の差分の負の電位差を触媒線間に発生させ、成膜チャンバ内のセルフクリーニングを行うことを特徴とする。 The self-cleaning method of the catalytic CVD apparatus of the present invention is selected from nitrogen trifluoride, hydrogen fluoride, sulfur hexafluoride, carbon tetrafluoride and chlorine trifluoride as the self-cleaning gas in the film forming chamber. At least one halogen-containing gas is introduced, and a different voltage is applied to each catalyst line of the plurality of catalyst lines provided in the film formation chamber from the external power supply circuit, and a negative potential difference of the difference between the applied voltages Is generated between the catalyst wires to perform self-cleaning in the film formation chamber.

前記セルフクリーニング方法はまた、外部電源回路から、成膜チャンバ内に設けた複数の触媒線の各触媒線に異なる電圧を印加して、その印加した電圧の差分の負の電位差を触媒線間に発生させ、そして成膜チャンバ内に、セルフクリーニングガスとして、三弗化窒素、弗化水素、六弗化硫黄、四弗化炭素及び三弗化塩素から選ばれた少なくとも1種のハロゲン含有ガスを導入し、成膜チャンバ内のセルフクリーニングを行っても良い。 In the self-cleaning method, a different voltage is applied to each catalyst line of the plurality of catalyst lines provided in the film formation chamber from an external power supply circuit, and a negative potential difference of the applied voltage difference is applied between the catalyst lines. And at least one halogen-containing gas selected from nitrogen trifluoride, hydrogen fluoride, sulfur hexafluoride, carbon tetrafluoride and chlorine trifluoride as a self-cleaning gas in the film forming chamber. It may be introduced and self-cleaning in the film formation chamber may be performed.

前記ハロゲン含有ガスの代わりに又はこのハロゲン含有ガスと一緒に触媒成分金属と同じ金属を含有するハロゲン化物ガスを導入しても良い。   A halide gas containing the same metal as the catalyst component metal may be introduced instead of or together with the halogen-containing gas.

前記のように、各触媒線に印加した異なる電圧の差分の負の電位差を各触媒線間に発生させることで、セルフクリーニングを行う際、触媒線間で電子のやり取りが行われ、触媒線の防食が可能となる。
As described above, the negative potential difference of different voltages applied to the respective catalytic wire by generating between the catalytic wire, when performing self-cleaning, electronic exchange is performed between the catalytic wire, the catalytic wire Corrosion protection is possible.

本発明の触媒CVD装置では、複数の触媒線の配置形状を特定の構成とすると共に、触媒線間に電位差を発生させる外部電源回路を備えていることから、この装置を用いて行う化学気相成長を利用した成膜プロセスにおいて、成膜速度の向上を達成できると共に、基板のダメージを減少でき、リーク電流を減少できるという効果を奏する。   In the catalytic CVD apparatus of the present invention, the arrangement shape of the plurality of catalyst lines has a specific configuration, and an external power supply circuit that generates a potential difference between the catalyst lines is provided. In the film forming process using growth, the film forming speed can be improved, the substrate damage can be reduced, and the leakage current can be reduced.

また、本発明の触媒CVD装置は、上記のように構成されていることから、クリーニングガスを導入することにより、触媒線の腐食を防止しながら、成膜チャンバ内のセルフクリーニングも可能であるという効果を奏する。   In addition, since the catalytic CVD apparatus of the present invention is configured as described above, by introducing a cleaning gas, self-cleaning in the film forming chamber is possible while preventing corrosion of the catalyst wire. There is an effect.

本発明の触媒CVD装置では、複数の触媒線が成膜チャンバ内に配置され、この触媒線のそれぞれに通電用電源が接続されると共に、触媒線と通電用電源との間に接続された外部印加用直流電圧電源、外部印加用交流電圧電源、及び外部印加用直流電圧電源と外部印加用交流電圧電源とを組み合わせた電源からなる選ばれた電源回路により、各触媒線に印加した電圧の差分の電位差を触媒線間に発生させるように構成されている。   In the catalytic CVD apparatus of the present invention, a plurality of catalyst wires are arranged in the film forming chamber, and an energizing power source is connected to each of the catalyst wires, and an external device connected between the catalyst wire and the energizing power source. Difference in voltage applied to each catalyst line by selected power supply circuit consisting of DC voltage power supply for application, AC voltage power supply for external application, and power supply that combines DC voltage power supply for external application and AC voltage power supply for external application The potential difference is generated between the catalyst wires.

本発明によれば、上記のように外部電源回路を設けているので、従来技術におけるような触媒線−チャンバ間に発生する電位ではなく、触媒線−触媒線間に発生させた電位差を用いて成膜速度の向上を図ることが可能になると共に、基板上部に配置された触媒線間に電位差を発生させることで、プラズマ等による基板へのダメージを減少させることが可能になる触媒CVD装置が提供され得る。   According to the present invention, since the external power supply circuit is provided as described above, the potential difference generated between the catalyst line and the catalyst line is used instead of the potential generated between the catalyst line and the chamber as in the prior art. There is provided a catalytic CVD apparatus capable of improving the deposition rate and reducing the damage to the substrate due to plasma or the like by generating a potential difference between the catalyst wires arranged on the upper part of the substrate. Can be provided.

上記装置においては、触媒線間に電位差を発生させる電位として、直流、交流又は直流と交流との組み合わせから生ずる電位のいずれをも使用できるというメリットがある。   In the above apparatus, there is an advantage that any potential generated from a combination of direct current, alternating current, or direct current and alternating current can be used as a potential for generating a potential difference between the catalyst wires.

上記のような触媒CVD装置では、複数の触媒線が上記したように触媒間に電位差を発生させ得るように構成されていれば、その構成に制限はなく、触媒線がどのような形状で配置されていても良く、例えば、以下の実施例に挙げるような構成が好ましい。   In the catalytic CVD apparatus as described above, as long as a plurality of catalyst wires are configured so as to generate a potential difference between the catalysts as described above, the configuration is not limited, and the catalyst wires are arranged in any shape. For example, the following configurations are preferable.

本発明の触媒CVD装置を用いて成膜するプロセスについて、以下簡単に説明する。   A process for forming a film using the catalytic CVD apparatus of the present invention will be briefly described below.

所定の触媒線配置形状を有する触媒CVD装置の成膜チャンバ内の基板ステージ上に基板を載置し、成膜チャンバ内に配置された複数の触媒線に−200〜+200Vの直流電圧、−200〜+200Vの交流電圧、又は−200〜+200の直流電圧と−200〜+200Vの交流電圧とを組み合わせた電圧を印加して各触媒線に印加した電圧の差分の電位差を触媒間に発生させ、原料ガスを成膜チャンバ内へ供給し、この原料ガスを加熱した触媒線と接触せしめて原料ガスを分解し、基板上で反応させて所望の薄膜を形成せしめる。   A substrate is placed on a substrate stage in a film formation chamber of a catalytic CVD apparatus having a predetermined catalyst line arrangement shape, a direct current voltage of −200 to +200 V is applied to a plurality of catalyst lines arranged in the film formation chamber, −200 A voltage difference of a voltage difference applied to each catalyst wire is generated between the catalysts by applying an AC voltage of ~ + 200 V or a voltage obtained by combining a DC voltage of -200 to +200 and an AC voltage of -200 to +200 V, A gas is supplied into the film forming chamber, the source gas is brought into contact with a heated catalyst wire, the source gas is decomposed, and reacted on the substrate to form a desired thin film.

上記印加電圧の範囲は、本発明の触媒CVD装置を使用する際の安全上の問題から設定されることが好ましい。すなわち、この範囲外の高い電圧を印加すると、装置内で放電が起こり、装置の故障が生じる可能性が高くなるからである。この印加電圧範囲内で、成膜速度、形成した膜の屈折率等の物性、又はリーク電流等を考慮しながら、目的に合った成膜を行うことが可能となる。この点について、以下具体的に説明する。   The range of the applied voltage is preferably set for safety reasons when using the catalytic CVD apparatus of the present invention. That is, if a high voltage outside this range is applied, a discharge occurs in the device, and the possibility of a device failure increases. Within this applied voltage range, film formation suitable for the purpose can be performed in consideration of physical properties such as film formation speed, refractive index of the formed film, leakage current, and the like. This point will be specifically described below.

以下の実施例中で具体的に示したように、印加電圧を−200Vから+200Vへと順次変化させるに従って成膜速度は順次減少し、この範囲内では23.6〜13.7nm/min程度の成膜速度が得られる。従って、印加電圧を適宜選択し、所望の成膜速度に合わせて成膜プロセスを実施することができる。例えば、印加電圧が−200〜+100V程度であれば、成膜速度は16nm/min以上となり、印加電圧が−200〜+75V程度であれば、成膜速度は17nm/min以上となる。特に、触媒線に対して負の電圧:0〜−200Vを印加することで成膜速度を向上させることが可能となる。   As specifically shown in the following examples, as the applied voltage is sequentially changed from −200 V to +200 V, the film formation rate decreases sequentially, and within this range, about 23.6 to 13.7 nm / min. A film forming speed can be obtained. Therefore, the applied voltage can be selected as appropriate, and the film formation process can be performed in accordance with a desired film formation rate. For example, when the applied voltage is about −200 to +100 V, the film formation rate is 16 nm / min or more, and when the applied voltage is about −200 to +75 V, the film formation rate is 17 nm / min or more. In particular, the deposition rate can be improved by applying a negative voltage of 0 to -200 V to the catalyst wire.

また、得られた膜の屈折率は、印加電圧を−200Vから+200Vへと順次変化させるに従って増加し、この範囲内では1.79〜2.06程度の屈折率が得られる。従って、印加電圧を適宜選択し、所望の屈折率を有する膜を形成するように成膜プロセスを実施することができる。例えば、印加電圧が−20〜+200V程度であれば、得られた膜の屈折率は1.90以上となり、印加電圧が+35〜+200V程度であれば、膜の屈折率は1.95以上となる。特に、得られた膜の屈折率は、触媒線に対して正の電圧:0〜+200Vを印加することにより向上させることが可能となる。   Further, the refractive index of the obtained film increases as the applied voltage is sequentially changed from −200 V to +200 V, and a refractive index of about 1.79 to 2.06 is obtained within this range. Accordingly, the applied voltage can be appropriately selected, and the film formation process can be performed so as to form a film having a desired refractive index. For example, if the applied voltage is about -20 to +200 V, the refractive index of the obtained film is 1.90 or more, and if the applied voltage is about +35 to +200 V, the refractive index of the film is 1.95 or more. . In particular, the refractive index of the obtained film can be improved by applying a positive voltage of 0 to +200 V to the catalyst wire.

さらに、以下の実施例から明らかなように、負の電圧を印加した場合はリーク電流が増加するが、正の電圧を印加した場合はリーク電流が押さえられる。すなわち、0V以上であればリーク電流は少なくなり、好ましくは+20V以上で+200V以下の電圧、さらに好ましくは+50V以上で+200V以下の電圧を印加すればさらにリーク電流は少なくなる。   Further, as is apparent from the following examples, the leakage current increases when a negative voltage is applied, but the leakage current is suppressed when a positive voltage is applied. That is, when the voltage is 0 V or more, the leakage current is reduced, and preferably when a voltage of +20 V or more and +200 V or less is applied, more preferably +50 V or more and +200 V or less is applied, the leakage current is further reduced.

上記した屈折率、成膜速度及びリーク電流の関係から、本発明の化学気相成長方法においては、触媒線への印加電圧を適宜変動させることにより、所望の膜特性を有する成膜が可能となる。例えば、屈折率、成膜速度及びリーク電流の3者の関係を全て満足するような成膜を行うためには、一般に印加電圧0〜+100V程度、好ましくは+20〜100V程度、さらに好ましくは+50〜+100程度である。   In the chemical vapor deposition method of the present invention, it is possible to form a film having desired film characteristics by appropriately varying the voltage applied to the catalyst wire from the relationship between the refractive index, the film forming speed and the leakage current. Become. For example, in order to perform film formation that satisfies all three relationships of refractive index, film formation speed, and leakage current, the applied voltage is generally about 0 to +100 V, preferably about +20 to 100 V, and more preferably +50 to It is about +100.

本発明によれば、それぞれの触媒線に印加する電圧を変化させることにより、基板上の所定部分の成膜速度や膜質のみをコントロールすることが可能となるので、成膜時の膜厚の分布をより正確にコントロールできるようになる。   According to the present invention, by changing the voltage applied to each catalyst line, it becomes possible to control only the film formation speed and film quality of a predetermined portion on the substrate, so the film thickness distribution during film formation Can be controlled more accurately.

また、本発明によれば、触媒線に対して外部から電圧を印加しない場合に比べ、負の電圧を印加した場合にはリーク電流が増加し、正の電圧を印加した場合にはリーク電流の減少を押えることが可能となる。従って、本発明によれば、熱電子による基板へのダメージを低減し、より良質な所望の薄膜を得ることが可能となる。   Further, according to the present invention, the leakage current increases when a negative voltage is applied compared to when no voltage is applied to the catalyst wire from the outside, and the leakage current increases when a positive voltage is applied. It becomes possible to hold down the decrease. Therefore, according to the present invention, it is possible to reduce damage to the substrate due to thermoelectrons and obtain a desired thin film with higher quality.

さらに、本発明の化学気相成長方法により形成できる膜については、通常の触媒CVD装置を用いて成膜できるものであれば特に制限はなく、例えば、シリコン窒化物膜(SiN膜)、アモルファスシリコン膜(a−Si膜)、シリコン酸化物膜(SiO膜)、及びシリコン酸窒化物膜(SiO膜)等を挙げることができる。 Furthermore, the film that can be formed by the chemical vapor deposition method of the present invention is not particularly limited as long as it can be formed using a normal catalytic CVD apparatus. For example, a silicon nitride film (SiN x film), amorphous A silicon film (a-Si film), a silicon oxide film (SiO x film), a silicon oxynitride film (SiO x N y film), and the like can be given.

一般に、触媒CVD装置を用いて化学気相成長反応により成膜する時に、成膜チャンバ内の壁面や触媒線表面や構成要素の表面にも成膜し、触媒線の効率を下げたり、この膜が剥離するとパーティクル発生の原因になっている。そこで、一定のサイクルでチャンバ内をクリーニングすることが必要になる。しかるに、本発明の装置によれば、通常の触媒CVD装置の場合と同様に、特にクリーニング機構を新たに設けなくても、そのままの機構を用いて、成膜チャンバ内のセルフクリーニングが簡単に行える。通常、触媒CVD装置の場合、通電した触媒線にNF等のクリーニングガスを流し、チャンバ内を大気開放することなく壁面等に付着した膜をセルフクリーニングにより除去するが、従来装置の場合、セルフクリーニングの度に、触媒線自体が少しずつ削れてしまい、触媒線の太さが場所により変化して、形成されるべき膜の特性が変化するという問題があるので、一定のサイクルで触媒線の取り替えが必要になる。しかるに、本発明の装置では、各触媒線間に発生せしめる電位差を調節することにより触媒自体の変化を抑えると共に、セルフクリーニングも可能になるので、従来技術の問題点を解決できるというメリットがある。 Generally, when a film is formed by a chemical vapor deposition reaction using a catalytic CVD apparatus, a film is also formed on the wall surface of the film forming chamber, the surface of the catalyst wire, or the surface of the component, and the efficiency of the catalyst wire is reduced. If it peels off, it causes the generation of particles. Therefore, it is necessary to clean the inside of the chamber at a constant cycle. However, according to the apparatus of the present invention, the self-cleaning in the film forming chamber can be easily performed by using the mechanism as it is without providing a new cleaning mechanism as in the case of a normal catalytic CVD apparatus. . Normally, in the case of a catalytic CVD apparatus, a cleaning gas such as NF 3 is supplied to the energized catalyst line, and the film adhering to the wall surface is removed by self-cleaning without releasing the inside of the chamber to the atmosphere. Each time cleaning is performed, the catalyst wire itself is gradually scraped, and the thickness of the catalyst wire changes depending on the location, and the characteristics of the film to be formed change. Replacement is required. However, the apparatus of the present invention has an advantage that the problems of the prior art can be solved because the change in the catalyst itself can be suppressed by adjusting the potential difference generated between the catalyst lines and the self-cleaning can be performed.

通常、クリーニング時には、雰囲気ガスの種類に依存して(接地に対して)セルフバイアスが発生し、クリーニングガス(例えば、NF等)が存在すると、触媒線電位は+側に誘導され、そのため触媒の削れ等の腐蝕が生じる。これに対して、本発明のセルフクリーニング方法によれば、セルフクリーニング時に外部電源回路から触媒線に−50〜−100V程度の負の電圧を印加することにより、触媒線の削れを抑えること、すなわち触媒線の腐蝕を防止することが可能になる。以下の実施例で示すように、セルフクリーニングに伴う触媒線の腐食量は、外部から電圧を印加しない場合に比べ、触媒線間に正の電位差を発生させる場合には腐食量は増加するが、負の電位差を発生させる場合には腐食量を押えることができる。従って、本発明のような特定の触媒線配置形状を有する複数の触媒を設け、外部電源回路から各触媒線に印加した電圧の差分の電位差を触媒線間に発生させるように構成した触媒CVD装置の場合、セルフクリーニング時にクリーニングガスによる触媒線の腐食を防止できる。 Normally, during cleaning, a self-bias is generated (relative to the ground) depending on the type of atmospheric gas, and if a cleaning gas (for example, NF 3 etc.) is present, the catalyst line potential is induced to the + side, so that the catalyst Corrosion such as scraping occurs. On the other hand, according to the self-cleaning method of the present invention, by applying a negative voltage of about −50 to −100 V to the catalyst line from the external power supply circuit at the time of self-cleaning, it is possible to prevent the catalyst line from being scraped. It becomes possible to prevent corrosion of the catalyst wire. As shown in the following examples, the amount of corrosion of the catalyst wire accompanying self-cleaning is higher when a positive potential difference is generated between the catalyst wires than when no voltage is applied from the outside. When a negative potential difference is generated, the amount of corrosion can be suppressed. Accordingly, a catalytic CVD apparatus provided with a plurality of catalysts having a specific catalyst line arrangement shape as in the present invention, and configured to generate a potential difference between the catalyst lines in the difference in voltage applied to each catalyst line from the external power supply circuit. In this case, corrosion of the catalyst wire due to the cleaning gas can be prevented during self-cleaning.

本発明のセルフクリーニング方法は、クリーニングガスとして、前記したように、三弗化窒素等のハロゲン含有ガス及び/又は触媒成分金属と同じ金属を含有するハロゲン化物ガスを成膜チャンバ内に導入して行われる。このハロゲン化物ガスとしては、触媒線を構成する金属の種類に応じて、例えば、弗化タングステン、弗化モリブデン及び弗化タンタル等を用いることができる。かかるハロゲン化物ガスは、加熱された触媒線上で分解され、遊離した金属は触媒線金属と結合する。   In the self-cleaning method of the present invention, as described above, a halogen-containing gas such as nitrogen trifluoride and / or a halide gas containing the same metal as the catalyst component metal is introduced into the film forming chamber as the cleaning gas. Done. As the halide gas, for example, tungsten fluoride, molybdenum fluoride, tantalum fluoride, or the like can be used depending on the type of metal constituting the catalyst wire. Such halide gas is decomposed on the heated catalyst wire, and the liberated metal is combined with the catalyst wire metal.

以下、本発明の触媒CVD装置の成膜チャンバ内に配置される触媒線の配置形状についての実施例と共に、この装置を用いた成膜方法及びこの装置のセルフクリーニング方法の実施例について、図1〜14を参照して説明する。図1〜11において、同じ構成要素は同じ参照番号を付してある。   Hereinafter, examples of the arrangement shape of the catalyst wires arranged in the film forming chamber of the catalytic CVD apparatus of the present invention, as well as examples of the film forming method using this apparatus and the self-cleaning method of this apparatus will be described with reference to FIG. It demonstrates with reference to -14. 1 to 11, the same constituent elements are given the same reference numerals.

図1に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組において、それぞれの触媒線に異なる外部印加用直流電圧電源3a及び3bから電圧を印加することで、触媒線間に、それぞれに印加した電圧の差分の電位差を発生させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst line arrangement shape shown in FIG. 1 is a set of different catalyst lines 2a and 2b connected to two heating power sources (catalyst line energization power source: constant current source) 1a and 1b, respectively. By applying a voltage from different externally applied DC voltage power supplies 3a and 3b, a device shape is generated that generates a potential difference of the difference between the voltages applied to the catalyst wires. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図2に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組において、それぞれの触媒線に異なる外部印加用交流電圧電源6a及び6bのそれぞれから電圧を印加することで、触媒線間に、それぞれに印加した電圧の差分の電位差を発生させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst wire arrangement shape shown in FIG. 2 is a set of different catalyst wires 2a and 2b connected to two heating power sources (catalyst wire energization power source: constant current source) 1a and 1b, respectively. By applying a voltage from each of the different external application AC voltage power supplies 6a and 6b, a device shape is generated that generates a potential difference of the difference between the applied voltages between the catalyst wires. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図3に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組の触媒線間に、外部印加用直流電圧電源3aを接続することで、触媒線間に直接電位差を発生させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst line arrangement shape shown in FIG. 3 is between a pair of catalyst lines consisting of different catalyst lines 2a and 2b connected to two heating power sources (catalyst line energization power source: constant current source) 1a and 1b, respectively. By connecting an externally applied DC voltage power supply 3a, the apparatus is configured to generate a potential difference directly between the catalyst wires. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図4に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組の触媒線間に、外部印加用交流電圧電源6aを接続することで、触媒線間に直接電位差を発生させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst line arrangement shape shown in FIG. 4 is between a pair of catalyst lines composed of different catalyst lines 2a and 2b connected to two heating power sources (catalyst line energization power source: constant current source) 1a and 1b, respectively. By connecting an externally applied AC voltage power supply 6a, the apparatus is configured to generate a potential difference directly between the catalyst wires. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図5に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組において、それぞれの触媒線に異なる外部印加用直流電圧電源3a及び3bから電圧を印加することで、触媒線間に、それぞれに印加した電圧の差分の電位差を発生させると共に、触媒線1a及び1bのそれぞれにさらに外部印加用交流電圧電源6a及び6bのそれぞれから電圧を印加させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst wire arrangement shape shown in FIG. 5 is a set of different catalyst wires 2a and 2b connected to two heating power sources (catalyst wire energization power source: constant current source) 1a and 1b, respectively. By applying a voltage from different external application DC voltage power supplies 3a and 3b, a potential difference of the difference between the voltages applied to the catalyst lines is generated, and further, an external application is applied to each of the catalyst lines 1a and 1b. It is the apparatus shape which applies a voltage from each of AC voltage power supply 6a and 6b. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図6に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組において、それぞれの触媒線に異なる外部印加用交流電圧電源3a及び3bから電圧を印加することで、触媒線間に、それぞれに印加した電圧の差分の電位差を発生させると共に、触媒線1a及び1bのそれぞれにさらに外部印加用直流電圧電源6a及び6bのそれぞれから電圧を印加させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst wire arrangement shape shown in FIG. 6 is a set of different catalyst wires 2a and 2b connected to two heating power sources (catalyst wire energizing power source: constant current source) 1a and 1b, respectively. By applying a voltage from different AC voltage power supplies 3a and 3b for external application to each other, a potential difference of the difference between the voltages applied to the catalyst lines is generated, and further for external application to each of the catalyst lines 1a and 1b. This is a device shape in which a voltage is applied from each of the DC voltage power supplies 6a and 6b. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図7に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組の触媒線間に、外部印加用直流電圧電源3aを接続することで、触媒線間に直接電位差を発生させると共に、その電圧電源3aに対しさらに外部印加用交流電圧電源6aを印加させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板を示す。   The catalyst wire arrangement shape shown in FIG. 7 is between a pair of catalyst wires composed of different catalyst wires 2a and 2b connected to two heating power sources (catalyst wire energizing power source: constant current source) 1a and 1b, respectively. By connecting an external application DC voltage power supply 3a, a potential difference is directly generated between the catalyst wires, and an external application AC voltage power supply 6a is further applied to the voltage power supply 3a. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate.

図8に示す触媒線配置形状は、2つの加熱用の電源(触媒線通電用電源:定電流源)1a及び1bにそれぞれ接続された異なる触媒線2a及び2bからなる組の触媒線間に、外部印加用交流電圧電源6aを接続することで、触媒線間に直接電位差を発生させると共に、その電圧電源6aに対しさらに外部印加用直流電圧電源3aを印加させる装置形状である。図中、4a及び4bは電源保護用回路であり、5は基板ステージを示す。   The catalyst line arrangement shape shown in FIG. 8 is between a pair of catalyst lines consisting of different catalyst lines 2a and 2b connected to two heating power sources (catalyst line energization power source: constant current source) 1a and 1b, respectively. By connecting the external application AC voltage power supply 6a, a potential difference is directly generated between the catalyst wires, and the external application DC voltage power supply 3a is further applied to the voltage power supply 6a. In the figure, 4a and 4b are power supply protection circuits, and 5 is a substrate stage.

図9は、実施例1〜8に示す複数の触媒線(図1〜8中の1a及び1b)の配置に関し、成膜時に載置される基板の中心に対して、触媒線を内周(図9中1a)と外周(図9中1b)とに同心形状に配置した触媒線配置形状の構成例を示す。この形状の配置のみならず、基板の中心に対して同心円状もしくは中心を同じとする多角形状に複数配置された状態でも良い。このように配置し、内周−外周間もしくは内側から外側に交互に電位差を発生させることにより、所期の目的が達成できる。   FIG. 9 relates to the arrangement of the plurality of catalyst wires (1a and 1b in FIGS. 1 to 8) shown in Examples 1 to 8, and the inner periphery ( A configuration example of the catalyst wire arrangement shape arranged concentrically on 1a) and the outer periphery (1b in FIG. 9) is shown. Not only the arrangement of this shape but also a plurality of arrangements in a concentric circle shape with respect to the center of the substrate or a polygon shape having the same center may be employed. By disposing the potential difference between the inner periphery and the outer periphery or alternately from the inside to the outside, the intended purpose can be achieved.

図10は、実施例1〜8に示す複数の触媒線(図1〜8中の1a及び1b)の配置に関し、2本の平行に設けられた触媒線を、成膜時に載置される基板の表面から所定の距離離し、かつ基板表面に対して平行に配置した触媒線配置形状の構成例を示す。この2本の配置のみならず、さらに多数の触媒線を同様に配置した状態も含む。このように配置し、2本の触媒線間もしくは平行に並んだ触媒線に交互に電位差を発生させることにより、膜厚及び膜特性の均一性という所期の目的を達成できる。   FIG. 10 shows a substrate on which two parallel catalyst wires are placed at the time of film formation with respect to the arrangement of the plurality of catalyst wires (1a and 1b in FIGS. 1 to 8) shown in Examples 1 to 8. An example of the configuration of the catalyst wire arrangement shape arranged at a predetermined distance from the surface of the substrate and parallel to the substrate surface is shown. This includes not only these two arrangements but also a state in which a larger number of catalyst wires are arranged in the same manner. By arranging in this way and alternately generating a potential difference between two catalyst wires or parallel catalyst wires, the intended purpose of uniformity of film thickness and membrane characteristics can be achieved.

図11は、実施例1〜8に示す複数の触媒線(図1〜8中1a及び1b)の配置に関し、2本の触媒線を、成膜時に載置される基板の表面から所定の距離離し、かつ2本の触媒線を垂直に交差させて配置した触媒線配置形状の構成例を示す。この形状の配置のみならず、多数の触媒線を網目状に配置した状態でも良く、また、交差状態を垂直でなくても所定の角度で交差させた状態でも良い。このように配置した触媒線間(平行に配置された触媒線間であっても交差した触媒線間であっても良い)の間に電位差を発生させることにより、膜厚及び膜特性という所期の目的を達成できる。   FIG. 11 shows the arrangement of a plurality of catalyst wires (1a and 1b in FIGS. 1 to 8) shown in Examples 1 to 8, and the two catalyst wires are placed at a predetermined distance from the surface of the substrate placed at the time of film formation. A configuration example of a catalyst line arrangement shape in which two catalyst lines are vertically separated from each other and separated is shown. Not only the arrangement of this shape but also a state in which a large number of catalyst wires are arranged in a mesh shape, and the intersecting state may be not perpendicular but intersected at a predetermined angle. By generating a potential difference between the catalyst lines arranged in this way (between the catalyst lines arranged in parallel or between the intersecting catalyst lines), the expected film thickness and membrane characteristics can be obtained. Can achieve the purpose.

図9に示した触媒線配置形状を有するように構成された複数の触媒線を備えた触媒CVD装置を用いて成膜を行った。基板としてp型Si基板を基板ステージ5上に載置し、原料ガスとしてSiH/NH/Hを7/50/50(sccm)の流量で用い、タングステンで構成された各触媒線に−200〜+200Vの直流電圧を同様に印加し、成膜プロセス条件:圧力10Pa、触媒線温度1700℃、基板温度300℃で、基板上にSiN膜を形成した。印加電圧に対する成膜速度(nm/min)及び得られた膜の屈折率に及ぼす影響を図12に示す。 Film formation was performed using a catalytic CVD apparatus provided with a plurality of catalyst wires configured to have the catalyst wire arrangement shape shown in FIG. A p-type Si substrate is placed on the substrate stage 5 as a substrate, SiH 4 / NH 3 / H 2 is used as a source gas at a flow rate of 7/50/50 (sccm), and each catalyst wire composed of tungsten is used. A DC voltage of −200 to +200 V was applied in the same manner, and a SiN x film was formed on the substrate under film forming process conditions: pressure 10 Pa, catalyst line temperature 1700 ° C., substrate temperature 300 ° C. FIG. 12 shows the influence of the film formation rate (nm / min) on the applied voltage and the refractive index of the obtained film.

図12から明らかなように、上記−200Vから+200Vの範囲内で印加電圧を順次変化させると、成膜速度はその変化に従って減少し、この範囲内では23.6〜13.7nm/min程度の成膜速度が得られた。例えば、印加電圧を−200〜+100V程度とすれば、成膜速度16nm/min以上、印加電圧を−200〜+75V程度とすれば、成膜速度17nm/min以上、印加電圧を−200〜0V程度とすれば、成膜速度19nm/min以上が得られた。従って、印加電圧を適宜選択し、所望の成膜速度に合わせて成膜プロセスを実施することができる。   As is apparent from FIG. 12, when the applied voltage is sequentially changed within the range of −200 V to +200 V, the film formation rate decreases according to the change, and within this range, about 23.6 to 13.7 nm / min. A deposition rate was obtained. For example, if the applied voltage is about -200 to +100 V, the film forming rate is 16 nm / min or more, and if the applied voltage is about -200 to +75 V, the film forming speed is 17 nm / min or more and the applied voltage is -200 to 0 V. If it was set to about, a film formation rate of 19 nm / min or more was obtained. Therefore, the applied voltage can be selected as appropriate, and the film formation process can be performed in accordance with a desired film formation rate.

また、得られた膜の屈折率は、−200Vから+200Vへと順次変化させるに従って増加し、この範囲内では1.79〜2.06程度の屈折率が得られた。例えば、印加電圧を−20〜+200V程度とすれば、屈折率1.90以上、印加電圧+35〜+200V程度とすれば、屈折率1.95以上が得られた。従って、印加電圧を適宜選択し、所望の屈折率を有する膜が得られるように成膜プロセスを実施することができる。   Further, the refractive index of the obtained film increased as it was sequentially changed from −200 V to +200 V, and a refractive index of about 1.79 to 2.06 was obtained within this range. For example, when the applied voltage is about -20 to +200 V, a refractive index of 1.90 or more is obtained. When the applied voltage is about +35 to +200 V, a refractive index of 1.95 or more is obtained. Therefore, the applied voltage can be appropriately selected, and the film formation process can be performed so that a film having a desired refractive index can be obtained.

図12における成膜速度の変化は各触媒線に同じ電圧を印加した場合のものである。このことから、それぞれの触媒線に印加する電圧を変化させることにより、基板上の所定部分の成膜速度や膜質のみをコントロールすることが可能となるので、本発明により成膜時の膜厚の分布をより正確にコントロールできるようになる。   The change in the deposition rate in FIG. 12 is the case where the same voltage is applied to each catalyst line. From this, it is possible to control only the film formation speed and film quality of a predetermined portion on the substrate by changing the voltage applied to each catalyst wire. The distribution can be controlled more precisely.

図9に示した触媒線配置形状を有するように構成された複数の触媒線を備えた触媒CVD装置を用いて実施例12に記載の成膜プロセスを実施して多数回成膜した後、この成膜チャンバ内をセルフクリーニングし、タングステンからなる触媒線の削れ量を測定した。このクリーニングは、Arガス及びNFガスを用いて、圧力60Pa、触媒線温度1900℃の条件で行った。この場合、各触媒線A及びB(図9中の1a及び1bに対応する)に対して、触媒線Aに±0V及び触媒線Bに+100Vの電圧(直流)を印加した場合の触媒線A及びBのそれぞれの削れ量、触媒線Aに±0V及び触媒線Bに−50Vの電圧を印加した場合の触媒線A及びBのそれぞれの削れ量、並びにバイアス印加なしの場合の触媒線A及びBのそれぞれの削れ量を測定した。 After performing the film formation process described in Example 12 using a catalytic CVD apparatus having a plurality of catalyst lines configured to have the catalyst line arrangement shape shown in FIG. The inside of the deposition chamber was self-cleaned, and the amount of catalyst wire scraped from tungsten was measured. This cleaning was performed using Ar gas and NF 3 gas under conditions of a pressure of 60 Pa and a catalyst line temperature of 1900 ° C. In this case, for each catalyst line A and B (corresponding to 1a and 1b in FIG. 9), the catalyst line A when a voltage (DC) of ± 0 V is applied to the catalyst line A and +100 V is applied to the catalyst line B. And B, the amount of each of the catalyst lines A and B when a voltage of ± 0 V is applied to the catalyst line A and −50 V is applied to the catalyst line B, and the catalyst line A and B when no bias is applied. The amount of each B was measured.

上記測定結果について、クリーニング時間(0〜20分)に対するタングステン(W)触媒線の崩れ量(腐食量)を相対比較して図13にプロットして示す。図13から明らかなように、セルフクリーニングに伴う触媒線の腐食量は、外部から電圧を印加しない場合に比べ、触媒線間に正の電位差を発生させた場合には腐食量が増加しているが、負の電位差を発生させた場合には腐食量が押えられていることが明らかである。   About the measurement result, the collapse amount (corrosion amount) of the tungsten (W) catalyst wire with respect to the cleaning time (0 to 20 minutes) is relatively compared and plotted in FIG. As is apparent from FIG. 13, the amount of corrosion of the catalyst wire due to self-cleaning is increased when a positive potential difference is generated between the catalyst wires, compared to the case where no voltage is applied from the outside. However, it is clear that the amount of corrosion is suppressed when a negative potential difference is generated.

従って、本発明のような触媒線配置形状を有する複数の触媒線を設け、外部電源回路から各触媒線に電圧を印加してその印加した電圧の差分の電位差を触媒線間に発生させることにより、セルフクリーニング時に触媒線が腐食されるのを防ぐことが可能となる。   Therefore, by providing a plurality of catalyst wires having the catalyst wire arrangement shape as in the present invention, applying a voltage to each catalyst wire from the external power supply circuit and generating a potential difference between the applied voltages between the catalyst wires. It is possible to prevent the catalyst wire from being corroded during self-cleaning.

図9に示した触媒線配置形状を有するように構成された複数の触媒線を備えた触媒CVD装置を用いて実施例12に記載の成膜プロセスを実施した。触媒線に印加する電圧を−20V、フローティング(Floating)、±0V及び+20Vの4種類とし、p型Si基板上にシリコン窒化物膜を形成した。それぞれの印加電圧の場合に対して、電界を0〜10mv/cm付近まで変化させ、シリコン窒化物膜の電流密度(A/cm)を測定した。その結果をシリコン窒化物膜の電流−電圧特性として図14に示す。 The film forming process described in Example 12 was performed using a catalytic CVD apparatus including a plurality of catalyst wires configured to have the catalyst wire arrangement shape shown in FIG. The voltage applied to the catalyst wire was −20 V, floating, ± 0 V, and +20 V, and a silicon nitride film was formed on the p-type Si substrate. For each applied voltage, the electric field was changed to around 0 to 10 mv / cm, and the current density (A / cm 2 ) of the silicon nitride film was measured. The results are shown in FIG. 14 as current-voltage characteristics of the silicon nitride film.

ここで、フローティング(浮遊状態)とは、外部印加用の結線を接続していない状態を意味する。通常、真空中で通電した場合は、±0Vとフローティングとは同じになるはずであるが、SiH、NH、H等の成膜用ガスを真空チャンバ内へ流すと、このガスと触媒線との間で電子のやりとりが行われることから、フローティングの状態でも±0Vからずれた状態になる(例えば、DCバイアス:−2V程度)。この「ずれ」をセルフバイアスという。これに対して、±0Vというのは、触媒線通電用の端子の片方を強制的にアースに接続した状態をいう。 Here, the floating (floating state) means a state in which a connection line for external application is not connected. Normally, when energized in a vacuum, ± 0 V and floating should be the same, but when a film forming gas such as SiH 4 , NH 3 , H 2 or the like is flowed into the vacuum chamber, this gas and the catalyst Since electrons are exchanged with the line, even in a floating state, the state deviates from ± 0 V (for example, DC bias: about −2 V). This “deviation” is called self-bias. On the other hand, ± 0 V means a state where one of the terminals for energizing the catalyst wire is forcibly connected to the ground.

図14から、外部から電圧を印加しない場合に比べ、負の電圧を印加した場合はリーク電流が増加しているが、正の電圧を印加した場合はリーク電流を押えることが可能となっていることが分かる。すなわち、印加電圧0V以上であればリーク電流は少なくなり、好ましくは+20V以上、さらに好ましくは+50V以上の印加電圧であれば、リーク電流はさらに少なくなる傾向がある。   As shown in FIG. 14, the leakage current increases when a negative voltage is applied compared to when no voltage is applied from the outside, but the leakage current can be suppressed when a positive voltage is applied. I understand that. That is, if the applied voltage is 0 V or more, the leakage current is reduced, and if the applied voltage is preferably +20 V or more, more preferably +50 V or more, the leakage current tends to be further reduced.

上記実施例に示した成膜速度、屈折率及びリーク電流に関する実験結果を考慮すれば、本発明の触媒CVD装置を用いる化学気相成長方法では、触媒線への印加電圧を適宜変動させることにより、所望の成膜速度で所望の屈折率を有する膜を形成することが可能となる。例えば、屈折率、成膜速度及びリーク電流の3者の関係を全て満足するような成膜を行うためには、一般に印加電圧0〜+100V程度、好ましくは+20〜100V程度、さらに好ましくは+50〜+100程度である。   Considering the experimental results regarding the film forming speed, refractive index and leakage current shown in the above examples, in the chemical vapor deposition method using the catalytic CVD apparatus of the present invention, the voltage applied to the catalyst wire is appropriately changed. It becomes possible to form a film having a desired refractive index at a desired film formation speed. For example, in order to perform film formation that satisfies all three relationships of refractive index, film formation speed, and leakage current, the applied voltage is generally about 0 to +100 V, preferably about +20 to 100 V, and more preferably +50 to It is about +100.

上記したように、本発明によれば、成膜速度の向上を達成すると共に、熱電子による基板へのダメージを低減せしめ、より良質なシリコン窒化物膜を得ることが可能となることが分かる。   As described above, according to the present invention, it is understood that it is possible to improve the deposition rate and reduce the damage to the substrate due to thermionic electrons, thereby obtaining a higher quality silicon nitride film.

本発明の触媒CVD装置は、複数の触媒線の配置を特定の形状とすると共に、各触媒線に印加した電圧の差分の電位差を触媒線間に発生させる外部電源回路を備えているので、この装置を用いた化学気相成長を利用した成膜プロセスにおいて、成膜速度の向上を達成できると共に、基板のダメージを減少できる上、この装置のセルフクリーニングの際には、クリーニングレートが増加し、触媒線の腐食を防止することができる。そのため、本発明の装置、成膜方法及びセルフクリーニング方法は、半導体分野での成膜技術に利用可能である。   Since the catalytic CVD apparatus of the present invention has an arrangement of a plurality of catalyst lines in a specific shape and an external power supply circuit for generating a potential difference between the voltages applied to each catalyst line between the catalyst lines. In the film forming process using chemical vapor deposition using the apparatus, the film forming speed can be improved and the damage to the substrate can be reduced. In addition, the self-cleaning of the apparatus increases the cleaning rate, Corrosion of the catalyst wire can be prevented. Therefore, the apparatus, film forming method, and self-cleaning method of the present invention can be used for film forming technology in the semiconductor field.

本発明の触媒CVD装置における触媒線の配置形状に関し、第一の実施の形態を模式的に示す断面図。Sectional drawing which shows typically 1st embodiment regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第二の実施の形態を模式的に示す断面図。Sectional drawing which shows 2nd embodiment typically regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第三の実施の形態を模式的に示す断面図。Sectional drawing which shows typically 3rd embodiment regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第四の実施の形態を模式的に示す断面図。Sectional drawing which shows 4th Embodiment typically regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第五の実施の形態を模式的に示す断面図。Sectional drawing which shows typically 5th embodiment regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第六の実施の形態を模式的に示す断面図。Sectional drawing which shows typically 6th Embodiment regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第七の実施の形態を模式的に示す断面図。Sectional drawing which shows typically 7th Embodiment regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、第八の実施の形態を模式的に示す断面図。Sectional drawing which shows typically 8th Embodiment regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、上面から見た配置形状の一実施の形態を模式的に示す上面図。The top view which shows typically one Embodiment of the arrangement | positioning shape seen from the upper surface regarding the arrangement | positioning shape of the catalyst wire in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、上面から見た配置形状の別の実施の形態を模式的に示す上面図。The top view which shows typically another embodiment of the arrangement | positioning shape seen from the upper surface regarding the arrangement | positioning shape of the catalyst line in the catalytic CVD apparatus of this invention. 本発明の触媒CVD装置における触媒線の配置形状に関し、上面から見た配置形状のさらに別の実施の形態を模式的に示す上面図。The top view which shows typically another embodiment of the arrangement | positioning shape seen from the upper surface regarding the arrangement | positioning shape of the catalyst line in the catalytic CVD apparatus of this invention. 実施例12で得られた膜について、印加電圧に対する成膜速度(nm/min)及び得られた膜の屈折率に及ぼす影響を示すグラフ。The graph which shows the influence which it has on the refractive index of the film-forming speed | rate (nm / min) with respect to an applied voltage and the obtained film | membrane about the film | membrane obtained in Example 12. FIG. 実施例13におけるクリーニングに際しての印加電圧による触媒線のそれぞれの相対的削れ量を、クリーニング時間に対してプロットしたグラフ。14 is a graph in which the relative scraping amount of each catalyst wire by the applied voltage at the time of cleaning in Example 13 is plotted against the cleaning time. 実施例14に従って基板上にシリコン窒化物膜を形成した場合における、印加電圧の膜の耐性に及ぼす影響を示す電流−電圧特性のグラフ。The current-voltage characteristic graph which shows the influence which it has on the tolerance of the film | membrane of the applied voltage at the time of forming a silicon nitride film on a board | substrate according to Example 14. FIG.

符号の説明Explanation of symbols

1a、1b 触媒線通電用電源 2a、2b 触媒線
3a、3b 外部印加用直流電圧電源 4a、4b 電源保護用回路
5 基板ステージ 6a、6b 外部印加用交流電圧電源
DESCRIPTION OF SYMBOLS 1a, 1b Power supply for catalyst line energization 2a, 2b Catalyst line 3a, 3b DC voltage power supply for external application 4a, 4b Circuit for power supply protection 5 Substrate stage 6a, 6b AC voltage power supply for external application

Claims (15)

ガス導入系及び排気系を有する成膜チャンバ
前記成膜チャンバ内に配置されている複数の触媒線と、
各触媒線への通電用電源と、
各触媒線に異なる電圧を印加し、印加した電圧の差分の電位差を触媒線間に発生させる外部電源回路とを備えることを特徴とする触媒線化学気相成長装置。
A deposition chamber having a gas introduction system and an exhaust system,
A plurality of catalytic wire disposed in said deposition chamber,
A power supply for energizing each catalyst wire;
Different voltages to each catalyst line is applied, the applied voltage catalytic wire chemical vapor deposition apparatus a potential difference of the differential, characterized in that to obtain Bei an external power source circuit that generates between the catalyst line.
前記複数の触媒線が、成膜チャンバ内に載置される基板の表面に対して平行に配置されていることを特徴とする請求項1に記載の触媒線化学気相成長装置。   2. The catalytic beam chemical vapor deposition apparatus according to claim 1, wherein the plurality of catalyst lines are arranged in parallel to a surface of a substrate placed in a film forming chamber. 前記複数の触媒線が、成膜チャンバ内に載置される基板の中心に対して同心円形状又は同心多角形状の同心形状であって、かつ基板表面に対して平行に配置されていることを特徴とする請求項1に記載の触媒線化学気相成長装置。 The plurality of catalyst wires are concentric with concentric circles or concentric polygons with respect to the center of the substrate placed in the film forming chamber, and are arranged in parallel with the substrate surface. The catalytic beam chemical vapor deposition apparatus according to claim 1 . 前記複数の触媒線が、成膜チャンバ内に載置される基板の表面に対して平行であって、かつ触媒線同士が交差して配置されていることを特徴とする請求項1に記載の触媒線化学気相成長装置。 Wherein the plurality of catalyst lines, a parallel to the surface of the substrate to be placed in the deposition chamber, and according to claim 1, a catalytic wire to each other, characterized in that it is arranged to cross Catalytic chemical vapor deposition system. 前記触媒線が、W、Mo及びTaから選ばれた少なくとも1種の金属又はこれら金属の少なくとも1種を含む合金から構成されたものであることを特徴とする請求項1〜のいずれか1項に記載の触媒線化学気相成長装置。 It said catalyst lines, W, claim 1-4, characterized in that is obtained is composed of at least one kind of metal or alloy containing at least one of these metal selected from Mo and Ta 1 The catalytic wire chemical vapor deposition apparatus according to Item . 前記外部電源回路が、外部印加用直流電圧電源、外部印加用交流電圧電源、又は外部印加用直流電圧電源と外部印加用交流電圧電源とを組み合わせた電源からなる電源回路であることを特徴とする請求項1〜のいずれか1項に記載の触媒線化学気相成長装置。 The external power supply circuit is a power supply circuit including a DC voltage power source for external application, an AC voltage power source for external application, or a power source that combines a DC voltage power source for external application and an AC voltage power source for external application. The catalytic beam chemical vapor deposition apparatus according to any one of claims 1 to 5 . 前記外部電源回路が、前記触媒線と通電用電源との間に接続されていることを特徴とする請求項1〜のいずれか1項に記載の触媒線化学気相成長装置。 The external power supply circuit, a catalytic wire CVD apparatus according to any one of claims 1 to 6, characterized in that connected between the current supply source and said catalytic wire. 前記外部電源回路が、電源保護用回路を備えていることを特徴とする請求項1〜のいずれか1項に記載の触媒線化学気相成長装置。 The catalytic external chemical vapor deposition apparatus according to any one of claims 1 to 7 , wherein the external power supply circuit includes a power supply protection circuit. 前記触媒線化学気相成長装置が、加熱した各触媒線に原料ガスを接触させて分解せしめ、薄膜を形成せしめるための装置であることを特徴とする請求項1〜のいずれか1項に記載の触媒線化学気相成長装置。 9. The catalyst line chemical vapor deposition apparatus according to any one of claims 1 to 8 , wherein the catalyst line chemical vapor deposition apparatus is an apparatus for bringing a heated gas line into contact with a source gas to decompose and form a thin film. The catalytic line chemical vapor deposition apparatus described. 前記触媒線化学気相成長装置が、セルフクリーニングを行うことが可能な装置であることを特徴とする請求項1〜のいずれか1項に記載の触媒線化学気相成長装置。 The catalytic wire CVD apparatus, the catalytic wire CVD apparatus according to any one of claims 1 to 8, characterized in that an apparatus capable of performing a self-cleaning. 膜チャンバ内に配置されている複数の触媒線の各触媒線へ通電用電源から電流を流して各触媒線を所定の温度に加熱せしめ、外部電源回路から各触媒線に異なる電圧を印加してその印加した電圧の差分の電位差を触媒線間に発生させ、成膜用原料を成膜チャンバ内へ導入し、加熱した触媒線と接触させて、該複数の触媒線に対向して載置された基板上に成膜することを特徴とする化学気相成長方法。 By flowing a current from the current supply source to the catalytic wire of a plurality of catalytic wire disposed in the film-forming chamber allowed heat the catalytic wire to a predetermined temperature, by applying a different voltage from the external power supply circuit to each catalytic wire Then, a potential difference of the difference between the applied voltages is generated between the catalyst wires, the film forming raw material is introduced into the film forming chamber, brought into contact with the heated catalyst wires, and placed facing the plurality of catalyst wires. A chemical vapor deposition method characterized by forming a film on a formed substrate. 前記成膜用原料として、シラン、アンモニア、水素、酸化窒素、トリメチルアミン、トリメチルジシラン、ヘキサメチルジシラザン、及びトリシリルアミンから選ばれた少なくとも1種の化合物のガスを使用することを特徴とする請求項11記載の化学気相成長方法。 A gas of at least one compound selected from silane, ammonia, hydrogen, nitric oxide, trimethylamine, trimethyldisilane, hexamethyldisilazane, and trisilylamine is used as the film forming material. Item 12. The chemical vapor deposition method according to Item 11 . 媒線化学気相成長装置のセルフクリーニング方法であって、成膜チャンバ内に、セルフクリーニングガスとして、三弗化窒素、弗化水素、六弗化硫黄、四弗化炭素及び三弗化塩素から選ばれた少なくとも1種のハロゲン含有ガスを導入し、そして外部電源回路から、成膜チャンバ内に設けた複数の触媒線の各触媒線に異なる電圧を印加して、その印加した電圧の差分の負の電位差を触媒線間に発生させ、成膜チャンバ内のセルフクリーニングを行うことを特徴とするセルフクリーニング方法。 A self-cleaning process of catalytic wire CVD apparatus, a film formation chamber, a self-cleaning gas, nitrogen trifluoride, hydrogen fluoride, sulfur hexafluoride, carbon tetrafluoride and chlorine trifluoride At least one kind of halogen-containing gas selected from the above is introduced, and a different voltage is applied to each catalyst line of the plurality of catalyst lines provided in the film forming chamber from the external power supply circuit, and the difference between the applied voltages The self-cleaning method is characterized in that a negative potential difference is generated between the catalyst wires to perform self-cleaning in the film forming chamber. 媒線化学気相成長装置のセルフクリーニング方法であって、外部電源回路から、成膜チャンバ内に設けた複数の触媒線の各触媒線に異なる電圧を印加して、その印加した電圧の差分の負の電位差を触媒線間に発生させ、そして成膜チャンバ内に、セルフクリーニングガスとして、三弗化窒素、弗化水素、六弗化硫黄、四弗化炭素及び三弗化塩素から選ばれた少なくとも1種のハロゲン含有ガスを導入し、成膜チャンバ内のセルフクリーニングを行うことを特徴とするセルフクリーニング方法。 A self-cleaning process of catalytic wire CVD apparatus, from the external power supply circuit, by applying different voltages to each catalytic wire of a plurality of catalytic wire provided in the deposition chamber, the difference of the applied voltage A negative potential difference between the catalyst lines and a self-cleaning gas in the deposition chamber selected from nitrogen trifluoride, hydrogen fluoride, sulfur hexafluoride, carbon tetrafluoride and chlorine trifluoride. A self-cleaning method comprising introducing at least one halogen-containing gas and performing self-cleaning in a film forming chamber. 前記ハロゲン含有ガスの代わりに又はこのハロゲン含有ガスと一緒に触媒成分金属と同じ金属を含有するハロゲン化物ガスを導入することを特徴とする請求項13又は14に記載のセルフクリーニング方法。 Self-cleaning process according to claim 13 or 14, characterized in that introducing the halide gas containing the same metal as the catalyst component metals with instead of or the halogen-containing gas in the halogen-containing gas.
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