JP5008929B2 - Manufacturing method of liquid crystal device - Google Patents

Description

  The present invention relates to a method for manufacturing a liquid crystal device.

  A conventional liquid crystal device such as a TN (Twisted Nematic) system has a configuration in which liquid crystal is sealed between a pair of substrates, and a liquid crystal is applied by applying an electric field in a direction perpendicular to the substrate surface with electrodes on each substrate. It controls the molecular orientation and modulates the light transmittance. On the other hand, as one means for increasing the viewing angle of the liquid crystal device, the direction of the electric field applied to the liquid crystal is set to a direction substantially parallel to the substrate surface, and the liquid crystal is rotated in a plane substantially parallel to the substrate by this electric field. The method is known. In other words, this is a system in which a pair of electrodes is formed on one substrate to generate an electric field. As this type of scheme, an IPS (In-Plane Switching) scheme, an FFS (Fringe-Field Switching) scheme, and the like are known.

  The FFS system is a technique obtained by further improving the IPS system. The difference in structure is that in the case of the IPS system, a pair of comb-like electrodes are formed in the same layer, whereas in the case of the FFS system, The pair of electrodes are formed in different layers. That is, in the FFS method, the comb-like electrode is laminated above the solid electrode via the interlayer insulating film. Due to the difference in electrode configuration, the direction of the generated electric field changes slightly, and the electric field direction in the IPS method is the lateral direction in which the electrodes face each other, but the electric field direction in the FFS method is formed in different layers. In addition to the lateral direction, it has a strong electric field component in the direction perpendicular to the substrate surface, particularly in the vicinity of the edge of the electrode. In Patent Document 1 below, the electrode shape is a kind of IPS system, but the electric field direction is similar to that of the FFS system because a pair of electrodes are formed in different layers.

As a result, even if the liquid crystal molecules located between the electrodes are driven in the normal IPS system, the liquid crystal molecules located immediately above the electrodes are hardly driven, so that the electrode portion cannot contribute to display, and this portion is a light shielding film. The aperture ratio decreases due to light shielding. On the other hand, the FFS method has a feature that the liquid crystal molecules positioned immediately above the electrodes as well as the liquid crystal molecules positioned between the electrodes are easily driven. Therefore, the FFS method has an advantage that if the electrode is formed of a transparent conductive film, the electrode portion can also contribute to display to some extent, and the aperture ratio can be increased as compared with the IPS method under the same conditions. .
JP 2003-15146 A

  Thus, the use of the FFS method is effective as means for increasing the brightness of the liquid crystal device. Here, a P-Si (polysilicon) thin film transistor (hereinafter abbreviated as TFT) element or an α-Si (amorphous silicon) TFT element is used as a switching element of the liquid crystal device. And when using mainly P-Si type TFT elements, a so-called overlayer structure is adopted in which an insulating film covering the TFT elements is formed to flatten the surface, and an electrode for driving liquid crystal is formed on the insulating film. Has been. By adopting this overlayer structure, the flatness around the data line can be secured, so that light leakage in the pixel region around the data line is reduced. Thereby, it is possible to cancel the black matrix on the data line, and the aperture ratio of the pixel can be improved.

  By the way, when patterning an electrode by photolithography, in the case of a large liquid crystal panel, it is difficult to expose the entire surface of the panel at once. Therefore, exposure processing is performed in several times (shot division). It will be manufactured as a panel. As shown in FIG. 8, the boundary of shot division is generally arranged in a region where the pixel electrode 11 is not formed. In FIG. 8, the shot division boundary CC ′ in the horizontal direction of the drawing is arranged in the non-formation region of the pixel electrode 11 and in the formation region of the data line 3. At that time, in the vicinity of the shot division position, the resist is exposed in a range wider than a predetermined exposure region due to light leakage from the exposure blind and propagation of light in the glass. When the pixel electrode 11 is patterned using this resist, pattern thinning 87 of the pixel electrode 11 occurs. Conventionally, the pattern thinning 87 of the pixel electrode 11 can be concealed by the black matrix 43 formed on the data line 3, but if the black matrix 43 on the data line 3 is removed for the purpose of high aperture ratio, However, there is a problem in that the pixel transmittance varies with respect to surrounding pixels due to the pattern thinning 87 formed at that position, and the difference in brightness is perceived as it is.

  Therefore, the present invention has been made in view of the above-described circumstances, and an object of the present invention is to provide a method for manufacturing a liquid crystal device that achieves a high aperture ratio in a method for manufacturing a liquid crystal device employing an overlayer structure. .

In order to solve the above-mentioned problem, there is provided a method for manufacturing a liquid crystal device comprising a first substrate and a second substrate facing each other with a liquid crystal sandwiched therebetween, a pixel electrode for driving the liquid crystal, and a common electrode, wherein the first substrate And after the step of forming a scan line and a data line, the common electrode having the pixel electrode and an opening formed in a portion overlapping the pixel electrode with an electrode insulating film formed on the pixel electrode. The step of forming the pixel electrode includes a step of forming a pixel electrode material on the first substrate, a step of applying a resist on the pixel electrode material, A pixel electrode exposure step of exposing the resist in several steps, and the step of forming the common electrode comprises: forming a common electrode material on the electrode insulating film; and forming the common electrode material on the common electrode material. Apply resist And a common electrode exposure step in which the resist is exposed in several steps, and the pixel electrode exposure step divides the scanning line direction into the boundary of exposure performed in the several times An exposure process is performed such that a boundary is in the pixel electrode formation region and a boundary dividing the data line direction is in the pixel electrode non-formation region. The exposure process is performed by dividing the exposure boundary to be divided into times so that the boundary that divides the data line direction and the boundary that divides the scanning line direction are both in the non-formation region of the opening of the common electrode. A method for manufacturing a liquid crystal device is provided .

With this configuration, the pattern thinning formed on the pixel electrode at the shot division position in the step of forming the pixel electrode occurs only around the portion that is subjected to double exposure. Can be reduced. In addition, by setting the shot division position in the process of forming the common electrode to a position that does not interfere with the opening, exposure can be performed without affecting display performance, and a high aperture ratio of the pixel can be realized. There is.

Also, before Symbol liquid crystal device manufactured by the manufacturing method of the liquid crystal device is provided.

[Overall configuration of liquid crystal device]
Next, the overall configuration of the liquid crystal device according to the embodiment of the present invention will be described with reference to FIGS.

  In this embodiment, an example of a TFT active matrix type and FFS type transmissive liquid crystal device using an LTPS type TFT element as a pixel switching element will be described.

  FIG. 1 is a plan view of the liquid crystal device according to the present embodiment as viewed from the counter substrate side together with each component, and FIG. 2 is a cross-sectional view taken along the line HH ′ of FIG. In each drawing used in the following description, the scale is different for each layer or member in order to make each layer or member recognizable on the drawing. In addition, the liquid crystal layer side in each component of the liquid crystal device is referred to as an inner side, and the opposite side is referred to as an outer side.

As shown in FIGS. 1 and 2, in the liquid crystal device 100 of the present embodiment, a TFT array substrate 10 (first substrate) and a counter substrate 20 (second substrate) are bonded together by a sealing material 52. The liquid crystal layer 50 is sealed in the region partitioned by. The liquid crystal layer 50 is composed of a liquid crystal having a positive dielectric anisotropy. A light shielding film (peripheral parting) 53 made of a light shielding material is formed in a region inside the region where the sealing material 52 is formed. A data line driving circuit 201 and an input terminal 202 are formed along one side of the TFT array substrate 10 in the peripheral circuit region outside the sealing material 52, and the scanning line driving circuit is formed along two sides adjacent to the one side. 104 is formed. On the remaining side of the TFT array substrate 10, a plurality of wirings 105 are provided for connecting between the scanning line driving circuits 104 provided on both sides of the display area.
[Configuration of liquid crystal device]
Next, a liquid crystal device according to an embodiment of the present invention will be described with reference to FIGS.

  3 is an enlarged plan view of each pixel of the liquid crystal device, and FIG. 4 is a cross-sectional view of the liquid crystal device along the line AA ′ of FIG.

  In the display area of the liquid crystal device 100, a plurality of pixels are arranged in a matrix.

  As shown in FIG. 3, the scanning line 1 extends in the horizontal direction (lateral direction in FIG. 3), and the data line 3 extends in the vertical direction (vertical direction in FIG. 3). A region surrounded on all sides by the line 3 constitutes one pixel region. A semiconductor layer 4 made of a polycrystalline silicon film is formed in a substantially U shape near the intersection of the data line 3 and the scanning line 1. Contact holes 5 and 6 are formed at both ends of the semiconductor layer 4. One contact hole 5 is a source contact hole that electrically connects the data line 3 and the source region 4 s of the semiconductor layer 4. The contact hole 6 is a drain contact hole that electrically connects the drain region 4 d of the semiconductor layer 4 and the drain electrode 7. A pixel contact hole 12 for electrically connecting the drain electrode 7 and a pixel electrode 11 described later is formed on the side opposite to the side on which the drain contact hole 6 is provided on the drain electrode 7.

  In the TFT 13 in this embodiment, the substantially U-shaped semiconductor layer 4 intersects with the scanning line 1, and the semiconductor layer 4 and the scanning line 1 intersect at two places, so that 2 on one semiconductor layer. A TFT having two gates, that is, a so-called dual gate TFT is formed.

  The pixel electrode 11 is formed of, for example, a material such as indium tin oxide (hereinafter abbreviated as ITO), and is patterned into a substantially rectangular shape corresponding to one pixel region. On the other hand, the common electrode 17 is formed of a material such as ITO, for example, and is formed over the entire display area in which a plurality of pixels are arranged in a matrix. In addition, the common electrode 17 has a slit-like opening 17a in an overlapping portion with the pixel electrode 11, and a band-like electrode part 17b is formed between the adjacent opening 17a and the opening 17a.

  Next, the cross-sectional structure of the liquid crystal device 100 will be described.

  As shown in FIG. 4, it has a TFT array substrate 10 (lower substrate in FIG. 4) made of transparent substrates 21 and 22 such as glass and quartz, and a counter substrate 20 (upper substrate in FIG. 4). A liquid crystal layer 50 is sandwiched. A semiconductor layer 4 made of polycrystalline silicon is provided on a transparent substrate 21 constituting the TFT array substrate 10, and a gate insulating film 23 made of a silicon oxide film or the like is formed so as to cover the semiconductor layer 4. The semiconductor layer 4 constitutes a TFT 13 that controls switching of each pixel electrode 11. The TFT 13 includes a gate electrode constituted by a scanning line 1 made of molybdenum or the like, and a semiconductor layer 4 in which a channel is formed by an electric field from the gate electrode. A channel region 4c, a gate insulating film 23 that insulates the gate electrode from the semiconductor layer 4, a drain electrode 7 made of aluminum or the like, a source region 4s of the semiconductor layer, and a drain region 4d are provided.

  Further, on the TFT array substrate 10, a first interlayer insulating film 24 made of a silicon oxide film is formed, in which a source contact hole 5 leading to the source region 4s and a drain contact hole 6 leading to the drain region 4d are formed. . That is, the data line 3 is electrically connected to the source region 4 s of the semiconductor layer 4 through the source contact hole 5 penetrating the first interlayer insulating film 24, and the drain electrode 7 is connected to the first interlayer insulating film 24. It is electrically connected to the drain region 4d of the semiconductor layer 4 through the drain contact hole 6 that penetrates. The drain electrode 7 is made of the same material as the data line 3 and is formed on the first interlayer insulating film 24. Further, a second interlayer insulating film 25 and a third interlayer insulating film 26 in which a pixel contact hole 12 leading to the drain electrode 7 is formed are sequentially formed. The second interlayer insulating film 25 is made of a silicon oxide film, and the third interlayer insulating film 26 is made of acrylic resin. In particular, the third interlayer insulating film 26 functions as a flattening film for flattening the underlying step.

  On the third interlayer insulating film 26, the pixel electrode 11 made of a transparent conductive film such as ITO is formed in a substantially rectangular shape. With the above configuration, the pixel electrode 11 is electrically connected to the drain region 4d of the semiconductor layer 4 using the drain electrode 7 as a relay layer. A fourth interlayer insulating film 27 made of a silicon nitride film or the like is formed on the third interlayer insulating film 26 including the pixel electrode 11. On the fourth interlayer insulating film 27, a common electrode 17 made of a transparent conductive film such as ITO having a slit-like opening 17a and a strip-like electrode portion 17b is formed in a substantially solid shape. An alignment film 28 made of polyimide or the like is provided on the uppermost layer of the TFT array substrate 10 that is in contact with the liquid crystal layer 50.

  On the other hand, the counter substrate 20 has a red (R), green (G), or blue (B) color material layer 31 constituting a color filter formed on a transparent substrate 22 for each pixel. A black matrix 43 made of a light shielding material such as metallic chrome is formed around each color material layer 31 in order to prevent light leakage around the pixels. Further, an overcoat layer 32 for protecting the color material layer 31 and flattening a step due to the color material layer 31 is formed, and an alignment film 33 similar to that on the TFT array substrate 10 side is formed on the overcoat layer 32. ing.

  A polarizing plate 61 is laminated on the outer surface side of the TFT array substrate 10 (the side opposite to the liquid crystal layer 50), and a polarizing plate 62 is also disposed on the outer surface side of the counter substrate 20. In addition, you may arrange | position a phase difference plate between each board | substrate 10 and 20 and the polarizing plates 61 and 62 as needed. A backlight (illuminating device) 90 including a light guide plate 91 and a reflective plate 92 is provided on the back side of the TFT array substrate 10 (lower side in FIG. 4).

  The alignment films 28 and 33 are rubbed. At this time, each rubbing direction is set to a direction that does not coincide with the direction of the electric field formed between the pixel electrode 11 and the common electrode 17. If the rubbing direction is set in a direction that intersects the electric field direction at an angle other than perpendicular, the liquid crystal molecules can be rotated in the same direction when the electric field is applied. In the present embodiment, the rubbing direction of the alignment film 28 on the TFT array substrate 10 side and the rubbing direction of the alignment film 33 on the counter substrate 20 side are set in the horizontal direction (lateral direction in FIG. 3). On the other hand, the transmission axis of the polarizing plate 61 on the TFT array substrate 10 side is arranged parallel to the rubbing direction of the alignment film 28, and the transmission axis of the polarizing plate 62 on the counter substrate 20 side is orthogonal to the transmission axis of the polarizing plate 61. Are arranged as follows. The rubbing direction of the alignment films 28 and 33 and the transmission axes of the polarizing plates 61 and 62 can be arranged other than the above.

  As an operation of the liquid crystal device 100, when a non-selection voltage (a voltage near the threshold voltage of the liquid crystal) is applied, the liquid crystal molecules constituting the liquid crystal layer 50 are aligned horizontally with the substrate along the rubbing direction. When a selection voltage (a voltage sufficiently higher than the threshold voltage of the liquid crystal) is applied between the pixel electrode 11 and the common electrode 17, an electric field is generated, and the liquid crystal molecules are reoriented along the direction of the electric field. To do. In addition, since the rubbing direction of the alignment film is set to a direction intersecting with the electric field direction at an angle other than perpendicular, all liquid crystal molecules can be rotated in the same direction. The liquid crystal device 100 is configured to perform bright and dark display using birefringence based on the difference in the alignment state of liquid crystal molecules.

Therefore, when the pixel electrode 11 is thinned, it becomes impossible to apply the selection voltage to the liquid crystal layer 50 in that region. As a result, it becomes impossible to display an image due to reorientation of liquid crystal molecules in a thin pattern region.
[Method of manufacturing liquid crystal device]
Next, the manufacturing process of the TFT array substrate 10 in the liquid crystal device according to the embodiment of the present invention will be described with reference to FIGS.

  FIG. 5 is a cross-sectional view showing a manufacturing process of the liquid crystal device, FIG. 6 is a cross-sectional view showing an electrode patterning step, and FIG. 7 is an image view showing a manufacturing process of an electrode portion by shot division.

  First, as shown in FIG. 5A, a transparent substrate 21 such as glass or quartz is prepared. As shown in FIG. 5B, an amorphous silicon film having a thickness of about 40 nm is formed by a CVD method or the like. After forming an amorphous silicon film, a polycrystalline silicon film is formed by performing laser annealing or the like and recrystallizing it. Thereafter, the polycrystalline silicon film is patterned by a known photolithography and etching method to form the semiconductor layer 4.

  Next, as shown in FIG. 5C, a silicon oxide film having a thickness of about 75 nm is formed on the entire surface of the substrate by a CVD method or the like to form the gate insulating film 23.

  Next, as shown in FIG. 5D, after a molybdenum film having a thickness of about 300 nm is formed on the entire surface of the substrate by sputtering or the like, this molybdenum film is patterned by well-known photolithography and etching methods to scan lines. 1 is formed.

  Next, as shown in FIG. 5E, a silicon oxide film is formed on the entire surface of the substrate by a CVD method or the like to form a first interlayer insulating film 24. Thereafter, a source contact hole 5 and a drain contact hole 6 reaching the source region 4s and the drain region 4d of the semiconductor layer 4 through the first interlayer insulating film 24 and the gate insulating film 23 are formed by well-known photolithography and etching methods, respectively. To do. Thereafter, an aluminum film having a thickness of about 500 nm is formed on the entire surface of the substrate by sputtering or the like, and then this aluminum film is patterned by well-known photolithography and etching methods to form the data line 3 and the drain electrode 7 respectively.

  Next, as shown in FIG. 5 (f), a silicon oxide film having a thickness of about 200 nm is formed on the entire surface of the substrate by a CVD method or the like to form a second interlayer insulating film 25, and then a film thickness of 1 to 3 μm. A third interlayer insulating film 26 is formed by applying and curing an acrylic resin film on the entire surface of the substrate.

  Next, as shown in FIG. 5G, a pixel contact hole 12 reaching the drain electrode 7 through the third interlayer insulating film 26 and the second interlayer insulating film 25 is formed by known photolithography and etching methods. . Thereafter, an ITO film having a thickness of about 75 nm is formed on the entire surface of the substrate by sputtering or the like, and this ITO film is patterned by well-known photolithography and etching methods to form the pixel electrode 11.

  Next, as shown in FIG. 5H, a silicon nitride film having a thickness of about 50 to 400 nm is formed on the entire surface of the substrate by sputtering or the like to form a fourth interlayer insulating film 27.

  Next, as shown in FIG. 5I, an ITO film having a film thickness of about 75 nm is formed on the entire surface of the substrate by sputtering or the like, and this ITO film is patterned by well-known photolithography and etching methods to form the common electrode 17. Form.

  Thereafter, although not shown, a polyimide film is formed on the entire surface of the substrate, and the alignment film 28 is formed by performing a rubbing process.

  The TFT array substrate 10 is completed through the above steps.

  Here, a detailed process for patterning the pixel electrode 11 shown in FIG. 5G will be described with reference to FIG.

  First, as shown in FIG. 6A, a pixel electrode 11 made of an ITO film is formed on the entire surface of the substrate, and then a resist 71 is applied on the surface. Next, in order to expose the resist 71, a photomask 75 is disposed on the substrate surface. The photomask 75 is configured by disposing a light-shielding film 74 such as metallic chromium on the surface of a transparent substrate 73 such as glass. An opening 76 is formed in the light shielding film 74 corresponding to the exposure region of the resist 71.

  Here, when the liquid crystal device is large, it is difficult to expose the entire surface of the substrate at one time, so the substrate is exposed to several times (shot division) to produce a single panel. become. In this case, a photomask 75 is disposed in the area to be exposed, and a light shielding member (exposure blind) 72 is disposed in the area not to be exposed. The boundary between the exposure blind 72 and the photomask 75 is a substantially shot division position. In this state, the first exposure is performed.

  Next, as shown in FIG. 6B, the second exposure is performed after the exposure blind 72 and the photomask 75 are arranged opposite to the first exposure on the boundary of the shot division position, as opposed to FIG. 6A. Perform exposure.

  Next, as shown in FIG. 6C, the resist 71 in the exposed region is removed by performing development after the two exposures are completed.

  Next, as shown in FIG. 6D, etching is performed using the patterned resist 71 as a mask.

  Next, as shown in FIG. 6E, the pixel electrode 11 in the region where the resist 71 has been removed as a result of etching is removed.

Next, as shown in FIG. 6F, the remaining resist 71 is removed to complete the patterning of the pixel electrode 11.
[Shot division]
Next, the above-described shot division position will be described. Here, the extending direction of the scanning line 1 in FIG. 3 is defined as the X direction, and the extending direction of the data line 3 is defined as the Y direction. In the present embodiment, in the step of forming the pixel electrode 11 in FIG. 5G, the Y direction is a region where the pixel electrode 11 is not formed and is substantially the same position as the region where the scanning line 1 is formed ( Shot division is performed in the black matrix 43). In the X direction, shot division is performed at the position of the line segment BB 'in FIG. The shot division in the X direction is performed so that the boundary BB ′ of the shot division is arranged in the formation region of the pixel electrode 11. In addition, the shot division in the X direction is performed so that the boundary BB ′ of the shot division intersects with only the peripheral portion along the scanning line 1 in the peripheral portion of the formation region of the pixel electrode 11. As described above, the boundary when the shot is divided in the Y direction is arranged in parallel with the X direction, and the boundary when the shot is divided in the X direction is arranged in parallel with the Y direction.

  In the step of forming the common electrode 17 in FIG. 5I, the Y direction is a region where the opening 17a is not formed, and is substantially the same position as the region where the scanning line 1 is formed (in the black matrix 43). In the X direction, the shot is divided at the position of the line segment C-C 'in FIG. 3, that is, at the region where the opening 17a is not formed.

  Next, a detailed process when the pixel electrode 11 is formed by shot division will be described.

  As shown in FIG. 7A, a photomask 75 is arranged so as to divide shots in the formation region of the pixel electrode 11, and the first exposure boundary is determined. At this time, the shot division boundary 77 in the X direction is set at substantially the same position as the line segment BB ′ in FIG. 3, and the shot division boundary 78 in the Y direction is set at substantially the same position as the scanning line 1 in plan view. Yes. Thereafter, the first exposure area 81 is exposed, but a light leakage area 82 is generated around the exposure area.

  As shown in FIG. 7B, a second exposure boundary is determined as in FIG. 7A, and the second exposure region 83 is exposed. At this time, a slight overlapping portion 84 is formed so that no gap is formed between the first exposure region 81 and the second exposure region 83. A light leakage region 85 is generated even for the second exposure. As shown in FIGS. 7A and 7B, the periphery of the formation region of the pixel electrode 11 on the upper side of the paper is exposed, and the periphery of the formation region of the pixel electrode 11 on the lower side of the paper is similarly exposed.

  As shown in FIG. 7C, the overlapping portion 84 of the first exposure region 81 and the second exposure region 83 is double-exposure, so that the peripheral portion (Y A depression 88 is formed at the end in the direction. In this embodiment, since the boundary of the shot division in the X direction is arranged so as to intersect only the peripheral portion along the scanning line 1 in the peripheral portion of the formation region of the pixel electrode 11, the depression 88 is formed in the scanning line 1. It is formed only at the peripheral edge of the pixel electrode 11 along. The peripheral edge of the pixel electrode 11 along the scanning line 1 is shielded by the black matrix 43 together with the adjacent scanning line 1. Therefore, the depression 88 is also shielded by the black matrix 43.

  Further, the shot division position in the Y direction of the pixel electrode 11 is arranged in a non-formation region of the pixel electrode 11. For this reason, due to light leaks 82 and 85 from the exposure blind 72, a pattern narrow 87 occurs at the peripheral edge (end in the Y direction) along the scanning line 1 of the pixel electrode 11. However, since the peripheral edge portion of the pixel electrode 11 along the scanning line 1 is shielded by the black matrix 43 as described above, the pattern thinning 87 is also shielded by the black matrix 43.

  On the other hand, the boundary of the shot division in the X direction and the Y direction of the common electrode 17 is arranged only in the region where the opening 17a is not formed. The common electrode 17 is formed in a substantially solid shape except for the opening 17a. Therefore, pattern thinning around the shot division position does not occur in the common electrode 17.

  Therefore, according to the present embodiment, the shot division position of the exposure process in photolithography for patterning the pixel electrode 11 is set in the formation region of the pixel electrode 11 that divides the pixel electrode 11, and is formed on the pixel electrode 11. The pattern thinning 87 is positioned in the black matrix 43 formation region. With this configuration, the pattern thinning 87 formed in the direction along the scanning line 1 of the pixel electrode 11 can be hidden by the black matrix 43, and in the direction along the data line 3 of the pixel electrode 11, Pattern thinning does not occur. Therefore, a high aperture ratio of the pixel can be realized. Furthermore, even if the black matrix 43 formed on the data line 3 is removed, a difference in brightness due to fluctuation of the pixel transmittance does not occur, and a further high aperture ratio of the pixel is realized. Can do.

  In this embodiment, a rectangular pixel electrode connected to the TFT is disposed on the lower layer side, and a common electrode having a slit-like opening is disposed on the upper layer side. However, the common electrode is disposed on the lower layer side, and the pixel electrode is disposed on the upper layer side. The structure to do may be sufficient. In this case, since the slit-shaped opening is formed on the pixel electrode side, the shot division position in the X direction of the pixel electrode is performed in the pixel electrode formation region and in the non-opening region. Become. Further, the shot division position in the Y direction may be the same position as in the above-described embodiment.

  The technical scope of the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, the specific configuration such as the pattern shape, material, film thickness, etc. of each wiring, each electrode, etc. on the TFT array substrate can be appropriately changed without being limited to the above embodiment.

  In the present embodiment, the case of a transmissive liquid crystal device has been described. However, the present invention is not limited to this, and the present invention may be applied to a reflective or transflective liquid crystal device.

1 is a schematic plan view of a liquid crystal device in an embodiment of the present invention. It is sectional drawing which follows the HH 'line of FIG. It is an enlarged plan view of a pixel of a liquid crystal device in an embodiment of the present invention. It is sectional drawing which follows the AA 'line of FIG. It is a manufacturing process sectional view of a liquid crystal device in an embodiment of the present invention. FIG. 6 is a cross-sectional view of a manufacturing process for patterning a pixel electrode. It is an image figure of the manufacturing process in the shot division position of a pixel electrode. It is the top view which showed the pattern thinning of the electrode in the conventional shot division | segmentation.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Scanning line 3 ... Data line 10 ... TFT array board | substrate (1st board | substrate) 11 ... Pixel electrode 17a ... Opening part 13 ... TFT (switching element) 17 ... Common electrode 20 ... Opposite board | substrate (2nd board | substrate) 27 ... 4th Interlayer insulating film (electrode insulating film) 43 ... Black matrix 50 ... Liquid crystal layer 81 ... Exposure area (first exposure area) 83 ... Exposure area (second exposure area) 100 ... Liquid crystal device

Claims (5)

A method of manufacturing a liquid crystal device comprising a first substrate and a second substrate facing each other with a liquid crystal sandwiched therebetween, a pixel electrode for driving the liquid crystal, and a common electrode,
After the step of forming the scanning line and the data line on the first substrate , the pixel electrode is formed in an upper layer of the pixel electrode, and has an opening in a portion overlapping with the pixel electrode through the electrode insulating film. A step of forming the common electrode by photolithography,
The pixel electrode forming step includes forming a pixel electrode material on the first substrate, applying a resist on the pixel electrode material, and exposing the resist in several steps. It has an exposure step, a
The step of forming the common electrode includes a step of forming a common electrode material on the electrode insulating film, a step of applying a resist on the common electrode material, and a common electrode for exposing the resist in several steps An exposure process,
The pixel electrode exposing step, the boundaries of the exposure performed by dividing into the several boundary for dividing the scanning line direction is in formation regions of the pixel electrode, the boundary that divides the data line direction the pixel electrode In the common electrode exposure step, the boundary of exposure performed in several steps is divided into the boundary dividing the data line direction and the scanning line direction. A method for manufacturing a liquid crystal device, in which exposure processing is performed by arranging the dividing boundaries so as to be in a non-formation region of the opening of the common electrode . A manufacturing method of a liquid crystal device according to claim 1,
In the pixel electrode exposure step, the boundary of the exposure performed in several steps, the boundary dividing the scanning line direction is only the peripheral part along the scanning line in the peripheral part of the pixel electrode formation region. A method of manufacturing a liquid crystal device, wherein the liquid crystal device is arranged so that the boundary that intersects and divides the data line direction is substantially at the same position as a region where the scanning line is formed. A liquid crystal device manufactured by the method for manufacturing a liquid crystal device according to claim 1. The liquid crystal device according to claim 3,
A liquid crystal device comprising a peripheral portion of the pixel electrode along the scanning line and a black matrix formed so as to overlap the scanning line in plan view. The liquid crystal device according to claim 3,
A data signal is provided on the first substrate to supply a data signal to a switching element that controls energization to the pixel electrode, and the data line is provided so as to intersect the scanning line,
A liquid crystal device in which a black matrix is not formed at a peripheral portion of the pixel electrode along the data line and a position overlapping the data line in plan view.

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