JP5003035B2 - POL power supply circuit protection circuit - Google Patents

POL power supply circuit protection circuit Download PDF

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JP5003035B2
JP5003035B2 JP2006183492A JP2006183492A JP5003035B2 JP 5003035 B2 JP5003035 B2 JP 5003035B2 JP 2006183492 A JP2006183492 A JP 2006183492A JP 2006183492 A JP2006183492 A JP 2006183492A JP 5003035 B2 JP5003035 B2 JP 5003035B2
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power supply
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supply circuit
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pol power
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健 熱海
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Description

本発明は、POL(Point of Load )電源回路の保護回路に係り、特に、負荷端に隣接して配置されたDC/DCコンバータを最新のFPGA(Field Programmable Gate Array )搭載ボードで実装するPOL電源の故障時に過大なPOL電源入力電圧が負荷に印加されるのを防止するPOL電源回路の保護回路に関するものである。 The present invention relates to a protection circuit for a POL (Point of Load) power supply circuit, and in particular, a POL power supply in which a DC / DC converter arranged adjacent to a load end is mounted on a latest FPGA (Field Programmable Gate Array) mounted board. The present invention relates to a protection circuit for a POL power supply circuit that prevents an excessive POL power supply input voltage from being applied to a load at the time of failure.

近年、電子機器の各パッケージ基板においては、LSI(Large Scale Integrated Ci-rcuit )の低電圧化に伴ってプリント基板のパターン抵抗や寄生インダクタンスによる電圧降下が無視できなくなってきた。また動作モードの切り替えなど、LSIの消費電流が急増したときの瞬間的な電源電圧の降下やその後の電圧のふらつき(寄生振動)が大きいと誤動作が生じる可能性もある。   In recent years, in each package substrate of an electronic device, a voltage drop due to a pattern resistance or a parasitic inductance of a printed circuit board cannot be ignored with a decrease in voltage of an LSI (Large Scale Integrated Ci-rcuit). In addition, a malfunction may occur if the instantaneous power supply voltage drop or the subsequent voltage fluctuation (parasitic vibration) when the LSI consumption current rapidly increases, such as switching of the operation mode, is large.

こうした問題に対処するため、従来の集中給電方式からLSI、FPGA(Field Pro-grammable Gate Array)、DSP(Digital Signal Processor)などの負荷直近にDC/DCコンバータ電源を配置する分散給電方式が採用されるようになってきている。   In order to cope with these problems, a distributed power supply system in which a DC / DC converter power supply is arranged in the immediate vicinity of a load such as an LSI, an FPGA (Field Pro-grammable Gate Array), a DSP (Digital Signal Processor), etc. has been adopted. It is becoming.

なお、FPGA(Field Pro-grammable Gate Array)とは、利用者がプログラミングすることができるLSIのことを示し、DSP(Digital Signal Processor)とは、ディジタル信号処理専用のマイクロプロセッサのことを示す。   An FPGA (Field Pro-grammable Gate Array) indicates an LSI that can be programmed by a user, and a DSP (Digital Signal Processor) indicates a microprocessor dedicated to digital signal processing.

この給電方式を用いることによって、電源と負荷との距離を短くすることができ、配線による電圧低下や配線インダクタンスによる過渡的な電圧変化の影響を低減することができる。そして、この分散給電の考え方をさらに発展させ、負荷となる各デバイスのすぐ側にDC/DCコンバータを配置するPOL(Point of Load)という手法があり、POLを実現するコンバータをPOLタイプのDC/DCコンバータと呼んでいる。POLは、日本語で表現すると「負荷端に隣接して配置する」というイメージになる。   By using this power feeding method, the distance between the power source and the load can be shortened, and the influence of a voltage drop due to wiring or a transient voltage change due to wiring inductance can be reduced. Further, this idea of distributed power supply is further developed, and there is a method called POL (Point of Load) in which a DC / DC converter is arranged immediately on each device serving as a load, and a converter that realizes POL is a POL type DC / DC / DC converter. This is called a DC converter. When expressed in Japanese, POL has the image of “arranged adjacent to the load end”.

なお、POLコンバータには、非絶縁型と絶縁型DC/DCコンバータの2種類があるが、ここで用いられるDC/DCコンバータ電源は小型で低価格であることが要求されることからトランス等を内蔵しないタイプのもので、非絶縁型DC/DCコンバータを対象とする。   There are two types of POL converters, a non-insulated type and an isolated type DC / DC converter. The DC / DC converter power source used here is required to be small and inexpensive, so a transformer or the like can be used. Non-insulated type DC / DC converter.

非絶縁型POL電源の適用時の問題として、電源回路が故障した際に入力電圧が出力にそのまま通過して印加される現象がある。その結果、POL電源出力に接続された各種負荷に定格を超えた電圧が印加される可能性がある。   As a problem when the non-insulated POL power supply is applied, there is a phenomenon in which the input voltage passes through the output as it is when the power supply circuit fails. As a result, a voltage exceeding the rating may be applied to various loads connected to the POL power output.

図3は、従来技術によるPOL電源回路の保護回路図である。同図において、POL電源回路1の入力部にヒューズ3とサイリスタ4を挿入し、POL電源回路1の出力部と接続負荷間に出力電圧検出部5を挿入する。また、出力電圧検出部5の検出端子とサイリスタ4のコントロール端子とが接続されている。 FIG. 3 is a protection circuit diagram of a conventional POL power supply circuit . In the figure, a fuse 3 and a thyristor 4 are inserted in the input section of the POL power supply circuit 1, and an output voltage detection section 5 is inserted between the output section of the POL power supply circuit 1 and the connected load. Further, the detection terminal of the output voltage detection unit 5 and the control terminal of the thyristor 4 are connected.

このような構成の従来のPOL電源回路の保護回路について、動作は以下のようになる。出力電圧検出部5の検出電圧が一定値を超える (過電圧を検出)と、サイリスタ4のコントロール端子にH信号が入力され、サイリスタ4が導通状態となる。そのため、ヒューズ3は、サイリスタ4を経由してGND間で大電流が流れるために焼切れて、ヒューズ3断となる。このようにしてPOL電源回路への入力を断つ構成がとられていた。(例えば、特許文献1参照)。 The operation of the protection circuit of the conventional POL power supply circuit having such a configuration is as follows. When the detection voltage of the output voltage detector 5 exceeds a certain value (overvoltage is detected), the H signal is input to the control terminal of the thyristor 4 and the thyristor 4 becomes conductive. Therefore, the fuse 3 is burned out because a large current flows between the GNDs via the thyristor 4 and the fuse 3 is blown. In this way, a configuration is adopted in which the input to the POL power supply circuit is cut off. (For example, refer to Patent Document 1).

図4は、従来の非絶縁型DC/DCコンバータの回路図である。同図において、入力端子間には、整流スイッチングS1及び転流スイッチS2を直列に接続していて、転流スイッチS2のSOURCE−DRAIN間にチョークコイルLと平滑コンデンサCとを直列に接続している。   FIG. 4 is a circuit diagram of a conventional non-insulated DC / DC converter. In the figure, a rectifying switching S1 and a commutation switch S2 are connected in series between input terminals, and a choke coil L and a smoothing capacitor C are connected in series between SOURCE-DRAIN of the commutation switch S2. Yes.

このような構成の従来の非絶縁型DC/DCコンバータについて、動作は以下のようになる。整流スイッチS1のゲートに入力されるスイッチング信号(図示省略)によって、整流スイッチS1は、直流入力電圧断続してパルス電圧を生成し、この出力によってチョークコイルLに電流が流れ、平滑コンデンサCが充電される。この平滑コンデンサCの端子間に現れる電圧が負荷に印加される出力電圧となる。整流スイッチS2のオンオフ状態は、整流スイッチS1のそれと反転したものであり、相補的にオンオフ駆動し、同期整流動作を行う。   The operation of the conventional non-insulated DC / DC converter having such a configuration is as follows. By a switching signal (not shown) input to the gate of the rectifying switch S1, the rectifying switch S1 generates a pulse voltage by intermittently applying a DC input voltage, and a current flows through the choke coil L by this output, and the smoothing capacitor C is charged. Is done. The voltage appearing between the terminals of the smoothing capacitor C is the output voltage applied to the load. The on / off state of the rectifying switch S2 is inverted from that of the rectifying switch S1, and is complementarily turned on / off to perform a synchronous rectifying operation.

図3に示すPOL電源回路1に、例えば図4に示す非絶縁型DC/DCコンバータを用いる手法があり、POLを実現するPOLタイプ非絶縁型DC/DCコンバータ、即ち、非絶縁型POL電源回路を構成している。   The POL power supply circuit 1 shown in FIG. 3 has, for example, a method using a non-insulated DC / DC converter shown in FIG. 4, and a POL type non-insulated DC / DC converter that realizes POL, that is, a non-insulated POL power supply circuit. Is configured.

しかしながら、この従来技術による図3のPOL電源保護回路では、以下のような問題点がある。
(1)ヒューズ断となるまでの間は、出力電圧に入力電圧が発生する。
(2)定常時電流に対して十分なマージンある大定格のヒューズおよびサイリスタが必要である。
(3)入力断となることにより、異常アラームの発生等が不可能となる。
However, the conventional POL power supply protection circuit of FIG. 3 has the following problems.
(1) An input voltage is generated as an output voltage until the fuse is blown.
(2) Large rated fuses and thyristors with sufficient margin for steady-state current are required.
(3) When the input is cut off, an abnormal alarm cannot be generated.

その他の従来技術として、非絶縁型DC−DCコンバータにおいて、平滑コンデンサ間の端子間電圧と所定の基準電圧とを比較して、端子間電圧値が基準電圧値以上であることを検出すると、オン駆動信号を転流用トランジスタに向けて出力することにより過電流を保護する回路の発明が開示されている。(例えば、特許文献2参照)。   As another prior art, in a non-insulated DC-DC converter, when the voltage between the terminals between the smoothing capacitors is compared with a predetermined reference voltage and it is detected that the voltage value between the terminals is equal to or higher than the reference voltage value, An invention of a circuit for protecting an overcurrent by outputting a drive signal to a commutation transistor is disclosed. (For example, refer to Patent Document 2).

また、この従来の技術によっても、以下のような問題点がある。
(1)非絶縁型DC−DCコンバータ内の転流用トランジスタQ1を直接オンさせるために、既存の非絶縁型DC−DCコンバータを改造する必要が生じる。
(2)出力端子間をチョ−クコイルを介して短絡状態を形成することから、非絶縁型DC−DCコンバータ出力の発生が停止状態となるには多少の時間を必要とする。
特開2005−130593号公報 特開平11−187651号公報
This conventional technique also has the following problems.
(1) In order to directly turn on the commutation transistor Q1 in the non-insulated DC-DC converter, it is necessary to modify the existing non-insulated DC-DC converter.
(2) Since a short circuit state is formed between the output terminals via the choke coil, it takes some time to stop the generation of the non-insulated DC-DC converter output.
JP 2005-130593 A JP-A-11-187651

本発明は、従来技術の問題点を解決するために、POL電源の出力電圧に応じて、POL電源出力と負荷の接続・開放を制御する機構を設け、POL電源の故障時に入力電圧が出力部に通過しても、この電圧が負荷に印加されないPOL電源回路の保護回路を提供することを課題とする。 In order to solve the problems of the prior art, the present invention is provided with a mechanism for controlling connection / release of a POL power supply output and a load in accordance with the output voltage of the POL power supply. It is an object of the present invention to provide a protection circuit for a POL power supply circuit in which this voltage is not applied to a load even if it passes through.

上記課題を解決するための第1の発明は、負荷に電源電圧を供給するPOL電源回路の保護回路において、前記POL電源回路の出力端子と前記負荷との間に設けられたスイッチと、前記POL電源回路の入力電圧と出力電圧との比較に応じて、前記スイッチオンまたはオフにする制御手段を備え、前記制御手段は、前記比較の結果が許容範囲内である場合に正バイアス電圧が印加されてオン状態となり、前記比較の結果が許容範囲外である場合に正バイアス電圧が印加されずオフ状態となるトランジスタ回路である。 The first invention for solving the above problems is the protection circuit of the POL power supply circuit supplying a power supply voltage to a load, a switch provided between the load and the output terminal of the POL conductive Minamotokai path, Control means for turning on or off the switch according to a comparison between an input voltage and an output voltage of the POL power supply circuit, and the control means has a positive bias voltage when the result of the comparison is within an allowable range. Is applied and is turned on, and when the result of the comparison is outside the allowable range, a positive bias voltage is not applied and the transistor circuit is turned off.

この第1の発明によれば、小型で低価格の保護回路が構成できるとともに、負荷に異常電圧が加わることの無いPOL電源回路の保護回路を提供することができる。 According to the first aspect of the present invention, a small and low-priced protection circuit can be configured, and a protection circuit for a POL power supply circuit that does not apply an abnormal voltage to a load can be provided.

第2の発明は、第1の発明記載のPOL電源回路の保護回路において、前記POL電源回路は、トランスを内蔵しない非絶縁型DC/DCコンバータである。 The second invention is, in the protection circuit of the POL power supply circuit of the first invention, wherein the POL electrostatic Minamotokai path is a non-isolated DC / DC converter which does not incorporate the transformer.

第3の発明は、第1の発明記載のPOL電源回路の保護回路において、前記POL電源回路の入力電圧と出力電圧とを比較する比較手段を備え、前記比較手段は、比較の結果が許容範囲内では負バイアス電圧が印加されオン状態となり、比較の結果が許容範囲外では負バイアス電圧が印加されずオフ状態となるトランジスタ回路である。 A third invention is, in the protection circuit of the POL power supply circuit of the first invention, further comprising a comparing means for comparing the input voltage and the output voltage of the POL power supply circuit, the comparing means, a result of the comparison is acceptable range In the transistor circuit, a negative bias voltage is applied to be turned on, and when the comparison result is outside the allowable range, the negative bias voltage is not applied and the transistor circuit is turned off.

この第3の発明によれば、パッケージ回路の小型化及び低コスト化を図ることができるPOL電源回路の保護回路を提供することができる。 According to the third aspect of the invention, it is possible to provide a protection circuit for a POL power supply circuit that can reduce the size and cost of the package circuit.

第4の発明は、第1の発明記載のPOL電源回路の保護回路において、前記スイッチは、接続負荷端の過電圧阻止用トランジスタである。 According to a fourth aspect of the present invention, in the protection circuit for a POL power supply circuit according to the first aspect of the present invention, the switch is an overvoltage blocking transistor at a connection load end.

この第4の発明によれば、パッケージ回路の小型化及び低コスト化を図ることができる
POL電源回路の保護回路を提供することができる。
According to the fourth aspect of the invention, it is possible to provide a protection circuit for a POL power supply circuit that can reduce the size and cost of the package circuit.

第5の発明は、第1の発明記載のPOL電源回路の保護回路において、前記制御手段は、前記比較手段の比較の結果が許容範囲内で正バイアス電圧が印加されてオン状態となり、比較の結果が許容範囲外では正バイアス電圧が印加されずオフ状態となるトランジスタ回路である。 According to a fifth invention, in the protection circuit for the POL power supply circuit according to the first invention, the control means is turned on when a positive bias voltage is applied within a permissible range of the comparison result of the comparison means . When the result is out of the allowable range, the transistor circuit is turned off without applying a positive bias voltage.

この第5の発明によれば、パッケージ回路の小型化及び低コスト化を図ることができるPOL電源回路の保護回路を提供することができる。 According to the fifth aspect of the invention, it is possible to provide a protection circuit for a POL power supply circuit that can reduce the size and cost of the package circuit.

以上、本発明のPOL電源回路の保護回路によれば、入力部に必要以上の容量のヒューズや、大定格のサイリスタ等を配置する必要がない為、パッケージ回路の小型化および低コスト化を図ることができる。 As described above, according to the protection circuit for the POL power supply circuit of the present invention, it is not necessary to arrange a fuse having a larger capacity than necessary, a highly rated thyristor, or the like in the input section, thereby reducing the size and cost of the package circuit. be able to.

また従来のPOL電源回路の保護回路では、入力部が断となるまでの間にPOL電源入力電圧が負荷回路に印加される状態となるが、本発明のPOL電源回路の保護回路では,出力値が異常となると、即座に負荷回路と電源回路出力が切り離されるため、負荷回路に異常電圧が加わることは無い。 In the protection circuit of the conventional POL power supply circuit , the POL power supply input voltage is applied to the load circuit until the input section is disconnected. However, in the protection circuit of the POL power supply circuit of the present invention, the output value Is abnormal, the load circuit and the power circuit output are immediately disconnected, so that no abnormal voltage is applied to the load circuit.

さらに本発明のPOL電源回路の保護回路は数個のトランジスタで構成され、また各トランジスタは、大きな損失も生じないことから小型で、且つ低価格なもので構成できるため、POL電源回路モジュールに組み込むことも容易に可能である。 Further, the protection circuit of the POL power supply circuit of the present invention is composed of several transistors, and since each transistor does not cause a large loss, it can be configured with a small size and a low price. Therefore, it is incorporated in the POL power supply circuit module. It is also possible easily.

以下、本発明の実施の形態について、図を参照しながら説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

図1は、本発明の一実施形態における非絶縁型POL電源回路の保護回路図である。同図において、1はPOL電源回路であり、図4で説明した非絶縁型DC/DCコンバータにより、POLタイプの非絶縁型DC/DCコンバータで構成されている。TR3は、POL電源回路1の出力と電源電圧供給先となる接続負荷間に挿入されるスイッチング用のトランジスタであり、そのON/OFF切替によりPOL電源回路1の出力電圧を接続負荷へ印加したり、印加されなくしている。TR1とTR2は、TR3のON/OFF切替制御する制御回路を構成するトランジスタである。 FIG. 1 is a protection circuit diagram of a non-insulated POL power supply circuit according to an embodiment of the present invention. In the figure, reference numeral 1 denotes a POL power supply circuit, which is composed of a POL type non-insulated DC / DC converter by the non-insulated DC / DC converter described in FIG. TR3 is a switching transistor inserted between the output of the POL power supply circuit 1 and the connection load to which the power supply voltage is supplied, and by applying ON / OFF switching, the output voltage of the POL power supply circuit 1 is applied to the connection load. Is not applied. TR1 and TR2 are transistors constituting a control circuit for controlling ON / OFF switching of TR3.

TR3(Pch型)はPOL電源回路の出力と電源電圧供給先となる負荷間に挿入されている。TR3のGATE−SOURCE間に負バイアス電圧が印加されSOURCE−DRAIN間がON( 短絡) する事で、負荷にPOL電源出力電圧が印加される。逆にこの負バイアス電圧が印加されていない場合は、SOURCE−DRAIN間がOFF(開放) 状態となる為、接続負荷端はハイインピーダンス状態となり、電圧が印加されないことになる。   TR3 (Pch type) is inserted between the output of the POL power supply circuit and the load to which the power supply voltage is supplied. When a negative bias voltage is applied between GATE and SOURCE of TR3 and SOURCE and DRAIN are turned ON (short circuit), a POL power supply output voltage is applied to the load. On the other hand, when this negative bias voltage is not applied, the SOURCE-DRAIN state is in an OFF (open) state, so that the connection load end is in a high impedance state and no voltage is applied.

TR1(Pch型) のGATE電極はPOL電源出力に、SOURCE電極はPOL電源入力に接続されている。GATE−SOURCE間電圧に負バイアス電圧が印加されることにより、SORCE−DRAIN間がON( 短絡) となり、ON時にはそのDRAIN電圧がハイレベル( 略Vin)、OFF時にはローレベル( 略GND電位) となる。   The GATE electrode of TR1 (Pch type) is connected to the POL power supply output, and the SOURCE electrode is connected to the POL power supply input. When a negative bias voltage is applied to the GATE-SOURCE voltage, the SOURCE-DRAIN is turned ON (short circuit). When the GATE-SOURCE voltage is ON, the DRAIN voltage is high (substantially Vin), and when OFF, the low level (substantially GND potential) Become.

TR2(Nch型) のGATE電極はTR1のDRAIN電極に接続されている。またDRAIN電極はTR3のGATE電極に接続されており、TR3のON/OFFが制御される。TR2のDRAIN電位はON時にローレベル( 略GND電位)、OFF時にハイレベル( 略Vin)となる。   The GATE electrode of TR2 (Nch type) is connected to the DRAIN electrode of TR1. The DRAIN electrode is connected to the GATE electrode of TR3, and ON / OFF of TR3 is controlled. The DRAIN potential of TR2 is low level (approximately GND potential) when ON, and is high level (approximately Vin) when OFF.

図2は、図1にて示した保護回路2内の各トランジスタの電位変化を示す図であり、(a)POL電源回路正常時と、(b)POL電源回路異常時の場合を示す。以下に、図1の動作を図2を参照して説明する。   FIG. 2 is a diagram showing changes in the potential of each transistor in the protection circuit 2 shown in FIG. 1, and shows a case where (a) the POL power supply circuit is normal and (b) a POL power supply circuit is abnormal. The operation of FIG. 1 will be described below with reference to FIG.

正常動作時、POL電源回路1の出力には入力電圧Vinを降圧した正常な電圧Vpが発生する。Vp<Vinであるから、TR1のGATE−SOURCE間には負バイアス電圧が印加され、TR1はON状態となる。TR1のDRAIN電極に接続されたTR2のGATE電位はVinとなり、GATE−SOURCE間が正バイアス状態となる事から、TR2もON状態となる。TR2のDRAIN電極に接続されたTR3のGATE電位は略GND電位となる。またTR3のSOURCE電位はPOL電源の出力電圧Vpとなり、GATE−SOURCE間が負バイアス状態となりTR3もON状態となる。よってPOL電源の正常動作時には、POL電源出力部と負荷間が導通状態となり、負荷に電圧が印加される。   During normal operation, a normal voltage Vp obtained by stepping down the input voltage Vin is generated at the output of the POL power supply circuit 1. Since Vp <Vin, a negative bias voltage is applied between GATE and SOURCE of TR1, and TR1 is turned on. Since the GATE potential of TR2 connected to the DRAIN electrode of TR1 becomes Vin and the GATE-SOURCE is in a positive bias state, TR2 is also in the ON state. The GATE potential of TR3 connected to the DRAIN electrode of TR2 is substantially the GND potential. Also, the SOURCE potential of TR3 becomes the output voltage Vp of the POL power supply, the GATE-SOURCE state is in a negative bias state, and TR3 is also in the ON state. Therefore, during normal operation of the POL power supply, the POL power supply output unit and the load are in a conductive state, and a voltage is applied to the load.

POL電源回路の故障時、すなわちPOL電源回路の出力部に入力電圧Vinが発生した場合、TR1はGATE電位およびSOURCE電位共にVinとなるため、ON状態とならない。よってTR2もGATE電位が略GND電位となるため、GATE−SOURCE間に正バイアスが印加されずON状態とならない。即ち、TR2のドレイン電位は略Vinとなる。これにより、TR3はGATE,SOURCE電位ともVinとなるため、TR1,2同様OFF状態となる。よってPOL電源回路の出力電圧がVinの場合、POL電源出力部と負荷間が非導通状態となり、負荷端はハイインピーダンスとなり異常電圧値の印加が回避される。   When the POL power supply circuit is faulty, that is, when the input voltage Vin is generated at the output section of the POL power supply circuit, TR1 does not become ON because both the GATE potential and the SOURCE potential are Vin. Therefore, since the GATE potential is substantially the GND potential in TR2, a positive bias is not applied between GATE and SOURCE, and the TR2 does not turn on. That is, the drain potential of TR2 is approximately Vin. As a result, TR3 becomes both GATE and SOURCE potentials Vin, so that it is in an OFF state as in TR1 and TR2. Therefore, when the output voltage of the POL power supply circuit is Vin, the POL power supply output unit and the load are in a non-conductive state, the load end becomes high impedance, and application of an abnormal voltage value is avoided.

本発明は、負荷回路直近にPOL電源回路(特に、非絶縁型POL電源回路)を設けたPKG(パッケージ)基板を搭載する伝送・無線装置等、電子機器全般において利用できる。   INDUSTRIAL APPLICABILITY The present invention can be used in general electronic equipment such as a transmission / radio device mounted with a PKG (package) substrate provided with a POL power supply circuit (particularly, a non-insulated POL power supply circuit) in the immediate vicinity of a load circuit.

本発明の一実施形態におけるPOL電源回路の保護回路図である。It is a protection circuit diagram of the POL power supply circuit in one Embodiment of this invention. 図1に示されるPOL電源回路の保護回路内の各トランジスタの電位変化を 示す図である。FIG. 2 is a diagram showing a potential change of each transistor in the protection circuit of the POL power supply circuit shown in FIG. 1. 従来技術によるPOL電源回路の保護回路図である。It is a protection circuit diagram of a POL power supply circuit according to the prior art. 非絶縁型DC/DCコンバータの概略回路図である。It is a schematic circuit diagram of a non-insulated DC / DC converter.

符号の説明Explanation of symbols

1 POL電源回路
2 保護回路
3 ヒューズ
4 サイリスタ
5 出力電圧検出部
1 POL power supply circuit 2 protection circuit 3 fuse 4 thyristor 5 output voltage detector

Claims (4)

負荷に電源電圧を供給するPOL電源回路の保護回路において、
前記POL電源回路の出力端子と前記負荷との間に設けられたスイッチと、
前記POL電源回路の入力電圧と出力電圧との比較に応じて、前記スイッチをオンまたはオフにする制御手段を備え、
前記制御手段は、前記比較の結果が許容範囲内である場合に正バイアス電圧が印加されてオン状態となり、前記比較の結果が許容範囲外である場合に正バイアス電圧が印加されずオフ状態となるトランジスタ回路である
ことを特徴とするPOL電源回路の保護回路。
In the protection circuit of the POL power supply circuit that supplies the power supply voltage to the load,
A switch provided between the output terminal of the POL power supply circuit and the load;
Control means for turning on or off the switch according to a comparison between an input voltage and an output voltage of the POL power supply circuit;
When the comparison result is within an allowable range, the control means is applied with a positive bias voltage to be in an on state, and when the comparison result is outside the allowable range, the positive bias voltage is not applied and is in an off state. A protection circuit for a POL power supply circuit, wherein the protection circuit is a transistor circuit.
請求項1記載のPOL電源回路の保護回路において、
前記POL電源回路は、トランスを内蔵しない非絶縁型DC/DCコンバータであることを特徴とするPOL電源回路の保護回路。
The protection circuit of the POL power supply circuit according to claim 1,
The protection circuit for a POL power supply circuit, wherein the POL power supply circuit is a non-insulated DC / DC converter without a built-in transformer.
請求項1記載のPOL電源回路の保護回路において、
前記POL電源回路の入力電圧と出力電圧とを比較する比較手段を備え、
前記比較手段は、比較の結果が許容範囲内では負バイアス電圧が印加されオン状態となり、比較の結果が許容範囲外では負バイアス電圧が印加されずオフ状態となるトランジスタ回路であることを特徴とするPOL電源回路の保護回路。
The protection circuit of the POL power supply circuit according to claim 1,
Comparing means for comparing the input voltage and the output voltage of the POL power supply circuit,
The comparison means is a transistor circuit in which a negative bias voltage is applied when the comparison result is within an allowable range and is turned on, and when the comparison result is outside the allowable range, a negative bias voltage is not applied and the transistor circuit is turned off. POL power supply circuit protection circuit.
請求項1記載のPOL電源回路の保護回路において、
前記スイッチは、接続負荷端の過電圧阻止用トランジスタであることを特徴とするPOL電源回路の保護回路。
The protection circuit of the POL power supply circuit according to claim 1,
A protection circuit for a POL power supply circuit, wherein the switch is a transistor for preventing an overvoltage at a connection load end.
JP2006183492A 2006-07-03 2006-07-03 POL power supply circuit protection circuit Expired - Fee Related JP5003035B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006183492A JP5003035B2 (en) 2006-07-03 2006-07-03 POL power supply circuit protection circuit

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Application Number Priority Date Filing Date Title
JP2006183492A JP5003035B2 (en) 2006-07-03 2006-07-03 POL power supply circuit protection circuit

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JP2008017555A JP2008017555A (en) 2008-01-24
JP5003035B2 true JP5003035B2 (en) 2012-08-15

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61262029A (en) * 1985-05-15 1986-11-20 アイホン株式会社 Overvoltage protector
JPH09322390A (en) * 1996-05-31 1997-12-12 Nec Corp Protecting circuit from overvoltage
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