JP4994705B2 - Route status judgment device - Google Patents

Description

  The present invention relates to a path state determination apparatus that determines a path state of a video signal.

Conventionally, as a path state determination device, when a logical value represented by a parallel signal having a predetermined number of bits representing a video signal is lower than a determination value set to be equal to or less than a dark output value, it is determined as a failure In some cases, even if at least one of the parallel signal input paths is disconnected or short-circuited without increasing the circuit configuration, this can be diagnosed as a failure (for example, see Patent Document 1).
JP-A-8-19007

  However, although the conventional path state determination device can diagnose a disconnection or a short circuit in the video signal path as a failure, there is a problem that the cause of the abnormality in the video signal path cannot be grasped.

  The present invention has been made to solve the conventional problems, and an object of the present invention is to provide a path state determination apparatus capable of grasping the cause of an abnormality in the path of a video signal.

The path state determination apparatus of the present invention includes a constant current source that supplies a constant current to an output path for outputting a video signal to a display device, a first resistor having one end connected to the constant current source, A video amplifier that applies a pedestal voltage to the first resistor and is connected to the other end of the resistor, and the output path is in a normal state, an open state, a power fault state, and a ground fault state based on the voltage value of the output path Path state determining means for determining which state is present , and a Zener diode having a cathode connected to the output path side, connected to the path state determining means, and anode connected to the ground, and the first resistor is a display device And impedance matching with a second resistor having one end connected to the output path side and the other end connected to the ground, and the path state determination means has a voltage value of the output path equal to or higher than the first threshold value. And Tse -When it is within a certain range including the Zener voltage value of the diode, it is determined as a power fault state, and when it is less than the first threshold and within a range equal to or higher than the second threshold lower than the first threshold Judged as an open state, judged as normal when less than the second threshold and within a range equal to or greater than the third threshold lower than the second threshold, less than the third threshold, and ground A ground fault is determined when it is within a certain range including the level.

  With this configuration, the path state determination device according to the present invention can change the video signal output path to a normal state, an open state, a power fault state, or a ground fault state based on the voltage value of the video signal output path. In order to determine whether it exists, the cause of the abnormality in the path of the video signal can be grasped.

The path state determination device of the present invention may further include a first capacitor connected in parallel with the Zener diode, and one end is connected to the output path, the constant current source, and one end of the first resistor. The other end may further include a path state determining means, a Zener diode, and a third resistor connected to the first capacitor.

  The present invention can provide a path state determination apparatus having an effect of being able to grasp the cause of an abnormality in the path of a video signal.

  Embodiments of the present invention will be described below with reference to the drawings. In the present embodiment, an example in which the route state determination device according to the present invention is configured by an ECU (Electronic Control Unit) provided in a vehicle will be described.

  FIG. 1 shows an ECU according to an embodiment of the present invention.

  The ECU 1 includes a camera 2 that captures the rear of the vehicle, a video signal generation device 3 such as a navigation device, a television broadcast receiver, and a DVD (Digital Versatile Disc) player, and a display device that outputs a video signal processed by the ECU 1. 4 is connected.

  As shown in FIG. 2, the camera 2 is attached to the vehicle so as to photograph the rear of the vehicle, and generates a video signal representing the photographed video.

  In FIG. 1, the ECU 1 stores a DSP (Digital Signal Processor) 10 programmed to perform image processing on a video signal representing a video photographed by the camera 2, parameters that the DSP 10 refers to perform image processing, and the like. A flash memory 11, a video memory 12 that stores video data obtained from a video signal when the DSP 10 performs image processing, a video signal that has been subjected to image processing by the DSP 10, and a video output from the video signal generation device 3. A switch 13 for selecting any one of the video signals, a video amplifier 14 for amplifying the video signal selected by the switch 13, and an output for outputting the video signal amplified by the video amplifier 14 to the display device 4. A state signal generation circuit 16 for generating a state signal corresponding to the state of the path 15, and CAN A communication module 18 for performing communication via a Controller Area Network) network 17, and a CPU (Central Processing Unit) 19.

  The DSP 10 performs a bird's-eye view process, a guideline drawing process, and the like on a video signal representing a video photographed by the camera 2.

  Here, the bird's-eye view process refers to a process of creating a pseudo image taken from above the position of the camera 2 by performing a straight line process on an image of a curved portion near the vehicle such as a bumper. . Further, the guideline drawing process refers to a process of overwriting information indicating the traveling direction of the vehicle and the distance from the vehicle on the video.

  Connected to the CAN network 17 are an ECU (not shown) that manages the state of the transmission, an ECU (not shown) that outputs information about the steering angle of the steering wheel of the vehicle, and the like.

  The CPU 19 reads a program stored in a ROM (not shown) into a RAM (not shown), and executes the program read into the RAM, thereby controlling each part of the ECU 1 such as the DSP 10 and the switch 13.

  For example, the CPU 19 obtains transmission information indicating the state of the transmission of the vehicle via the communication module 18, and when the transmission information indicates that the transmission has selected the back gear, the DSP 10 performs image processing. The applied video signal is selected by the switch 13.

  In addition, when the transmission information indicates that the transmission selects a gear other than the back gear, the CPU 19 causes the switch 13 to select the video signal output from the video signal generating device 3. Yes.

  The CPU 19 includes an analog-digital converter (hereinafter simply referred to as “ADC”), and the output path 15 is based on an analog state signal corresponding to the state of the output path 15 detected by the state signal generation circuit 16. Judgment of the state of. Thus, the CPU 19 constitutes a path state determination unit in the present invention.

  In the following description, a state in which the output path 15 is normally connected to the display device 4 is referred to as a “normal state”, and a state in which the output path 15 is not connected anywhere is referred to as an “open state”. A state where the power supply voltage is applied to the output path 15 is referred to as a “power fault state”, and a state where the output path 15 is short-circuited to the ground is referred to as a “ground fault state”.

  As shown in FIG. 3, the state signal generation circuit 16 includes a constant current source 21 that supplies a constant current to the output terminal 20 connected to the output path 15.

  The constant current source 21 includes a transistor T1, resistors R2, R5, and R6, and diodes D1 and D2.

  The resistor R2 has one end applied with the DC voltage Vdd and the other end connected to the emitter of the transistor T1. The resistor R5 has one end applied with a DC voltage Vdd and the other end connected to the anode of the diode D2.

  The resistor R6 has one end connected to the cathode of the diode D2 and the base of the transistor T1, and the other end connected to the ground. The diode D1 has an anode connected to the collector of the transistor T1, and the other end connected to the video signal output terminal 20.

  The diode D2 has a temperature characteristic equivalent to that between the emitter and base of the transistor T1, and the current I1 supplied to the output terminal 20 when the voltage stepped down between the emitter and base of the transistor T1 fluctuates due to a temperature change. Variations are suppressed.

  In the present embodiment, the voltage value of the DC voltage Vdd is 5V, the voltage value Vd2 stepped down by the diode D2 and the voltage value Vbe stepped down between the emitter and base of the transistor T1 are each 0.7V, and the resistance The resistance value of R2 is 100Ω, the resistance value of the resistor R5 is 1.2 kΩ, and the resistance value of the resistor R6 is 1 kΩ.

  Here, the current Ib flowing through the resistor R5 is (Vdd−Vd2) / (R5 + R6), and R5 × Ib + Vd2 = R2 × I1 + Vbe is established. In this embodiment, the value of the current I1 is 23.45 mA. .

  The state signal generation circuit 16 flows through the resistor R1 for matching impedance with the display device 4 side, the protection resistor R3 for preventing a large current from flowing through the CPU 19 for determining the state of the output path 15, and the CPU 19. It further includes a capacitor C1 for suppressing inrush current and signal noise, and a Zener diode ZD for suppressing the voltage applied to the CPU 19 to be equal to or lower than the Zener voltage value.

  The resistor R1 has a resistance value that matches the resistance value of the resistor R4 for matching the impedance with the ECU 1 in the display device 4. In the present embodiment, the resistance values of the resistors R1 and R4 are 75Ω.

  Here, since the video amplifier 14 generates a blanking pedestal voltage, the video amplifier 14 side of the resistor R1 is in a state where the pedestal voltage is applied. In the present embodiment, the value Vp of the pedestal voltage generated by the video amplifier 14 is −0.6V.

  The resistor R3 has a sufficiently large resistance value with respect to the resistor R1. In the present embodiment, the resistance value of the resistor R3 is 3.3 kΩ. The zener diode ZD has a zener voltage value equal to or lower than the allowable voltage of the ADC of the CPU 19. In the present embodiment, the Zener voltage value of the Zener diode ZD is 3.3V.

  The operation of the ECU 1 configured as described above will be described.

  In FIG. 1, first, when an ignition power source or an accessory power source of a vehicle is turned on, electric power is supplied to each part of the ECU 1, and each part of the ECU 1 operates.

  Here, when the back gear of the vehicle is not engaged, the video signal input from the video signal generation device 3 is selected by the switch 13, and the video signal input from the video signal generation device 3 passes through the switch 13. And input to the video amplifier 14.

  On the other hand, when the vehicle is in the back gear, the video signal input by the camera 2 and subjected to image processing by the DSP 10 is selected by the switch 13, and the video signal subjected to image processing by the DSP 10 is a video signal. Input to the amplifier 14.

  The video signal input to the video amplifier 14 in this way is amplified by the video amplifier 14, output to the display device 4, and output to the display device 4.

  Next, the operation of the state signal generation circuit 16 will be described in detail with reference to FIG.

  When the output path 15 is in the power fault state, the state signal input to the CPU 19 is suppressed to the Zener voltage value of the Zener diode ZD, that is, 3.3V. Therefore, when the output path 15 is in a power fault state, a state signal having a voltage value of 3.3 V is input to the CPU 19.

  When the output path 15 is open, the sum of the value of the current I1 supplied from the constant current source 21 to the output terminal 20 and the value of the current I2 flowing from the video amplifier 14 to the output terminal 20 becomes zero. The value of the current I2 is (Vt−Vp) / R1 when the voltage value of the output terminal 20 is Vt. As described above, since the value of the current I1 is 23.45 mA, the voltage value Vt of the output terminal 20 is 23.45 mA × R1−Vp, which is approximately 1.16V.

  Therefore, when the output path 15 is open, a state signal having a voltage value of about 1.16 V is input to the CPU 19.

  When the output path 15 is in a normal state, the value of the current I1 supplied to the output terminal 20 by the constant current source 21, the value of the current I2 flowing from the video amplifier 14 to the output terminal 20, and the output from the display device 4 side. The sum of the values of the current I3 flowing through the terminal 20 becomes zero. The value of the current I3 is Vt / R4. Since the value of the current I1 is 23.45 mA and the value of the current I2 is (Vt−Vp) / R1, the voltage value Vt of the output terminal 20 is (23.45 mA × R1 + Vp) × R4 / (R1 + R4). ), Which is about 0.58V.

  Therefore, when the output path 15 is in a normal state, a state signal having a voltage value of about 0.58 V is input to the CPU 19.

  When the output path 15 is in a ground fault state, the output terminal 20 is at the ground level, that is, 0 V, and therefore a state signal having a voltage value of 0 V is input to the CPU 19.

  Therefore, in this embodiment, when the voltage value of the state signal input from the state signal generation circuit 16 is 2.0 V or more, the CPU 19 determines that the output path 15 is in the power supply state, and 2 When it is less than 0.0 V and 0.8 V or more, it is determined that the output path 15 is in an open state, and when it is less than 0.8 V and 0.25 V or more, the output path 15 is in a normal state. If it is less than 0.25 V, it is determined that the video signal output path 15 is in a ground fault state.

  In the ECU 1 according to the embodiment of the present invention, the output path 15 is in the normal state, the open state, the power fault state, and the ground fault based on the voltage value of the state signal input from the state signal generation circuit 16 to the CPU 19. In order to determine which one of the states, the cause of the abnormality in the path of the video signal can be grasped.

  As described above, the path state determination device according to the present invention has an effect that the cause of the abnormality of the path of the video signal can be grasped. For example, the path state determination apparatus that determines the path state of the video signal Useful as such.

The block diagram of ECU in one embodiment of the present invention Mounting diagram of a camera connected to an ECU according to an embodiment of the present invention The block diagram of the state signal generation circuit which comprises ECU in one embodiment of this invention

Explanation of symbols

1 ECU
2 Camera 3 Video signal generator 4 Display device 10 DSP
11 Flash memory 12 Video memory 13 Switch 14 Video amplifier 16 Status signal generation circuit 18 Communication module 19 CPU
21 Constant current source

Claims (3)

A constant current source for supplying a constant current to an output path for outputting a video signal to a display device;
A first resistor having one end connected to the constant current source;
A video amplifier connected to the other end of the first resistor for applying a pedestal voltage to the first resistor;
Path state determination means for determining, based on the voltage value of the output path, whether the output path is in a normal state, an open state, a power fault state, or a ground fault state ;
A Zener diode having a cathode connected to the output path side, the path state determining means, and an anode connected to the ground ;
The first resistor is impedance-matched with a second resistor provided in the display device, one end of which is connected to the output path side and the other end of which is connected to the ground,
The path state determination means is configured such that a voltage value of the output path is
When it is equal to or higher than the first threshold and within a certain range including the Zener voltage value of the Zener diode, it is determined as a power fault state,
When it is less than the first threshold value and within a range equal to or higher than a second threshold value that is lower than the first threshold value, it is determined as an open state,
When it is less than the second threshold and within a range equal to or higher than a third threshold lower than the second threshold, it is determined as a normal state.
A path state determination device that determines a ground fault state when it is less than the third threshold and within a certain range including a ground level . The path state determination device according to claim 1, further comprising a first capacitor connected in parallel with the Zener diode . One end is connected to one end of the output path, the constant current source, and the first resistor, and the other end is connected to the path state determination means, the Zener diode, and the first capacitor. The route state determination device according to claim 1, further comprising:

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