JP4989111B2 - Plasma cleaning device - Google Patents

Plasma cleaning device Download PDF

Info

Publication number
JP4989111B2
JP4989111B2 JP2006147681A JP2006147681A JP4989111B2 JP 4989111 B2 JP4989111 B2 JP 4989111B2 JP 2006147681 A JP2006147681 A JP 2006147681A JP 2006147681 A JP2006147681 A JP 2006147681A JP 4989111 B2 JP4989111 B2 JP 4989111B2
Authority
JP
Japan
Prior art keywords
lower electrode
voltage
frequency power
power source
plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006147681A
Other languages
Japanese (ja)
Other versions
JP2007313468A (en
Inventor
正行 福田
直也 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi High Tech Instruments Co Ltd
Original Assignee
Hitachi High Tech Instruments Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi High Tech Instruments Co Ltd filed Critical Hitachi High Tech Instruments Co Ltd
Priority to JP2006147681A priority Critical patent/JP4989111B2/en
Publication of JP2007313468A publication Critical patent/JP2007313468A/en
Application granted granted Critical
Publication of JP4989111B2 publication Critical patent/JP4989111B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Cleaning In General (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Plasma Technology (AREA)

Description

本発明は、一対の平行な上部電極及び下部電極が配設されたチャンバー内を真空状態として、プラズマ反応性ガスを両電極間に供給すると共に、前記下部電極に高周波電源により高周波電圧を印加して前記ガスをプラズマ化し、このプラズマ中のプラスイオンが前記下部電極上方に配設されるプリント基板に衝突することによりエッチングするプラズマ洗浄装置に関する。   In the present invention, a chamber in which a pair of parallel upper and lower electrodes are disposed is evacuated, plasma reactive gas is supplied between both electrodes, and a high frequency voltage is applied to the lower electrode by a high frequency power source. The present invention relates to a plasma cleaning apparatus that converts the gas into plasma and etches the plasma by causing positive ions in the plasma to collide with a printed circuit board disposed above the lower electrode.

この種の洗浄装置は、例えば特許文献1などに開示されている。一般的には、下部電極上に絶縁物であるアルミナセラミックス板を敷いて、このアルミナセラミックス板と所定間隔を存してプリント基板を配設するように構成して、プラズマの安定化を図り、凹凸部を有するプリント基板に生じ易い異常放電対策としている。   This type of cleaning apparatus is disclosed in, for example, Patent Document 1. In general, an alumina ceramic plate that is an insulator is laid on the lower electrode, and a printed circuit board is disposed with a predetermined distance from the alumina ceramic plate to stabilize the plasma. Measures are taken to prevent abnormal discharge that is likely to occur on a printed circuit board having uneven portions.

しかし、下部電極上にアルミナセラミックス板を敷くと、洗浄の良好に影響を与える下部電極に生じるマイナスのオフセット直流電圧(Vdc)が約100V(ボルト)低下するので、異常放電は無くなるものの、洗浄能力が低下してしまう。
特開2002−153832号公報
However, if an alumina ceramic plate is laid on the lower electrode, the negative offset direct current voltage (Vdc) generated at the lower electrode, which affects the good cleaning, is reduced by about 100 V (volts), so that the abnormal discharge is eliminated, but the cleaning ability Will fall.
JP 2002-153832 A

そこで本発明は、異常放電を起こさないようにすると共に、前記オフセット直流電圧値の低下を極力抑え、プラズマの安定性を図り、極力洗浄能力を低下させないプラズマ洗浄装置を提供することを目的とする。   Accordingly, an object of the present invention is to provide a plasma cleaning apparatus that prevents abnormal discharge, suppresses a decrease in the offset DC voltage value as much as possible, achieves plasma stability, and does not decrease the cleaning ability as much as possible. .

このため請求項1の発明は、一対の平行な上部電極及び下部電極が配設されたチャンバー内を真空状態として、プラズマ反応性ガスを両電極間に供給すると共に、前記下部電極に高周波電源により高周波電圧を印加して前記ガスをプラズマ化し、このプラズマ中のプラスイオンが前記下部電極上方に配設されるプリント基板に衝突することによりエッチングするプラズマ洗浄装置において、上面に板状の絶縁物が設けられた収納トレイに前記プリント基板を前記絶縁物を介して積載し、前記収納トレイを前記チャンバーの開口を開閉する扉体の裏面に設け、前記収納トレイを前記扉体の開閉により前記チャンバー内に出し入れ可能に構成し、前記収納トレイは前記下部電極の上方に位置し、且つ、前記下部電極と前記高周波電源との間に接続され自動整合回路及び測定回路を備えた自動整合器と、前記高周波電源を制御する制御装置とを備え、前記自動整合回路は前記高周波電源のインピーダンスと前記下部電極のインピーダンスとの整合を自動的に行い、前記測定回路は前記高周波電源により高周波電圧が印加されている前記下部電極に生じるマイナスのオフセット直流電圧を測定し、前記制御装置は前記測定回路からの測定されたオフセット直流電圧と予め設定された基準電圧との偏差を無くして、測定された前記オフセット直流電圧が前記基準電圧と同じとなるように前記高周波電源を制御することを特徴とする。 For this reason, the first aspect of the invention provides a vacuum state in a chamber in which a pair of parallel upper and lower electrodes are disposed, and supplies a plasma reactive gas between both electrodes, and a high frequency power source is applied to the lower electrode. In a plasma cleaning apparatus that applies high frequency voltage to turn the gas into plasma, and positive ions in the plasma collide with a printed circuit board disposed above the lower electrode. The printed circuit board is stacked on the storage tray provided via the insulator, the storage tray is provided on the back surface of the door body that opens and closes the opening of the chamber, and the storage tray is opened and closed by opening and closing the door body. out capable and configured, the storage tray is located above the lower electrode, and the connection between the lower electrode and the high frequency power source An automatic matching unit including an automatic matching circuit and a measurement circuit, and a control device for controlling the high-frequency power source. The automatic matching circuit automatically matches the impedance of the high-frequency power source and the impedance of the lower electrode. The measurement circuit measures a negative offset DC voltage generated in the lower electrode to which a high-frequency voltage is applied by the high-frequency power source, and the control device is preset with the measured offset DC voltage from the measurement circuit. The high-frequency power supply is controlled such that the measured offset DC voltage is the same as the reference voltage without any deviation from the reference voltage .

本発明は、異常放電を起こさないようにすると共に、オフセット直流電圧値の低下を極力抑え、プラズマの安定性を図り、極力洗浄能力を低下させないプラズマ洗浄装置を提供することができる。   The present invention can provide a plasma cleaning apparatus that prevents abnormal discharge, suppresses a decrease in offset DC voltage value as much as possible, achieves plasma stability, and does not reduce the cleaning ability as much as possible.

以下、図1のプラズマ洗浄装置の概念図を参照して、先ず本発明の第1の実施形態に係るプラズマ洗浄装置について説明する。1は図示しない真空ポンプによって所定の真空状態とされる直方体形状の真空チャンバーで、この真空チャンバー内には一対の平行な上部電極2及び下部電極3を配設する。即ち、上部電極2は上部の電極支持部材4を介して前記真空チャンバー1の上壁下面に固定し、下部電極3は下部の電極支持部材5を介して前記真空チャンバー1の底壁上面に固定する。   Hereinafter, the plasma cleaning apparatus according to the first embodiment of the present invention will be described first with reference to the conceptual diagram of the plasma cleaning apparatus of FIG. Reference numeral 1 denotes a rectangular parallelepiped vacuum chamber which is brought into a predetermined vacuum state by a vacuum pump (not shown), and a pair of parallel upper electrode 2 and lower electrode 3 are disposed in the vacuum chamber. That is, the upper electrode 2 is fixed to the lower surface of the upper wall of the vacuum chamber 1 through the upper electrode support member 4, and the lower electrode 3 is fixed to the upper surface of the bottom wall of the vacuum chamber 1 through the lower electrode support member 5. To do.

そして、収納トレイ8上面に絶縁物であるアルミナセラミックス板7が貼付され、プリント基板6を前記アルミナセラミックス板7を介して積載したアルミニウム製の収納トレイ8を前記下部電極3の上方に所定間隔dを存するように前記真空チャンバー1内に出し入れ可能に構成する。即ち、前記真空チャンバー1の前面開口を開閉する扉体9裏面下部に設けられた左右一対のロッド10が前記真空チャンバー1の底面下部に設けられた左右一対のロッド案内部材11に貫通して摺動可能に構成すると共に、同じく扉体9裏面中間部に固定された前記収納トレイ8の両側面部に回転可能に設けられた案内ローラー13が前記下部電極3両側部に固定されたガイド体14上を回転摺動するように構成し、前記扉体9の把手15を持って前後に扉体9及び収納トレイ8を移動可能とする。   Then, an alumina ceramic plate 7 as an insulator is attached to the upper surface of the storage tray 8, and an aluminum storage tray 8 on which the printed circuit board 6 is stacked via the alumina ceramic plate 7 is placed above the lower electrode 3 by a predetermined distance d. The vacuum chamber 1 is configured so that it can be taken in and out. That is, a pair of left and right rods 10 provided at the lower back of the door 9 that opens and closes the front opening of the vacuum chamber 1 penetrates and slides through a pair of left and right rod guide members 11 provided at the lower bottom of the vacuum chamber 1. A guide roller 13 that is configured to be movable and is rotatably provided on both side surfaces of the storage tray 8 that is also fixed to the rear middle portion of the door body 9 on the guide body 14 that is fixed to both sides of the lower electrode 3. The door body 9 and the storage tray 8 can be moved back and forth by holding the handle 15 of the door body 9.

従って、作業者は扉体9の把手15を持って手前側に引くと、ロッド10がロッド案内部材11に案内されながら、且つ案内ローラー13がガイド体14上を回転摺動し、ロッド10後端部に設けられたストッパー16がロッド案内部材11に係止するまで、手前側に前記扉体9及び収納トレイ8が移動することとなる。   Therefore, when the operator holds the handle 15 of the door body 9 and pulls it toward the front side, the rod 10 is guided by the rod guide member 11 and the guide roller 13 rotates and slides on the guide body 14. Until the stopper 16 provided at the end is locked to the rod guide member 11, the door body 9 and the storage tray 8 are moved to the front side.

なお、収納トレイ8は案内ローラー13を介して下部電極3の上方に間隔dを存して位置することになり、この間隔dは例えば1mm程度である。また、前記下部電極3両側部に固定されたガイド体14は絶縁物であり、下部電極3と収納トレイ8とは導通はしないこととなるが、導通しない構成についてはこのような構成に限らない。   The storage tray 8 is positioned above the lower electrode 3 via the guide roller 13 with a gap d, and the gap d is about 1 mm, for example. Further, the guide body 14 fixed to both sides of the lower electrode 3 is an insulator, and the lower electrode 3 and the storage tray 8 are not electrically connected. However, the structure that is not electrically connected is not limited to such a structure. .

そして、前記電極支持部材4及び上部電極2を貫通してプラズマ反応性ガス、例えばアルゴン等の不活性ガスが上部電極2と下部電極3との間に供給される。   Then, an inert gas such as argon is supplied between the upper electrode 2 and the lower electrode 3 through the electrode support member 4 and the upper electrode 2.

20はアースに接続された高周波電源で、前記下部電極3に自動整合器21を介して高周波電圧を印加して前記プラズマ反応性ガスをプラズマ化させるものである。そして、生成されたプラズマ中のプラスイオンが収納トレイ8上に敷かれた前記アルミナセラミックス板7上に載置されたプリント基板6に衝突することにより、プリント基板6の表面をエッチングして、汚染物質を取り除き、洗浄する。   Reference numeral 20 denotes a high-frequency power source connected to the ground, which applies a high-frequency voltage to the lower electrode 3 via an automatic matching unit 21 to convert the plasma reactive gas into plasma. Then, the positive ions in the generated plasma collide with the printed circuit board 6 placed on the alumina ceramic plate 7 laid on the storage tray 8, thereby etching the surface of the printed circuit board 6 and causing contamination. Remove material and wash.

前記高周波電源20に接続された前記自動整合器21は自動整合回路及び測定回路とが配設されている。自動整合回路は、前記高周波電源20のパワーを最大限前記真空チャンバー1内に供給するために、前記高周波電源20のインピーダンスと前記下部電極3のインピーダンスとの整合を自動的に行なう回路である。測定回路はA/D回路及びD/A回路を備え、前記高周波電源20により高周波電圧が印加されている下部電極3に生じるマイナスのオフセット直流電圧(Vdc)を常時測定する回路である。   The automatic matching unit 21 connected to the high frequency power source 20 is provided with an automatic matching circuit and a measurement circuit. The automatic matching circuit is a circuit that automatically matches the impedance of the high-frequency power source 20 and the impedance of the lower electrode 3 in order to supply the maximum power of the high-frequency power source 20 into the vacuum chamber 1. The measurement circuit includes an A / D circuit and a D / A circuit, and is a circuit that constantly measures a negative offset DC voltage (Vdc) generated in the lower electrode 3 to which a high-frequency voltage is applied by the high-frequency power source 20.

そして、図示しない制御装置が前記測定回路からの測定されたオフセット直流電圧(Vdc)と予め設定された基準電圧との偏差に応じて前記高周波電圧を変化させるようにPID制御又はオンとオフを一定周期で繰り返すオン/オフ制御を使用して前記高周波電源20を制御する。即ち、オフセット直流電圧(Vdc)は、汚れたプリント基板6の状態(含有せる水分量)により影響を受けるが、高周波電圧値によっても影響を受けるので、オフセット直流電圧(Vdc)と基準電圧との偏差に応じて高周波電圧を変化させるように高周波電源20を制御するものである。   Then, PID control or ON / OFF is fixed so that the control device (not shown) changes the high-frequency voltage according to the deviation between the measured offset DC voltage (Vdc) from the measurement circuit and a preset reference voltage. The high frequency power supply 20 is controlled using on / off control that repeats periodically. That is, the offset DC voltage (Vdc) is affected by the state of the dirty printed circuit board 6 (the amount of water to be contained), but is also affected by the high frequency voltage value, so that the offset DC voltage (Vdc) and the reference voltage are The high frequency power source 20 is controlled so as to change the high frequency voltage in accordance with the deviation.

即ち、オフセット直流電圧(Vdc)の絶対値が基準電圧より大きければその偏差に応じて高周波電圧を減少させ、オフセット直流電圧(Vdc)の絶対値が基準電圧より小さければ高周波電圧を増大させ、偏差が小さくなるように制御する。このように制御するのであれば、その他の手法のフィードバック制御であってもよい。   That is, if the absolute value of the offset DC voltage (Vdc) is larger than the reference voltage, the high-frequency voltage is decreased according to the deviation, and if the absolute value of the offset DC voltage (Vdc) is smaller than the reference voltage, the high-frequency voltage is increased. Is controlled to be small. As long as the control is performed in this way, feedback control using another method may be used.

ここで、前記PID制御とは、比例制御(Proportional Control)、積分制御(Integral Control)、微分制御(Derivative Control)を組み合わせて設定値に収束させる制御をいう。   Here, the PID control refers to control that converges to a set value by combining proportional control, integral control, and differential control.

以上の構成により、以下動作について説明する。図示しない真空ポンプによって真空チャンバー1が所定の真空状態とされ、高周波電源20からの高周波電圧が前記下部電極3に自動整合器21を介して高周波電圧を印加される。すると、電極支持部材4及び上部電極2を貫通してこの上部電極2と下部電極3との間に供給されているプラズマ反応性ガスであるアルゴンガス等はプラズマ化される。このとき、自動整合器21の自動整合回路は高周波電源20のパワーを最大限前記真空チャンバー1内に供給するために、前記高周波電源20のインピーダンスと前記下部電極3のインピーダンスとの整合を自動的に行なう。   With the above configuration, the operation will be described below. The vacuum chamber 1 is brought into a predetermined vacuum state by a vacuum pump (not shown), and a high frequency voltage from the high frequency power source 20 is applied to the lower electrode 3 via the automatic matching unit 21. Then, argon gas or the like, which is a plasma reactive gas that passes through the electrode support member 4 and the upper electrode 2 and is supplied between the upper electrode 2 and the lower electrode 3, is converted into plasma. At this time, the automatic matching circuit of the automatic matching unit 21 automatically matches the impedance of the high frequency power source 20 and the impedance of the lower electrode 3 in order to supply the maximum power of the high frequency power source 20 into the vacuum chamber 1. To do.

以上のように、生成されたプラズマ中のプラスイオンが前記下部電極3上方のプリント基板6に衝突することにより、プリント基板6の表面をエッチングして、汚染物質を取り除き、洗浄する。   As described above, the positive ions in the generated plasma collide with the printed circuit board 6 above the lower electrode 3, thereby etching the surface of the printed circuit board 6 to remove contaminants and cleaning.

そして、前記高周波電源20により高周波電圧が印加されている下部電極3に生じるマイナスのオフセット直流電圧は、常時測定回路により測定される。従って、この測定されたオフセット直流電圧値が入力された制御装置は、前記測定回路からのオフセット直流電圧と予め設定された基準電圧との偏差に応じて前記高周波電圧を変化させるようにPID制御又はオン/オフ制御を使用して前記高周波電源5を制御する。   The negative offset DC voltage generated in the lower electrode 3 to which a high frequency voltage is applied by the high frequency power source 20 is always measured by a measurement circuit. Therefore, the control device to which the measured offset DC voltage value is input can perform PID control or change so as to change the high-frequency voltage according to a deviation between the offset DC voltage from the measurement circuit and a preset reference voltage. The high frequency power supply 5 is controlled using on / off control.

即ち、前記偏差を無くして、測定されたオフセット直流電圧値が基準電圧と同じとなるように、制御装置は前記高周波電源20を制御し、高周波電源20により出力される高周波電圧値を増減させながら、このプラズマ洗浄装置の運転が継続される。   That is, the control device controls the high frequency power supply 20 so as to eliminate the deviation and the measured offset DC voltage value becomes the same as the reference voltage, while increasing or decreasing the high frequency voltage value output by the high frequency power supply 20. The operation of the plasma cleaning apparatus is continued.

従って、収納トレイ8上面に絶縁物であるアルミナセラミックス板7を貼付して、プリント基板6を前記アルミナセラミックス板7を介して積載したアルミニウム製の収納トレイ8を前記下部電極3の上方に設けたから、異常放電を起こさないようにすると共に、異常放電が起こり易い凹凸のある収納トレイ8やプリント基板6に対して、前記オフセット直流電圧値の低下を極力抑え、プラズマの安定性を図り、極力洗浄能力を低下させないプラズマ洗浄装置を提供することができる。   Therefore, the alumina ceramic plate 7 which is an insulator is attached to the upper surface of the storage tray 8, and the aluminum storage tray 8 on which the printed circuit board 6 is stacked via the alumina ceramic plate 7 is provided above the lower electrode 3. In addition to preventing abnormal discharge, the offset DC voltage value is suppressed as much as possible to the storage tray 8 and the printed circuit board 6 having irregularities that are likely to cause abnormal discharge, and the stability of the plasma is achieved as much as possible. It is possible to provide a plasma cleaning apparatus that does not reduce the performance.

以上のように本発明の実施態様について説明したが、上述の説明に基づいて当業者にとって種々の代替例、修正又は変形が可能であり、本発明はその趣旨を逸脱しない範囲で前述の種々の代替例、修正又は変形を包含するものである。   Although the embodiments of the present invention have been described above, various alternatives, modifications, and variations can be made by those skilled in the art based on the above description, and the present invention is not limited to the various embodiments described above without departing from the spirit of the present invention. It encompasses alternatives, modifications or variations.

プラズマ洗浄装置の横断平面図である。It is a cross-sectional top view of a plasma cleaning apparatus. プラズマ洗浄装置の縦断側面図である。It is a vertical side view of a plasma cleaning apparatus.

符号の説明Explanation of symbols

1 真空チャンバー
2 上部電極
3 下部電極
6 プリント基板
7 アルミナセラミックス板
8 収納トレイ
9 扉体
DESCRIPTION OF SYMBOLS 1 Vacuum chamber 2 Upper electrode 3 Lower electrode 6 Printed circuit board 7 Alumina ceramic board 8 Storage tray 9 Door body

Claims (1)

一対の平行な上部電極及び下部電極が配設されたチャンバー内を真空状態として、プラズマ反応性ガスを両電極間に供給すると共に、前記下部電極に高周波電源により高周波電圧を印加して前記ガスをプラズマ化し、このプラズマ中のプラスイオンが前記下部電極上方に配設されるプリント基板に衝突することによりエッチングするプラズマ洗浄装置において、上面に板状の絶縁物が設けられた収納トレイに前記プリント基板を前記絶縁物を介して積載し、前記収納トレイを前記チャンバーの開口を開閉する扉体の裏面に設け、前記収納トレイを前記扉体の開閉により前記チャンバー内に出し入れ可能に構成し、前記収納トレイは前記下部電極の上方に位置し、且つ、前記下部電極と前記高周波電源との間に接続され自動整合回路及び測定回路を備えた自動整合器と、前記高周波電源を制御する制御装置とを備え、前記自動整合回路は前記高周波電源のインピーダンスと前記下部電極のインピーダンスとの整合を自動的に行い、前記測定回路は前記高周波電源により高周波電圧が印加されている前記下部電極に生じるマイナスのオフセット直流電圧を測定し、前記制御装置は前記測定回路からの測定されたオフセット直流電圧と予め設定された基準電圧との偏差を無くして、測定された前記オフセット直流電圧が前記基準電圧と同じとなるように前記高周波電源を制御することを特徴とするプラズマ洗浄装置。 A chamber in which a pair of parallel upper and lower electrodes are disposed is evacuated, plasma reactive gas is supplied between both electrodes, and a high-frequency voltage is applied to the lower electrode by a high-frequency power source to supply the gas. In a plasma cleaning apparatus that turns into plasma and etches when positive ions in the plasma collide with a printed circuit board disposed above the lower electrode, the printed circuit board is placed on a storage tray having a plate-like insulator provided on the upper surface. And the storage tray is provided on the rear surface of the door body that opens and closes the opening of the chamber, and the storage tray is configured to be able to be taken in and out of the chamber by opening and closing the door body. tray is located above the lower electrode, and, connected to the automatic matching circuit and the measuring times between the high frequency power source and the lower electrode And an automatic control circuit for controlling the high-frequency power source, the automatic matching circuit automatically matches the impedance of the high-frequency power source and the impedance of the lower electrode, and the measurement circuit A negative offset DC voltage generated in the lower electrode to which a high frequency voltage is applied by a high frequency power source is measured, and the control device calculates a deviation between the measured offset DC voltage from the measurement circuit and a preset reference voltage. The plasma cleaning apparatus is characterized in that the high-frequency power supply is controlled such that the measured offset DC voltage is the same as the reference voltage .
JP2006147681A 2006-05-29 2006-05-29 Plasma cleaning device Expired - Fee Related JP4989111B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006147681A JP4989111B2 (en) 2006-05-29 2006-05-29 Plasma cleaning device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006147681A JP4989111B2 (en) 2006-05-29 2006-05-29 Plasma cleaning device

Publications (2)

Publication Number Publication Date
JP2007313468A JP2007313468A (en) 2007-12-06
JP4989111B2 true JP4989111B2 (en) 2012-08-01

Family

ID=38847812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006147681A Expired - Fee Related JP4989111B2 (en) 2006-05-29 2006-05-29 Plasma cleaning device

Country Status (1)

Country Link
JP (1) JP4989111B2 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4027088B2 (en) * 2001-12-13 2007-12-26 株式会社日立ハイテクインスツルメンツ Plasma cleaning apparatus and plasma cleaning method for cleaning a substrate using the plasma cleaning apparatus
JP4027152B2 (en) * 2002-05-08 2007-12-26 株式会社日立ハイテクインスツルメンツ Plasma cleaning device
JP4486372B2 (en) * 2003-02-07 2010-06-23 東京エレクトロン株式会社 Plasma processing equipment
JP4408707B2 (en) * 2004-01-13 2010-02-03 株式会社日立ハイテクノロジーズ Plasma processing equipment

Also Published As

Publication number Publication date
JP2007313468A (en) 2007-12-06

Similar Documents

Publication Publication Date Title
KR102152811B1 (en) Particle generation suppressor by dc bias modulation
US7583492B2 (en) Method of determining the correct average bias compensation voltage during a plasma process
US10056230B2 (en) Power supply system, plasma processing apparatus and power supply control method
KR102033120B1 (en) Plasma-treatment method
US7218503B2 (en) Method of determining the correct average bias compensation voltage during a plasma process
TWI477204B (en) Method and apparatus of providing power to ignite and sustain a plasma in a reactive gas generator
US7445695B2 (en) Method and system for conditioning a vapor deposition target
JP5571996B2 (en) Plasma processing method and plasma processing apparatus
JPS6244410B2 (en)
US20150228461A1 (en) Plasma treatment apparatus and method
KR20110055402A (en) Substrate processing apparatus, cleaning method thereof and storage medium storing program
US11495444B2 (en) Substrate processing apparatus and substrate processing method
US5955383A (en) Method for controlling etch rate when using consumable electrodes during plasma etching
JP4722669B2 (en) Plasma cleaning device
KR20120046702A (en) Substrate processing method and recoding medium for storing program execuing the same
JP4989111B2 (en) Plasma cleaning device
CN110379699A (en) Plasma processing apparatus
JP4523352B2 (en) Plasma processing equipment
KR20210006853A (en) Processing method, mounting table, plasma processing apparatus and program
JP2011060984A (en) Plasma processing apparatus and plasma processing method
JP5781808B2 (en) Plasma processing method and plasma processing apparatus
US20190378694A1 (en) Plasma generating apparatus
CN113284783A (en) Plasma processing apparatus and matching method
JPH07258842A (en) Sputtering device and sputtering method
JP2020159949A (en) High frequency supply device and method for supplying high frequency power

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20081226

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20101026

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20101028

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101227

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20110204

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110428

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20110513

A912 Removal of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20110610

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120110

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120427

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150511

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees