JP4969858B2 - Laser diode drive circuit, light emitting device, and disk device equipped with the same - Google Patents

Description

  The present invention relates to a laser diode driving circuit for driving a laser diode used for a light source of an optical pickup, a light emitting device, and a disk device equipped with the same.

  In a disk device that reproduces information from a disk such as a CD or DVD, a laser diode is used as a light source. In the disk device, noise caused by reflected light from the disk to the laser diode (hereinafter referred to as “returned light noise”) becomes a problem. The optical pickup disclosed in Patent Document 1 drives a laser diode with a drive signal in which a high-frequency signal is superimposed on a DC signal in order to prevent return light noise.

JP 56-37834 A

  An oscillation circuit is used when generating a high-frequency signal for superimposition as a countermeasure against return light noise. A voltage-controlled oscillator (Voltage Control Oscillator: hereinafter referred to as a VCO) oscillates at a frequency corresponding to the input voltage. On the other hand, the frequency of the signal output from the VCO has temperature characteristics. That is, the oscillation frequency of the VCO decreases with increasing temperature when the input voltage is constant. Therefore, when a VCO is used in an oscillation circuit for generating a high-frequency signal, means for reducing the influence of the temperature characteristic of the VCO is desired.

  The present invention has been made in view of such a situation, and an object of the present invention is to reduce the influence of the temperature characteristics of the oscillation frequency of the VCO, and to drive a laser diode with a drive signal on which a high-frequency signal with high frequency accuracy is superimposed. It is an object of the present invention to provide a laser diode driving circuit, a light emitting device, and a disk device equipped with the same.

  In order to solve the above problems, a laser diode drive circuit according to an aspect of the present invention includes a periodic voltage generation circuit that generates a predetermined periodic voltage, a reference voltage circuit that generates a reference voltage having a predetermined temperature characteristic, and a reference A superposition circuit that superimposes a periodic voltage on the voltage and outputs a control voltage, and a voltage controlled oscillator that oscillates at a frequency corresponding to the control voltage are provided. The laser diode driving circuit drives the laser diode based on the output signal of the voltage controlled oscillator.

  The predetermined temperature characteristic may cancel the temperature characteristic of the oscillation frequency of the voltage controlled oscillator. Superimposing the periodic voltage on the reference voltage may mean taking a linear combination or a linear sum of the reference voltage and the periodic voltage. According to this aspect, when the temperature of the laser diode driving circuit changes, the reference voltage changes due to the predetermined temperature characteristic and the oscillation frequency of the voltage controlled oscillator changes, and the voltage depends on the temperature characteristic of the oscillation frequency of the voltage controlled oscillator. The effect of changing the oscillation frequency of the controlled oscillator can be offset. As a result, the frequency accuracy of the output signal of the voltage controlled oscillator is increased, so that the laser diode can be driven by the drive signal on which the high frequency signal with high frequency accuracy is superimposed. Further, since the voltage controlled oscillator oscillates at a frequency corresponding to the control voltage obtained by superimposing the periodic voltage on the reference voltage, the spectrum of the output signal of the voltage controlled oscillator is spread, and EMI (Electro Magnetic Interference) generated by the output signal of the voltage controlled oscillator. ) Noise can be reduced.

The predetermined temperature characteristic may be a positive temperature characteristic. The superimposing circuit may include a first resistor and a second resistor connected in series between the output terminal of the oscillation circuit and the output terminal of the reference voltage circuit. You may output the voltage of the connection point of 1st resistance and 2nd resistance as control voltage.
In this case, when the temperature of the laser diode drive circuit rises, the reference voltage increases and the oscillation frequency of the voltage controlled oscillator increases, and the oscillation frequency of the voltage controlled oscillator decreases due to the temperature characteristics of the oscillation frequency of the voltage controlled oscillator. The effect is offset. As a result, the frequency accuracy of the output signal of the voltage controlled oscillator is increased, so that the laser diode can be driven by the drive signal on which the high frequency signal with high frequency accuracy is superimposed. Further, by adjusting the ratio of the magnitude of the resistance value of the first resistor and the resistance value of the second resistor, the periodic voltage can be superimposed on the reference voltage at a desired ratio.

The reference voltage circuit may include a transistor in which the potential at one end is fixed and the other end is connected to the control terminal and is biased with a predetermined constant current. The voltage at the control terminal of the transistor may be output as a reference voltage.
In this case, a reference voltage having a positive temperature characteristic can be generated with a simple configuration.

The voltage-controlled oscillation circuit may include a voltage-current conversion circuit that converts a control voltage into a control current, and a ring oscillator that is biased by the control current.
In this case, since the magnitude of the control current can be adjusted by adjusting the gain of the voltage-current converter, the oscillation frequency of the ring oscillator can be easily controlled.

The transistor included in the reference voltage circuit and the transistor included in the ring oscillator may be configured to be paired with each other.
In this case, the relative relationship between the characteristics of the transistors of the reference voltage circuit and the characteristics of the transistors included in the ring oscillator can be accurately controlled. Thereby, the influence on the oscillation frequency of the voltage controlled oscillator by the temperature characteristic of the reference voltage and the influence on the oscillation frequency of the voltage controlled oscillator by the temperature characteristic of the oscillation frequency of the voltage controlled oscillator can be effectively offset.

The predetermined periodic voltage may be a triangular wave.
In this case, since the spread uniformity of the spectrum of the output signal of the voltage controlled oscillator is increased, EMI noise due to the output signal of the voltage controlled oscillator can be further reduced.

The laser diode drive circuit may be integrated on a single semiconductor substrate.
Note that “integrated integration” includes the case where all the circuit components are formed on a semiconductor substrate and the case where the main components of the circuit are integrated, and is used for adjusting circuit constants. The resistance of the part or the like may be provided outside the semiconductor substrate.
By being integrated on a single semiconductor substrate, mounting on an electronic device is facilitated.

  Another embodiment of the present invention is a light-emitting device. This apparatus includes a laser diode and the above-described laser diode driving circuit that drives the laser diode.

  According to this aspect, since the laser diode is driven by the drive signal on which the high frequency signal with high frequency accuracy is superimposed, the accuracy of light emission of the laser diode can be improved.

  Yet another embodiment of the present invention is a disk device. This apparatus includes the above-described light emitting device that irradiates a disk with laser light and a light receiving element that receives reflected light from the disk.

  According to this aspect, since a high-precision laser beam is emitted from the laser diode of the light-emitting device to the disc by a drive signal on which a high-frequency signal with high frequency accuracy is superimposed, information recorded on the disc can be read out with high accuracy. Can do.

  It should be noted that any combination of the above-described constituent elements and a representation obtained by converting the expression of the present invention between methods, apparatuses, systems, and the like are also effective as an aspect of the present invention.

  According to the present invention, the influence of the temperature characteristic of the oscillation frequency of the VCO can be reduced, and the laser diode can be driven by the drive signal on which the high frequency signal with high frequency accuracy is superimposed.

  Embodiments relate to a disk device for reproducing information from a disk such as a CD or a DVD. In the following description, the laser diode is abbreviated as “LD” (Laser Diode). Moreover, the code | symbol attached | subjected to each of a resistor and a capacitor shall respectively show the resistance value and capacity | capacitance of the resistor and capacitor | condenser which were attached | subjected the code | symbol.

FIG. 1 shows a configuration of a disk device 300 according to the embodiment.
The disk device 300 irradiates the disk 400 with laser light. The disk device 300 receives the reflected light from the disk 400 and reproduces information recorded on the disk 400.

The disk device 300 includes a light emitting device 200, a beam splitter 302, and a light receiving element 304.
The light emitting device 200 irradiates the disk 400 with laser light 306. The beam splitter 302 changes the optical path of the reflected light 308 from the disk 400 and sends it to the light receiving element 304. The light receiving element 304 converts the transmitted reflected light 308 into an electrical signal. Based on this electric signal, a reproduction signal is obtained. Of the reflected light 308, the return light 312 that has passed through the beam splitter 302 returns to the LD 102. The return light 312 causes return light noise.

The light emitting device 200 includes an LD drive circuit 100 and an LD 102.
The LD drive circuit 100 supplies a drive current Idrv to the LD 102. The configuration of the LD drive circuit 100 will be described later. The LD 102 emits laser light 306 by the drive current Idrv.

FIG. 2 shows a specific configuration of the LD drive circuit 100 of FIG. In FIG. 2, the LD drive circuit 100 and the LD 102 constitute the light emitting device 200 of FIG. The LD driving circuit 100 is integrated on a single semiconductor substrate.
The LD driving circuit 100 includes a periodic voltage generation circuit 12, a superimposing circuit 14, a reference voltage circuit 16, a VCO 18, and a high frequency modulator (hereinafter referred to as “HFM”) 20.

  The periodic voltage generation circuit 12 generates a triangular wave Vsaw as a predetermined periodic voltage. The reference voltage circuit 16 generates a reference voltage Vref having a positive temperature characteristic. The superimposing circuit 14 superimposes the triangular wave Vsaw on the reference voltage Vref and outputs the control voltage Vcnt. The VCO 18 oscillates at a frequency corresponding to the control voltage Vcnt and outputs a high frequency signal Vosc. The HFM 20 amplifies the high frequency signal Vosc, and superimposes the amplified high frequency signal Vosc on the DC signal to output a drive voltage Vdrv. That is, the HFM 20 supplies the drive current Idrv corresponding to the drive voltage Vdrv to the LD 102.

The periodic voltage generation circuit 12 includes a first constant current source 32, a second constant current source 34, a switch 36, and a first capacitor C1.
The first constant current source 32 is connected to the power supply line Vdd. The first capacitor C1 is provided between the first constant current source 32 and the ground. The second constant current source 34 is provided via a switch 36 between the connection point of the first constant current source 32 and the first capacitor C1 and the ground.

  The switch 36 is turned on / off in a predetermined cycle by the control signal Sig. The first constant current source 32 charges the first capacitor C1 with the charging current I1. The second constant current source 34 discharges the first capacitor C1 with the discharge current I2 when the switch 36 is on. Here, it is assumed that the relationship of I1 <I2 is satisfied.

  When the switch 36 is off, the first capacitor C1 is charged with the charging current I1. On the other hand, when the switch 36 is on, the first capacitor C1 is charged by the charging current I1 and discharged by the discharging current I2. That is, when the switch 36 is on, the first capacitor C1 is discharged by the current of the subtraction I2-I1. Therefore, the voltage of the first capacitor C1 rises linearly when the switch 36 is off and falls linearly when the switch 36 is on. That is, the voltage of the first capacitor C <b> 1 is a triangular wave Vsaw with a cycle of on / off of the switch 36. The triangular wave Vsaw is extracted as the output of the periodic voltage generation circuit 12.

The reference voltage circuit 16 includes a third constant current source 22 and a first transistor M1. The first transistor M1 is an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
The third constant current source 22 and the first transistor M1 are connected in series between the power supply line Vdd and the ground. In the first transistor M1, the potential of the source terminal is fixed, and the drain terminal is connected to a gate terminal as a control terminal.

  The third constant current source 22 biases the first transistor M1 with the bias current I3. The voltage at the gate terminal of the first transistor M1 is output as the reference voltage Vref. The reference voltage Vref has a positive temperature characteristic.

The superposition circuit 14 includes a first resistor R1 and a second resistor R2.
The first resistor R1 and the second resistor R2 are connected in series between the output terminal of the periodic voltage generation circuit 12 and the output terminal of the reference voltage circuit 16. The voltage at the connection point of the first resistor R1 and the second resistor R2 is output as the control voltage Vcnt. The control voltage Vcnt is expressed by the following equation.
Vcnt = (R1 × Vref + R2 × Vsaw) / (R1 + R2) Formula (1)

The VCO 18 includes a voltage / current conversion circuit 26 and a ring oscillator 28.
The voltage-current conversion circuit 26 converts the control voltage Vcnt into a control current Icnt. The voltage-current conversion circuit 26 includes an operational amplifier 24, a second transistor M2, a frequency selection resistor Rfrq, a third transistor M3, and a fourth transistor M4. The second transistor M2 is an N-channel MOSFET. The third transistor M3 and the fourth transistor M4 are P-channel MOSFETs.

  The third transistor M3, the second transistor M2, and the frequency selection resistor Rfrq are connected in series between the power supply line Vdd and the ground. The third transistor M3 and the fourth transistor M4 have a gate terminal and a source terminal connected in common, and constitute a current mirror circuit. The transistor size of the fourth transistor M4 is set to twice the transistor size of the third transistor M3. Accordingly, a current twice as large as the current flowing through the third transistor M3 flows through the fourth transistor M4. Hereinafter, the current flowing through the third transistor M3 is referred to as a conversion current Itrns. The current flowing through the fourth transistor M4 is a control current Icnt as an output of the voltage-current conversion circuit 26.

  The non-inverting input terminal of the operational amplifier 24 is connected to the connection point of the first resistor R1 and the second resistor R2 of the superposition circuit 14. The output terminal of the operational amplifier 24 is connected to the gate terminal as the control terminal of the second transistor M2. The inverting input terminal of the operational amplifier 24 is connected to a connection point between the source terminal of the second transistor M2 and the frequency selection resistor Rfrq.

Since the operational amplifier 24 is kept in a balanced state by feedback by the second transistor M2 and the frequency selection resistor Rfrq, an imaginary short is established between the non-inverting input terminal and the inverting input terminal of the operational amplifier 24. Therefore, the conversion current Itrns is expressed by the following equation.
Itrns = Vcnt / Rfrq Equation (2)

As described above, since the third transistor M3 and the fourth transistor M4 form a current mirror circuit with a mirror ratio of 1: 2, the control current Icnt is expressed by the following equation.
Icnt = 2 × Itrns Formula (3)
The ring oscillator 28 is biased by the control current Icnt represented by Expression (3), and generates a high-frequency signal Vosc having a frequency corresponding to the control current Icnt.

  Ring oscillator 28 includes an N-channel MOSFET (not shown). The N-channel MOSFET and the first transistor M1 of the reference voltage circuit 16 are formed by pairing with each other on one semiconductor substrate. Thereby, the characteristics of the first transistor M1 of the reference voltage circuit 16 and the characteristics of the N-channel MOSFET included in the ring oscillator 28 are aligned. “Pairing” means creating multiple elements of the same type at close positions on a single semiconductor substrate so that the characteristics of those elements are aligned with variations due to manufacturing errors and temperature changes. Say.

Hereinafter, a specific configuration for turning on and off the switch 36 of the periodic voltage generation circuit 12 will be described.
FIG. 3 shows a specific configuration of the periodic voltage generation circuit 12 of FIG. In FIG. 3, the same or equivalent components as those in FIG.

  The periodic voltage generation circuit 12 includes a fourth constant current source 38, a fifth constant current source 40, a first constant current source 32, a sixth constant current source 42, a seventh constant current source 44, a comparator 46, , Fifth transistor M5, sixth transistor M6, seventh transistor M7, eighth transistor M8, ninth transistor M9, tenth transistor M10, eleventh transistor M11, second capacitor C2, 3 resistors R3 and a first capacitor C1. The fifth transistor M5 to the eleventh transistor M11 are N-channel MOSFETs.

  The first constant current source 32 and the first capacitor C1 are the same as those shown in FIG. The current mirror circuit formed by the sixth transistor M6 and the eighth transistor M8 corresponds to the second constant current source 34 of FIG. The fifth transistor M5 as a switch for controlling on / off of the current mirror circuit corresponds to the switch 36 in FIG.

  The fourth constant current source 38 and the sixth transistor M6 are connected in series between the power supply line Vdd and the ground. The fifth constant current source 40 and the seventh transistor M7 are connected in series between the power supply line Vdd and the ground. The eighth transistor M8 is provided between the connection point of the first constant current source 32 and the first capacitor C1 and the ground. The sixth transistor M6 to the eighth transistor M8 have a gate terminal and a source terminal connected in common, and constitute a current mirror circuit. The transistor sizes of the sixth transistor M6 to the eighth transistor M8 are set equal. The fifth transistor M5 is provided between the gate terminals of the sixth transistor M6 to the eighth transistor M8 and the ground.

  The second capacitor C2 is provided between the connection point of the fifth constant current source 40 and the seventh transistor M7 and the ground. The sixth constant current source 42 and the tenth transistor M10 are connected in series between the power supply line Vdd and the ground. The seventh constant current source 44 and the third resistor R3 are connected in series between the power supply line Vdd and the ground. The eleventh transistor M11 is provided between the connection point of the seventh constant current source 44 and the third resistor R3 and the ground. The tenth transistor M10 and the eleventh transistor M11 have a gate terminal and a source terminal connected in common, and constitute a current mirror circuit. The sizes of the tenth transistor M10 and the eleventh transistor M11 are set equal. The ninth transistor M9 is provided between the gate terminals of the tenth transistor M10 and the eleventh transistor M11 and the ground.

  An inverting input terminal of the comparator 46 is connected to a connection point between the first constant current source 32 and the second capacitor C2. The non-inverting input terminal of the comparator 46 is connected to the connection point of the seventh constant current source 44 and the third resistor R3. An output terminal of the comparator 46 is connected to gate terminals as control terminals of the fifth transistor M5 and the ninth transistor M9.

The operation when the control signal Sig output from the comparator 46 is at a high level will be described.
When the control signal Sig output from the comparator 46 is at a high level, the ninth transistor M9 is turned on. At this time, the current mirror circuit formed by the tenth transistor M10 and the eleventh transistor M11 is turned off, and the current I6 supplied from the sixth constant current source 42 flows through the ninth transistor M9 and does not flow through the tenth transistor M10. . Accordingly, since no current flows through the eleventh transistor M11, the current I7 supplied from the seventh constant current source 44 flows through the third resistor R3. At this time, the voltage Vp at the non-inverting input terminal of the comparator 46 is expressed by the following equation.
Vp = R3 × I7 Formula (4)

  When the control signal Sig output from the comparator 46 is at a high level, the fifth transistor M5 is turned on. At this time, the current mirror circuit formed by the sixth transistor M6 to the eighth transistor M8 is turned off, and the current I4 supplied from the fourth constant current source 38 flows through the fifth transistor M5 and does not flow through the sixth transistor M6. . Accordingly, since no current flows through the seventh transistor M7 and the eighth transistor M8, the second capacitor C2 is charged by the current I5 supplied from the fifth constant current source 40. The control signal Sig is maintained at the high level until the voltage Vm at the inverting input terminal of the comparator 46 exceeds the voltage Vp expressed by the equation (4). The first capacitor C1 is charged by the charging current I1 supplied from the first constant current source 32. That is, during the period when the control signal Sig output from the comparator 46 is at the high level, the first capacitor C1 is charged with the charging current I1.

Next, an operation when the control signal Sig output from the comparator 46 is at a low level will be described.
When the control signal Sig output from the comparator 46 is at a low level, the ninth transistor M9 is turned off. At this time, the current mirror circuit formed by the tenth transistor M10 and the eleventh transistor M11 is turned on, and the current I6 supplied by the sixth constant current source 42 flows through the tenth transistor M10. A current having the same magnitude as the current I6 supplied from the sixth constant current source 42 also flows through the eleventh transistor M11. Here, it is assumed that I7> I6 is satisfied. In this case, the current I7 supplied from the seventh constant current source 44 flows through the third resistor R3, and the current flowing through the eleventh transistor M11 flows in the direction opposite to that of I6. Therefore, a current of the magnitude of I7-I6 flows through the third resistor R3 toward the ground direction. At this time, the voltage Vp of the non-inverting input terminal of the comparator 46 is expressed by the following equation.
Vp = R3 × (I7−I6) Formula (5)

  When the control signal Sig output from the comparator 46 is at a low level, the fifth transistor M5 is turned off. At this time, the current mirror circuit formed by the sixth transistor M6 to the eighth transistor M8 is turned on, and the current I4 supplied from the fourth constant current source 38 flows through the sixth transistor M6. A current having the same magnitude as the current I4 supplied from the fourth constant current source 38 also flows through the seventh transistor M7 and the eighth transistor M8. Here, it is assumed that I4> I1 and I5 are satisfied.

  The second capacitor C2 is charged with the current I5 supplied from the fifth constant current source 40 and discharged with the current I4 flowing through the seventh transistor M7. Therefore, the second capacitor C2 is discharged by a current having a magnitude of the subtraction I4-I5. The control signal Sig is maintained at a low level until the second capacitor C2 is discharged and the voltage Vm at the inverting input terminal of the comparator 46 is lower than the voltage Vp expressed by the equation (5).

  The first capacitor C1 is charged by the charging current I1 supplied from the first constant current source 32 and discharged by the current I4 flowing through the eighth transistor M8. Accordingly, the first capacitor C1 is discharged by a current having a magnitude of the subtraction I4-I1. That is, during the period when the control signal Sig output from the comparator 46 is at a low level, the first capacitor C1 is discharged by a current having a magnitude of I4-I1. The current I4 flowing through the eighth transistor M8 corresponds to the discharge current I2 from the second constant current source 34 in FIG.

From the above, the charging / discharging cycle T of the first capacitor C1 is expressed by the following equation.
T = T1 + T2
= C2 * R3 * I6 / I5 + C2 * R3 * I6 / (I4-I5) Formula (6)
In Expression (6), T1 indicates a period during which the control signal Sig output from the comparator 46 is at a high level. T2 indicates a period during which the control signal Sig output from the comparator 46 is at a low level.

The operation of the LD driving circuit 100 configured as described above will be described.
FIG. 4 shows waveforms of the triangular wave Vsaw, the reference voltage Vref, the control voltage Vcnt, the conversion current Itrns, and the control current Icnt in the LD drive circuit 100 of FIG. In FIG. 4, the horizontal axis indicates time. The vertical axis indicates the size of each waveform.

  The periodic voltage generation circuit 12 outputs the voltage of the first capacitor C1 charged by the charging current I1 and discharged by the discharging current I2, that is, the triangular wave Vsaw shown in FIG. The period T of the triangular wave Vsaw is determined by Expression (6). In the present embodiment, T = 5 μs and 200 kHz in terms of frequency.

  The reference voltage circuit 16 outputs the voltage at the gate terminal of the first transistor M1 as the reference voltage Vref. The superposition circuit 14 outputs the voltage at the connection point of the first resistor R1 and the second resistor R2 as the control voltage Vcnt. The control voltage Vcnt is obtained by superimposing a triangular wave Vsaw on the reference voltage Vref as shown in the equation (1) and FIG. Here, the amplitude of the control voltage Vcnt is Vspr.

  The voltage / current conversion circuit 26 converts the control voltage Vcnt into a conversion current Itrns. The voltage-current conversion circuit 26 further converts the voltage into a control current Icnt that is twice as large as the conversion current Itrns by a current mirror circuit configured by the third transistor M3 and the fourth transistor M4. Since the control voltage Vcnt changes in a triangular wave shape, the conversion current Itrns and the control current Icnt also change in a triangular wave shape. The conversion current Itrns and the control current Icnt are shown in Expression (2), Expression (3), and FIG. The low level of the conversion current Itrns is represented by Vref / Rfrq, and the amplitude is represented by Vspr / Rfrq. The low level of the control current Icnt is represented by 2 × Vref / Rfrq, and the amplitude is represented by 2 × Vspr / Rfrq.

  The ring oscillator 28 receives the control current Icnt and outputs a high frequency signal Vosc having a frequency corresponding to the magnitude of the control current Icnt. As described above, since the control current Icnt changes in a triangular wave shape, the spectrum of the high frequency signal Vosc is uniformly spread. In the present embodiment, the center frequency of the high frequency signal Vosc is 330 MHz. The HFM 20 amplifies the high frequency signal Vosc, modulates the direct current signal, and outputs the drive voltage Vdrv. That is, the HFM 20 supplies the drive current Idrv corresponding to the drive voltage Vdrv to the LD 102.

  According to the present embodiment, for example, when the temperature of the LD drive circuit 100 rises, the reference voltage Vref having a positive temperature characteristic increases and the oscillation frequency of the VCO 18 increases, and the frequency temperature characteristic of the VCO 18 The effect of lowering the oscillation frequency cancels out. As a result, the frequency accuracy of the output signal of the VCO 18 is increased, so that the LD drive circuit 100 can drive the LD 102 with the drive current Idrv on which the high-frequency current with high frequency accuracy is superimposed.

  Further, by pairing, the characteristics of the first transistor M1 and the characteristics of the N-channel MOSFET included in the ring oscillator 28 are aligned. As a result, the influence of the temperature characteristic of the reference voltage Vref on the oscillation frequency of the VCO 18 and the influence of the frequency temperature characteristic of the VCO 18 on the oscillation frequency of the VCO 18 effectively cancel each other.

  Further, since the LD driving circuit 100 drives the LD 102 with the driving current Idrv in which the high frequency current with high frequency accuracy is superimposed, the light emitting device 200 can irradiate the disk 400 with high quality laser light from the LD 102. Thereby, the disk device 300 can read information recorded on the disk 400 with high accuracy.

  Further, since the VCO 18 outputs the high frequency signal Vosc having a frequency corresponding to the control voltage Vcnt in which the triangular wave Vsaw is superimposed on the reference voltage Vref, the spectrum of the high frequency signal Vosc is uniformly spread, and EMI noise caused by the high frequency signal Vosc is reduced. it can. Specifically, the FCC (Federal Communications Commission) class B standard can be satisfied.

  Those skilled in the art will understand that the above-described embodiment is an exemplification, and that various modifications can be made to the combination of each component and each treatment process, and such modifications are within the scope of the present invention. .

  In the embodiment, the periodic voltage generation circuit 12 generates the triangular wave Vsaw as the periodic voltage. However, the periodic voltage generated by the periodic voltage generation circuit 12 is not limited to the triangular wave. The periodic voltage generation circuit 12 may generate various periodic voltages such as a sine wave and a sawtooth wave. Even in this case, the spectrum of the high-frequency signal Vosc is spread, and EMI noise due to the high-frequency signal Vosc can be reduced.

  In the embodiment, the reference voltage circuit 16 outputs the voltage of the gate terminal of the first transistor M1 as the reference voltage Vref. However, the reference voltage Vref is not limited to this, and various voltages having positive temperature characteristics are provided. Can be used.

  Further, in the embodiment, the case where the LD driving circuit 100 is integrally integrated on one semiconductor substrate has been described, but part or all of the LD driving circuit 100 may be configured by discrete components. . For example, if the frequency selection resistor Rfrq is a discrete component, the gain of the voltage-current conversion circuit 26 can be easily adjusted.

It is a block diagram which shows the structure of the disk apparatus concerning embodiment. FIG. 2 is a circuit diagram illustrating a specific configuration of the LD driving circuit of FIG. 1. FIG. 3 is a circuit diagram showing a specific configuration of the periodic voltage generation circuit of FIG. 2. FIG. 3 is a waveform diagram of a triangular wave, a reference voltage, a control voltage, a conversion current, and a control current in the LD drive circuit of FIG. 2.

Explanation of symbols

  12 periodic voltage generation circuit, 14 superposition circuit, 16 reference voltage circuit, 18 VCO, 20 HFM, 22 third constant current source, 24 operational amplifier, 26 voltage current conversion circuit, 28 ring oscillator, 100 LD drive circuit, 102 LD, 200 light emitting device, 300 disc device, 302 beam splitter, 304 light receiving element, 306 laser light, 308 reflected light, 312 return light, 400 disc, Vsaw triangular wave, Vref reference voltage, Vcnt control voltage, Vosc high frequency signal, Vdrv drive voltage, Idrv drive current, Icnt control current.

Claims (7)

A periodic voltage generation circuit for generating a predetermined periodic voltage;
A reference voltage circuit for generating a reference voltage having a positive temperature characteristic;
A superposition circuit that superimposes the periodic voltage on the reference voltage and outputs a control voltage;
With oscillating at a frequency corresponding to said control voltage, comprising a voltage controlled oscillator whose oscillation frequency has a negative temperature characteristic, and
Drive the laser diode based on the output signal of the voltage controlled oscillator,
The reference voltage circuit includes a transistor having a potential at one end fixed, a second end connected to the control terminal, and biased with a predetermined constant current, and outputs a voltage at the control terminal of the transistor as the reference voltage. A laser diode driving circuit. Before Symbol superimposed circuit,
A first resistor and a second resistor connected in series between an output terminal of the periodic voltage generation circuit and an output terminal of the reference voltage circuit;
2. The laser diode drive circuit according to claim 1, wherein a voltage at a connection point of the first resistor and the second resistor is output as the control voltage. The voltage controlled oscillator is:
A voltage-current conversion circuit for converting the control voltage into a control current;
A ring oscillator biased by the control current;
The laser diode drive circuit according to claim 1, comprising:   4. The laser diode driving circuit according to claim 1, wherein the predetermined periodic voltage is a triangular wave.   5. The laser diode driving circuit according to claim 1, wherein the laser diode driving circuit is monolithically integrated on one semiconductor substrate. A laser diode;
The laser diode driving circuit according to any one of claims 1 to 5, which drives the laser diode;
A light emitting device comprising: The light emitting device according to claim 6, which irradiates a disk with laser light;
A light receiving element for receiving reflected light from the disk;
A disk device comprising:

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