JP4959184B2 - Method for manufacturing nitride-based semiconductor light-emitting device - Google Patents

Description

  The present invention relates to a nitride-based semiconductor light-emitting device, a method for manufacturing the same, and a lamp using the nitride-based semiconductor light-emitting device, and more particularly to a nitride-based semiconductor light-emitting device excellent in light extraction efficiency.

  In recent years, GaN-based compound semiconductor materials, which are nitride-based semiconductors, have attracted attention as semiconductor materials for short-wavelength light-emitting devices. GaN compound semiconductors use sapphire single crystals as well as various oxide substrates and III-V group compounds as substrates, on which metal organic chemical vapor deposition (MOCVD) and molecular beam epitaxy (MBE) methods are applied. ) Etc.

  In a general GaN-based compound semiconductor light-emitting device, when a sapphire single crystal substrate is used as a substrate, an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked in this order. Since a sapphire single crystal is an insulator, in a light emitting device using a sapphire single crystal substrate, generally, a positive electrode formed on a p-type semiconductor layer and a negative electrode formed on an n-type semiconductor layer are in the same plane. It is the structure that exists above. The structure in which the positive electrode and the negative electrode exist on the same surface is a face-up method in which a transparent electrode is used for the positive electrode and light is extracted from the p-type semiconductor side, and a highly reflective film such as Ag is used for the positive electrode. There are two types of flip chip methods that extract light from the substrate side.

  Conventionally, when a transparent electrode is provided on a p-type semiconductor, a metal transparent electrode such as Ni / Au has been used. However, in recent years, translucent conductive oxide films such as ITO have been put into practical use at the industrial level as transparent electrodes. By replacing a metal transparent electrode such as Ni / Au with a translucent conductive oxide film such as ITO, absorption of the emission wavelength by the transparent electrode can be reduced, and the light extraction efficiency of the light-emitting element can be improved. .

  By the way, external quantum efficiency is used as an index for improving the output of the light emitting element. The external quantum efficiency is expressed as a product of the internal quantum efficiency and the light extraction efficiency. And if external quantum efficiency is high, it can be said that it is a light emitting element with a high output. Note that the internal quantum efficiency is a ratio of energy converted into light in energy of current injected into the light emitting element. On the other hand, the light extraction efficiency is the ratio of light that can be extracted outside of the light generated inside the semiconductor crystal.

There are mainly two methods for improving the light extraction efficiency. One is a method of reducing absorption of the emission wavelength by an electrode, a protective film or the like formed on the light extraction surface. The other is a method of reducing reflection loss that occurs at the interface between materials having different refractive indexes, such as compound semiconductors, electrodes, and protective films.
As a method for reducing the reflection loss that occurs at the interface between materials having different refractive indexes, there is a technique that performs uneven processing on the light extraction surface. An example of a method for performing uneven processing is a method for performing uneven processing on the compound semiconductor material itself (see Patent Document 1).
Japanese Patent No. 2836687

However, in the technique described in Patent Document 1, since the semiconductor material itself is subjected to uneven processing, a load is applied to the semiconductor layer by the uneven processing, and damage due to the uneven processing remains in the semiconductor layer. Therefore, with the technique described in Patent Document 1, even if the internal quantum efficiency is lowered and the light extraction efficiency can be improved, the emission intensity cannot be increased.
Further, the light extraction efficiency can be improved also by subjecting the translucent conductive oxide film provided as the transparent electrode to an unevenness process. In this case, the translucent conductive oxide film plays a role as a light extraction layer in addition to the original role as the current diffusion layer. However, when the concavo-convex processing is performed on the translucent conductive oxide film, it is difficult to control the concavo-convex shape, and etching may be performed more than necessary, resulting in deterioration of current diffusion performance.

  The present invention has been made in view of the above circumstances, and has as its object to provide a nitride-based semiconductor light-emitting device that solves the above-described problems, is excellent in light extraction efficiency, and has excellent current diffusion performance. To do.

( 1 ) An n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer, and a light-transmitting conductive oxide film layer are sequentially disposed. The light-transmitting conductive oxide film layer includes a first layer and the p of the first layer. A method of manufacturing a nitride-based semiconductor light-emitting device having at least a second layer disposed on the side of a p-type semiconductor layer, wherein the second layer functioning as a current diffusion layer is sputtered on the p-type semiconductor layer A step of forming the first layer functioning as a light extraction layer on the second layer by vacuum vapor deposition, and wet etching the first layer to form the first layer. A method for producing a nitride-based semiconductor light-emitting device , comprising a step of forming a concavo-convex surface and an etching solution used for the wet etching is a mixed solution of oxalic acid, iron chloride, and hydrochloric acid .

In the nitride-based semiconductor light-emitting device of the present invention, the translucent conductive oxide film layer is disposed on the first layer functioning as the light extraction layer and the p-type semiconductor layer side of the first layer, and functions as a current diffusion layer. Therefore, even if the surface of the first layer opposite to the second layer has a concavo-convex shape in order to improve the light extraction efficiency, the current of the translucent conductive oxide film layer Does not interfere with diffusion performance. Therefore, a nitride-based semiconductor light-emitting element having excellent light extraction efficiency and excellent current diffusion performance can be obtained.
Moreover, according to the method for manufacturing a nitride-based semiconductor light-emitting device of the present invention, a nitride-based semiconductor light-emitting device having excellent light extraction efficiency and excellent current diffusion performance can be formed.
In addition, since the lamp of the present invention uses the nitride semiconductor light emitting device of the present invention, it has excellent light emission characteristics.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following embodiments, and for example, the constituent elements of these embodiments may be appropriately combined.
FIG. 1 is a cross-sectional view schematically showing an example of the nitride-based semiconductor light-emitting device of the present invention. In FIG. 1, reference numeral 12 denotes a nitride-based semiconductor light-emitting element, reference numeral 1 denotes a substrate, reference numeral 2 denotes an n-type semiconductor layer, reference numeral 3 denotes a light-emitting layer, and reference numeral 4 denotes a p-type semiconductor layer. Reference numeral 5 denotes a negative electrode, reference numeral 8 denotes a positive electrode, and reference numeral 11 denotes a light-transmitting conductive oxide film layer. In the nitride-based semiconductor light-emitting device 12 of the present invention, as shown in FIG. 1, the translucent conductive oxide film layer 11 includes a current diffusion layer (“second layer” in the claims) 6 and a light extraction layer. (“First layer” in the claims) is composed of two layers.

  The current diffusion layer 6 is made of a light-transmitting conductive oxide film that functions as the current diffusion layer 6 and is formed directly on the p-type semiconductor layer 4 or on the p-type semiconductor layer 4 via a metal layer or the like. The When a metal layer is sandwiched between the current diffusion layer 6 and the p-type semiconductor layer 4, the driving voltage (Vf) of the light emitting element can be reduced, but the transmittance is reduced to reduce the output. End up. Therefore, it is appropriately determined whether or not a metal layer or the like is sandwiched between the current diffusion layer 6 and the p-type semiconductor layer 4 by balancing the drive voltage (Vf) and output according to the use of the light emitting element. Here, it is preferable to use a metal layer made of Ni, Ni oxide, Pt, Pd, Ru, Rh, Re, Os, or the like.

  The current spreading layer 6 may be formed by any method as long as it can serve as the current spreading layer 6. The current spreading layer 6 is preferably formed by the following two methods, for example. One is a method of forming a film by a sputtering method. The other is a method of forming a film by a vacuum deposition method.

In the sputtering method, since the energy of sputtered particles during sputtering is large, a dense and highly crystalline film can be obtained. The higher the crystallinity of the translucent conductive oxide, the harder the current diffusion layer 6 is to be etched and to be less eroded during etching, and the current diffusion characteristics are not deteriorated by etching.
In the vacuum evaporation method, since the energy of particles during evaporation is not large, the obtained film made of a light-transmitting conductive oxide becomes an amorphous state or a film with low crystallinity. However, a dense and highly crystalline film can be obtained by forming a film at 300 ° C. to 800 ° C. during vapor deposition or by performing a heat treatment at 300 ° C. to 800 ° C. after the film formation. When the temperature of the heat treatment is less than 300 ° C., the effect of improving crystallization is small, and when it exceeds 800 ° C., the nitride semiconductor element is damaged.

The translucent conductive oxide constituting the current diffusion layer 6 can take any crystal state, but a columnar crystal is preferable because it is difficult to be etched.
The material used for the current spreading layer 6 may be any material as long as it is an oxide having translucency and conductivity, but preferably ITO (In ₂ O ₃ —SnO ₂ ), AZO (ZnO—Al ₂ O ₃ ), IZO (In ₂ O ₃ —ZnO), and at least one material selected from the group consisting of GZO (ZnO—GeO ₂ ) is used.

  If the film thickness of the current diffusion layer 6 is too thin, the current diffusion characteristic is lowered, which is not preferable. On the other hand, if the current diffusion layer 6 is too thick, the transmittance is deteriorated and the output is lowered. Therefore, the film thickness of the current diffusion layer 6 is 35 nm to 2000 nm, preferably 50 nm to 1000 nm, and more preferably 100 nm to 500 nm.

  The light extraction layer 7 is made of a translucent conductive oxide that functions as the light extraction layer 7, and is formed on the current diffusion layer 6. The light extraction layer 7 may be formed immediately above the current diffusion layer 6, or a metal layer or the like may be sandwiched between the light extraction layer 7 and the current diffusion layer 6. In order to reduce the driving voltage (Vf) of the light-emitting element, a metal layer or the like may be formed between the light extraction layer 7 and the current diffusion layer 6, but the transmittance of the light-emitting element is lowered and the output is reduced. Since there is a risk to reduce, it is necessary to determine the balance according to the application. When a metal layer is disposed between the light extraction layer 7 and the current diffusion layer 6, it is preferable to use Ni, Ni oxide, Pt, Pd, Ru, Rh, Re, Os, or the like as the material of the metal layer.

The top surface of the light extraction layer 7 has an uneven shape in order to improve the light extraction efficiency. Conventionally known etching methods such as wet etching and dry etching can be applied as the method for forming the concavo-convex shape, but wet etching in which the etching rate varies greatly depending on the crystal state of the light-transmitting conductive oxide is used. Is preferred. Note that it is possible to form irregularities regularly using a mask, and irregularities can be formed randomly (randomly) only by etching.
When performing wet etching, oxalic acid, a mixed solution of iron chloride and hydrochloric acid, phosphoric acid, nitric acid, hydrochloric acid, HI, HBr, etc. can be used as the etching solution, but a mixed solution of oxalic acid, iron chloride and hydrochloric acid is used. More preferably, it is used.

The light extraction layer 7 has an etching rate higher than that of the current diffusion layer 6 when the light extraction layer 7 is etched. The light extraction layer 7 can take any crystal state, but a granular crystal is preferable because it is easily etched.
As a method for forming the light extraction layer 7, it is desirable to use a method in which the light extraction layer 7 having an etching rate faster than that of the current diffusion layer 6 is formed when the light extraction layer 7 is etched. Specifically, for example, as a method for forming the light extraction layer 7, it is preferable to use a vacuum vapor deposition method because an amorphous or low crystallinity film can be obtained.

Any material can be used as the material used for the light extraction layer 7 as long as it is a light-transmitting and conductive oxide, preferably ITO (In ₂ O ₃ —SnO ₂ ), AZO (ZnO—Al). ₂ O ₃ ), IZO (In ₂ O ₃ —ZnO), and at least one material selected from the group consisting of GZO (ZnO—GeO ₂ ) is used.

  If the film thickness of the light extraction layer 7 is too thin, the difference in height between the concave and convex portions forming the concavo-convex shape formed on the upper surface of the light extraction layer 7 becomes small, and sufficient light extraction efficiency cannot be obtained. Moreover, when the film thickness of the light extraction layer 7 is too thick, the transmittance is deteriorated and the output is lowered. The film thickness of the light extraction layer 7 after etching that satisfies this characteristic is 35 nm to 2000 nm, preferably 50 nm to 1 μm, and more preferably 100 nm to 500 nm. The film thickness of the light extraction layer 7 is defined as the height from the surface (lower surface) of the light extraction layer 7 on the current diffusion layer 6 side to the top of the convex portion.

  Further, the height difference between the concave and convex portions constituting the concave-convex shape of the light extraction layer 7 is 35 nm to 2000 nm, preferably 50 nm to 1 μm, and more preferably 100 nm to 500 nm. The height difference between the concave portion and the convex portion is defined as the height from the bottom of the concave portion to the top of the convex portion. If the height difference between the concave portion and the convex portion is small, sufficient light extraction efficiency cannot be obtained. When the height difference between the concave portion and the convex portion is increased, the film thickness of the light extraction layer 7 is increased, the transmittance is deteriorated, and the output is lowered.

As the substrate 1, sapphire single crystal (Al ₂ O ₃ ; A plane, C plane, M plane, R plane), spinel single crystal (MgAl ₂ O ₄ ), ZnO single crystal, LiAlO ₂ single crystal, LiGaO ₂ single crystal. Substrate materials such as oxide single crystals such as MgO single crystals, Si single crystals, SiC single crystals, GaAs single crystals, AlN single crystals, GaN single crystals, and boride single crystals such as ZrB ₂ are well known. In the present invention, any substrate material including these known substrate materials can be used without any limitation. Of these, sapphire single crystals and SiC single crystals are preferred. The plane orientation of the substrate is not particularly limited. Moreover, a just board | substrate may be sufficient and the board | substrate which provided the off angle may be sufficient.
On the substrate 1, an n-type semiconductor layer 2, a light emitting layer 3, and a p-type semiconductor layer 4 made of a nitride semiconductor are usually stacked via a buffer layer. Depending on the substrate 1 used and the growth conditions of the epitaxial layer, the buffer layer may be unnecessary.

Examples of the nitride-based semiconductor include a general formula of Al _X Ga _Y In _Z N _1-A M _A (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ Z ≦ 1, and X + Y + Z = 1. There are many known nitride-based semiconductors represented by a group V element different from nitrogen (N), where 0 ≦ A <1. In the present invention, these well-known nitride-based semiconductors are also known. In general formula Al _X Ga _Y In _{ZN 1-A} M _A (0 ≦ X ≦ 1, 0 ≦ Y ≦ 1, 0 ≦ Z ≦ 1, and X + Y + Z = 1. Symbol M represents nitrogen (N) Represents another group V element, and 0 ≦ A <1.) A nitride-based semiconductor represented by 0) can be used without any limitation.
A nitride-based semiconductor can contain other group III elements in addition to Al, Ga, and In, and can contain elements such as Ge, Si, Mg, Ca, Zn, Be, P, As, and B as necessary. It can also be contained. Furthermore, it is not limited to elements that are intentionally added, but may include impurities that are inevitably included depending on film forming conditions and the like, as well as trace impurities that are included in the raw materials and reaction tube materials.

  The growth method of the nitride semiconductor is not particularly limited, and the nitride semiconductor such as MOCVD (metal organic chemical vapor deposition), HVPE (hydride vapor deposition), MBE (molecular beam epitaxy) is grown. All methods known to can be applied. A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity.

In the MOCVD method, hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) is used as a Ga source as a group III source, and trimethyl aluminum (TMA) or triethyl aluminum is used as an Al source. (TEA), trimethylindium (TMI) or triethylindium (TEI) as an In source, ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), or the like as an N source that is a group V source. In addition, as a dopant, for n-type, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as a Si raw material, germanium gas (GeH ₄ ) or tetramethyl germanium ((CH ₃ ) ₄ Ge) is used as a Ge raw material. And an organic germanium compound such as tetraethylgermanium ((C ₂ H ₅ ) ₄ Ge) can be used.
In the MBE method, elemental germanium can also be used as a doping source. For the p-type, for example, biscyclopentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium (EtCp ₂ Mg) is used as the Mg raw material.

The n-type semiconductor layer 2 is usually composed of an underlayer, an n contact layer, and an n clad layer. The n contact layer can also serve as an underlayer and / or an n clad layer. Underlayer Al _X Ga _1-X N layer (0 ≦ x ≦ 1, preferably 0 ≦ x ≦ 0.5, and more preferably 0 ≦ x ≦ 0.1) is preferably configured from. The film thickness is 0.1 μm or more, preferably 0.5 μm or more, more preferably 1 μm or more. An Al _x Ga ₁ -xN layer with good crystallinity is more easily obtained when the film thickness is increased.

The underlayer may be doped with n-type impurities within the range of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ , but undoped (<1 × 10 ¹⁷ / cm ³ ) is a better crystal. It is preferable in terms of maintaining the property. Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably it is Si and Ge.
The growth temperature for growing the underlayer is preferably 800 to 1200 ° C, more preferably 1000 to 1200 ° C. If it grows within this growth temperature range, a crystal with good crystallinity can be obtained. The pressure in the MOCVD growth furnace is adjusted to 15 to 40 kPa.

The n contact layer is composed of an Al _x Ga _1-x N layer (0 ≦ x ≦ 1, preferably 0 ≦ x ≦ 0.5, more preferably 0 ≦ x ≦ 0.1), as in the case of the base layer. It is preferable. The n contact layer is preferably doped with an n-type impurity, and the n-type impurity is preferably 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ , preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^3. If it is contained at a concentration of 1, it is preferable in terms of maintaining good ohmic contact with the negative electrode, suppressing crack generation, and maintaining good crystallinity. Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably it is Si and Ge. The growth temperature is the same as that of the underlayer.

  The nitride semiconductor constituting the n contact layer preferably has the same composition as the underlayer, and the total film thickness of the n contact layer and the underlayer is 1 to 20 μm, preferably 2 to 15 μm, more preferably 3 It is preferable to set it in a range of ˜12 μm. When the total film thickness of the n-contact layer and the underlayer is in the above range, the crystallinity of the semiconductor is favorably maintained.

It is preferable to provide an n clad layer between the n contact layer and the light emitting layer 3. This is because the deterioration of the flatness generated on the surface of the n contact layer can be filled. The n-clad layer can be formed of AlGaN, GaN, GaInN, or the like. Alternatively, a heterojunction of these structures or a superlattice structure in which a plurality of layers are stacked may be used. Needless to say, when the n-cladding layer is formed of GaInN, it is preferably larger than the band gap of GaInN of the light emitting layer 3.
The thickness of the n-clad layer is not particularly limited, but is preferably 0.005 to 0.5 μm, more preferably 0.005 to 0.1 μm. The n-type doping concentration of the n-clad layer is preferably 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , more preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ . A doping concentration within this range is preferable in terms of maintaining good crystallinity and reducing the operating voltage of the device.

As the light-emitting layer 3 stacked on the n-type semiconductor layer 2, a light-emitting layer made of a nitride-based semiconductor, preferably a nitride-based semiconductor of Ga _1-s In _s N (0 <s <0.4) is used. Usually used in the present invention. Although it does not specifically limit as a film thickness of the light emitting layer 3, The film thickness of the grade which can acquire a quantum effect, ie, a critical film thickness, is mentioned, for example, Preferably it is 1-10 nm, More preferably, it is 2-6 nm. The film thickness of the light emitting layer 3 is preferably in the above range from the viewpoint of light emission output.
In addition to the single quantum well (SQW) structure as described above, the light emitting layer 3 uses the Ga _{1 -s} In _s N as a well layer and has an Al _c Ga ₁₋ with a larger band gap energy than the well layer. _It is good also as a multiple quantum well (MQW) structure which consists of a cN (0 <= c <0.3 and b> c) barrier layer. The well layer and the barrier layer may be doped with impurities.

The growth temperature of the Al _c Ga _1-c N barrier layer is preferably 700 ° C. or higher, and more preferably 800 to 1100 ° C., since crystallinity is improved. The GaInN well layer is grown at 600 to 900 ° C., preferably 700 to 900 ° C. That is, in order to improve the MQW crystallinity, it is preferable to change the growth temperature between layers.

The p-type semiconductor layer 4 is usually composed of a p-cladding layer and a p-contact layer. However, the p contact layer may also serve as the p clad layer.
The p-cladding layer is not particularly limited as long as it has a composition larger than the band gap energy of the light-emitting layer 3 and can confine carriers in the light-emitting layer 3, but is preferably Al _d Ga _1-d N ( 0 <d ≦ 0.4, preferably 0.1 ≦ d ≦ 0.3). If the p-cladding layer is made of such AlGaN, it is preferable in terms of confinement of carriers in the light emitting layer 3. The thickness of the p-clad layer is not particularly limited, but is preferably 1 to 400 nm, more preferably 5 to 100 nm. The p-type doping concentration of the p-clad layer is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , more preferably 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ . When the p-type dope concentration is in the above range, a good p-type crystal can be obtained without reducing the crystallinity.

The p-contact layer is a nitride system comprising at least Al _e Ga _1-e N (0 ≦ e <0.5, preferably 0 ≦ e ≦ 0.2, more preferably 0 ≦ e ≦ 0.1). It is a semiconductor layer. When the Al composition is in the above range, it is preferable in terms of maintaining good crystallinity and good ohmic contact with the p ohmic electrode. When a p-type impurity (dopant) is contained at a concentration of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , preferably at a concentration of 5 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ , good ohmic contact is achieved. It is preferable from the standpoints of maintaining the thickness, preventing the occurrence of cracks, and maintaining good crystallinity. Although it does not specifically limit as a p-type impurity, For example, Preferably Mg is mentioned. Although a film thickness is not specifically limited, 0.01-0.5 micrometer is preferable, More preferably, it is 0.05-0.2 micrometer. When the film thickness is within this range, it is preferable in terms of light emission output.

The n-type semiconductor layer 2 is provided with a negative electrode 5 by conventional means well known in this technical field. As the negative electrode 5, any structure including a conventionally known structure can be used without any limitation.
Various structures using materials such as Au, Al, Ni and Cu are known for the bonding pad which is the positive electrode 8, and these known materials can be used without any limitation.

FIG. 4 is a cross-sectional view schematically showing an example of the lamp of the present invention. A lamp 30 shown in FIG. 4 is obtained by mounting the face-up type nitride semiconductor element 12 of the present invention shown in FIG. In FIG. 4, reference numerals 34 and 34 indicate frames, reference numerals 31 and 32 indicate wires, and reference numeral 33 indicates a mold.
The lamp 30 shown in FIG. 4 can be manufactured by a conventionally known method using the nitride semiconductor light emitting device 12 of the present invention shown in FIG. Specifically, for example, the nitride-based semiconductor element 12 is bonded to one of the two frames 34, 34 with a resin or the like, and the positive electrode 8 and the negative electrode 5 of the nitride-based semiconductor element 12 are wires 31, 32 made of gold. Then, after joining to the frames 34 and 34 respectively, the periphery of the nitride-based semiconductor light-emitting element 12 is molded with a mold 33 made of a transparent resin, so that a bullet-shaped lamp 30 shown in FIG. 4 can be produced.

EXAMPLES Next, although an Example demonstrates this invention still in detail, this invention is not limited only to these Examples.
(Experimental example 1)
The light emitting device shown in FIGS. 2 and 3 was obtained by the method described below. FIG. 2 is a schematic view showing a cross section of the gallium nitride-based compound semiconductor light emitting device of this example, and FIG. 3 is a schematic view showing a plane of the light emitting device shown in FIG.

First, a gallium nitride-based compound semiconductor layer 20 was stacked on a substrate 1 made of sapphire serving as a substrate for a plurality of light-emitting elements through a buffer layer 9 made of AlN by MOCVD.
As shown in FIG. 2, the gallium nitride compound semiconductor layer 20 is formed by an MOCVD method, as shown in FIG. N-type semiconductor layer 2 in which n-type In _0.1 Ga _0.9 N cladding layers are stacked in this order, a Si-doped GaN barrier layer having a thickness of 16 nm, and an In _0.06 Ga _0.94 N well layer having a thickness of 2.5 nm are stacked five times. Finally, a light emitting layer 3 having a multiple quantum well structure provided with a barrier layer, a 0.01 μm thick Mg-doped p-type Al _0.07 Ga _0.93 N cladding layer, and a 0.18 μm thick Mg-doped p-type Al _0.02 Ga layer _{A 0.98} N contact layer was formed of p-type semiconductor layers 4 stacked in this order.

In the obtained gallium nitride compound semiconductor layer 20 shown in FIG. 2, the carrier concentration of the n-type GaN contact layer is 1 × 10 ¹⁹ cm ⁻³ , and the Si doping amount of the GaN barrier layer is 1 × 10 ¹⁷ cm ^−3. The carrier concentration of the p-type AlGaN contact layer was 5 × 10 ¹⁸ cm ⁻³ , and the Mg doping amount of the p-type AlGaN cladding layer was 5 × 10 ¹⁹ cm ⁻³ .

And the positive electrode 8 and the negative electrode 5 were formed in the following procedure on the board | substrate 1 with which the gallium nitride type compound semiconductor layer 20 was laminated | stacked.
First, the n-type GaN contact layer where the negative electrode 5 is to be formed was exposed by reactive ion etching. Next, the current diffusion layer 6 having the composition and film thickness shown in Table 1 is formed only in the region where the positive electrode 8 is formed on the p-type AlGaN contact layer using the photolithography technique and the lift-off technique. Formed by the method. Then, the crystal state of the obtained current diffusion layer 6 was examined. The results are shown in Table 1.

In Table 1, “ITO” means In ₂ O ₃ : 90% by mass and SnO ₂ : 10% by mass, and “AZO” means ZnO: 95% by mass and Al ₂ O3: 5% by mass. % “IZO” means In ₂ O ₃ : 90 mass%, ZnO: 10 mass%, and “GZO” means ZnO: 95 mass%, GeO ₂ : 5 mass % Means something.

  Further, the light extraction layer 7 having the composition and film thickness (during film formation) shown in Table 1 was formed on the current diffusion layer 6 by the film formation method shown in Table 1. Then, the crystal state of the obtained light extraction layer 7 was examined. The results are shown in Table 1.

Thereafter, the surface of the light extraction layer 7 was etched using oxalic acid (3M) at 50 ° C. for 10 minutes to form a concavo-convex shape. The difference in height from the part was taken. The irregular shape formed here is a random irregularity having an average diameter of the convex portion of 0.3 μm, an average height of the convex portion of 0.3 μm, and an average value of the distance between the concave portion and the convex portion of 0.8 μm. It was a shape.
The height difference between the concave and convex portions was measured under the following measurement conditions using an AFM (Atomic Force Microscope, manufactured by Digital Instrument (USA)) as a measuring device.
Measurement conditions Scan width: 10μm
Scan rate: 1Hz
Number of measurements: 256
Mode: Tapping mode

  After that, it is processed in accordance with a procedure called normal lift-off, and a part of the surface of the light extraction layer 7 includes a first layer made of Au, a second layer made of Ti, a third layer made of Al, A fourth layer made of Ti and a fifth layer made of Au were sequentially laminated, and a bonding pad was formed to form the positive electrode 8.

  Next, the negative electrode 5 was formed on the exposed n-type GaN contact layer by the following procedure. That is, after a resist is uniformly applied over the entire surface of the exposed n-type GaN contact layer, the resist is removed from the portion where the negative electrode 5 is formed on the exposed n-type GaN contact layer using a lithography technique, and vacuum is applied. A negative electrode 5 made of 100 nm Ti and 200 nm Au was formed in this order from the semiconductor side by vapor deposition. Thereafter, the resist was removed.

By grinding and polishing the back surface of the substrate 1 on which the positive electrode 8 and the negative electrode 5 are formed in this way, the thickness of the substrate 1 is reduced to 80 μm, and a ruled line is entered from the semiconductor lamination side using a laser scriber. It was cut and cut into 350 μm square chips (light emitting elements).
The obtained chip was energized with a probe needle, and the forward voltage at a current application value of 20 mA was measured. The obtained chip was mounted on a TO-18 can package, and the light emission output at an applied current of 20 mA was measured by a tester. The results are shown in Table 1.
Also. The light emission distribution on the light emitting surface of the obtained chip was examined. As a result, it was confirmed that light was emitted from the entire surface of the positive electrode 8.

(Experimental Example 2 to Experimental Example 19)
A positive electrode 8 and a negative electrode 5 were formed on the same substrate 1 as in Experimental Example 1 in which the gallium nitride compound semiconductor layer 20 was stacked by the following procedure.
That is, in the same manner as in Experimental Example 1, the n-type GaN contact layer in the portion where the negative electrode 5 is formed is exposed, and the composition and film thickness shown in Table 1 are provided only in the region where the positive electrode 8 is formed on the p-type AlGaN contact layer. The current diffusion layer 6 was formed by the film forming method shown in Table 1. Thereafter, the light extraction layer 7 having the composition and film thickness (during film formation) shown in Table 1 was formed on the current diffusion layer 6 by the film formation method shown in Table 1.

  Thereafter, the surface of the light extraction layer 7 is etched at 50 ° C. for the same time as in Experimental Example 1 using the same etching solution as in Experimental Example 1, so that the convex portions and average height as in Experimental Example 1 are obtained. Convex parts of the distance between the convex part, the concave part and the convex part were formed, and the film thickness (film thickness after etching) shown in Table 1 was set as the height difference between the concave part and the convex part. Thereafter, in the same manner as in Experimental Example 1, a bonding pad was formed to form the positive electrode 8.

Next, the negative electrode 5 was formed in the same manner as in Experimental Example 1, and the substrate was cut into 350 μm square chips in the same manner as in Experimental Example 1.
Thereafter, the forward voltage (Vf) and the light emission output of the chip obtained in the same manner as in Experimental Example 1 were measured.
The results are shown in Table 1.

From Table 1, in Experimental Examples 1 to 12 in which the current diffusion layer 6 was formed by sputtering and the light extraction layer 7 was formed by vapor deposition, a high output of 11 mV or more was obtained, and 3.6 or less was sufficient. Thus, an excellent nitride light emitting device having a low Vf was obtained. As a result, in Experimental Examples 1 to 12, it was confirmed that even when the irregular shape was formed on the surface of the light extraction layer 7 by etching, the current diffusion layer 6 was hardly damaged.
On the other hand, in the experimental example 14 in which both the current diffusion layer 6 and the light extraction layer 7 were formed by sputtering, they were hardly etched by etching using oxalic acid (3M). As a result, Vf was low but the output was low, and it was found that the current diffusion layer 6 functions as a current diffusion layer, but the light extraction layer 7 does not function sufficiently as a light extraction layer.
Further, in Experimental Example 15 in which both the current diffusion layer 6 and the light extraction layer 7 were formed by vapor deposition, a good result was not obtained for both Vf and output because many current diffusion layers 6 were removed by etching. It was. Therefore, it was found that the current diffusion layer 6 does not function sufficiently as a current diffusion layer, and the light extraction layer 7 does not function sufficiently as a light extraction layer.

Further, as shown in Experimental Examples 1 to 12, it was confirmed that a high output was obtained regardless of whether the material of the light extraction layer 7 was ITO, AZO, IZO, or GZO.
Further, as shown in Experimental Example 13, even when the current diffusion layer 6 is formed by vapor deposition and then heat-treated at 500 ° C. for 10 minutes, Experimental Example 1 to Experimental Example 12 in which the current diffusion layer 6 is formed by sputtering. It was confirmed that a high output could be obtained in the same manner as.

Further, in Experimental Examples 1 to 13 in which the thickness of the current diffusion layer 6 is 50 nm to 1000 nm, Vf was lower than in Experimental Example 16 where the film thickness was 30 nm and was thin.
Further, in Experimental Examples 1 to 13 in which the film thickness of the current diffusion layer 6 was 50 nm to 1000 nm, the output was higher than in Experimental Example 17 having a film thickness of 2500 nm.
Further, in Experimental Examples 1 to 13, the output was higher than in Experimental Example 18 in which the film thickness after etching of the light extraction layer 7 was as thin as 10 nm.
Further, in Experimental Examples 1 to 13, the transmittance was high and the output was high as compared with Experimental Example 19 in which the film thickness after etching of the light extraction layer 7 was 2400 nm.

FIG. 1 is a cross-sectional view schematically showing an example of the nitride-based semiconductor light-emitting device of the present invention. FIG. 2 is a schematic view showing a cross section of the gallium nitride-based compound semiconductor light emitting device of this example. FIG. 3 is a schematic view showing a plane of the light emitting element shown in FIG. FIG. 4 is a cross-sectional view schematically showing an example of the lamp of the present invention.

Explanation of symbols

1 substrate 2 n-type semiconductor layer 3 light emitting layer 4 p-type semiconductor layer 5 negative electrode 6 current diffusion layer (second layer)
7 Light extraction layer (first layer)
8 Positive electrode 9 Buffer layer 10 Underlayer 12 Nitride-based semiconductor light-emitting element 11 Translucent conductive oxide film layer 20 Gallium nitride-based compound semiconductor layer 30 Lamp

Claims (1)

An n-type semiconductor layer, a light-emitting layer, a p-type semiconductor layer, and a light-transmitting conductive oxide film layer are sequentially disposed. The light-transmitting conductive oxide film layer includes a first layer and the p-type semiconductor layer of the first layer. A method for manufacturing a nitride-based semiconductor light-emitting device having at least a second layer disposed on the side,
Forming the second layer functioning as a current diffusion layer by sputtering on the p-type semiconductor layer;
Forming the first layer functioning as a light extraction layer on the second layer by vacuum deposition;
A step of wet etching the first layer to make the surface of the first layer uneven .
An etching solution used for the wet etching is a mixed solution of oxalic acid, iron chloride, and hydrochloric acid .

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