JP4949423B2 - LIGHT EMITTING ELEMENT HAVING NANOCRYSTALLINE SILICON-CONTAINING INSULATING FILM, MANUFACTURING METHOD FOR THE LIGHT EMITTING ELEMENT, AND LIGHT EMITTING METHOD - Google Patents

Description

  The present invention relates generally to the manufacture of integrated circuits (ICs), and more particularly to light emitting devices obtained using microcrystalline silicon (Si) -containing silicon oxide films.

  Nanocrystalline silicon has unique structural, electrical and optical properties, and its use is drawing attention in the fields of optoelectronics and integrated memory devices. Silicon is selected as a material in the manufacture of optoelectronic devices because of its advanced processing technology. However, the light-emitting element is not a sufficient material due to the indirect band gap. Over the years, research and development has been focused on adjusting the optical functions of silicon in order to realize silicon-based light emitting optoelectronics. Achieving the room-temperature light emission effect for crystalline silicon is an important step that contributes to the significant development of silicon-based optoelectronics.

Stable and reliable manufacture of optoelectronic devices requires high quantum efficiencies of photoluminescence (PL) and electroluminescence (EL). As a technique for improving the integrated optoelectronic device, it is possible to manufacture a SiO _x (X ≦ 2) thin film having nanocrystals containing silicon. Both luminescence are strongly dependent on the size of the nanocrystal, since recombination of electron-hole pairs is confirmed in silicon nanocrystals. In addition, the electrical and optical properties of SiO _X thin films having nanocrystals containing silicon depend on the particle size, concentration and particle size distribution of the silicon nanocrystals. Various thin film deposition techniques, such as sputtering using a capacitively coupled plasma source and plasma enhanced chemical vapor deposition (PECVD), have been investigated for producing stable and reliable nanocrystalline silicon thin films.

  However, due to high ion bombardment energy, conventional PECVD and sputtering techniques have low plasma density, insufficient power to transfer to the plasma, low ion / neutral ratio, and difficult to control capacity. There is a limitation of causing damage to the interface. Therefore, a highly reliable result can be produced by an oxide film against high impact energy that collides with ion species. The oxide film is formed from conventional capacitively coupled plasma (CCP) generated by plasma. Regardless of the extent of plasma induced capacitance or interface damage, it is important to control or minimize these.

However, it is not possible to control ion energy using the high frequency (RF) of CCP that generates plasma. For this reason, any attempt to increase the reaction rate by increasing the adaptive power will result in an increase in the impact of the deposited film. As a result, a low-quality film having a high defect concentration is generated. Furthermore, the low plasma density for these types of sources (on the order of 1 × 10 ⁸ to 10 ⁹ cm ⁻³ ) limits the generation of reactions in the plasma and on the film surface, and increases the processing speed. Insufficient generation of active radicals, inefficient oxidation, and a situation in which impurities are reduced at a low heat amount are caused. Such a situation reduces the practicality of manufacturing electronic devices at low temperatures.

  In deposition processes that increase the processing range and improve plasma characteristics compared to conventional plasma-based technologies such as sputtering and PECVD, the particle size is controlled and generated for PL / EL based on device development. is required. According to such control, a process capable of improving the plasma density and minimizing the impact of the plasma can reliably grow a high-quality film without causing damage to the fine structure due to plasma induction. . The above process can control each quality related to the interface and capacity of the film, and it is possible to manufacture an electronic device having high quality and high reliability. In addition, the plasma treatment capable of efficiently generating active plasma species, radicals and ions controls the treatment and quality control, and enables the development of an excellent thin film.

On the other hand, regarding the production of a high-quality SiO _x thin film, the oxidation of the growth film is very important in order to obtain a high-quality insulating film in which crystalline silicon particles are dispersed. By the process of generating a high concentration of active oxygen radicals, an efficient passivation surrounding the silicon nanocrystals in the oxygen matrix can be ensured. In addition, plasma processing that minimizes the damage caused by plasma induction can create important and high quality surfaces for manufacturing high quality devices.

  In addition, efficient oxidation and hydrogenation treatment with a low heat quantity is important and significant for processing high-quality optoelectronic devices. High temperature heat treatment can interfere with other device layers. Furthermore, because of the low reactivity of the thermoactive species, it is not preferred with respect to efficiency and heat balance. In addition, plasma processing offers a more complete solution and possibility for growth / deposition of new film structures, oxidation, hydrogenation, particle generation, particle size control, and independent control of plasma density and ion energy. There is a need for such plasma processing and extensive processing for the development of high quality optoelectronic devices.

  It is also important to relate the properties of the thin film to the plasma treatment as various plasma parameters that affect the desired film properties determined by the physical properties of the thin film and the intended application. Important plasma and thin film properties determined by the intended application include deposition rate, temperature, heat balance, density, microstructure, interface quality, impurities, plasma induced damage, and active species (radicals / ions) Plasma state, plasma potential, process and system size, and electrical quality and reliability. Correlating these parameters is important for evaluating the membrane properties as a processing function that affects the membrane properties for the intended application.

  Processes that develop low density plasmas or other high quality plasma systems when plasma energy, composition (amount of radicals relative to ions), plasma potential, electron temperature and temperature conditions are individually interrelated depending on the above processing functions It is considered that the knowledge about the thin film cannot be obtained or developed by simply applying the expansion.

  It is usually preferred that the manufacture of liquid crystal displays (LCDs) in which relatively large scale devices are formed on transparent glass, quartz or plastic substrates be made at low temperatures. These transparent substrates can be damaged when exposed to temperatures above 650 ° C. In order to cope with this temperature problem, low-temperature silicon oxidation treatment is being developed. In the above process, a high-density plasma source such as inductively coupled plasma (ICP) is used, and it is possible to form a silicon oxide having a quality comparable to that of the thermal oxidation method at 1200 ° C. .

US Pat. No. 7,141,936 (published Nov. 28, 2006) US Pat. No. 5,216,303 (published June 1, 1993) US Patent Application Publication No. 2006/0097654 (published May 11, 2006) US Patent Application Publication No. 2002/0043943 (published April 18, 2002) US Patent Application Publication No. 2006/0211267 (published on September 21, 2006)

Conventionally, a nanocrystalline silicon (nc) -containing silicon oxide (SiO _x ) film has been used as an active layer, and a light-emitting element that reciprocates electrically requires a relatively large turn-on voltage. . The turn-on voltage usually exceeds 80V, which impedes practical application of the light emitting device. If the light emitting device can be manufactured by a method that allows current injection through the high band gap associated with the silicon nanocrystal-containing SiO _X film, it is beneficial because the light emitting device can be operated at a low turn-on voltage.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a light-emitting element that can operate at a low turn-on voltage.

  In order to solve the above problems, a method for manufacturing a light emitting device of the present invention is selected from the group consisting of a doped semiconductor and a metal in a method for manufacturing a light emitting device using an insulating film containing nanocrystalline silicon. And using a high density plasma chemical vapor deposition method, a thickness in the range of 30 nm or more and 200 nm or less, and a group consisting of O, N and C are selected on the bottom electrode. Depositing a silicon insulating film containing the selected material, annealing the silicon insulating film, forming silicon nanocrystals in the silicon insulating film according to the annealing process, and silicon in the silicon insulating film And a step of forming a transparent metal electrode or semiconductor electrode on the nanocrystalline silicon-containing silicon insulating film on which the nanocrystal is formed.

  The above-described light emitting device manufacturing method is performed by optimizing the thickness and silicon concentration of the silicon insulating film, and the surface effect and the charge trapping effect when the deposition is performed using the high-density plasma chemical vapor deposition method. Therefore, a light emitting device having a greatly reduced turn-on voltage can be manufactured.

In the method for manufacturing a light-emitting element according to the present invention, the step of depositing the silicon insulating film includes SiO _X with X exceeding 0 and less than 2, and Si ₃ N _X or X with _X exceeding 0 and less than 4, Preferably, the method includes the step of depositing a film selected from the group consisting of SiC _X greater than 0 and less than 1.

In the method for manufacturing a light-emitting element of the present invention, the step of depositing the silicon insulating film includes the step of introducing silane within a range of 20 SCCM or more and 30 SCCM or less, and the step of N ₂ O within a range of 25 SCCM or more and 35 SCCM or less. And a step of supplying power to the upper electrode within a frequency range of 13.56 MHz to 300 MHz and a power density of 1 W / cm ² to 20 W / cm ^2. And supplying power to the lower electrode within a frequency range of 50 kHz to 13.56 MHz and a power density of 1 W / cm ² to 5 W / cm ^2. Is preferred.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, In the step of annealing the silicon insulating film, at a duration in the range of 10 minutes or more and 120 minutes or less, and in the case where the bottom electrode is a semiconductor, at a temperature in the range of 550 ° C. or more and 600 ° C. or less, Alternatively, when the bottom electrode is a metal, it is preferable to anneal the nanocrystalline silicon-containing SiO _X film at a temperature in the range of 200 ° C. to 350 ° C.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The nanocrystalline silicon-containing SiO _X film preferably has a conductivity of less than 1 × 10 ⁶ Ω / cm for an electric field of at least 1 Mv / cm.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The nanocrystalline silicon-containing SiO _X film preferably has a silicon volume filling rate in the range of 2.5% to 20%.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The nanocrystalline silicon-containing SiO _x film has a thickness of less than 60 nm and a silicon volume filling factor of 18% and is less than 20 volts as defined by a surface radiation output greater than 0.03 W / m ² . Preferably it has a turn-on voltage.

In the method for producing a light-emitting device of the present invention, the nanocrystalline silicon-containing SiO _X film preferably has a spectral width with a full width at half maximum of 150 nm and a radiation wavelength centered around 800 nm.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The nanocrystalline silicon-containing SiO _X film is 200 nm thick and preferably has a spatial electric field and a charge trapping electric field of 0.6 Mv / cm.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicone insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The nanocrystalline silicon-containing SiO _x film is 50 nm thick and has a space electric field and a charge trapping electric field of 0.7 Mv / cm at a silicon volume filling rate of 18%, or 10% or less. In the case of silicon volume filling rate, it is preferable to have a spatial electric field and a charge trapping electric field of 1.2 Mv / cm.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The nanocrystalline silicon-containing SiO _X film preferably has a silicon volume filling rate of 18% and an optical index (optical constant n (refractive index)) of 1.93.

In the manufacturing method of the light emitting device of the present invention, in the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film, The silicon nanocrystals in the SiO _X film have a diameter of 4 nm, a density of 1.0 × 10 ¹⁷ / cm ³ or more, a density of 5.4 × 10 ¹⁸ / cm ³ or less, and a range of 5.7 nm or more and 10 nm or less. It is preferable to have a distance between the silicon nanocrystals inside.

  In the method for producing a light emitting device of the present invention, the silicon nanocrystals preferably have a density depending on the silicon volume filling factor and a distance between the nanocrystals.

  In order to solve the above problems, the light-emitting device of the present invention is a light-emitting device using a nanocrystalline silicon-containing silicon insulating film, a bottom electrode selected from the group consisting of a doped semiconductor and a metal, and the bottom A nanocrystalline silicon-containing silicon insulating film comprising a material selected from the group consisting of O, N and C, having a thickness in the range of 30 nm or more and 200 nm or less, formed on the electrode, and the nanocrystalline silicon A transparent metal electrode or a semiconductor electrode formed on the containing silicon insulating film is provided.

  According to the above-described invention, it is possible to provide a light emitting device in which the thickness of the silicon insulating film and the silicon concentration are optimized and the turn-on voltage is greatly reduced.

Further, in the light emitting device of the present invention, the silicon insulating film is composed of SiO _X with X exceeding 0 and less than 2, Si ₃ N _{X with} X exceeding 0 and less than 4, or X exceeding 0 and less than 1. It is preferably made of a material selected from the group consisting of SiC _X.

Further, the light-emitting device of the present invention, the silicon insulating film, X is nanocrystalline silicon-containing SiO _X film is less than 2 SiO _X greater than 0, the nanocrystalline silicon-containing SiO _X film, It is preferable to have a silicon volume filling factor in the range of 2.5% or more and 20% or less.

Further, the light-emitting device of the present invention, the silicon insulating film, the X is nanocrystalline silicon-containing SiO _X film is less than 2 SiO _X greater than 0, the nanocrystalline silicon-containing SiO _X film Preferably, it has a conductivity of less than 1 × 10 ⁶ Ω / cm for an electric field of at least 1 Mv / cm.

Further, the light-emitting device of the present invention, the silicon insulating film, the X is nanocrystalline silicon-containing SiO _X film is less than 2 SiO _X greater than 0, the nanocrystalline silicon-containing SiO _X film For a film having a thickness of less than 60 nm and a silicon volume filling factor of 18%, it is preferable to have a turn-on voltage of less than 20 volts for a surface radiation output greater than 0.03 W / m ² .

In the light-emitting device of the present invention, the nanocrystalline silicon-containing SiO _X film preferably has a spectral width with a full width at half maximum of 150 nm and a radiation wavelength centered around 800 nm.

In the light emitting device of the present invention, the nanocrystalline silicon-containing SiO _x film has a thickness of 50 nm, and a space electric field and charge trapping of 0.7 megavolt per centimeter when the silicon volume filling factor is 18%. For a silicon volume filling factor of 10% or less with an electric field, it is preferable to have a space field and a charge trapping field of 1.2 megavolts per centimeter.

Further, the light-emitting device of the present invention, the silicon insulating film, the X is nanocrystalline silicon-containing SiO _X film is less than 2 SiO _X greater than 0, the nanocrystalline silicon-containing SiO _X film It is preferable that the silicon volume filling factor is 18% and the optical index (optical constant n (refractive index)) is 1.93.

In the light emitting device of the present invention, the silicon nanocrystal in the SiO _X film has a diameter of 4 nm, a density of 1.0 × 10 ¹⁷ / cm ³ or more and 5.4 × 10 ¹⁸ / cm ³ or less, and It is preferable to have a distance between silicon nanocrystals within a range of 5.7 nm or more and 10 nm or less.

The light-emitting method of the present invention is a light-emitting method using a light-emitting element, in which a bottom electrode selected from the group consisting of a doped semiconductor and a metal, a thickness of less than 60 nm and 18% formed on the bottom electrode. The silicon volume filling ratio is _X , and X is more than 0 and less than 2 SiO _X , X is more than 0 and less than 4 Si ₃ N _X, or X is more than 0 and less than 1 SiC _X Supplying a light emitting device comprising a nanocrystalline silicon-containing silicon film selected from the group and a transparent metal electrode or semiconductor electrode formed on the nanocrystalline silicon-containing silicon film, the bottom electrode, and a metal A potential of less than 20 volts is supplied to the electrode or the semiconductor electrode to generate a surface radiation output exceeding 0.03 W / m ² .

  According to the above-described invention, since the light-emitting element in which the thickness of the silicon insulating film and the silicon concentration are optimized is used, light emission with a low turn-on voltage is possible.

  The method of manufacturing a light emitting device of the present invention includes a step of supplying a bottom electrode selected from the group consisting of a doped semiconductor and a metal, and a high-density plasma chemical vapor deposition method on the bottom electrode to 30 nm. In accordance with the thickness of 200 nm or less and the step of depositing a silicon insulating film containing a material selected from the group consisting of O, N and C, the step of annealing the silicon insulating film, and the annealing treatment Forming a silicon nanocrystal in the silicon insulating film; forming a transparent metal electrode or semiconductor electrode on the nanocrystalline silicon-containing silicon insulating film in which the silicon nanocrystal is formed in the silicon insulating film; It is a method including.

According to the present invention, it is possible to provide a light emitting device having a turn-on voltage of less than 20 V specified for a surface radiation output of 0.03 watt per square meter (W / m ² ).

  The light emitting device of the present invention includes a bottom electrode selected from the group consisting of a doped semiconductor and a metal, a thickness of 30 nm or more and 200 nm or less formed on the bottom electrode, and O, A nanocrystalline silicon-containing silicon insulating film containing a material selected from the group consisting of N and C, and a transparent metal electrode or semiconductor electrode formed on the nanocrystalline silicon-containing silicon insulating film. .

  According to the above invention, the thickness of the silicon insulating film and the silicon concentration are optimized, and it is possible to provide a light emitting device that can greatly reduce the turn-on voltage.

The light emitting method of the present invention has a bottom electrode selected from the group consisting of doped semiconductors and metals, and a thickness of less than 60 nm and a silicon volume filling rate of 18% formed on the bottom electrode. A nanocrystalline silicon selected from the group consisting of SiO _X with X greater than 0 and less than 2, Si ₃ N _{X with} X greater than 0 and less than 4, or SiC _{X with X} greater than 0 and less than 1 A light emitting device including a silicon-containing film and a transparent metal electrode or semiconductor electrode formed on the nanocrystalline silicon-containing silicon film is supplied, and is 20 volts with respect to the bottom electrode and the metal electrode or semiconductor electrode. It is characterized by supplying a potential less than 0.03 W / m ² and generating a surface radiation output exceeding 0.03 W / m ² .

  According to the above-described invention, since the light-emitting element in which the thickness of the silicon insulating film and the silicon concentration are optimized is used, it is possible to emit light with a low turn-on voltage.

It is a fragmentary sectional view showing a light emitting element which has a silicon (Si) nanocrystal silicon insulating film. It is a partial sectional view showing a light emitting device using the nano-crystalline silicon containing SiO _X as an active layer. It is a flowchart which shows the light emission method using a SIM light emitting element. It is a graph which shows the description result of the monochromator provided with the multimode fiber (a multiple-mode fiber) used as a probe used in order to measure the light emission spectrum of the light emitting element of FIG. 2A. It is a figure which shows the collection apparatus of electroluminescent light. It is a graph which shows the dependence of the light emission characteristic regarding the kind of substrate wafer, and the post-process of annealing treatment. It is a graph which shows the comparison data with the calculation data using a Fowler-Nordheim model. 2 is a graph showing the turn-on voltage of the nanocrystalline silicon-containing SiO _X film sample described in Table 1. FIG. It is a flowchart which shows the manufacturing method of the light emitting element using a nano crystalline silicon containing silicon insulating film. FIG. 1 schematically illustrates a high density plasma (HDP) system having an inductively coupled plasma source.

The present invention is implemented by optimizing the thickness of the SiO _X active layer and the silicon concentration, and when deposited using HDPECVD (high density plasma chemical vapor deposition), surface and charge trapping effects are present. Since it is minimized, the turn-on voltage of the light emitting device can be greatly reduced. In such a light emitting device (LED), a turn-on voltage of 20 V or less is measured. The electroluminescence (EL) output of this type of LED is strongly related to the degree of current injection. Traditionally, high current injection was thought to be caused by a decrease in the thickness of the silicon active layer. As a result, a high electric field was generated. However, it has been experimentally shown that a reduction in the thickness of the SiO _X active layer simply results in the reverse reaction inherent in the surface and charge trapping effects. These reverse reaction fields reduce the 'true' field applied to the LEDs. In this way, the effective limit of current injection is hindered.

As a result, the fabricated conventional SiO _X light emitting device has a thickness exceeding 200 nm. The present invention is for optimizing HDPECVD and post-deposition processing methods to achieve efficient current injection for LEDs having thin film SiO _x active layers. By optimizing HDPECVD and post-deposition annealing treatment, it is possible to produce nanocrystalline silicon-containing SiO _X films with a thickness of 200 nm or less and a turn-on voltage reduced from about 80 V to 20 V or less It is.

Accordingly, the present invention also relates to a method for manufacturing a light emitting device using a nanocrystalline silicon-containing SiO _X film. The manufacturing method supplies (prepars) a doped semiconductor or metal bottom electrode, and uses high-density plasma chemical vapor deposition (HDPECVD) to form a silicon insulating film of 30 nanometers (nm) or more, Deposit (cover) on the semiconductor electrode with a thickness in the range of 200 nm or less. The silicon insulating film may further contain an O, N, or C element. For example, the silicon insulating film may be SiO _X with X exceeding 0 and less than 2, Si ₃ N _{X with} X exceeding 0 and less than 4, or SiC _X with _X exceeding 0 and less than 1. Hereinafter, a silicon insulating film composed of SiO _{X with X} exceeding 0 and less than 2 is referred to as a nanocrystalline silicon-containing SiO _X film. After depositing the silicon insulating film, the silicon film is annealed. As a result, silicon nanocrystals are formed. Further, a transparent metal electrode is formed on the nanocrystalline silicon-containing silicon insulating film. Instead of the transparent metal electrode, a semiconductor electrode may be formed.

The annealed nanocrystalline silicon-containing SiO _X film has a conductivity of 1 × 10 ⁶ Ω / cm corresponding to an electric field of 1 megavolt per centimeter (Mv / cm) or less, and a silicon filling rate of 2 .5% or more and 20% or less. In addition, LEDs with annealed nanocrystalline silicon-containing SiO _x films less than 60 nm have turn-on voltages of less than 20 V defined for a surface radiation output of 0.03 watts per square meter (W / m ² ). Have. The annealed nanocrystalline silicon-containing SiO _X film has a spectral width of about 150 nm (full width at half maximum), and a center having a radiation wavelength near 800 nm. Further, the annealed nanocrystalline silicon-containing SiO _X film has a space electric field and a charge trapping electric field of about 0.6 megavolt per centimeter (Mv / cm) for a film thickness of about 200 nm.

  The production method according to the present invention, the light emitting element using the nanocrystalline silicon-containing silicon insulating film, and the light emitting method using the light emitting element will be described in detail below.

FIG. 1 is a partial cross-sectional view showing a light emitting device having a silicon (Si) nanocrystalline silicon insulating film. The light emitting device 100 includes a bottom electrode 102 doped with an n-type or p-type dopant. Further, the bottom electrode 102 may be made of a semiconductor or metal. The nanocrystalline silicon-containing silicon insulating film 104 is disposed on the bottom electrode 102. The thickness of the nanocrystalline silicon-containing silicon insulating film 104 is not less than 30 nanometers (nm) and not more than 200 nm.

The nanocrystalline silicon-containing silicon insulating film 104 is SiO _X with X exceeding 0 and less than 2, Si ₃ N _{X with} X exceeding 0 and less than 4, or SiC _{X with X} exceeding 0 and less than 1. May be. The optimum thickness of the nanocrystalline silicon-containing silicon insulating film 104 is an unexpected value. That is, it has been conventionally considered that a particularly high optical radiation output is caused by a film thickness of at least 200 nm. The unexpected film thickness range depends on the high concentration of silicon in the nanocrystalline silicon-containing silicon insulating film 104.

A transparent metal electrode 108 as an upper electrode is disposed on the nanocrystalline silicon-containing silicon insulating film 104. The transparent metal electrode 108 can be composed of, for example, a conductive metal such as gold or platinum. Further, instead of the metal electrode 108, a semiconductor electrode such as indium tin oxide (ITO) may be disposed. In the nanocrystalline silicon-containing silicon insulating film 104, for example, the volume filling rate of silicon can be in the range of 2.5% or more and 20% or less, and less than 1 megavolt per centimeter (Mv / cm). The electric conductivity can be 1 × 10 ⁶ Ω / cm with respect to the electric field.

When a power source is supplied to the light-emitting element 100 (see FIG. 2), the nanocrystalline silicon-containing silicon insulating film 104 made of SiO _X having a thickness of less than 60 nm and X of more than 0 and less than 2 is 0 0.03 watts per square meter (W / m ² ) for surface radiant power with a turn-on voltage of less than 20 volts. The nanocrystalline silicon-containing silicon insulating film 104 has a spectral width (full width at half maximum) of about 150 nm and a radiation wavelength whose center is about 800 nm. As shown below, the nanocrystalline silicon-containing silicon insulating film 104 having a thickness of about 50 nm and a silicon volume filling rate of about 18% has a spatial electric field and a charge trapping electric field of about 0.7 Mv / cm. When the volume filling rate of silicon is 10% or less, it has a space electric field and a charge trapping electric field of about 0.6 megavolt per centimeter (Mv / cm).

Nanocrystalline silicon-containing silicon insulating film 104 X is composed of less than 2 SiO _X greater than zero, when about 18% of the silicon volume filling rate, optical index of about 1.93. Nanocrystalline silicon in the SiO _X film is typically about 4 nm in diameter, about 1.0 × 10 ¹⁷ / cm ³ to 5.4 × 10 ¹⁸ / cm ³ in density and about 5.7 nm or more and 10 nm or less. It has a distance between silicon nanocrystals that are within.

[Functional explanation]
High density plasma chemical deposition (HDPCVD) has evolved over conventional CVD or plasma enhanced chemical vapor deposition (PECVD) to produce silicon insulation films with high density silicon nanocrystals. The generated light emitting device (LED) having a silicon insulating film can be operated with a low turn-on voltage. The silicon insulating film is sandwiched between electrode carrier injection layers. The high density silicon nanocrystals can change the predetermined gas combination, gas ratio, RF output and processing temperature. A high silicon content (filling ratio of 2% or more and 20% or less) is used and measured as an optical index.

Increasing the concentration of silicon nanoparticles enables efficient carrier injection through Fowler-Nordheim tunneling (hereinafter referred to as “FN tunneling” as appropriate) by decreasing the distance between silicon nanocrystals. The net result is a low turn-on voltage. Further, when the concentration of silicon nanocrystals is increased (when the filling rate exceeds 20%), the SiO _X light emitting device exhibits higher conductivity. However, the light emission amount is reduced. The above-mentioned SiO _X treatment and methodology can also be applied to SiN _X and SiC _X films.

For a relatively high concentration (18% volume filling factor) SiO _X light emitting device, the average number of silicon nanoparticles is 5.4 × considering all spheres of silicon nanoparticles having an average diameter of 4.0 nm. 10 ¹⁸ / cm ³ . Considering the distance between the spheres of silicon nanocrystals, which is 5.7 nm, and especially considering the size change, the silicon nanoparticles filled between the spheres of the silicon nanoparticles are observed to be very close. . The higher the silicon concentration, the easier it is to electrically short-circuit the particles that prevent the formation of excitons (bonds) in terms of light emission, so this high density results in a higher silicon concentration and a cooling effect. It is suggested that

  Conventional PECVD processing cannot generate ion plasma sufficient to form silicon nanoparticles with the above concentration. According to conventional ion implantation, high concentration silicon can be generated. However, the ion implantation process cannot form a high-quality (large particle size) silicon nanocrystalline structure. This is because high-energy silicon ions damage the silicon insulating film. The increase in the silicon concentration (volume filling rate) is not limited to this, and the same applies to the density of silicon nanoparticles.

The electroluminescence (EL) output of the light emitting device 100 shown in FIG. 1 is strongly related to the degree of current injection. For similar degrees of current injection, the EL intensity between light emitting devices under most deposition processing conditions shows only a slight difference. The light emission output cannot be increased by simply reducing the thickness of a conventional nanocrystalline silicon-containing SiO _x film. In other words, experimental data show that simply reducing the thickness of a conventional SiO _X active layer results in a strong surface effect and charge trapping effect that creates an inherent reverse reaction field. These reverse reaction fields reduce the actual field applied to the light emitting device. In this way, efficient current injection is prevented. Furthermore, simply reducing SiO _x reduces the contribution of silicon nanocrystals to radiation and prevents high radiation output. By simply reducing the SiO _x film, all these factors prevent the decrease in turn-on voltage in conventional light emitting devices. To solve the problems, the processing method according to the post-HDPCVD and deposition process of the present invention may be optimized to achieve efficient current injection according to the light-emitting element having a SiO _X active layer of the thin layer Yes. With optimized HDPCVD and post-deposition annealing, the turn-on voltage can be reduced from around 80V to below 20V.

FIG. 2A is a partial cross-sectional view showing a light emitting device using nanocrystalline silicon-containing SiO _X as an active layer. FIG. 2B is a flowchart showing a light emitting method using a SIM light emitting element (high efficiency condensing element). The light emitting element 100 that reciprocates electrically is supplied using a nanocrystalline silicon-containing silicon insulating film 104. The nanocrystalline silicon-containing silicon insulating film 104 is sandwiched between a doped silicon wafer and a transparent metal. Examples of the material of the transparent metal electrode 108 include gold or platinum which is a conductive metal.

In step 202, the active layer is deposited at a thickness 106 in the range of 30 nm to 200 nm using HDPECVD. A transparent metal electrode is formed on the SiO _X film. When a potential of less than 20 volts is applied to the light emitting device 100 (step 204), assuming a film thickness of less than 60 nm and a Si volume filling factor of about 18%, 0.03 watt per square meter (W / cm ² ) Greater surface radiation output is generated (step 206). If the substrate (bottom electrode) is n-doped, the substrate may be connected to ground and a transparent metal electrode 108 connected to a negative voltage source. In place of the metal electrode 108, a semiconductor electrode may be formed on the SiO _X film.

As shown in FIG. 3, the surface radiation wavelength has a spectral width of about 150 nm (full width at half maximum), and the center has a radiation wavelength near 800 nm. A nanocrystalline silicon-containing silicon insulating film 104 made of SiO 2 _X having a thickness 106 of about 200 nm produces a spatial electric field and a charge trapping electric field of about 0.6 megavolts per centimeter (Mv / cm). The nanocrystalline silicon-containing silicon insulating film 104 having a film thickness 106 of about 50 nm and a silicon volume filling rate of about 18% generates a spatial electric field and a charge trapping electric field of about 0.7 Mv / cm. This is about half the value of a conventional light emitting device to which no SiO _X film is applied.

  FIG. 3 is a graph showing a depiction result of a monochromator including a multi-mode fiber used as a probe used for measuring a light emission spectrum of the light emitting device of FIG. 2A. The figure shows that a radiation peak occurs near 800 nm, very close to the photoluminescence (PL) wavelength.

  FIG. 4 is a diagram showing an electroluminescent light collecting device. Since the light emitting element (LED in the figure) has a small cross-sectional area ratio with respect to the distance R, it can be regarded as a point light source.

FIG. 5 is a graph showing the dependence of the light emission characteristics on the type of substrate wafer and the post-treatment of the annealing process. The light output is collected using the collection device shown in FIG. As shown in FIGS. 1 and 2A, the light-emitting element has a three-layer structure. The light emission output of the light emitting element 100 is greatly influenced by the interface between the three layers. Also, a significant effect is shown by the type of dopant in the bottom silicon wafer. A light emitting element manufactured on an n ⁺ type substrate wafer emits light when biased, compared to a P ⁺ type substrate wafer. Furthermore, the conditions (particularly temperature) of the annealing treatment after the deposition have an important influence on the light emission characteristics.

According to the results summarized in FIG. 5, if other processing conditions and the configuration of the light emitting element are the same, the light emitting element (LED) fabricated on the n ⁺ type substrate wafer is a p ⁺ type substrate. It can be clearly seen that the light output is more efficient than the light emitting device fabricated on the wafer. In addition, the light-emitting element treated at 600 ° C. for 15 minutes after the annealing treatment has higher performance than the light-emitting element annealed at 800 ° C. for 15 minutes.

Conventionally, it is known that the turn-on voltage associated with the active layer of an electrical device decreases as the thickness of the active layer decreases (while maintaining a constant current state). However, it is not known that there is a relationship between the voltage of the SiO _X light emitting device, the thickness of the active layer, and the radiation output. A light-emitting element including a thin film usually has low light emission (there are few substances involved in light emission). Thus, in order to emit more light from the active layer of the element, it is necessary to increase the voltage. In other words, it is necessary to compensate for the voltage that is reduced by simply reducing the thickness of the SiO _X film.

For a nanocrystalline silicon-containing SiO _X active layer, a practical minimum thickness is 200 nm. Experimental studies have confirmed that the conventional SiO _x layer forms a strong intrinsic reverse reaction field against the external field. Note that if the layer is thinner than 200 nm, efficient current injection is hindered. A modified Fowler Nordheim theoretical model for predicting current injection for a nanocrystalline silicon-containing SiO _X light emitting device can be expressed as follows:

In the above equation, E _eff = E _ext −E _bui , where E _eff is an effective magnetic field, E _ext is an external field, and E _bui is a specific inverse reaction field. The reverse reaction field weakens the external field by reducing the 'true' field applied to the light emitting device. E _ext is generally a complex function. further:

In the above formula, m ^* is the effective mass of the carrier, q is the charge of each carrier, φ _B is the barrier height, and h is the Planck's constant. E _Barrier corresponds to the barrier potential height at which carriers need to be _overcome by the FN tunnel phenomenon.

FIG. 6 is a graph showing comparison data with calculated data using the modified Fowler-Nordheim model. Good agreement is achieved in the above data. For a light emitting device having a conventional 50 nm SiO _x active layer, E _bui can be doubled _compared to that of a 200 nm light emitting device, preventing efficient current injection and _{lowering the} turn-on voltage. Can be achieved. Although they are fabricated with the same processing and the same arrangement of light emitting elements except for thickness, E _Barrier is not the same for these two types of light emitting elements. This result is explained by different barrier potential slopes at different effective magnetic fields E _eff .

In summary, nanocrystalline silicon-containing SiO _x light-emitting devices with low turn-on voltage cannot be fabricated by conventional techniques that do not use thin film active layers with improved current injection. However, for thin films (ie, 200 nm or thinner), the reverse reaction field E _ui similarly prevents current injection. According to the present invention, it is possible to provide a method for minimizing the reverse reaction field of a thin film nanocrystalline silicon-containing SiO _X light emitting device, and to produce a light emitting device with a low turn-on voltage. Furthermore, the introduced post-deposition treatment can be optimized. The optimized HDPECVD process has the following steps. (1) All process parameters are fixed, and the flow rate of N ₂ O is decreased stepwise. In this step, a light-emitting device having a turn-on voltage in a range of less than 40 V with respect to a light-emitting element having a thickness of 200 nm is manufactured under optimum conditions. (2) Reducing the thickness of the SiO _X active layer while optimizing other HDPECVD parameters for fixed N ₂ O / SiH ₄ flow rates to produce SiO _X films at relatively high silicon concentrations . In this step, the space charge effect that rapidly lowers the efficiency of charge injection by the thin film is minimized. Optimum conditions can be used to reduce space and charge trap effects, thus reducing high turn-on voltage.

Parameters used in HDPECVD manufacturing method, SiO _X layer are summarized in Table 1 relates to a light emitting element of the two groups of about 50nm and 200 nm. The nanocrystalline silicon-containing SiO _X film is a silicon oxide (SRSO) film having a high silicon concentration. As shown in FIG. 7, 17.5V is measured, and a low turn-on voltage of 20V or less (corresponding to about 0.05 W / m ^2, which is 0.1 nW in the measurement system shown in FIG. 4). Have been demonstrated).

FIG. 7 is a graph showing the turn-on voltage of the nanocrystalline silicon-containing SiO _X film sample described in Table 1. Table 2 lists the parameters used in the HDPECVD manufacturing method. The above parameters contrast the silicon concentration and the degree of various film thicknesses.

  Table 3 cross-references HDPECVD fabrication conditions with respect to the optical index (n) (optical constant n (refractive index)).

Silicon concentration in the SiO _X film can be measured using the optical index of the SiO _X film. Based on the assumption that _silicon maintains the same dielectric constant ε _Si in silicon oxide (having a dielectric constant ε _OX ), the effective dielectric constant ε _eff can be calculated as follows.

In the above formula, f is the filling rate of silicon in the silicon oxide film, and since the effective dielectric constant ε _eff is substantially larger than the expected amount (due to loss), the measured optical index of the SiO _X film N _eff can be expressed as:

When the dielectric constant ε _OX is 2.37 and the dielectric constant ε _Si is 11.68, the effective optical index is 1.54 (f = 0) or more and 3.44 (f = 100) by controlling the silicon concentration. %) It varies within the following range. The samples summarized in Table 3 have an optical index that varies from 1.64 to 2.02, corresponding to a silicon filling factor in the range of 2.8% to 17.2%. .

  From Table 3, as the silicon fill rate approaches 18% (eg, sample 0725-34AB), no intense luminescence is observed despite the very efficient current injection. When the silicon filling rate is as low as 2.8% (for example, 0725-33AB), strong light emission is observed. However, a high turn-on voltage is required. Based on these results, the optimal condition for the silicon fill rate approach should be between about 2.8% and about 18%. However, it is considered effective in a slightly wider range than this range.

As mentioned above, the concept of reducing the thickness of the SiO _X active layer in an electronic device in an attempt to reduce the operating voltage is not new. Comparing light emitting elements having thicknesses of 200 nm and 50 nm, ideally, a 50 nm light emitting element has an operating voltage that is ¼ that of a 200 nm light emitting element. That is, _V200nm / 200nm = _V50nm / 50nm. Thus, the ideal operating voltage is considered to be 40 V for a 200 nm light emitting device and 10 nm for a 50 nm light emitting device.

However, these results cannot be achieved using conventional membranes. Spatial and charge trapping effects prevent ideal field generation when the film thickness is reduced from 200 nm to 50 nm. For conventional light emitting devices, the intrinsic reverse reaction field from space charge increases from 1.5 mv / cm to 3.0 mv / cm. Due to the space charge, the effective operating voltage of the conventional 200 nm light emitting element is 40 V or more and 70 V or less as described above and as described above (1 mv / cm or more and 20 v or less for the 200 nm light emitting element). As the thickness decreases from 200 nm to 50 nm, the spacing between space charges decreases. And the effect of space charge is further enhanced. Thus, the operating voltage for conventional 50 nm SiO _x is 40V, not the theoretical 10V.

However, according to the treatment according to the present invention, it is possible to provide a light emitting device having a low operating voltage even with a 50 nm thick SiO _X film. As mentioned above, the operating voltage is less than 20V, which is half of the 40V turn-on voltage required for conventional 50 nm light emitting devices. The processing according to the present invention can minimize the space and charge trapping effects that allow further voltage scaling with thickness.

  FIG. 8 is a flowchart showing a method for manufacturing a light emitting device using a nanocrystalline silicon-containing silicon insulating film. For the sake of clarity, numbering steps are consecutively numbered, but in the manufacturing method, the numbers do not necessarily determine the order of the steps. Some processes that can be done in parallel or without having to strictly follow the order may be omitted. The manufacturing method starts at Step 800.

Step 802 supplies a bottom electrode. Specifically, an n-type doped or p-type doped semiconductor or metal bottom electrode is provided. Step 804 deposits a silicon insulating film on the bottom electrode having a thickness in the range of 30 nm to 200 nm using HDPECVD. The silicon insulating film may contain O, N, C, or the like. For example, the silicon insulating film may be SiO _X with X exceeding 0 and less than 2, Si ₃ N _{X with} X exceeding 0 and less than 4, or SiC _X with _X exceeding 0 and less than 1. In step 806, the silicon insulating film is annealed. In one form, the duration of the annealing process is about 10 minutes or more and less than 120 minutes. When the bottom electrode is a semiconductor, the annealing temperature is in the range of about 550 ° C. to 600 ° C. On the other hand, when the bottom electrode is a metal, the annealing temperature is in the range of 200 ° C. or higher and 350 ° C. or lower. In step 808, silicon nanocrystals are formed in the silicon insulating film in accordance with the annealing process. Next, in Step 810, a transparent metal electrode is formed on the silicon insulating film. Specifically, when the silicon insulating film is SiO _X with _X exceeding 0 and less than 2, a transparent metal electrode is formed on the SiO _X film.

The deposition process of the silicon insulating film in Step 804 may include a sub-step. In step 804a, silane (SiH ₄ ) is introduced within a range of about 20 cubic centimeters per minute (hereinafter, abbreviated as “SCCM” where appropriate) to 30 SCCM. Further, in step 804b, N ₂ O is introduced within a range of about 25 or more and 35 SCCM or less. Note that when the manufacturing method is performed in the chamber, the silane and N ₂ O are introduced into the chamber.

In step 804c, within a frequency range of 13.56 megahertz (MHz) to 300 MHz and a power density of about 1 watt per square centimeter (W / cm ² ) to 20 W / cm ² , Power is supplied to the upper electrode. In step 804d, the lower electrode is applied at a frequency in the range of 50 kHz to 13.56 MHz and a power density of about 1 watt per square centimeter (W / cm ² ) to 5 W / cm ^2. Supply power.

The annealed nanocrystalline silicon-containing SiO _X film has a conductivity of 1 × 10 ⁶ Ω / cm for an electric field of 1 Mv / cm. In another embodiment, the annealed nanocrystalline silicon-containing SiO _X film has a silicon filling rate in the range of 2.5% to 20%.

In yet another form, an annealed nanocrystalline silicon-containing SiO _X film having a silicon loading of about 18% and having a turn-on voltage of less than 20V is less than 60 nm. The turn-on voltage has a surface radiant output exceeding 0.03 watts per square meter (W / cm ² ) and a spectral width of approximately 150 nm (full width at half maximum), and is specified for a radiation wavelength centered around 800 nm. Is done. As another form, the annealed nanocrystalline silicon-containing SiO _X film has a spatial electric field and a charge trapping electric field of about 0.6 Mv / cm with respect to a film thickness of 200 nm. For a film thickness of about 50 nm, an annealed nanocrystalline silicon-containing SiO _x film having a silicon volume filling factor of about 18% has a space charge electric field of about 0.7 Mv / cm. Furthermore, a 50 nm thick SiO _x film having a silicon volume filling factor of 10% or less has a spatial electric field and a charge trapping electric field of about 1.2 Mv / cm.

Also, in one form, the nanocrystalline silicon-containing SiO _x film has an optical index of about 1.93 for a silicon volume fill factor of about 18%. The silicon nanocrystals in the SiO _X film have a diameter of about 4 nm, a density in the range of about 1.0 × 10 ¹⁷ / cm ³ or more, 5.4 × 10 ¹⁸ / cm ³ or less, and about 5.7 nm or more. It has a distance between silicon nanocrystals within a range of 10 nm or less. The silicon nanocrystal has a density and a distance between the nanocrystals depending on the volume filling rate of silicon.

FIG. 9 schematically illustrates a high density plasma (HDP) system having an inductively coupled plasma source. The system shown in the figure is an example of a system that enables the HDPECVD process for depositing a silicon crystalline SiO _x film. The upper electrode 1 is driven by a radio frequency output (RF) source 2. On the other hand, the lower electrode 3 is driven by a low frequency output source 4. RF power from a high-frequency output source 2 that is a high-density inductively coupled plasma (ICP) source is transmitted to the upper electrode 1 through a matching circuit 5 and a high-pass filter 7. Furthermore, the power to the lower electrode 3 can be changed independently of the power of the upper electrode 1 through the low-pass filter 9 and the matching transformer 11.

The power frequency of the upper electrode depends on the setting of ICP (inductively coupled plasma) and can be in the range of about 13.56 to about 300 megahertz (MHz). The power frequency of the lower electrode can be varied within a range from about 50 kilohertz (KHz) to about 13.56 MHz to control ion energy. The upper limit of the pressure is 500 mTorr (66.65 Pa). The power of the top electrode can be as large as about 10 watts per square centimeter (W / cm ² ). On the other hand, the power of the lower electrode can be as large as 3 watts per square centimeter (W / cm ² ).

  An important feature of high density plasma (HDP) systems is that no induction coil is used that is exposed to the plasma. The induction coil eliminates a source of impurities. The power of the upper electrode and the lower electrode can be controlled independently. Further, it is not necessary to apply a system casing using various capacitors so that the electrodes are not exposed to plasma. That is, no crosstalk occurs between the upper electrode and the lower electrode, and the plasma potential is low, usually less than 20V. The electric potential of the system casing is a floating type electric potential and depends on the system design and the nature of the power coupling.

The HDP process (HDP tool) is actually a high-density plasma process with an electron concentration of 1 × 10 ¹¹ cm ⁻³ or more and an electron temperature of 10 eV or less. As in many high density plasma systems such as capacitively coupled plasma tools and conventional designs, there is no need to maintain a different bias between the capacitor connected to the top electrode and the system housing. In other forms, the upper and lower electrodes may receive RF and low frequency (LF) power.

  A light emitting device made from a nanocrystalline silicon-containing insulating film active layer is shown with associated manufacturing processes. The specific configuration and processing according to the present invention are shown in the drawings, but the present invention is not limited to the illustrated specific examples. Other modifications and specific examples according to the present invention can be appropriately changed by those skilled in the art. In other words, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims, and the present invention can be obtained by appropriately combining technical means disclosed in different embodiments. Such embodiments are also included in the technical scope of the present invention. In the present specification, the notation in which “about” is added to a predetermined numerical value includes the value of the predetermined numerical value itself.

  Further, the present invention includes the following light emitting device manufacturing method, light emitting device, and light emitting method.

  (1) In a method for manufacturing a light emitting device using a silicon (Si) nanocrystalline silicon insulating film, a step of supplying a bottom electrode selected from the group consisting of a doped semiconductor and a metal, and a high-density plasma chemical Using the phase growth method (HDPECVD), a thickness ranging from 30 nanometers (nm) to 200 nanometers (nm) on the bottom electrode and selected from the group consisting of O, N and C A step of depositing a silicon insulating film containing the selected material, a step of annealing the silicon insulating film, a step of forming silicon nanocrystals in the silicon insulating film according to the annealing treatment, and a silicon nanocrystalline silicon insulating film And a step of forming a transparent metal electrode thereon.

(2) The step of depositing the silicon insulating film is a step of depositing a film selected from the group consisting of SiO _X where X is less than 2, Si ₃ N _X where X is less than 4, or SiC _X where X is less than 1. The manufacturing method of the light emitting element as described in (1) characterized by including.

(3) The step of depositing the SiO _X film includes introducing silane (SiH ₄ ) within a range of about 20 cubic centimeters per minute (SCCM) to 30 cubic centimeters per minute (SCCM), and N ₂ O. about 25SCCM or higher, a step of introducing within the scope of the following 35 SCCM, 13.56 megahertz (MHz) or higher, frequency in the range of 300 megahertz (MHz) or less, and about 1 watt per square centimeter (W / cm ² ) Supplying power to the upper electrode in a power density range of 20 watts per square centimeter (W / cm ² ) or less, a frequency in the range of 50 kilohertz to 13.56 MHz, and about 1W / cm ² or more, within the scope of 5W / cm ² or less power density, to include a step of supplying a power to the lower electrode Method of manufacturing a light-emitting device according to (2).

(4) In the step of annealing the silicon insulating film, the duration is in the range of about 10 minutes to 120 minutes, and in the case where the bottom electrode is a semiconductor, the duration is in the range of about 550 ° C. to 600 ° C. When the bottom electrode is made of metal at a temperature, the SiO _X film is annealed at a temperature within a range of about 200 ° C. or higher and 350 ° C. or lower. Method.

(5) The nanocrystalline silicon-containing SiO _X film has a conductivity of at least less than 1 × 10 ⁶ Ω / cm with respect to an electric field of at least 1 megavolt per centimeter (Mv / cm) (2 The manufacturing method of the light emitting element as described in).

(6) The method for producing a light-emitting element according to (2), wherein the nanocrystalline silicon-containing SiO _X film has a silicon volume filling rate in a range of 2.5% to 20%.

(7) The nanocrystalline silicon-containing SiO _x film has a surface greater than 0.03 watts per square meter (W / m ² ) for a film having a thickness of less than 60 nm and a silicon volume filling factor of about 18%. The method for manufacturing a light-emitting element according to (2), wherein the light-emitting element has a turn-on voltage of less than 20 volts specified for radiation output.

(8) The nanocrystalline silicon-containing SiO _X film has a full width at half maximum of about 150 nm and a radiation wavelength centered around 800 nm (7) The manufacturing method of the light emitting element as described in any one of.

(9) The light-emitting element according to (2), wherein the nanocrystalline silicon-containing SiO _X film has a thickness of about 200 nm and a spatial electric field and a charge trapping electric field of about 0.6 Mv / cm. Manufacturing method.

(10) The nanocrystalline silicon-containing SiO _X film is about 50 nm thick and has a space electric field and a charge trapping electric field of about 0.7 megavolt per centimeter when the silicon volume filling factor is about 18%. The method for manufacturing a light-emitting element according to (2), which has a space electric field and a charge trapping electric field of about 1.2 megavolts per centimeter when the silicon volume filling factor is about 10% or less.

(11) The method for producing a light-emitting element according to (2), wherein the nanocrystalline silicon-containing SiO _X film has a silicon volume filling factor of about 18% and an optical index of about 1.93. .

(12) The silicon nanocrystal in the SiO _X film has a diameter of about 4 nm, a density of about 1.0 × 10 ¹⁷ / cm ³ or more, and a density of 5.4 × 10 ¹⁸ / cm ³ or less, and about 5.7 nm. The method for producing a light-emitting element according to (2), wherein the distance between silicon nanocrystals is in the range of 10 nm or less.

  (13) The method for producing a light-emitting element according to (12), wherein the silicon nanocrystal has a density depending on a silicon volume filling factor and a distance between the nanocrystals.

(14) In a light emitting device using a silicon (Si) nanocrystalline silicon insulating film, a bottom electrode selected from the group consisting of a doped semiconductor and a metal, and 30 nm formed on the bottom electrode A nanocrystalline silicon-containing silicon insulating film containing a material selected from the group consisting of O, N, and C, and a thickness in the range of (nm) to 200 nanometers (nm) and on the SiO _x film A light emitting element comprising: a formed transparent metal electrode.

(15) In the above (14), the silicon insulating film is selected from the group consisting of SiO _X with X less than 2, Si ₃ N _{X with X} less than 4, and SiC _{X with X} less than 1. The light emitting element of description.

(16) The light-emitting element according to (14), wherein the nanocrystalline silicon-containing SiO _X film has a silicon volume filling factor in a range of 2.5% to 20%.

(17) The nanocrystalline silicon-containing SiO _X film has a conductivity of less than 1 × 10 ⁶ Ω / cm with respect to an electric field of at least 1 megavolt per centimeter (Mv / cm) (15) The light emitting element as described in.

(18) The nanocrystalline silicon-containing SiO _x film is greater than 0.03 watts per square meter (W / m ² ) for a film having a thickness less than 60 nm and a silicon volume filling factor of about 18%. The light emitting device according to (15), wherein the light emitting device has a turn-on voltage of less than 20 volts.

(19) The nanocrystalline silicon-containing SiO _X film has a full width at half maximum of about 150 nm and a radiation wavelength centered around 800 nm (18) The light emitting element as described in.

(20) The nanocrystalline silicon-containing SiO _X film has a thickness of about 50 nm,
For a silicon volume filling factor of about 18%, it has a spatial and charge trapping field of about 0.7 megavolts per centimeter, and for a silicon volume filling factor of about 10% or less, it is about 1.2 megavolts per centimeter. The light emitting device according to (18), which has a space electric field and a charge trapping electric field of meters.

(21) The light-emitting element according to (15), wherein the nanocrystalline silicon-containing SiO _X film has a silicon volume filling factor of about 18% and an optical index of about 1.93.

(22) The silicon nanocrystal in the SiO _X film has a diameter of about 4 nm, a density of about 1.0 × 10 ¹⁷ / cm ³ or more, and a density of 5.4 × 10 ¹⁸ / cm ³ or less, and about 5.7 nm. The light-emitting element according to (15), which has a distance between silicon nanocrystals within a range of 10 nm or less.

(23) In a light emitting method using a light emitting device, a bottom electrode selected from the group consisting of a doped semiconductor and a metal, a thickness of about 60 nanometers (nm) or less formed on the bottom electrode, and about Contains nanocrystalline silicon having a silicon volume filling factor of 18% and selected from the group consisting of SiO _X with X less than 2, Si ₃ N _{X with X} less than 4, or SiC _{X with X} less than 1 An element including a silicon film and a transparent metal electrode formed on the SiO _x film is supplied, a potential of less than 20 volts is supplied to the semiconductor electrode, and 0.03 watt per square meter (W / m ^2. A light emitting method characterized by generating a surface radiation output exceeding ² ).

[Related applications]
This application is a continuation-in-part of US patent application No. 11 / 418,273 (attorney Docket, No. SLA0963, filed on May 4, 2006) relating to nanocrystalline silicon-containing silicon oxide thin films invented by Pooran Joshi et al. It is. US patent application Ser. No. 11 / 418,273 is a continuation-in-part of the following applications.
-US Patent Application No. 11 / 327,612 (Attorney Docket, Serial No. SLA8012, filed January 6, 2006) relating to the promotion of thin film oxidation process invented by Pooran Joshi et al.
-US patent application No. 11 / 013,605 for high density plasma hydrogenation invented by Pooran Joshi et al.
US patent application Ser. No. 10 / 801,377 (filed Mar. 15, 2004) for depositing oxide with improved oxygen bonding, invented by Pooran Joshi et al.
A US patent application Ser. No. 11 / 139,726 (filed May 26, 2005) for promoting high concentration plasma oxidation of gate oxides invented by Pooran Joshi et al.
US patent application Ser. No. 10 / 871,939 (filed Jun. 17, 2004) for a high concentration plasma process for silicon thin films invented by Pooran Joshi et al.
US patent application Ser. No. 10 / 801,374 (filed on Mar. 15, 2004) relating to a method of manufacturing an oxide thin film invented by Pooran Joshi et al.
All the above-mentioned applications are incorporated as references for this application.

  The present invention can be used in the fields of light-emitting elements, optoelectronics using the same, and integrated memory devices.

DESCRIPTION OF SYMBOLS 1 Upper electrode 3 Lower electrode 100 Light emitting element 102 Bottom electrode 104 Nanocrystalline silicon containing silicon insulating film 108 Metal electrode

Claims (9)

In a method for manufacturing a light emitting device using an insulating film containing nanocrystalline silicon,
Providing a bottom electrode selected from the group consisting of doped semiconductors and metals;
A silicon insulating film containing a material selected from the group consisting of O, N, and C, having a thickness in the range of 30 nm or more and 200 nm or less on the bottom electrode by using a high-density plasma chemical vapor deposition method. Depositing, and
Annealing the silicon insulating film;
Forming a silicon nanocrystal in the silicon insulating film in accordance with the annealing treatment;
And forming a transparent metal electrode or a semiconductor electrode in the silicon nanocrystals formed nanocrystalline silicon-containing silicon insulating film in the silicon insulating film seen including,
The step of depositing the silicon insulating film includes a group consisting of SiO _X with X exceeding 0 and less than 2, Si ₃ N _{X with} X exceeding 0 and less than 4, or SiC _{X with X} exceeding 0 and less than 1. Depositing a film selected from
The process of depositing the silicon insulating film is
Introducing silane within a range of 20 SCCM or more and 30 SCCM or less;
Introducing N ₂ O within a range of 25 SCCM or more and 35 SCCM or less;
Supplying power to the upper electrode within a frequency range of 13.56 MHz or more and 300 MHz or less and a power density of 1 W / cm ² or more and 20 W / cm ² or less;
Supplying power to the lower electrode within a frequency range of 50 kHz to 13.56 MHz and a power density of 1 W / cm ² to 5 W / cm ² .
In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
In the step of annealing the silicon insulating film,
A duration in the range of 10 minutes or more and 120 minutes or less, and
When the bottom electrode is a semiconductor, at a temperature in the range of 550 ° C. or more and 600 ° C. or less,
Alternatively, when the bottom electrode is a metal, the nanocrystalline silicon-containing SiO _X film is annealed at a temperature in the range of 200 ° C. or higher and 350 ° C. or lower ,
In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
The method for producing a light-emitting element, wherein the nanocrystalline silicon-containing SiO _X film has a conductivity of less than 1 × 10 ⁶ Ω / cm with respect to an electric field of at least 1 Mv / cm . In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
2. The method of manufacturing a light emitting device according to claim 1 , wherein the nanocrystalline silicon-containing SiO _X film has a silicon volume filling rate in a range of 2.5% to 20%. In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
The nanocrystalline silicon-containing SiO _X film has a thickness of less than 60 nm and a silicon volume filling factor of 18%,
The method of manufacturing a light-emitting element according to claim 1 , wherein the light-emitting element has a turn-on voltage of less than 20 volts defined by a surface radiation output exceeding 0.03 W / m ² . The nanocrystalline silicon-containing SiO _X film, a spectrum width of the full width at half maximum 150 nm, a manufacturing method of a light emitting device according to claim 3, characterized in that it comprises a radiation wavelengths centered around 800 nm. In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
2. The method of manufacturing a light emitting device according to claim 1 , wherein the nanocrystalline silicon-containing SiO _X film has a thickness of 200 nm and has a spatial electric field and a charge trapping electric field of 0.6 Mv / cm. In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
The nanocrystalline silicon-containing SiO _X film is 50 nm thick,
For 18% silicon volume filling, it has a 0.7 Mv / cm space and charge trapping field, or for 10% or less silicon volume filling, 1.2 Mv / cm space and charge trapping The method of manufacturing a light emitting device according to claim 1 , further comprising an electric field. In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
2. The method of manufacturing a light emitting device according to claim 1 , wherein the nanocrystalline silicon-containing SiO _X film has a silicon volume filling rate of 18% and an optical index of 1.93. 3. In the step of depositing the silicon insulating film, the X is greater than 0 deposited SiO _X of less than 2 by depositing a nano-crystalline silicon containing SiO _X film,
The silicon nanocrystals in the SiO _X film have a diameter of 4 nm, a density of 1.0 × 10 ¹⁷ / cm ³ or more, a density of 5.4 × 10 ¹⁸ / cm ³ or less, and a range of 5.7 nm or more and 10 nm or less. The method for manufacturing a light-emitting element according to claim 1 , wherein the distance between the silicon nanocrystals is within. The method according to claim 8 , wherein the silicon nanocrystal has a density depending on a silicon volume filling factor and a distance between the nanocrystals.

Images