JP4927784B2 - Network relay device and network relay system - Google Patents

Description

  The present invention relates to a network relay device and a network relay system that perform data transfer, and more particularly to a technique for reducing power consumption in the network relay device and the network relay system.

  Network relay devices such as switches and routers are important devices in network construction. In recent years, with the increase in the scale of networks and the increase in the amount of data transmitted through the networks, the performance enhancement and capacity increase of network relay devices are remarkable. For example, in order to increase the availability of a network relay device, a network relay device having a redundant configuration in a transfer plane that performs network data transfer processing of the network relay device and a control plane that controls the network relay device is known. On the other hand, with higher performance and larger capacity, the power consumption of network relay devices tends to increase. From the viewpoint of system maintenance costs and environmental protection, it is a challenge to reduce power consumption of network relay devices. It has become.

  Here, in a data processing system having a multiprocessor configuration, a technique is known in which clock supply to a slave processor that is not operating is stopped, and initialization processing when restarting later is performed at high speed (Patent Document 1). In the present technology, the power consumption is reduced by stopping the clock supply to the slave processor while the master processor is operating and the slave processor is not operating. When the operation of the slave processor is resumed, the initialization program stored in the high-speed local memory is read in advance, so that a transition to a normal operation possible state is made at high speed without accessing the external memory.

JP 2001-195242 A

  However, this method has the following problems when applied to a network relay device. In a network relay device that implements a redundant configuration, information in the standby transfer plane needs to be constantly updated because it is necessary to retain information equivalent to that in the active transfer plane. For this reason, the initialization program in Patent Document 1 may not be sufficient as information for operating the standby transfer plane, which has stopped the clock supply, in the same manner as the operational transfer plane. In the network relay device, route information, FDB (Forwarding DataBase) information, and STP (Spanning Tree Protocol) status information setting information defined by IEEE802.1d are constantly updated. In order to operate in the same way as a plane, it is necessary to learn this information. Until such information is acquired, the network data cannot be relayed normally, and there is a risk of frame discard. Further, since power is consumed even when the clock supply is stopped in the network processor or the semiconductor memory, there is a case where it is not sufficient as a method for reducing the power consumption in the network processor and the semiconductor memory. These problems are not limited to network relay devices that implement a redundant configuration, but are common to network relay devices that stop or restart the operation of some or all of the transfer planes. Stopping and resuming the operation of the transfer plane can be performed, for example, to adjust the transfer capability according to a time zone or an event schedule.

  The present invention has been made to solve the above-described problem, and provides a technique for minimizing frame discard and reducing power consumption in a network relay device that is assumed to stop or restart operation of a transfer plane. For the purpose.

  The present invention can be realized as the following forms or application examples in order to solve at least a part of the above-described problems.

Application Example 1 A network relay device,
A transfer plane including a plurality of network processors for executing transfer processing for transferring received frame data;
A control plane that controls the entire network relay device and is communicably connected to the network processor;
A power supply unit for supplying power to each component of the transfer plane and the control plane;
With
The network is capable of controlling the power supply unit to be a non-operation processor by stopping power supply to any one of the plurality of network processors of the transfer plane while maintaining power supply to the control plane. Relay device.
In this way, since power is not supplied to the network processor that does not perform transfer processing in the transfer plane without affecting the control plane, the power consumption of the network relay device can be reduced.

[Application Example 2] The network relay device according to Application Example 1,
The power supply unit resumes power supply to the non-operation processor based on an instruction of the control plane,
The control plane is information for enabling the network processor to operate with respect to the network processor whose power supply has been resumed, and sets operation status information including the latest route information. .
In this way, when a failure occurs in the active network processor or when the transfer processing capacity is increased, a network processor to which power is not supplied can be changed to an operable state.

[Application Example 3] The network relay device according to Application Example 2,
The control plane is
A central control unit, and a processor control unit that controls the network processor autonomously according to the control of the central control unit, or
A control data memory connected to the processor control unit and storing the operation state information to be set in the network processor when the non-operating network processor transitions to an operation state;
Have
The network control device, wherein the processor control unit transfers and sets the operation state information stored in the control data memory to the network processor in which power supply has been resumed.
In this way, it is possible to shorten the transition time for transitioning the network processor that has stopped power supply to the correct operating state.

[Application Example 4] The network relay device according to Application Example 3,
The network relay device, wherein the operation status information is transferred to the network processor by hardware processing by a processor control unit.
In this way, the transition time for transitioning the network processor whose power supply is stopped to the correct operation state can be further shortened as compared with the case of software control.

[Application Example 5] The network relay device according to Application Example 3 or Application Example 4,
The operation status information stored in the control data memory includes command information for instructing an initial setting process of the network processor,
The network control device, wherein the processor control unit performs initial setting of the network processor according to the command information.
In this way, it is possible to shorten the time for performing the initial setting on the network processor.

[Application Example 6] The network relay device according to any one of Application Example 3 to Application Example 5,
The processor control unit is configured to reflect the update of the operation state information in the operating network processor to the operation state information stored in the control data memory, thereby bringing the non-operation processor into an operation state. A network relay device that synchronizes the contents of the operational status information to be set to the operational status information set in the operating network processor.
In this way, when restarting the operation of the network processor and the semiconductor memory whose power supply has been stopped, it is possible to quickly transition to an operation state equivalent to that of the network processor and the semiconductor memory that are already in operation.

[Application Example 7] The network relay device according to Application Example 6,
For each network processor, the processor control unit and the control data memory are provided,
The processor control unit for the non-operation processor stores the update of the operation state information in the operation processor to which power is supplied among the network processors, and is stored in the control data memory for the non-operation processor Network relay device to be reflected in the operation status information.
In this way, since the processor control and the control data memory are provided for each network processor, the non-operating processor can be quickly changed.

[Application Example 8] The network relay device according to any one of Application Example 4 to Application Example 7,
An address range in which the operation status information is set in the network processor and an address range in which the operation status information is stored in the control data memory are mapped on a one-to-one basis.
In this way, the latest control data can always be held by the control data memory having a certain capacity.

[Application Example 9] The network relay device according to Application Example 8,
The one-to-one mapping is performed by converting only the upper bits of the address in which the operation state information is set in the network processor.
In this way, the address range in which the operation state information is set in the network processor and the address range in which the operation state information is stored in the control data memory can be mapped on a one-to-one basis.

[Application Example 10] The network relay device according to any one of Application Example 3 to Application Example 9,
The network processor includes a normal operation mode mainly for the transfer process, and a high-speed setting operation mode in which a ratio of a resource spent for the setting process related to the setting of the operation state information to a resource spent for the transfer process is larger than the normal operation mode. A network relay device.
In this way, it is possible to further shorten the transition time for transitioning the network processor whose power supply has been stopped to the correct operating state.

[Application Example 11] The network relay device according to any one of Application Examples 1 to 10,
The control plane changes the transfer processing capability of the entire network relay device by changing the number of the non-operation processors and the operation processors to which power is supplied among the plurality of network processors. Network relay device.
In this way, the transfer capability of the network relay device can be optimized by changing the number of non-operation processors and operation processors. As a result, power consumption can be suppressed as a whole.

[Application Example 12] The network relay device according to Application Example 11,
And a first command issuing unit that issues a command for changing the number of the non-operation processors and the operation processors.
In this way, the network relay device can autonomously optimize the transfer capability.

[Application Example 13] The network relay device according to Application Example 11,
Furthermore, a network relay device comprising a first command receiving unit that receives from the external device a command for changing the number of the non-operation processors and the operation processors.
In this way, the network relay device can optimize transfer capability in accordance with an instruction from an external device.

[Application Example 14] The network relay device according to any one of Application Examples 1 to 13,
The transfer plane further comprises one or more semiconductor memories connected to the network processor,
The network relay device further capable of controlling the power supply to stop supplying power to at least a part of the one or more semiconductor memories while maintaining power supply to the control plane.
In this way, power is not supplied to the semiconductor memory that is not used for transfer processing in the transfer plane without affecting the control plane, so that the power consumption of the network relay device can be reduced.

Application Example 15 A network relay system having a redundant configuration using a plurality of network relay devices according to any one of Application Examples 1 to 14,
A network relay system for stopping power supply to at least a part of the network processor and the semiconductor memory in the network relay device serving as a standby system.
In this way, the power consumption of the standby network relay device can be suppressed.

[Application Example 16] The network relay system according to Application Example 15,
The transfer performance can be changed by the number of operations of the network relay device,
A network relay system that can change the number of operations by control from inside or outside the system.
In this way, the network relay system can optimize the transfer capability independently or in response to an instruction from an external device. As a result, power consumption can be suppressed as a whole system.

  The present invention can be realized in various forms. For example, the present invention can be realized as a method invention such as a control method for a network relay device or a control method for a network relay system. The present invention can also be realized in the form of a control program for a network relay device or a network relay system, a recording medium on which the control program is recorded, and the like.

  FIG. 1 is a block diagram conceptually illustrating a network relay device as an embodiment of the present invention. The network relay device 100 includes a control plane and a transfer plane. The control plane includes one or more control units (two in this embodiment) 103 that control the entire network relay device 100. The transfer plane includes one or more NIF (Network Inter Fase) units 101 (three in this embodiment) and one or more fabric units 102 (two in this embodiment). The NIF unit 101 is connected to a plurality of external network lines (not shown), and performs processing such as physical layer processing such as shaping of an electric signal for transmitting and receiving frame data and line multiplexing (for example, time division and frequency division). Execute. Further, the NIF unit 101 may perform hierarchical bandwidth control as an advanced function to add added value to the network operation.

  The fabric unit 102 relays frame data received by one NIF unit 101 to another NIF unit 101 having a destination output port. At this time, both of the two fabric units 102 may perform frame data transfer processing, or one may not operate as a standby system and the other may perform frame data transfer processing as an active system. The control unit 103 controls the entire network relay device. The control unit 103 has a redundant configuration, with one operating as an active system and the other operating as a standby system. A specific configuration for realizing such a network relay device 100 will be described below.

A. First embodiment:
FIG. 2 is a block diagram showing the configuration of the network relay device in the first embodiment. The network relay device 300 illustrated in FIG. 2 includes two control transfer units 310 and 320 and four NIF units 330. The control transfer unit 310 integrates a configuration corresponding to the above-described fabric unit 102 and a configuration corresponding to the control unit on one board.

  The control transfer unit 310 includes a central control unit 311, a processor control unit 312, a network processor 313, a semiconductor memory 314, and a power supply unit 315. The power supply unit 315 can perform logically independent control in a transfer plane that realizes a network data transfer function and a control plane that realizes operation management of the entire network relay device. The power supply unit 315 performs power supply stop control for only the transfer plane portions such as the network processor 313 and the semiconductor memory 314 under the control of the central control unit 311 and performs control that does not interfere with the control plane such as the central control unit 311 and the processor control unit 312. Is realized. Also in the conventional network relay device, the operation stop control for stopping the clock supply from the control unit to the transfer plane such as the network processor or the semiconductor memory can be performed. In the present invention, the power supply stop control is further performed from the central control unit 311 to the transfer plane whose operation is stopped via the power supply unit 315, thereby further reducing power consumption. In addition, since the power supply unit 315 logically divides internal functions, the power supply stop control for the transfer plane does not affect the operation of the control plane. Since the configuration of the other control transfer unit 320 is the same as the configuration of the control transfer unit 310 described above, description thereof is omitted.

  In the network relay device 300 shown in FIG. 2, the first control transfer unit 310 is an active system, and the second control transfer unit 320 is a standby system. It is assumed that the first control transfer unit 310 performs a transfer process for transferring the received frame of the NIF unit 330 and the second control transfer unit 320 does not perform the transfer process. In the network relay device 300, the control of the central control unit 311 of the first control transfer unit 310 stops the power supply to the transfer plane (for example, the net processor 323 and the semiconductor memory 324) of the second control transfer unit 320, Control to resume the supply of power can be performed. However, the power supply stop control and the power supply restart control for the transfer plane of the second control transfer unit 320 may be executed by the central control unit 321 of the second control transfer unit 320. When the network relay device 300 is used in an environment such as in a corporate network, the network control device having a low nighttime network usage rate and low urgency transfers the second control transfer unit 320 which is a standby system as a method of reducing power consumption. A method of stopping the power supply to the plane can be selected.

  On the other hand, in the network relay device 300 or the like in the corporate network, the received frame transfer processing may be performed by both control transfer units 310 and 320 in order to improve the performance of the network relay device 300 in a time zone when the network load is large. In the time zone when the network load is small, the second control transfer unit 320 is not operated as a standby system, and the transfer plane (for example, the network processor 323 and / or the semiconductor memory 324) of the second control transfer unit 320 is not operated. Thus, power supply stop control may be performed.

  According to the first embodiment described above, since power is not supplied to a transfer plane that has stopped operation such as a standby system, the power consumption of the network relay device 300 can be reduced.

B. Second embodiment:
FIG. 3 is a block diagram showing the configuration of the network relay device in the second embodiment. The network relay device 400 in the second embodiment is different from the network relay device 300 in the first embodiment in that control data memories 416 and 426 in the control transfer units 410 and 420 are under the control of the processor control units 412 and 422. Is added. Since other configurations are the same as those in FIG. 2, in FIG. 3, the same reference numerals as those in FIG.

  In the network relay device 400, the control data memory 416 stores control data such as register access data and memory access data issued from the central control unit 411 to the network processor 413 and the semiconductor memory 414 via the processor control unit 412. Similarly, the control data memory 426 stores control data such as register access data and memory access data issued from the central control unit 421 to the network processor 423 and the semiconductor memory 424 via the processor control unit 422. Since this control data is information for setting the operation state of the network relay device 400, it is also referred to as operation state information in this specification.

In the following description, it is assumed that the first control transfer unit 410 is an active system and the second control transfer unit 420 is a standby system. In the first control transfer unit 410 that is an active system, power is supplied to the network processor 413 and the semiconductor memory 414 in order to execute transfer processing. On the other hand, in the second control transfer unit 420 that is a standby system, supply of power to at least one of the network processor 423 and the semiconductor memory 424 is stopped.

  Here, in the active control transfer unit 410, the central control unit 411 issues control data such as path information update to the network processor 413 and the semiconductor memory 414 via the processor control unit 412. At this time, the central control unit 411 notifies the central control unit 421 of the second control transfer unit 420 of the issue of these control data via a dedicated line. Also in the standby system control transfer unit 420, the central control unit 421 issues similar control data to the processor control unit 422 in response to the notification from the central control unit 421. The processor control unit 422 converts the issued control data into a data format to be stored in the control data memory 426 and stores it in the control data memory 426. However, the central control unit 411 of the first control transfer unit 410 that is the active system may directly issue to the processor control unit 422 of the second control transfer unit 420. As a result, in the first control transfer unit 410 of the active system, the same setting content is synchronized in the control data memory in the second control transfer unit 420 in synchronization with the setting content set in the network processor 413 and the semiconductor memory 414. 426 is stored.

  In the first control transfer unit 410, when the central control unit 411 issues control data to the processor control unit 412, the processor control unit 412 sets the issued control data in the network processor 413 and the semiconductor memory 414. At the same time, it may be stored in the control data memory 416. In this way, even when the active system and the standby system are frequently switched between the first control transfer unit 410 and the second control transfer unit 420, the network processor and the semiconductor memory of each control transfer unit Settings can be synchronized. However, when it is desired to further reduce the power consumption, it is not necessary to store control data in the control data memory 416 in the first control transfer unit 410 of the active system.

  In this state, when the second control transfer unit 420 of the standby system restarts the supply of power and restarts the operation of the second control transfer unit 420, the control data stored in the control data memory 426 is saved. Use information. As a result, the transfer plane (network processor 413 and semiconductor of the active first control transfer unit 410) is compared with the transfer plane (network processor 423 and semiconductor memory 424) of the second control transfer unit 420 after the operation is resumed. The setting contents of the memory 414) can be set at high speed. Further, the processor control unit 422 may set the setting content (control data) stored in the control data memory 426 for the transfer plane by high-speed processing by hardware processing. In this way, the central control unit 421 can set the transfer plane at a higher speed than the case where the processor control unit 422 sets the contents of the control data memory 426 in the transfer plane according to software processing. In such a case, the central control unit 421 may only instruct the processor control unit 422 to start high-speed setting.

  In addition, the control data memory 426 not only quickly transitions the setting contents of the standby transfer plane to the setting contents of the active transfer plane when the operation of the standby transfer plane resumes, but also initializes the transfer plane. Sometimes it can be used. For example, a plurality of command codes for initial setting of the transfer plane may be stored in the control data memory 426. The processor control unit 422 can read these command codes and perform high-speed initial setting by hardware processing for the transfer plane according to the command codes. The command code includes, for example, a write command for reflecting the network route information and the setting contents for the network processor, a read command and a read modify write command for partially changing an existing setting value, a network processor, It includes wait commands, background job commands, etc. that realize access after the start of sequencer in the semiconductor memory. In addition, when executing the initial diagnosis and impedance adjustment at the time of initial setting execution, in order to realize read access execution result determination and retry processing in addition to write access, read compare that compares the read value with the expected value A command code such as a GOTO statement that moves to a specified address in order to execute a check or a process once executed may be prepared. By storing such a command code in the control data memory 426, the high-speed setting function of the processor control unit can be used even in the initial setting of the network processor and the semiconductor memory.

  As described above, it is possible to shorten the time until the transfer plane of the second control transfer unit 420 of the standby system that has stopped supplying power changes to a state equivalent to the transfer plane of the first control transfer unit 410 of the active system. .

  FIG. 4 is an explanatory diagram illustrating an example of control data. FIG. 4A shows communication contents of control data issued by the processor control unit 412 to the network processor 413 and the semiconductor memory 414. This control data includes an 8-bit command code indicating the execution contents of the instruction, a 32-bit target address to be controlled, and 32-bit data representing a set value. FIG. 4B shows the contents of control data stored in the control data memory 426 as the control data having the same contents as the control data shown in FIG. This control data includes only the upper 16 bits of the 32-bit target address included in the control data shown in FIG. That is, the processor control unit 422 converts the control data into control data including the upper 16-bit address of the 32-bit target address, and uses the control data as control data for storage in the control data memory 426.

  FIG. 5 is a diagram for explaining the mapping between the address space of the target address of the transfer plane and the address space of the control data memory. The processor control unit 422 determines an address on the control data memory 426 that stores control data for storage in the control data memory 426. The lower 16 bits of the address on the control data memory 426 are made the same as the lower 16 bits of the 32-bit target address. The upper 16 bits of the address on the control data memory 426 is a predetermined 16-bit address different from the upper 16 bits of the target address. In the example shown in FIG. 5, control data related to user setting value information whose target address is 0x1234 — 0FF3 for the transfer plane (network processor 423 and semiconductor memory 424) is stored in 0x0001 — 0FF3 in the control data memory 426. Control data related to FDB information whose target address is 0x1235 — 0FE1 for the transfer plane (network processor 423 and semiconductor memory 424) is stored in the control data memory 426 at 0x0002 — 0FE1. That is, a part of the target address (lower 16 bits in this embodiment) is mapped to a part of the storage address in the control data memory 426 (lower 16 bits in this embodiment).

  Mapping the control data in this way has the following advantages. Assume that the processor control unit 422 sequentially stores the control data in the control data memory 426 every time the control data is issued. Then, since the data area is used while increasing the address of the control data memory 426 for each control data, the number of control data that can be stored can be limited according to the capacity of the control data memory 426. However, when a part of the target address of the transfer plane is mapped to the address space of the control data memory 426 as described above, the control data for the same target address is stored in the control data memory 426 at the same address. As a result, as for the control data for the same target address, only the latest control data is always stored in the control data memory 426, and the latest control data is deleted. Note that when the latest control data is stored in the control data memory 426, part or all of the control data is rewritten and stored. As a result, the latest control data can always be stored in the control data memory 426 without being limited by the number of times control data is issued. Therefore, the setting contents of the transfer plane in the first control transfer unit 410 and the setting contents stored in the control data memory 426 in the second control transfer unit 420 are synchronized without being limited by the number of times control data is issued. Can be made. Further, when the processor control unit 422 reads out the control data from the control data memory 426, the upper 16 bits stored in the stored control data and the lower 16 bits of the address of the control data memory 426 in which the control data is stored are stored. In combination, the 32-bit target address for the transfer plane of the control data can be easily recognized.

  Here, when the transfer process is normally performed, the network processor 423 and the semiconductor memory 424 use resources used for register access and memory access related to control data, and register access and memory access for network data transfer process. The resource to be determined is determined by time-sharing all resources. Therefore, the effective speed at which the processor control unit 422 sets the control data stored in the control data memory 426 in the network processor 423 and the semiconductor memory 424 is higher than the theoretical speed that is simply calculated from the operating frequency and the data transfer bus width. And a small value. In the present embodiment, the high-speed setting mode in which resources are allocated with priority over the normal transfer processing with respect to the control data setting for the network processor 423 and the semiconductor memory 424 by the processor control unit 422 is referred to as the normal transfer processing mode. It may be prepared separately. In this way, the speed of setting work for the transfer plane by the processor control unit 422 can be improved. For example, the network processor 423 may not perform the frame data transfer process during the period in which the processor control unit 422 sets the control data in the high-speed setting mode. That is, in the high-speed setting mode, in order to give priority to the control data processing, the time division control of the frame data transfer processing and the control data processing may be assigned only to the control data processing.

C. Third embodiment:
FIG. 6 is a block diagram showing the configuration of the network relay device 600 in the third embodiment. In the third embodiment, among the functions of the control transfer unit in the first and second embodiments, the central control unit and the others are configured separately. That is, the network relay device 600 corresponds to the other functions of the central control units 601 and 602 corresponding to the central control units 411 and 421 and the control transfer units 310 and 320 in the second embodiment, and the fabric units 610, 620, 630 are provided as separate bodies. Since the internal configuration of the fabric unit 610 is the same as the configuration other than the central control unit shown in FIG. 3, the same reference numerals in FIG. The same name is used and its description is omitted.

  In the network relay device 600, the NIF unit 650 distributes the load to the fabric units 610 to 630. The transfer performance of the entire network relay device 600 varies depending on the number of operations of at least some of the network processors 613, 623, 633 and the semiconductor memories 614, 624, 634 of the fabric units 610-630. The network relay device 600 has a management server (not shown) as an internal or external device of the network relay device 600 in order to optimize transfer performance against a load caused by network traffic. The management server issues a command for variably controlling the number of transfer plane operations (that is, the number of circuits operating to perform transfer processing among the network processors 613, 623, 633 and the semiconductor memories 614, 624, 634). . The network relay device 600 changes the transfer performance by changing the number of transfer plane operations in accordance with these variation control commands. When the management server exists as an external device outside the network relay device, the variation control command is transmitted as a control frame from the management server to the network relay device. The management server measures the load of the network relay device 600 and determines the optimum performance. As a determination method, a feedback control based on a load measurement result inside the network relay device 600, a prediction control based on statistical data and frequency analysis, and a time zone in which traffic known in network management is reduced or increased are set. Predictive control by things can be considered. As predictive control, for example, a schedule of events that can be predicted in advance among events that may cause fluctuations in network traffic, such as soccer World Cup and Olympics, can be described in the event calendar and set as a schedule in the management server. good. Among events that occur unexpectedly, such as disasters, incidents, and accidents, and that may cause fluctuations in network traffic, events that cannot be predicted in advance are relayed to the network as incident trigger generation processing by management server programs or administrator operations. It is assumed that the transfer performance of the network relay device 600 may be controlled by issuing a variation control command to the device 600. In the network relay device 600, the control data issued when the route information is updated is stored in the control data memory in the fabric unit in which power supply to the network processor and the semiconductor memory is stopped as a standby system. And The active fabric unit may or may not store the same as the network relay device 400 in the second embodiment.

  Also in the third embodiment described above, the same operations and effects as the network relay device 400 in the second embodiment are produced. That is, the power consumption can be suppressed to a low level according to the transfer processing performance of the network relay device 600. In addition, the transfer plane can quickly transition from a state where power supply is stopped to an operable state.

D. Fourth embodiment:
FIG. 7 is a block diagram showing the configuration of the network relay system in the fourth embodiment. The network relay system 700 according to the fourth embodiment is an example of a system that virtually operates as a single device using a plurality of network relay devices. In the network relay system 700, a redundant configuration is realized by using two network relay devices 710 and 720. The specific configurations of the network relay devices 710 and 720 may be any of the network relay device 300 in the first embodiment, the network relay device 400 in the second embodiment, and the network relay device 600 in the third embodiment. good.

  Other network relay apparatuses 740 and 750 connected to the network relay system 700 have redundant lines, and are connected to the first network relay apparatus 710 and the second network relay apparatus 720, respectively. The first network relay device 710 can operate as a part of or all of the devices as an active system, or the entire device as a standby system. The same applies to the second network relay device 720. . The first network relay device 710 and the second network relay device 720 can transfer control data between the control planes. When all of the first network relay devices 710 are standby systems, the control frame cannot be received because power supply to the transfer plane is stopped. For this reason, a dedicated line for transferring only control data between the control planes is provided, and the second network relay device 720 in the active system and the first network relay device 710 in the standby system are synchronized using this dedicated line. .

  On the other hand, a part of the transfer plane of the first network relay device 710 and a part of the transfer plane of the second network relay device 720 are active, and the other part of the transfer plane of the first network relay device 710. If the other part of the transfer plane of the second network relay device 720 is an active system, the dedicated line need not be provided. For example, the network relay devices 710 and 720 may change the processing performance on a line basis. In this case, power is supplied to at least some transfer planes of the first network relay device 710, and power is supplied to at least some transfer planes of the second network relay device 720. That is, both the first network relay device 710 and the second network relay device 720 can receive the frame. Therefore, when the network relay devices 710 and 720 both receive a control frame including control data for updating network route information, STP status information, etc., the control plane issues control data to the transfer plane. . At this time, the normal data frame received in the standby system may be discarded or transferred according to the specifications of the network relay device.

  In the fourth embodiment, when the first network relay device 710, which is a standby system, transitions to a state equivalent to that of the active second network relay device 720, the same processing as in the second embodiment is performed. And

  Further, a part of the first network relay device 710 may be a standby system and the other part may be an active system. That is, as described above, both of the network relay apparatuses 710 and 720 may operate as an active system. In this case, the standby part in the network relay device is processed in the same manner as in the second embodiment.

  In the fourth embodiment described above, the same operations and effects as in the second embodiment are produced. That is, the power consumption can be suppressed to a low level according to the transfer processing performance of the network relay system 700. Further, the transfer plane of the network relay system 700 can quickly transition from a state where power supply is stopped to an operable state.

E. Example 5:
FIG. 8 is a block diagram showing the configuration of the network relay system in the fifth embodiment. The network relay system 800 according to the fourth embodiment is another example of a system that virtually operates as a single device using a plurality of network relay devices. The network relay system 800 includes a first network relay device group 810 and a second network relay device group 820. The first network relay device group 810 includes a plurality of network relay devices 811 to 813. The second network relay device group 820 includes a plurality of network relay devices 821 to 823. The specific configurations of these network relay devices 811 to 813 and 821 to 823 are the network relay device 300 in the first embodiment, the network relay device 400 in the second embodiment, and the network relay device 600 in the third embodiment. Any of these may be used.

  The first network relay device group 810 functions as a fabric node, and the second network relay device group 820 functions as a circuit node. That is, when the first network relay device group 810 is regarded as a fabric part and the second network relay device group 820 is regarded as an NIF part, the first network relay device group 810 is partly or entirely operated. The network relay system 800 functions by operating. The second network relay device group 820 is connected to another network relay device (not shown).

  Also for the network relay system 800, the power consumption of the entire network relay system 800 can be reduced by stopping the supply of power to the transfer plane of the network relay device as a standby system. In addition, the standby network relay device can quickly transition from the power stop state to the operation state by applying the same mechanism as in the second embodiment. Further, of the N (N is an integer of 2 or more) network relay devices constituting the first network relay device group 810, M (M is an integer of 2 to N) has the redundant configuration shown in FIG. May be built.

  The network relay devices constituting the network relay systems 700 and 800 in the fourth and fifth embodiments are similar to the network relay devices in the first to third embodiments in the transfer plane (network processor, semiconductor memory) inside the device. The transfer performance may be changed by changing the number of operations. For example, the number of transfer plane operations may be changed in accordance with the optimum performance of the network relay systems 700 and 800. In this case, similarly to the network relay device in the first to third embodiments, power consumption can be reduced by stopping the supply of power to the non-operating transfer plane. In such a case, a management server is provided as an internal or external device of any of the network relay devices constituting the network relay systems 700 and 800, and the transfer performance is controlled by controlling the number of transfer plane operations of the management server. Also good.

F. Example 6:
FIG. 9 is a block diagram illustrating a configuration of the network relay device 900 according to the sixth embodiment. The network relay device 900 in the sixth embodiment is different from the network relay device 600 in the third embodiment in that the network processor and the semiconductor memory provided in the fabric unit in the third embodiment are the NIF in the present embodiment. It is a point provided in the part. That is, the network relay device 600 in the third embodiment holds the route information and the STP status information in the fabric units 610 to 630 and performs the route search and the STP protocol processing. In the network relay device 600, the NIF units 950 and 960 hold route information and STP status information, and perform route search and STP protocol processing.

  The network relay device 900 in the sixth embodiment includes an active central control unit 910, a standby central control unit 920, an active fabric unit 930, a standby fabric unit 940, an active NIF unit 950, and a standby system. NIF unit 960. The active NIF unit 950 includes a processor control unit 952, a network processor 953, a semiconductor memory 954, a power supply unit 955, and a control data memory 956. Similarly, the standby NIF unit 960 includes a processor control unit 962, a network processor 963, a semiconductor memory 964, a power supply unit 965, and a control data memory 966. Like the first to third embodiments, the power supply unit 955 has a logically independent configuration, and can control power supply and supply stop for only the transfer plane without affecting the control plane. In addition, resumption of power supply can be controlled. Therefore, the power consumption of the entire network relay device 900 can be reduced by stopping the supply of power to the transfer plane (for example, the network processor 963 and the semiconductor memory 964) of the standby NIF unit 960 that is not operating.

  In the network relay device 900 according to the sixth embodiment, the control data issued from the active central controller 910 is stored in the control data memory 966 for the processor controller 962 of the standby NIF unit 960. The standby NIF unit 960 also holds information equivalent to that of the active NIF unit 950. As a result, the transfer plane (for example, the network processor 963 and the semiconductor memory 964) of the standby NIF unit 960 that has stopped power supply is replaced with the transfer plane (for example, the network processor 953 and the semiconductor memory 954) of the active NIF unit 950. The time until transition to the equivalent state can be shortened.

  By the way, in link aggregation defined in IEEE801.3ad, a plurality of lines are virtually operated as one line. In link aggregation, the line speed is improved by using a plurality of lines, but at the same time, a redundant configuration can be realized in units of lines. Therefore, in an environment that does not require a line speed, a configuration such as an active line and a standby line is realized. In the network relay device 900, for example, the active line may be connected to the active NIF unit 950 and the standby line may be connected to the standby NIF unit 960.

  Also, the network relay system 700 (FIG. 7) of the fourth embodiment can be configured by using the network relay device 900. In such a case, a redundant configuration of the line and the network relay device can be realized by using link aggregation between the first network relay device 710 and the second network relay device 720 in the fourth embodiment. Also in this case, the network relay device 900 of the sixth embodiment is applied to the network relay system 700 of the fourth embodiment, so that the transfer plane of the standby NIF unit of the standby network relay device can be used as the operation of the active network relay device. It is possible to shorten the time until the transition to the state equivalent to the transfer plane of the system NIF unit.

G. Variations:
・ First modification:
In each of the above embodiments, a semiconductor memory subordinate to the network processor is provided. However, if the built-in memory built in the network processor is sufficient, the semiconductor memory may not be provided.

・ Second modification:
In the above embodiment, the supply of power to the network processor and the semiconductor memory is stopped among the transfer planes that do not need to operate. However, the supply of power to the other components constituting the transfer plane is stopped. Also good.

・ Third modification:
In the second embodiment, the lower 16 bits of the target address of the control data are mapped to the lower 16 bits of the address space of the control data memory 426, and the upper 16 bits of the target address are part of the control data. To save. However, the lower number of bits to be mapped and the upper number of bits to be stored as part of the control data can be arbitrarily set. For example, the lower 12 bits of the target address may be mapped to the lower 12 bits of the address space of the control data memory 426, and the upper 20 bits of the target address may be stored in the control data memory 426 as part of the control data. Also, the number of bits for such mapping may be different depending on the type of control data.

-Fourth modification:
In the second embodiment, it is preferable that the target address of the control data and the address space of the control data memory 426 have a one-to-one correspondence. As described above, the target address is partially mapped in the address space of the control data memory 426. However, the present invention is not limited to this. For example, the processor control unit 422 may hold a table indicating the correspondence between the target address of the control data and the address space of the control data memory 426.

-5th modification:
In the above embodiment, the supply of power is stopped for both the network processor and the semiconductor memory of the transfer plane that does not require operation, but the supply of power may be stopped for only one of them.

-6th modification:
In the above embodiment, a part of the configuration realized by hardware may be replaced by software, and conversely, a part of the configuration realized by software may be replaced by hardware. For example, in the above embodiment, the central control unit may be configured by an ASIC, or may be configured by a general-purpose processor and a program.

  As mentioned above, although this invention was demonstrated based on the Example and the modification, Embodiment mentioned above is for making an understanding of this invention easy, and does not limit this invention. The present invention can be changed and improved without departing from the spirit and scope of the claims, and equivalents thereof are included in the present invention.

1 is a block diagram conceptually illustrating a network relay device as an embodiment of the present invention. The block diagram which shows the structure of the network relay apparatus in 1st Example. The block diagram which shows the structure of the network relay apparatus in 2nd Example. Explanatory drawing which shows an example of control data. The figure explaining the mapping of the address space of the target address of a transfer plane, and the address space of a control data memory. The block diagram which shows the structure of the network relay apparatus in 3rd Example. The block diagram which shows the structure of the network relay system in 4th Example. The block diagram which shows the structure of the network relay system in 5th Example. The block diagram which shows the structure of the network relay apparatus in 6th Example.

Explanation of symbols

100, 300, 400, 600, 900 ... Network relay device 101, 330, 650, 950 ... NIF unit 102, 610, 620, 630, 930, 940 ... Fabric unit 310, 320, 410, 420 ... Control transfer unit 311, 321, 411, 421, 601, 602... Central control unit 312, 322, 412, 422, 612, 622, 632... Processor control unit 313, 323, 413, 423, 613, 623, 633 ... Network processor 314, 324, 414, 424, 614, 624, 634 ... Semiconductor memory 315, 325, 415, 425, 615, 625, 635 ... Power supply unit 416, 426, 616, 626, 636 ... Control data memory 700, 800 ... Network relay system

Claims (19)

A network relay device,
A transfer plane including a plurality of network processors for executing transfer processing for transferring received frame data;
A control plane that controls the entire network relay device and is communicably connected to the network processor;
A power supply unit for supplying power to each component of the transfer plane and the control plane;
With
The network is capable of controlling the power supply unit to be a non-operation processor by stopping power supply to any one of the plurality of network processors of the transfer plane while maintaining power supply to the control plane. Relay device. The network relay device according to claim 1,
The power supply unit resumes power supply to the non-operation processor based on an instruction of the control plane,
The control plane is information for enabling the network processor to operate with respect to the network processor whose power supply has been resumed, and sets operation status information including the latest route information. . The network relay device according to claim 2,
The control plane is
A central control unit, and a processor control unit that controls the network processor autonomously according to the control of the central control unit, or
A control data memory connected to the processor control unit and storing the operation state information to be set in the network processor when the non-operating network processor transitions to an operation state;
Have
The network control device, wherein the processor control unit transfers and sets the operation state information stored in the control data memory to the network processor in which power supply has been resumed. The network relay device according to claim 3,
The network relay device, wherein the operation status information is transferred to the network processor by hardware processing by a processor control unit. The network relay device according to claim 3 or 4, wherein
The operation status information stored in the control data memory includes command information for instructing an initial setting process of the network processor,
The network control device, wherein the processor control unit performs initial setting of the network processor according to the command information. A network relay device according to any one of claims 3 to 5,
The processor control unit is configured to reflect the update of the operation state information in the operating network processor to the operation state information stored in the control data memory, thereby bringing the non-operation processor into an operation state. A network relay device that synchronizes the contents of the operational status information to be set to the operational status information set in the operating network processor. The network relay device according to claim 6,
For each network processor, the processor control unit and the control data memory are provided,
The processor control unit for the non-operation processor stores the update of the operation state information in the operation processor to which power is supplied among the network processors, and is stored in the control data memory for the non-operation processor Network relay device to be reflected in the operation status information. A network relay device according to any one of claims 4 to 7,
An address range in which the operation status information is set in the network processor and an address range in which the operation status information is stored in the control data memory are mapped on a one-to-one basis. The network relay device according to claim 8,
The one-to-one mapping is performed by converting only the high-order bits of an address in which the operation state information is set in the network processor. A network relay device according to any one of claims 3 to 9,
The network processor includes a normal operation mode mainly for the transfer process, and a high-speed setting operation mode in which a ratio of a resource spent for the setting process related to the setting of the operation state information to a resource spent for the transfer process is larger than the normal operation mode. A network relay device. The network relay device according to any one of claims 1 to 10,
The control plane changes the transfer processing capability of the entire network relay device by changing the number of the non-operation processors and the operation processors to which power is supplied among the plurality of network processors. Network relay device. The network relay device according to claim 11,
And a first command issuing unit that issues a command for changing the number of the non-operation processors and the operation processors. The network relay device according to claim 11,
Furthermore, a network relay device comprising a first command receiving unit that receives from the external device a command for changing the number of the non-operation processors and the operation processors. The network relay device according to any one of claims 1 to 13,
The transfer plane further comprises one or more semiconductor memories connected to the network processor,
The network relay device further capable of controlling the power supply to stop supplying power to at least a part of the one or more semiconductor memories while maintaining power supply to the control plane. A network relay system having a redundant configuration using a plurality of network relay devices according to any one of claims 1 to 14,
A network relay system for stopping power supply to at least a part of the network processor and the semiconductor memory in the network relay device serving as a standby system. The network relay system according to claim 15, wherein
The transfer performance can be changed by the number of operations of the network relay device,
A network relay system that can change the number of operations by control from inside or outside the system. A network relay device,
A plurality of LSIs for executing transfer processing for transferring received frame data, including a transfer plane including LSIs specialized for packet processing ;
A control plane that controls the entire network relay device and is communicably connected to the LSI;
A power supply unit for supplying power to each component of the transfer plane and the control plane;
With
The network relay is capable of controlling the power supply unit to be a non-operating LSI by stopping the power supply to any of a plurality of LSIs of the transfer plane while maintaining the power supply to the control plane apparatus.   The network relay device according to claim 17,
  The power supply unit resumes power supply to the non-operating LSI based on a command of the control plane,
  The network relay device, wherein the control plane sets operation status information including the latest path information, which is information for enabling the LSI to operate with respect to the LSI for which power supply has been resumed.   The network relay device according to claim 18, wherein
  The control plane is
  A central control unit, an LSI control unit for controlling the LSI autonomously according to the control of the central control unit, or
  A control data memory connected to the LSI control unit and storing the operation state information to be set in the LSI when the non-operating LSI makes a transition to the operation state;
  Have
  The network control device, wherein the LSI control unit transfers and sets the operation state information stored in the control data memory to the LSI for which power supply has been resumed.

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