JP4916532B2 - Switching power supply - Google Patents

Description

  The present invention relates to a synchronous rectification switching power supply that can be used in various electronic devices.

  A circuit diagram of a conventionally known switching power supply device is shown in FIG. In the figure, reference numeral 1 denotes a transformer that insulates the input side from the output side. Reference numeral 2 denotes a MOS FET as a main switching element. The transformer 1 includes a primary winding 1A, a secondary winding 1B, and a voltage detection winding. 1C, the first drive winding 1D and the second drive winding 1E are electromagnetically coupled. A series circuit of the primary winding 1A of the transformer 1 and the FET 2 is connected between the input terminals 3A and 3B to which the DC input voltage Vin is applied. In addition, an input capacitor 4 for smoothing the input voltage Vin is connected between the input terminals 3A and 3B.

  On the primary side of the transformer 1, a control circuit 5 that supplies a pulse drive signal to the gate of the FET 2 is provided. The control circuit 5 indirectly detects the fluctuation of the output voltage Vout described later by the voltage generated in the voltage detection winding 1C, and variably controls the conduction width of the pulse drive signal according to the detection result. It also includes a function as a protection circuit that protects each element in the apparatus by minimizing the conduction width of the pulse drive signal during a short circuit or the like, or stopping the pulse drive signal itself.

  On the other hand, the secondary winding of the transformer 1 includes a MOS type FET 11 as a rectifying side synchronous rectifying element, a MOS type FET 12 as a commutating side synchronous rectifying element, a choke coil 13, and a smoothing capacitor 14. A synchronous rectifier circuit 15 as a circuit is connected. More specifically, in the synchronous rectification circuit 15, the drain of the FET 12 is connected to the dot side terminal of the secondary winding 1B, and the drain of the FET 11 is connected to the non-dot side terminal of the secondary winding B. Is connected to one end of the choke coil 13 and a smoothing capacitor 14 is connected between the drain of the FET 12 and the other end of the choke coil 13. Then, output terminals 16A and 16B are connected to both ends of the smoothing capacitor 14 which is an output terminal of the synchronous rectifier circuit 15, and a desired output voltage Vout is supplied from the output terminals 16A and 16B to a load (not shown). It has become.

  Further, in order to switch the FETs 11 and 12 of the synchronous rectification circuit 15 in synchronization with the FET 2, here, a rectification side drive circuit 17 that drives the FET 11 on, a rectification side off circuit 18 that turns off the FET 11, and an FET 12 Is provided with a commutation side drive circuit 19 that drives the FET 12 and a commutation side off circuit 20 that turns the FET 12 off. The rectification side drive circuit 17 is configured by connecting a series circuit of a resistor 62, the drive winding 1E, and a backflow prevention diode 22 between the gate and source of the FET 11, and the commutation side drive circuit 19 The series circuit of the backflow preventing diode 23 and the drive winding 1D is connected between the gate and source of the FET 12. The rectifying side off circuit 18 is constituted by a parallel circuit of a diode 24 connected between the gate of the FET 11 and the dot side terminal of the secondary winding 1B, and a resistor 25 and a diode 26 connected between the gate and source of the FET 11. Is done.

  In this conventional example, the FET 2 is switched by a pulse drive signal from the control circuit 5 so that the input voltage Vin is intermittently applied to the primary winding 1A of the transformer 1, thereby inducing the secondary winding 1B. As the voltage is rectified and smoothed by the synchronous rectifier circuit 15, a desired output voltage Vout is supplied from the output terminals 16A and 16B to the load.

  Specifically, when the FET 2 is turned on, a positive voltage is induced at the dot side terminals of the secondary winding 1B and the drive windings 1D and 1E, and the diode 22 of the rectifying side drive circuit 17 is turned on. To do. Therefore, a voltage is applied between the gate and source of the FET 11 from the drive winding 1E and the FET 11 is turned on, and the charge stored between the gate and source of the FET 12 is quickly transferred by the commutation-side off circuit 20 quickly. The FET 12 can be turned off at a high speed at the same time as the discharge and the FET 2 are turned on.

  When the FET 2 is turned off, the diode 23 of the commutation side drive circuit 19 is turned on because a positive voltage is induced at the non-dot side terminals of the secondary winding 1B and the drive windings 1D and 1E. On the other hand, the diode 22 of the rectifying side driving circuit 17 is turned off. Therefore, a voltage is applied between the gate and source of the FET 12 from the drive winding 1D, the FET 12 is turned on, and the electric charge previously stored between the gate and source of the FET 11 is quickly discharged by the rectifying side off circuit 18. And FET11 can be turned off at high speed simultaneously with FET2 turning off.

  By the way, in the conventional example shown in FIG. 11, for example, when a plurality of power supply devices are connected in parallel to a load, a current is supplied to the output terminals 16A and 16B of the specific power supply device due to the potential difference of the output voltage Vout between the power supply devices. As a result, the current in the choke coil 13 is always in a negative level (the direction in which the choke coil 13 flows from the output terminal 16A to the output terminal 16B). As a result, no current flows through the body diode connected between the drain and source of the FET 12, and the cathode potential of the diode 24 constituting the rectifying side off circuit 18 becomes higher than the source potential of the FETs 11 and 12. Since it is turned off, the charge accumulated between the gate and source of the FET 11 cannot be quickly discharged (discharged only by the resistor 25), and the FET 11 continues to be turned on for a longer period than the original. As a result, after the FET 11 is turned off, the flyback voltage applied between the drain and source of the FET 11 becomes high, and abnormal oscillation occurs in the secondary side of the transformer 1 over time, which may exceed the rated voltage of the element. In addition, when the FET 2 is completely turned off when the power supply is stopped, when the FETs 11 and 12 are alternately turned on, the energy is reversely transmitted to the primary side of the transformer 1 and the FETs 2 and 2 are turned on. 11 or 12 due to overvoltage resistance, or damage to the input power supply connected between the input terminals 3A and 3B.

  FIG. 12 and FIG. 13 show operation waveforms of respective parts in which the states before and after such abnormal oscillation occurs are measured. In FIG. 12, FIG. 12 shows a state just before abnormal oscillation occurs, and FIG. 13 shows a state after abnormal oscillation occurs. In both figures, Vgs2 indicates the gate-source voltage of the FET2, Vds2 indicates the drain-source voltage of the FET2, and Vgs11 indicates the gate-source voltage of the FET11.

  As is apparent from the actual measurement results, when the state before abnormal oscillation occurs, even if the FET 2 shifts from on to off, the gate-source voltage Vgs11 of the FET 11 does not quickly drop to 0V, The drain-source voltage Vds2 of the minute FET 2 and thus the flyback voltage generated in the secondary winding 1B increases. When abnormal oscillation occurs over time, this flyback voltage further increases and exceeds the rating of each element in the power supply device.

  As a switching power supply device that solves such a problem, another conventional example as shown in FIG. Here, the rectifying side drive circuit 17 and the commutation side drive circuit 19 are connected to the common drive winding 1E, and the FETs 11 and 12 are alternately turned on using the voltage induced in the drive winding 1E. Have. Further, the rectification-side off circuit 18 that turns off the FET 11 at high speed has a function of distributing the charge accumulated in the gate of the FET 11 from the Zener diode 27 to the gate of the FET 12 at the moment when the FET 2 is turned off. .

  The rectification side drive circuit 17 is configured by connecting a series circuit of a capacitor 21, a drive winding 1E, and a backflow prevention diode 22 between the gate and the source of the FET 11, and the commutation side drive circuit 19 includes: A capacitor 21, a drive winding 1E, and a Zener diode 27 are connected between the gates of the FETs 11 and 12. In addition to the configuration of the commutation side drive circuit 19, the rectification side off circuit 18 has a drain connected to a connection point between the drive winding 1 </ b> E and the capacitor 21, and a source connected to the source of the FET 11. FET 29 as a switching element and FET 30 as a second switching element having a drain connected to the gate of FET 11 and a source connected to the source of FET 11, and the gates of these FETs 29, 30 are both Directly connected to the gate of the FET 12.

  The operation of the circuit shown in FIG. 14 is disclosed in Cited Document 1 and will not be described in detail here. However, the discharge path of the FET 11 is not connected to the dot-side terminal of the secondary winding 1B, and the FET 29 , 30 can be turned on, the gate charge of the FET 11 can be discharged quickly, so that the FET 11 can be turned off quickly even when an external voltage is applied from the output terminals 16A, 16B, thus eliminating the above-mentioned problems. Can do.

Japanese Patent No. 3944126

  By the way, in the circuit of FIG. 14, if the FET 12 is turned off before the FET 11 is turned on due to the operation of the commutation-side off circuit 20, the FETs 11 and 12 are affected by the leakage inductance of the transformer 1 and the pattern wiring. Ringing occurs in the source potential. Thereafter, when the same ringing occurs in the voltage generated between the drive windings 1E when the FET 11 is turned on, the ringing also occurs in the gate of the FET 29, and in some cases, the FET 29 may be turned on. is there.

  In particular, since the FET 29 uses an element that is relatively small and has a low withstand voltage, many of them have a low threshold Vth at which drain current flows. Moreover, when the temperature rises, the threshold value Vth of the FET 29 is further lowered, and even with some ringing, the FET 29 is easily turned on, which causes a problem in using the circuit of FIG.

  FIG. 15 shows the gate-source voltage Vgs29 of the FET 29 in the circuit of FIG. As is clear from the figure, the gate-source voltage of the FET 2 becomes L (low) level, and even when the FET 11 shifts to the ON period, the voltage Vgs29 accompanying the ringing is generated between the gate-source of the FET 29. If the FET 29 is turned on, a phenomenon that electric charges are discharged from the gate of the FET 11 occurs. If this happens, the FET 11 cannot be driven sufficiently, causing a reduction in efficiency as a power supply device and a large fluctuation in the output voltage Vout.

  The present invention has been made paying attention to the above problems, and at the same time when the main switching element is turned off, the rectifying side synchronous rectifying element can be quickly turned off, and the rectifying side synchronous rectifying element is turned on. An object of the present invention is to provide a switching power supply device that can prevent the switch element from malfunctioning.

  In order to achieve the above object, the switching power supply device of the present invention includes a main switching element on the primary winding side of the transformer, and a rectifying side synchronous rectifying element and a commutation side synchronous rectifying device on the secondary winding side of the transformer. And a control circuit for supplying a pulse drive signal to the main switching element, and the rectifying side synchronous rectification element is turned off in synchronization with the main switching element turning off. And a commutation side drive circuit for driving the commutation side synchronous rectification element to be turned on in synchronization with the main switching element being turned off. The flow side drive circuit has a configuration for generating a drive signal for turning on the commutation side synchronous rectification element from a drive winding provided in the transformer, A capacitive element that level-shifts the voltage generated at one end of the drive winding, and a switch element that receives the level-shifted voltage as a switch drive signal, and the main switching element is turned off as the main switching element is turned off. When the switch element is turned on, the charge accumulated in the control terminal of the rectifier side synchronous rectifier element can be discharged. When the switch element is turned off, the potential of the switch element control terminal is set to the rectifier side synchronous rectifier element. And a malfunction prevention circuit that lowers the potential at the connection point of the commutation side synchronous rectifier.

  In this case, it is preferable to further include a resistor that is connected to the capacitive element and adjusts ringing generated at the control terminal of the switch element together with the capacitive element.

  Instead or in addition, a rectifying side drive for driving the rectifying side synchronous rectifying element to be turned on using a voltage generated in the secondary winding of the transformer in synchronization with the main switching element being turned on. A circuit may be provided.

  Further, instead of or in addition to them, during operation of the control circuit, a potential higher than the connection point of the rectifying side synchronous rectifying element and the commutation side synchronous rectifying element is generated, and the operation of the control circuit is stopped. In some cases, a voltage generation circuit that holds the switch element in an on state by the generated potential may be provided.

  Furthermore, an inductive element may be connected in series with the rectifying side synchronous rectifying element.

  In this case, it is preferable to further include a commutation-side off circuit that detects a current flowing through the inductive element and turns off the commutation-side synchronous rectification element when the current exceeds a certain value.

  According to the switching power supply device of the present invention, when the main switching element is turned off, the voltage generated at one end of the drive winding rises gently, but this voltage is not supplied to the switching element as it is, but by the capacitive element. Since this is level-shifted upward and supplied to the switch element as a switch drive signal, the switch element is turned on almost at the same time as the main switching element is turned off, and is accumulated in the control terminal of the rectifying side synchronous rectifier element. Discharge the charge quickly. Therefore, the main switching element can be turned off simply by adding a capacitive element to the drive winding by using the drive winding of the commutation side drive circuit that originally drives the commutation side synchronous rectifier element on. At the same time, the rectifying side synchronous rectifying element can be quickly turned off.

  In addition, when the main switching element is turned on and the voltage generated at one end of the drive winding is lowered and the switch element is turned off, the potential of the control terminal of the switch element is changed to the rectifying side synchronous rectifying element and the commutation side. It becomes lower than the potential at the connection point of the synchronous rectifying element. Therefore, even when large ringing occurs at the control terminal of the switch element, the switch element does not turn on, and the switch element can be reliably prevented from being turned on by mistake.

  In the present invention, it is preferable to have a voltage adjustment circuit for adjusting ringing generated at the gate of the switch element, so that the voltage level of ringing generated at the gate of the switch element can be adjusted while the switch element is off.

  If the rectification side synchronous rectification element can be driven on using the voltage generated in the secondary winding of the transformer without having to provide a driving winding, the drive winding is omitted and the transformer structure Can be simplified.

  The voltage generation circuit generates a potential higher than the connection point of the rectifying side synchronous rectifying element and the commutation side synchronous rectifying element during operation of the control circuit, and uses the generated potential when the control circuit stops operating. The switch element is kept on. As a result, when the control circuit and the power supply device are stopped, the charge accumulated in the control terminal of the rectifying side synchronous rectifying element is quickly discharged, and the rectifying side synchronous rectifying element is kept in the OFF state. The self-oscillation operation in which the flow side synchronous rectifier elements are alternately turned on can be reliably avoided.

  Further, by adding an inductive element, ringing generated in the switch element can be effectively suppressed while preventing a large current from flowing on the secondary side of the transformer, and malfunction of the switch element can be avoided.

  Furthermore, the commutation side synchronous rectification element can be reliably turned off by using the current flowing through the inductive element.

It is a circuit diagram of a switching power supply device showing Example 1 of the present invention. It is a wave form diagram which shows operation | movement of each part same as the above. It is a circuit diagram of the switching power supply device which shows Example 2 of the present invention. It is a circuit diagram of the switching power supply device showing Example 3 of the present invention. It is a circuit diagram of the switching power supply device which shows Example 4 of the present invention. It is a circuit diagram of the switching power supply device which shows Example 5 of this invention. It is a circuit diagram of the switching power supply device which shows Example 6 of this invention. It is a circuit diagram of the switching power supply device which shows Example 7 of this invention. FIG. 9 is a waveform diagram obtained by actually measuring the operation of each unit in the circuit example of FIG. 8. FIG. 9 is a waveform diagram obtained by actually measuring the operation of each unit in the circuit example of FIG. 8. It is a circuit diagram of the switching power supply device which shows a prior art example. FIG. 12 is a waveform diagram of each part obtained by actually measuring a state just before abnormal oscillation occurs in the circuit of FIG. 11. FIG. 12 is a waveform diagram of each part in which the state at the time of abnormal oscillation is actually measured in the circuit of FIG. 11. It is a circuit diagram of a switching power supply device showing another conventional example. FIG. 15 is a waveform diagram in a state where ringing occurs in the circuit example of FIG. 14.

  Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. In addition, the same code | symbol is attached | subjected to the same location as what was shown in the prior art example, and description of a common part is abbreviate | omitted as much as possible in order to avoid duplication.

  FIG. 1 shows a basic configuration of a switching power supply apparatus proposed in the present invention. Compared with the conventional example shown in FIG. 14, here, a drive winding 1E for generating a drive signal for turning on an FET 11; A drive winding 1D for generating a drive signal for turning on the FET 12 is provided separately, and there is no Zener diode 27 for distributing the charge accumulated in the gate of the FET 11 to the FET 12 when the FET 2 is turned off. The rectifying side off circuit 18 includes a FET 29 having a drain connected to a connection point between the drive winding 1E and the capacitor 21, a source connected to the source of the FET 11, a non-dot side terminal of the drive winding 1D, and a gate of the FET 29. And a capacitor 31 connected between the two. In addition, a diode 32 having an anode connected to the source of the FET 11, a cathode connected to the gate of the FET 12, an anode connected to the source of the FET 29, and a Zener diode 33, which is a constant voltage device having a cathode connected to the gate of the FET 29, And a diode 34 having an anode connected to the gate of the FET 12 and a cathode connected to the gate of the FET 12. Other configurations are common to the conventional example shown in FIG.

  The capacitor 31 uses a voltage generated at the non-dot side terminal of the drive winding 1D as the FET 2 is turned off to generate a drive signal for the gate of the FET 29, thereby driving the FET 29 on. It has a function as a drive circuit. In particular, here, a voltage level obtained by adding the charging voltage of the capacitor 31 to the non-dot side terminal of the drive winding 1D as a reference potential is given to the gate of the FET 29. It is provided as a level shift circuit that holds the gate of the FET 29 at a constant potential level shifted upward with respect to the voltage generated at the non-dot side terminal of the line 1D.

  The FET 29 as a switch element short-circuits the current path from the gate of the FET 11 to the capacitor 21 when the FET 2 is turned off. When the FET 29 is turned on, the charge stored in the gate of the FET 11 and the capacitor 21 is transferred from the drain of the FET 29. A discharge path that discharges to the source of the FET 11 through the source is formed. Further, in the process of discharging the charge, when the charge accumulated in the gate of the FET 11 is completely discharged earlier than the capacitor 21, this time, the diode 32 is turned on so that the charge remaining in the capacitor 21 is completely discharged. It has become. Further, the Zener diode 33 prevents the gate potential of the FET 29 from exceeding the Zener voltage with respect to the potential at the connection point of the FETs 11 and 12. In particular, in this embodiment, the gate potential of the FET 29 is set when the FET 29 is off. It has a function as a malfunction prevention circuit that lowers the voltage drop Vf so that the FET 29 does not turn on reliably.

  Next, the operation of the above configuration will be described with reference to the waveform diagram of FIG. In FIG. 2, Vgs2 at the top is the gate-source voltage of the FET 2 as the main switching element, and V1D, Vgs29, and Vgs11 below are voltages generated on the non-dot side of the drive winding 1D, The gate-source voltage of the FET 29 and the gate-source voltage of the FET 11 are shown. Vth is a threshold value at which the drain current of the FET 29 flows.

  During normal operation, the FET 2 is switched by a pulse drive signal from the control circuit 5, whereby the input voltage Vin is intermittently applied to the primary winding 1A of the transformer 1, thereby inducing the secondary winding 1B. As the voltage is rectified and smoothed by the synchronous rectifier circuit 15, a desired output voltage Vout is supplied from the output terminals 16A and 16B to the load.

  In the course of this series of operations, the pulse drive signal from the control circuit becomes H level, the FET 2 is turned on, and the positive input voltage Vin is applied to the dot side terminal of the primary winding 1A of the transformer 1. Then, a positive voltage is induced at the dot side terminals of the secondary winding 1B and the drive windings 1D and 1E, and the diode 22 of the rectification side drive circuit 17 is turned on. Therefore, the rectifying side drive circuit 17 applies a voltage between the gate and source of the FET 11 from the drive winding 1E through the capacitor 21, and immediately turns on the FET 11. The efficiency of the FET 11 can be improved by reducing the dead time in which current flows through the body diode of the FET 11.

  On the other hand, the commutation side drive circuit 19 has nothing to do with the FET 12, and instead, when the FET 2 is turned on, the commutation side off circuit 20 operates to store the charge stored between the gate and source of the FET 12. Are quickly discharged, and at the same time as the FET 2 is turned on, the FET 12 is turned off at high speed. At this time, the non-dot side terminal of the drive winding 1D to which one end of the capacitor 31 is connected has a lower potential than the dot side terminal, and the commutation side off circuit 20 lowers the gate-source voltage of the FET 12, thereby Since 34 is turned on, the gate-source voltage Vgs29 of the FET 29 is quickly lowered, and the FET 29 is turned off.

  Even if a large ringing occurs during the period when the FET 29 is turned off, the voltage drop Vf of the Zener diode 33 is large to some extent, so that the gate-source voltage Vgs29 of the FET 29 is based on the source potential of the FETs 11 and 12. As a result, the voltage drop is further decreased by the voltage drop Vf, and it is possible to reliably prevent the FET 29 from being erroneously turned on.

  After that, when the pulse drive signal from the control circuit 5 becomes L level and the FET 2 is turned off, a positive flyback voltage is generated at the non-dot side terminals of the secondary winding 1B and the drive windings 1D and 1E. The diode 23 of the commutation side drive circuit 19 is turned on, while the diode 22 of the rectification side drive circuit 17 is turned off. Therefore, the commutation side drive circuit 19 applies a voltage between the gate and source of the FET 12 from the drive winding 1D, and immediately turns on the FET 12. By reducing the dead time in which a current flows through the body diode of the FET 12, the efficiency of the FET 12 can be improved.

  At this time, the potential of the non-dot side terminal of the drive winding 1D for turning on the FET 12 changes in a substantially sine wave shape as shown in FIG. 2, but the gate-source voltage Vgs29 of the FET 29 is Since the potential of the non-dot side terminal of the line 1D plus the charging voltage of the capacitor 31 is generated, immediately after the FET 2 is turned off, the voltage becomes higher than the threshold value Vth of the FET 29, thereby turning the FET 29 on immediately. be able to. Therefore, compared to the case where the non-dot side terminal of the drive winding 1D and the gate of the FET 29 are directly connected, the charge accumulated in the FET 11 can be discharged more quickly and the FET 11 can be turned off at the same time as the FET 2 is turned off. it can. Since the rectifying side drive circuit 17 has nothing to do with the FET 11 in the off period of the FET 2, the charge stored in the gate of the FET 11 and the capacitor 21 is discharged from the drain of the FET 29 through the source, and eventually the FET 11 When the charge accumulated in the gate is completely discharged, the FET 32 is turned on, and the charge remaining in the capacitor 21 is completely discharged. Here, the gate-source voltage Vgs29 of the FET 29 is maintained at a threshold value Vth or higher from immediately after the diode 32 is turned off to immediately before the FET2 is turned on next due to the level shift effect of the capacitor 31.

  Next, an operation when an external voltage is applied from the output terminals 16A and 16B of a specific power supply device when a plurality of power supply devices are connected in parallel to a load will be described. In this case, the potential of the dot side terminal of the secondary winding 1B becomes higher than the source potential of the FETs 11 and 12, but when the pulse drive signal from the control circuit 5 shifts from on to off, the non-winding of the winding 1D The FET 29 is turned on by the voltage generated at the dot side terminal, and the charge accumulated in the gate of the FET 11 and the capacitor 21 is discharged. Accordingly, the FET 11 can be quickly turned off almost simultaneously with the FET 2 being turned off, and it is possible to reliably prevent a large flyback voltage from being generated in the secondary winding 1B.

  As described above, in the switching power supply device according to the present embodiment, the FET 2 is connected to the primary winding 1A of the transformer 1, and the synchronous rectifier circuit 15 including the FET 11 and FET 12 is connected to the secondary winding 1B of the transformer 1. The control circuit 5 for supplying a pulse drive signal to the FET 2 is provided, and is synchronized with the rectifying side off circuit 18 for turning off the FET 11 in synchronization with the turning off of the FET 2 and the turning off of the main switching element 2. The commutation side drive circuit 19 that turns on the FET 12 is turned on. In particular, the commutation side drive circuit 19 turns on the FET 12 with the voltage from the drive winding 1D provided in the transformer 1. The rectifying-side off circuit 18 is a capacitive element that shifts the voltage generated at one end of the drive winding 1D upward. And the FET 29 as a switch element to which the level-shifted voltage is given as a switch drive signal. When the FET 29 is turned on as the FET 2 is turned off, the charge accumulated in the control terminal of the FET 11 is passed through the FET 29. It has a configuration that enables discharge.

  In this case, when the FET 2 as the main switching element is turned off, the voltage generated at one end of the drive winding 1D rises gently. In this embodiment, this voltage is not supplied to the FET 29 as it is, but the capacitor 31 is charged. Since the voltage is shifted upward by the voltage and supplied to the FET 29 as a switch drive signal, the FET 29 is turned on almost at the same time as the FET 2 is turned off, and the charge accumulated in the gate which is the control terminal of the FET 11 is quickly discharged. To do. Therefore, by using the drive winding 1D of the commutation side drive circuit 19 that originally drives the FET 12 on and simply adding a capacitor 31 to the drive winding 1D, the FET 11 is turned off at the same time as the FET 2 is turned off. It can be quickly turned off.

  In the present embodiment, a Zener diode 33 is provided as a malfunction prevention circuit that lowers the potential of the gate that is the control terminal of the FET 29 to be lower than the source potential that is the connection point of the FETs 11 and 12 when the FET 29 is turned off.

  In this way, when the FET 2 is turned on and the voltage generated at one end of the drive winding 1D is reduced and the FET 29 is turned off, the gate potential of the FET 29 is lower than the potential at the connection point of the FETs 11 and 12. Become. Therefore, even when large ringing occurs at the gate of the FET 29, the gate potential of the FET 29 is lowered, the FET 29 does not turn on, and the FET 29 can be reliably prevented from being turned on erroneously.

  Particularly in this embodiment, even when ringing occurs at the gate of the FET 29, the forward voltage drop Vf of the Zener diode 33 is set so that the gate potential of the FET 29 does not reach the threshold value Vth. By simply incorporating the Zener diode 33 having the voltage drop Vf characteristic as a malfunction prevention circuit in advance, the malfunction of the FET 29 can be prevented easily and reliably.

  FIG. 3 is a circuit example in which the basic configuration of the first embodiment is modified. Here, a point in which a resistor 37 is connected in series to the capacitor 31 is different from the basic configuration shown in FIG. The resistor 37, together with the capacitor 31, constitutes a voltage adjustment circuit that adjusts ringing generated at the gate of the FET 29. By adjusting the time constant of the capacitor 31 and the resistor 37, the voltage level of ringing generated at the gate of the FET 29 can be suppressed while the FET 29 is turned off. Other configurations and operational effects are completely the same as the basic configuration.

  FIG. 4 is another circuit example in which the basic configuration of the first embodiment is modified. In this example, it is noted that the drive winding 1E and the diode 22 as shown in the first embodiment are not provided, and instead the secondary winding 1B and the capacitor 21 constitute the rectifying side drive circuit 17. The That is, here, in synchronism with the turning on of the FET 2, the driving signal is applied to the gate of the FET 11 by using the voltage generated at the dot side terminal of the secondary winding 1B, not from the driving winding 1E of the transformer 1. A rectification side drive circuit 17 is provided to drive the FET 11 on by supplying it. Accordingly, if the FET 11 can be driven on using the voltage (output voltage Vout) generated in the secondary winding 1B without providing the driving winding 1E on the transformer 1, the driving winding 1E is omitted. Therefore, the transformer structure can be simplified.

  In this example, the FET 11 is directly driven from the output voltage Vout via the capacitor 21, but a resistor may be interposed instead of the capacitor 21. Other configurations and operational effects are completely the same as the basic configuration.

  FIG. 5 is another circuit example in which the basic configuration of the first embodiment is modified. In this example, it is noted that resistors 42 and 43 as a voltage generation circuit 41, a capacitor 44, and a diode 45 are added to the circuit shown in the first embodiment.

  More specifically, one end of the resistor 42 is connected to the gate of the FET 29, and the anode of the diode 45 is connected to the gate of the FET 12. The resistor 42 and the cathode of the diode 45 are connected in parallel to the resistor 43 and the capacitor 44. The voltage generation circuit 41 is configured by connecting to one end of the circuit and connecting the other end of the parallel circuit to the source of the FET 11.

  The voltage generation circuit 41 uses the voltage induced at the non-dot side terminal of the auxiliary winding 1D during the operation in which the control circuit 5 supplies the pulse drive signal to the FET 2, and uses the capacitor 42 via the resistor 42 or the diode 45. And a voltage higher than the source, which is the connection point of the FETs 11 and 12, is generated between both ends of the capacitor 44. On the other hand, when the control circuit 5 stops operating to supply the pulse drive signal to the FET 2, the gate potential of the FET 29 is pulled up by the resistor 42 by the voltage generated across the capacitor 44, and the FETs 11, 12. The FET 29 is kept higher than the source potential for a certain time, and the FET 29 is kept on. As a result, when the control circuit 5 and the power supply device are stopped, the charge accumulated in the gate of the FET 11 is quickly discharged, the FET 11 is kept in the OFF state, and the self-excited oscillation operation in which the FETs 11 and 12 are alternately turned on is ensured It can be avoided. Other configurations and operational effects are completely the same as the basic configuration.

  FIG. 6 is another circuit example in which the basic configuration of the first embodiment is modified. Here, the point in which an inductive element 51 such as an inductor or a saturable reactor is connected in series with the FET 11 is different from the circuit of the first embodiment.

  The inductive element 51 is an element having a very large impedance in a transient state where current starts to flow, but having a very small impedance in a subsequent steady state, as described in, for example, Japanese Patent No. 4234915. . Therefore, in a normal operation in which the FETs 11 and 12 are repeatedly turned on and off at the correct timing in synchronization with the FET 2, the inductive element 51 works without any trouble in charging the smoothing capacitor 14, but for example, the FET 11 is off and the FET 12 is turned on. If, for example, the FET 2 is turned on before turning off, and a current larger than normal is generated in the current path to which the inductive element 51 is connected, the impedance of the inductive element 51 starts at the beginning of the current flow. It becomes extremely large, the current is limited, and a large current can be prevented from flowing through the secondary side circuit of the transformer 1 including the rectifying and smoothing circuit 15.

  Further, in the case where the commutation side drive circuit 19 for driving the FET 12 on using the voltage from the auxiliary winding 1D is provided, when the inductive element 51 as in this example is added, the inductive element 51 The ringing voltage generated in the auxiliary winding 1D can be canceled by the ringing voltage generated in the FET 29, and the ringing of the gate-source voltage of the FET 29 can be suppressed. Other configurations and operational effects are completely the same as the basic configuration.

  In another circuit example shown in FIG. 7, the commutation-side off circuit 20 in FIG. 6 is shown by a diode 52, a FET 53 that is a switch element, and a resistor 54. The rectifying-side off circuit 20 here turns on the FET 53 when the voltage value induced at both ends thereof by the current flowing through the inductive element 51 exceeds a certain value, and converts the charge accumulated in the gate of the FET 12 into the diode The FET 52 is discharged through the FET 53 and the FET 12 is turned off, so that the current flowing in the inductive element 51 can be used to reliably turn off the FET 12. Other configurations and operational effects are completely the same as the circuit configuration in FIG.

  The circuit example shown in FIG. 8 is an appropriate combination of the circuit examples of the first, second, and fourth to sixth embodiments described above. Since the operations in these units are as described above, they will not be described repeatedly.

  In addition, here, the diode 24 having the anode connected to the gate of the FET 11, the resistor 61 connected between the cathode of the diode 24 and the dot side terminal of the secondary winding 1B, and the dot side terminal of the auxiliary winding 1E The resistor 62 connected between one end of the capacitor 21 and the connection point of the drain of the FET 29, the capacitor 63 connected between the dot side terminal of the auxiliary winding 1E and the gate of the FET 53, and the gate-source of the FET 11 Is connected between both ends of the inductive element 51, bypassing the inductive element 51, bypassing the inductive element 51 from the source of the FET 11 to the choke coil 13 or the FET 12. A diode 66 that allows current to flow to the source of the transistor, one end of the inductive element 51, and the gate of the FET 53. A diode 67 connected to the non-dot-side terminal of the auxiliary winding 1E, a Zener diode 68 connected to the cathode of the Zener diode 68, and a diode 69 connected to the gate of the FET 12 with the anode connected thereto. Each is added. The smoothing capacitor 14 may be configured by connecting a plurality of capacitive elements in parallel.

  FIG. 9 shows the actual measurement results in the circuit example of FIG. 8, where Vds2 is the drain-source voltage of FET2, Vgs11 is the gate-source voltage of FET11, and Vgs29 is the gate-source voltage of FET29. . As shown here, during the ON period of the FET 2, the gate-source voltage Vgs 29 of the FET 29 is negative with respect to the source potential of the FETs 11 and 12 due to the forward voltage drop Vf of the Zener diode 33. Therefore, an operation in which the FET 29 is erroneously turned on due to ringing can be avoided.

  FIG. 10 shows the operation of each part when the control circuit 5 is stopped in the circuit example of FIG. Here, Vout is a voltage between the output terminals 16A and 16B, and Vpo is an operation signal to the control circuit 5. After the voltage level of the operation signal is switched from H to L, the operation as the control circuit 5 is performed. It has stopped. Further, Vgs29 indicates the gate-source voltage of the FET29. After the operation of the control circuit 5 stops, the gate-source voltage Vgs29 of the FET 29 is pulled up by the resistor 42. As a result, the FET 29 continues to be turned on and the FET 11 is reliably turned off, thereby avoiding self-excited oscillation as in the prior art.

  The present invention is not limited to the present embodiment, and various modifications can be made within the scope of the gist of the present invention. For example, in common with each of the above embodiments, the main switching element, the rectifying side and commutation side synchronous rectifying element, and the switching element are not limited to MOS FETs, but are other semiconductor elements with control terminals. May be. A capacitive element instead of the capacitor 31 may be used, or an element other than the Zener diode 33 may be used as a malfunction prevention circuit.

1 Transformer 1A Primary winding 2 FET (Main switching element)
5 Control circuit 11 FET (rectifier side synchronous rectifier)
12 FET (commutation side synchronous rectifier)
15 Synchronous rectification circuit 17 Rectification side ON circuit (rectification side drive circuit)
18 Commutation side off circuit 19 Commutation side on circuit (commutation side drive circuit)
20 Commutation side off circuit 29 FET (switch element)
31 Capacitor (capacitive element)
33 Zener diode (malfunction prevention circuit)
37 resistor 41 voltage generation circuit 51 inductive element

Claims (6)

A primary switching element is provided on the primary winding side of the transformer, and a synchronous rectification circuit including a rectification side synchronous rectification element and a commutation side synchronous rectification element is provided on the secondary winding side of the transformer, and the main switching element A control circuit for supplying a pulse drive signal;
A rectification side off circuit that turns off the rectification side synchronous rectification element in synchronization with the main switching element turning off;
In a switching power supply comprising: a commutation side drive circuit that drives the commutation side synchronous rectification element to be turned on in synchronization with the main switching element being turned off;
The commutation side drive circuit has a configuration for generating a drive signal for turning on the commutation side synchronous rectification element from a drive winding provided in the transformer,
The off-circuit on the rectification side includes a capacitive element for level-shifting a voltage generated at one end of the drive winding, and a switch element to which the level-shifted voltage is applied as a switch drive signal, and the main switching When the switch element is turned on as the element is turned off, the charge accumulated in the control terminal of the rectifying side synchronous rectifier element can be discharged.
A malfunction prevention circuit is provided that lowers the potential of the control terminal of the switch element below the potential of the connection point of the rectifier side synchronous rectifier element and the commutation side synchronous rectifier element when the switch element is turned off. Switching power supply.   2. The switching power supply device according to claim 1, further comprising a resistor connected to the capacitive element and for adjusting ringing generated at a control terminal of the switch element together with the capacitive element.   A rectifying side driving circuit is provided for driving the rectifying side synchronous rectifying element to turn on using a voltage generated in the secondary winding of the transformer in synchronization with the main switching element being turned on. The switching power supply device according to claim 1 or 2.   During operation of the control circuit, a potential higher than the connection point of the rectifying side synchronous rectifying device and the commutation side synchronous rectifying device is generated, and when the operation of the control circuit is stopped, the switch device is turned on by the generated potential. The switching power supply according to any one of claims 1 to 3, further comprising a voltage generation circuit for maintaining the state.   The switching power supply device according to claim 1, wherein an inductive element is connected in series with the rectifying side synchronous rectifying element.   The commutation side off circuit which detects the current which flows into the inductive element, and turns off the commutation side synchronous rectification element when this current exceeds a fixed value, characterized by the above-mentioned. Switching power supply.