JP4894228B2 - Power management system for vehicle electronic control unit - Google Patents

Description

  The present invention relates to a power management system for a vehicle electronic control device.

  Conventionally, a vehicle has a processor for each ECU (electronic control unit) corresponding to each control target such as an internal combustion engine. On the other hand, a multiprocessor system is being put to practical use in which a plurality of program processes and the like are distributed to perform parallel processing to increase processing speed. In order to reduce the power consumption of the system in a multiprocessor system as much as possible, for example, Patent Document 1 proposes the following technique.

  A low power consumption circuit (hereinafter, simply referred to as a low power consumption circuit) of a parallel multiprocessor system proposed in Patent Document 1 is an interrupt request from each of a plurality of I / Os in parallel, and a plurality of CPs (Central Processor) is applied to a parallel multiprocessor system that processes data in a shared memory in parallel. According to Patent Document 1, the above-described low power consumption circuit is provided with monitoring means, and this monitoring means monitors the total CP waiting time for each I / O interrupt request. Subsequently, in the above-described low power consumption circuit, the increase / decrease in the amount of tasks to be processed in parallel is grasped based on the increase / decrease in the total waiting time monitored by the monitoring means. According to Patent Document 1, the number of CPs that are actually processed in parallel is determined based on the increase / decrease of the task amount, and the power consumed in the parallel multiprocessor system is always reduced by cutting off the remaining operation power. It is possible to reduce waste according to the amount of tasks.

JP-A-6-309288

  However, according to Patent Document 1, in the above-described low power consumption circuit, the number of CPs to be subjected to parallel processing is determined after grasping the increase in the task amount, and then the CP that has been stopped for the first time is started. This means that the task that has already increased cannot be processed until the CP is newly activated. As a result, the low power consumption circuit proposed in Patent Document 1 is equivalent to that of the system. There is a possibility that the responsiveness may decrease. In addition, in the low power consumption circuit proposed in Patent Document 1, in order to reduce the power consumption of the system, a complicated logic for determining the number of CPs to perform parallel processing is required. Determining the number itself may also cause a reduction in system responsiveness.

  Furthermore, the following problems exist when attempting to reduce the power consumption of the vehicle ECU. For example, in a general hybrid vehicle, an ECU whose control target is an internal combustion engine and an ECU whose control target is a drive motor each have a processor. In addition, processing required when the vehicle is stopped is assigned to each processor in order to increase the efficiency of system resources. Due to this, in a general hybrid vehicle, it is necessary to operate each processor in order to execute some processes even when the vehicle is stopped. That is, in a general hybrid vehicle, although the internal combustion engine and the drive motor can be stopped when the vehicle is stopped, it is difficult to realize the reduction in power consumption of the vehicle ECU by stopping the processor.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a power management system for a vehicle electronic control device that can reduce power consumption without reducing responsiveness.

In order to solve the above-described problems, the present invention provides a power management system for a vehicle electronic control device having a plurality of processors, wherein the plurality of processors are assigned control operations corresponding to the function of the internal combustion engine. When includes a processor control calculation is allocated corresponding to the function of the drive motor, and based on the start or stop condition of said function, start or stop the processor control operation is allocated corresponding to the function Power management means for executing a process for causing the processor to stop, and the process for stopping the processor is a process for cutting off power supply to the processor .

  Here, “based on a function activation or stop state” is not only based on, for example, a predetermined output signal indicating that a control target having the function is in an activation or stop state, and in the present invention, This also includes the fact that the input is based on a start or stop signal indicating that the control target is in the start or stop state. According to the present invention, it is possible to easily start or stop a processor without executing a calculation based on complex logic, and as a result, it is possible to reduce power consumption without reducing the responsiveness of the vehicle ECU. is there. In addition, since one vehicular ECU has a plurality of processors to which a control calculation divided for each function is assigned, it is difficult when a plurality of ECUs corresponding to the respective controlled objects individually have processors. It is possible to reduce the power consumption of the vehicle ECU.

  Although it is possible to assign only the control calculation divided for each function to the individual processors of the plurality of vehicle ECUs, in this case, for example, it is necessary to provide power management means for each ECU. Therefore, the efficiency of system resources is deteriorated. Further, for example, it is possible to start or stop the plurality of vehicle ECUs with one power management unit, but in this case, a transmission path connecting the vehicle ECU and the power management unit becomes long. The start or stop of the processor is delayed accordingly. On the other hand, according to the power management system of the present invention, it is possible to achieve both ensuring the responsiveness of the vehicle ECU and improving the efficiency of system resources.

Further, the present invention is a power management system for a vehicle electronic control device having a plurality of processors, wherein the plurality of processors are assigned a processor to which a control operation corresponding to a function of an internal combustion engine of the vehicle is assigned, and A processor to which a control calculation corresponding to the function of the motor for driving the vehicle is assigned , and determines whether the function is activated or stopped based on the driving state of the vehicle, and the function is activated or stopped. and if it is determined, a power management means for executing the processing for starting or stopping the processor control operation is allocated corresponding to the function, processing for stopping the processor, to the processor It is the process which interrupts | blocks an electric supply .

  According to the present invention, it is possible to prevent the processing from being delayed until the processor is started, as compared with the case where the processor that has been stopped for the first time after starting is required. In addition, it is possible to prevent the processing from being delayed by the startup time of the processor by starting the processor in advance. As a result, power consumption can be reduced without reducing the responsiveness of the vehicle ECU. In addition, according to the present invention, it is possible to reduce the power consumption by stopping the processor assigned the control calculation corresponding to the function before the function actually stops. The start or stop signal described above is also output based on the driving condition of the vehicle. According to the present invention, the driving condition used by the power management means for the determination is the case where the start or stop signal is output. Can be set to different conditions to start or stop the processor in advance.

  In the present invention, the processor and resources provided for the processor may be started or stopped based on processing for starting or stopping the processor. According to the present invention, it is possible to further reduce the power consumption of the vehicle ECU.

  According to the present invention, the resource may include at least one of an input circuit, an output circuit, and a read storage device. For example, the configuration shown in the present invention can be a resource that can be started or stopped together with a processor. The read storage device is a ROM (Read Only Memory).

  In the present invention, at least the plurality of processors and a bus to which the processors are connected may be integrated on a common chip. According to the present invention, it is possible to reduce power consumption without reducing responsiveness even for a vehicle ECU having a processor that can be expected to improve processing speed by utilizing high-speed communication on a chip. .

  ADVANTAGE OF THE INVENTION According to this invention, the power management system of the vehicle electronic control apparatus which can reduce power consumption, without reducing responsiveness can be provided.

  Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.

  A power management system (hereinafter simply referred to as a power management system) 1 of the vehicle ECU 100 according to the present embodiment will be described in detail with reference to FIG. FIG. 1 is a diagram illustrating a configuration of a vehicle ECU (hereinafter simply referred to as an ECU) 100 including a power management system 1 according to the present embodiment. Further, in FIG. 1, the vehicle speed for detecting the speed of the vehicle as a configuration for detecting the internal combustion engine 20 and the drive motor 30 that are controlled by the ECU 100, the battery 50, and the driving state of the vehicle together with the ECU 100. A sensor 61, an accelerator opening sensor 62 for measuring the depression amount of the accelerator pedal, a battery capacity sensor 63 for detecting the battery capacity, and a brake sensor 64 for detecting the depression operation of the brake pedal are shown at the same time. .

  Both the internal combustion engine 20 and the drive motor 30 are configured as power sources for driving the vehicle. In the present embodiment, the hybrid system for efficiently using the internal combustion engine 20 and the drive motor 30 as a power source in accordance with the driving state of the vehicle includes the internal combustion engine 20, the drive motor 30, and the ECU 100. And is configured.

  The power management system 1 includes an ON / OFF determination IC (semiconductor integrated circuit) 11, a first power supply IC 12, a second power supply IC 13, a determination IC ROM 14, and a determination IC input circuit 15. It is configured. The first power supply IC 12 is configured to start and stop the first CPU core 21 by supplying and blocking electricity to a first CPU core 21 described later. Similarly, the second power supply IC 13 is configured to start and stop the second CPU core 31 by supplying and blocking electricity to a second CPU core 31 described later. The determination IC ROM 14 is configured to store a program describing various processes executed by the ON / OFF determination IC 11. The determination IC input circuit 15 manages, for example, amplifies output signals from the various sensors 61, 62, 63 and 64 described above for detecting the driving state of the vehicle, and inputs these output signals to the ON / OFF determination IC 11. It is the structure for doing.

  The ON / OFF determination IC 11 is a configuration mainly for making a request for starting and stopping the first CPU core 21 to the first power supply IC 12 (also referred to as an ON / OFF request in this embodiment). More specifically, the ON / OFF determination IC 11 is based on the above-mentioned program stored in the determination IC ROM 14 and is determined based on the output signals of the various sensors 61, 62, 63 and 64 received from the determination IC input circuit 15. The process is executed, and when a predetermined condition is satisfied, an ON / OFF request for the first CPU core 21 is made. That is, the ON / OFF determination IC 11 determines whether or not the function of the internal combustion engine 20 is started or stopped based on the driving state of the vehicle by the above determination process. Details of the above-described determination process will be described later. The ON / OFF determination IC 11 executes various other processes based on the above-mentioned program, which will be described later as appropriate.

  Further, the ON / OFF determination IC 11 executes a process of acquiring a start or stop signal of the internal combustion engine 20 via a RAM (Random Access Memory) 40 (to be described later) based on the above-described program. It is possible to make an ON / OFF request for the CPU core 21. That is, the ON / OFF determination IC 11 determines whether the function of the internal combustion engine 20 is activated or stopped by this determination process. However, the present invention is not limited to this, and the start or stop state of the internal combustion engine 20 may be determined by acquiring a predetermined output signal indicating that the internal combustion engine 20 is started or stopped.

  When making an ON / OFF request, the ON / OFF determination IC 11 executes a process of outputting a control signal to the first power supply IC 12 based on the above-described program in order to start or stop the first CPU core 21. Thus, an ON / OFF request for the first CPU core 21 is made to the first power supply IC 12. That is, in the present embodiment, the ON / OFF determination IC 11 that executes the above-described processing is the power management means. However, the power management means may be a CPU instead of an IC.

  Similarly, the ON / OFF determination IC 11 issues an ON / OFF request for the second CPU core 31 to the second power supply IC 13 as well. In this embodiment, the first power supply IC 12 corresponds to the second power supply IC 13, the internal combustion engine 20 corresponds to the driving motor 30, and the first CPU core 21 corresponds to the second CPU core 31. Since the explanation can be made by replacing the explanation of the ON / OFF determination IC 11 described above, a new explanation is omitted to avoid duplication.

  Next, a configuration provided in the ECU 100 for controlling the internal combustion engine 20 will be described in detail. The configuration includes a first CPU core 21, a first ROM 22, a first input circuit 23, and a first output circuit 24. The first ROM 22 is configured to store an engine control program for controlling the internal combustion engine 20. In this embodiment, the control calculation corresponding to the function of the internal combustion engine 20 is realized by this engine control program. The first input circuit 23 is configured to manage various output signals from the internal combustion engine 20 and input these output signals to the first CPU core 21. The first output circuit 24 is configured to manage a control signal from the first CPU core 21 and a power source of a sensor and an actuator (not shown) included in the internal combustion engine 20 and output the same to the internal combustion engine 20.

  The first CPU core 21 is configured to execute various processes based on the above-described engine control program. That is, the control calculation corresponding to the function of the internal combustion engine 20 is assigned to the first CPU core 21. More specifically, the first CPU core 21 acquires, for example, various output signals from the internal combustion engine 20 via the first input circuit 23, and based on the acquired signals and the engine control program described above. Then, a process for outputting a predetermined control signal to the first output circuit 24 is executed. The start or stop signal of the internal combustion engine 20 described above is output when the first CPU core 21 executes a process based on the engine control program. The start or stop signal is acquired from the first CPU core 21 through the RAM 40 to the ON / OFF determination IC 11.

  Next, the configuration of the ECU 100 for controlling the drive motor 30 will be described. The configuration includes a second CPU core 31, a second ROM 32, a second input circuit 33, and a second output circuit 34. In the present embodiment, these configurations are functionally the same as the configurations included in the ECU 100 for controlling the internal combustion engine 20 except that the ECU 100 is included for controlling the drive motor 30. Therefore, in order to avoid duplication of description, in the description of the configuration of the ECU 100 for controlling the internal combustion engine 20 described above, the first CPU core 21 is used as the second CPU core 31 and the first ROM 22 is used as the first ROM 22. 2 ROM 32, the first input circuit 23 is replaced with the second input circuit 33, the first output circuit 24 is replaced with the second output circuit 34, and the engine control program corresponds to the motor control program. The description will be replaced with the description of the configuration of the ECU 100 for controlling the drive motor 30.

  The RAM 40 is configured to provide a work area for processing executed by the ON / OFF determination IC 11, the first CPU core 21, and the second CPU core 31. In this embodiment, the RAM 40 controls the ON / OFF determination IC 11, the first CPU core 21, and the second CPU core 31, a control signal such as a start or stop signal as described above, or a start command to be described later. And the like, and the operation and stop state of the first CPU core 21 and the second CPU core 31 are managed. This will be described in detail later. Based on these control signals, operation, and stopped state, the first CPU core 21 and the second CPU core 31 efficiently hybrid-control the internal combustion engine 20 and the drive motor 30.

  The battery 50 is configured to store electricity supplied through the main relay 51, and in this embodiment, electricity is supplied as shown below. As shown in FIG. 1, in this embodiment, electricity is supplied from the battery 50 through the main relay 51 to the ON / OFF determination IC 11, the first power supply IC 12, the second power supply IC 13, the control IC ROM 14, and the determination IC input circuit 15. And supplied to the RAM 40. In this embodiment, the first CPU core 21, the first ROM 22, the first input circuit 23 and the first output circuit 24 are connected to the main relay 51 and the first power supply IC 12. Electricity is supplied. Similarly, electricity is supplied to the second CPU core 31, the second ROM 32, the second input circuit 33 and the second output circuit 34 via the main relay 51 and the second power supply IC 13. It has come to be.

  Since electricity is supplied as described above, in this embodiment, the first power supply IC 12 supplies and cuts off electricity based on the process for starting or stopping the first CPU core 21. The first ROM 22, the first input circuit 23 and the first output circuit 24 can be started and stopped simultaneously with the start and stop of the first CPU core 21. Similarly, the second ROM 32, the second input circuit 33, and the second output circuit 34 can be started and stopped simultaneously with the start and stop of the second CPU core 31.

  In the present embodiment, the first CPU core 21 and the second CPU core 31 are connected by a bus (not shown), and the first CPU core 21 and the second CPU core 31 connected by the bus are connected to each other. A multiprocessor is being built. In this embodiment, the first CPU core 21, the second CPU core 31, the RAM 40, and the bus are used as a common chip in order to improve processing speed by utilizing high-speed communication on the chip. Accumulated. The CPU “core” is used to indicate that the CPU is a multiprocessor.

  With reference to the state transition diagram shown in FIG. 2, the operation state of the vehicle having the above-described configuration and each configuration shown in FIG. 1 will be described in detail. As shown in FIG. 2, the driving state of the vehicle includes “when stopped”, “starting / low-speed driving”, “deceleration / braking”, and “rapid acceleration / normal driving”. “When the vehicle is stopped” is a state where both the internal combustion engine 20 and the drive motor 30 are stopped. When the drive motor 30 is activated, the driving state transitions from “when stopped” to “when starting and running at low speed”. That is, “when starting and running at low speed” is a state in which the internal combustion engine 20 is stopped and the drive motor 30 is operating. When the internal combustion engine 20 is started in this state, the operation state transitions from “starting / low speed running” to “rapid acceleration / normal running”. That is, “at the time of sudden acceleration / normal traveling” is a state in which the internal combustion engine 20 and the drive motor 30 are both operating.

  When the internal combustion engine 20 stops in this state, the operating state transitions from “during rapid acceleration / normal traveling” to “during deceleration / braking”. That is, “during deceleration / braking” is a state where the internal combustion engine 20 is stopped and the drive motor 30 is operating. Here, both “starting / low-speed driving” and “decelerating / braking” are states in which the internal combustion engine 20 is stopped and the driving motor 30 is operating. "Is different in that the vehicle is decelerating and braking. That is, when the vehicle is decelerated and no longer in the braking state when the driving state is “deceleration / braking”, the driving state transits from “deceleration / braking” to “starting / low-speed driving”. Further, when the internal combustion engine 20 is activated when the driving state is “deceleration / braking”, the driving state transitions from “deceleration / braking” to “rapid acceleration / normal driving”.

  In the present embodiment, each operation state described above is managed by the RAM 40. More specifically, for example, the first CPU core 21 stores start and stop signals in the RAM 40, whereby the operation and stop state of the internal combustion engine 20 are managed by the RAM 40. The second CPU core 31 stores start and stop signals in the RAM 40, whereby the operation and stop state of the drive motor 30 are managed by the RAM 40. Further, the ON / OFF determination IC 11 stores output signals indicating the deceleration and braking state of the vehicle in the RAM 40 based on the output signals of the vehicle speed sensor 61 and the brake sensor 64, whereby the deceleration and braking state of the vehicle is managed by the RAM 40. .

  Further, the ON / OFF determination IC 11 is based on the ON / OFF request, and the first CPU core 21, the first ROM 22, the first input and output circuits 23 and 24 (hereinafter simply referred to as the first CPU core 21 and the like). The RAM 40 manages the activation and deactivation states of the first CPU core 21 and the like by storing output signals indicating the activation and deactivation states in the RAM 40. Similarly, based on the ON / OFF request, the ON / OFF determination IC 11 determines the second CPU core 31, the second ROM 32, the second input and output circuits 33, 34 (hereinafter simply referred to as the second CPU core 31, etc.). The RAM 40 manages the activation and deactivation states of the second CPU core 31 and the like by storing output signals indicating the activation and deactivation states in the RAM 40.

  In the present embodiment, the internal combustion engine 20 is in a stopped state including the first CPU core 21 and the like. Similarly, the driving motor 30 is in a stopped state including the second CPU core 31 and the like. Based on the combination of these data, the ON / OFF determination IC 11 grasps the operation state shown in FIG. 2, and based on this operation state, the ECU 100 executes the following processes. When the internal combustion engine 20 or the drive motor 30 is operated, the first CPU core 21 or the like or the second CPU core is naturally activated. The first CPU core 21 or the like or the second CPU core 31 or the like is in an activated state. In the initial state when the power is turned on, the operation state managed by the RAM 40 is “when stopped”.

  Next, a process executed by the ECU 100 when the driving state is “stopped” will be described in detail with reference to the flowchart shown in FIG. 3. As shown in FIG. 3, when the ignition switch is turned on, the ON / OFF determination IC 11, the first power supply IC 12, the second power supply IC 13, the determination IC ROM 14, the determination IC input circuit 15 and the RAM 40 are turned on. Then, the power of these components is turned on (step 11). The ON / OFF determination IC 11 monitors the driving state of the vehicle with various sensors 61, 62, 63 and 64 (step 12), and determines whether or not the brake pedal is depressed based on the output signal of the brake sensor 64. Execute (step 13). If it is determined in step 13 that the brake pedal is depressed, the ON / OFF determination IC 11 returns to step 12 and continues to monitor the driving state. In this embodiment, when the brake pedal is not depressed, the operation is invalidated even if the ignition switch is turned on.

  If it is determined in step 13 that the brake pedal has not been depressed, the ON / OFF determination IC 11 issues an ON request for the second CPU core 31 to the second power supply IC 13 (step 14). The second power supply IC 13 that has received the ON request energizes the blocked electricity. As a result, electricity is supplied to the second CPU core 31 and the like, and the power supply of these components is turned on (step 15). The second CPU core 31 whose power is turned on executes a process for starting the drive motor 30 based on the motor control program, and the drive motor 30 is started based on the start signal output by this process. (Step 16). As a result, the driving state transitions from “when stopped” to “when starting and running at low speed” (step 17).

  Next, the processing executed by the ECU 100 when the driving state is “starting / low speed running” will be described in detail with reference to the flowchart shown in FIG. 4. Even when the driving state is “starting / low-speed driving”, as in the case of “stopping”, the ON / OFF determination IC 11 monitors the driving state of the vehicle (step 21). Step 21 is also a step that follows step 17 described above. When the driving state is “starting / low speed running”, the ON / OFF determination IC 11 executes a process of determining whether the battery capacity is less than a predetermined amount based on the output signal of the battery capacity sensor 63 (step 22). . If it is determined in step 22 that the battery capacity is low, the ON / OFF determination IC 11 issues an ON request for the first CPU core 21 to the first power supply IC 12 (step 23). The first power supply IC 12 that has received the ON request energizes the blocked electricity. As a result, electricity is supplied to the first CPU core 21 and the like, and the power supply of these components is turned on (step 24).

  Subsequently, the first CPU core 21 whose power is turned on executes a process of accessing the RAM 40 and determining whether or not there is a request for starting the internal combustion engine 20 from the second CPU core 31 (step 25). . If it is determined in step 25 that there is no activation request, the process returns to step 21. If it is determined in step 25 that there is a start request, the first CPU core 21 executes a process for starting the internal combustion engine 20 based on the engine control program, and the start signal output by this process is displayed. Based on this, the internal combustion engine 20 is started (step 26). As a result, the driving state transitions from “starting / low-speed driving” to “rapid acceleration / normal driving” (step 27).

  On the other hand, if it is determined in step 22 that the battery capacity is greater than the predetermined amount, the ON / OFF determination IC 11 determines that the output signal from the vehicle speed sensor 61, the accelerator opening sensor 62, and the brake sensor 64 is “ It is determined whether the vehicle speed is not low, the accelerator pedal is depressed, and the brake pedal is not depressed (step 31). That is, it is determined whether or not the vehicle is in an acceleration state. If the determination in step 31 is affirmative, the process proceeds to step 23 as the next step. If the determination in step 31 is negative, the ON / OFF determination IC 11 executes a process for determining whether the power source of the first CPU core 21 and the like is off (step 32).

  If the determination in step 32 is negative, the ON / OFF determination IC 11 issues an OFF request for the first CPU core 21 to the first power supply IC 12 (step 33). The first power supply IC 12 that has received the OFF request cuts off the energized electricity. As a result, the electricity supplied to the first CPU core 21 and the like is cut off, and the power of these components is turned off (step 34). Note that the negative determination in step 32 is a case where the internal combustion engine 20 is not operating but the power source of the first CPU core 21 and the like is ON.

  On the other hand, if the determination in step 32 is affirmative, the ON / OFF determination IC 11 determines that “the vehicle speed is 0 and the accelerator pedal is based on the output signals of the vehicle speed sensor 61, the accelerator opening sensor 62, and the brake sensor 64. Is determined to determine whether or not the brake pedal is depressed (step 41). That is, it is determined whether the braked vehicle has stopped. This step is also a step following step 34. If the determination is negative in step 41, the process returns to step 21.

  If the determination in step 41 is affirmative, the ON / OFF determination IC 11 executes processing for determining whether or not the drive motor 30 is stopped (step 42). Note that whether or not the drive motor 30 is stopped is determined by checking a start or stop signal for the drive motor 30 stored in the RAM 40. If it is determined in step 42 that the drive motor 30 is operating, the process proceeds to step 21.

  If it is determined in step 42 that the drive motor 30 is stopped, the ON / OFF determination IC 11 issues an OFF request for the second CPU core 31 to the second power supply IC 13 (step 43). . The second power supply IC 13 that has received the OFF request cuts off the energized electricity. As a result, the electricity supplied to the second CPU core 31 and the like is cut off, and the power source of the second CPU core 31 and the like is turned off (step 44). When the power source of the second CPU core 31 or the like is turned off, the driving state transitions from “starting / low speed running” to “stopping” (step 45). The step following step 45 is step 11.

  Next, the processing executed by the ECU 100 when the driving state is “at the time of sudden acceleration / normal traveling” will be described in detail with reference to the flowchart shown in FIG. 5. Even when the driving state is “rapid acceleration / normal driving”, the ON / OFF determination IC 11 monitors the driving state of the vehicle (step 51). Step 51 is also a step that follows step 27 described above. The ON / OFF determination IC 11 executes processing for determining whether or not the battery capacity is less than a predetermined amount based on the output signal of the battery capacity sensor 63 (step 52).

  If it is determined in step 52 that the amount is less than the predetermined amount, the process returns to step 51. If it is determined in step 52 that the amount is greater than the predetermined amount, then the ON / OFF determination IC 11 executes a process of determining whether or not the accelerator pedal is depressed based on the output signal of the accelerator opening sensor 62 (step 53). If it is determined in step 53 that the accelerator pedal is depressed, the process returns to step 51.

  If it is determined in step 53 that the accelerator pedal is not depressed, then the ON / OFF determination IC 11 executes a process for determining whether or not the internal combustion engine 20 is stopped (step 54). Whether the internal combustion engine 20 is stopped is determined by checking a start or stop signal for the internal combustion engine 20 stored in the RAM 40. If it is determined in step 54 that the internal combustion engine 20 is operating, the process returns to step 51.

  If it is determined in step 54 that the internal combustion engine 20 is stopped, the ON / OFF determination IC 11 issues an OFF request for the first CPU core 21 to the first power supply IC 12 (step 55). The first power supply IC 12 that has received the OFF request cuts off the energized electricity. As a result, the electricity supplied to the first CPU core 21 and the like is cut off, and the power source of the first CPU core 21 and the like is turned off (step 56). When the power source of the first CPU core 21 and the like is turned off, the driving state transitions from “rapid acceleration / normal driving” to “deceleration / braking” (step 57).

  Next, the processing executed by the ECU 100 when the driving state is “during deceleration / braking” will be described in detail with reference to the flowchart shown in FIG. 6. Even when the driving state is “rapid acceleration / normal driving”, the ON / OFF determination IC 11 monitors the driving state of the vehicle (step 61). Step 61 is also a step that follows step 57 described above. The ON / OFF determination IC 11 executes a process for determining whether or not the vehicle speed is low based on the output signal of the vehicle speed sensor 61 (step 62). If it is determined that the vehicle speed is low, the driving state transitions from “deceleration / braking” to “starting / low-speed driving” (step 63). The step following step 63 is step 21.

  If it is determined in step 62 that the vehicle speed is not low, the ON / OFF determination IC 11 determines whether or not the battery capacity is less than a predetermined amount based on the output signal of the battery capacity sensor 63 (step 71). If it is determined that the amount is less than the predetermined amount, the ON / OFF determination IC 11 issues an ON request for the first CPU core 21 to the first power supply IC 12 (step 72). The first power supply IC 12 that has received the ON request energizes the blocked electricity. As a result, electricity is supplied to the first CPU core 21 and the like, and the power sources of these components are turned on (step 73).

  Subsequently, the first CPU core 21 whose power is turned on executes a process of accessing the RAM 40 and determining whether or not there is a request for starting the internal combustion engine 20 from the second CPU core 31 (step 74). . If it is determined in step 74 that there is no activation request, the process returns to step 61. If it is determined in step 74 that there is a start request, the first CPU core 21 executes a process for starting the internal combustion engine 20, and the internal combustion engine 20 is started based on the start signal output by this process. (Step 75). As a result, the driving state transitions from “deceleration / braking” to “rapid acceleration / normal driving” (step 76). The step subsequent to step 76 is step 51.

  If it is determined in step 71 that the battery capacity is greater than the predetermined amount, the ON / OFF determination IC 11 determines that “the brake pedal is not depressed” based on the output signals of the accelerator opening sensor 62 and the brake sensor 64. And a process of determining whether or not the accelerator pedal is depressed "(step 81). That is, it is determined whether the vehicle is accelerating. If the determination in step 81 is affirmative, the process proceeds to step 72.

  If the determination in step 81 is negative, the ON / OFF determination IC 11 executes a process for determining whether the power source of the first CPU core 21 or the like is turned off (step 82). If the determination in step 82 is affirmative, the process returns to step 61. If the determination in step 82 is negative, the ON / OFF determination IC 11 issues an OFF request for the first CPU core 21 to the first power supply IC 12 (step 83). The first power supply IC 12 that has received the OFF request cuts off the energized electricity. As a result, the electricity supplied to the first CPU core 21 and the like is cut off, and the power source of the first CPU core 21 and the like is turned off (step 84). The step following step 84 is step 61.

  As described above, according to the power management system 1 according to the present embodiment, the output signals of the various sensors 61, 62, 63, and 64 indicating the operation state, and the start and stop states of the internal combustion engine 20 or the drive motor 30 are illustrated. Based on the above, it is possible to reduce the power consumption without reducing the responsiveness of the ECU 100 by supplying and shutting off electricity to the first CPU core 21 or the like or the second CPU core 31 or the like as necessary. It is.

  In addition, the control object of ECU100 shown in the present Example is not restricted to two, A plurality may be sufficient. In other words, the ECU 100 may have three or more processors. Further, the control target of the ECU 100 is not limited to the internal combustion engine 20 and the drive motor 30. For example, each of the three cylinders of the V-type 6-cylinder internal combustion engine can be controlled. In this case, it is possible to reduce the power consumption of the ECU 100 in accordance with the cylinder reduction control in which the combustion in the three cylinders on one side is stopped when the vehicle is decelerated. As described above, it is possible to realize the power management system 1 that can reduce the power consumption without reducing the responsiveness of the ECU 100.

  The embodiment described above is a preferred embodiment of the present invention. However, the present invention is not limited to this, and various modifications can be made without departing from the scope of the present invention.

It is a figure which shows the structure of ECU100 containing the power supply management system 1 which concerns on a present Example. It is a figure which shows the driving | running state of a vehicle provided with each structure shown in FIG. 1 with a state transition diagram. It is a figure shown with a flowchart about the process performed by ECU100 when a driving | running state is "at the time of a stop." It is a figure shown with a flowchart about the process performed by ECU100 when a driving | running state is "at the time of start and low speed driving | running | working." It is a figure shown with a flowchart about the process performed by ECU100 when a driving | running state is "at the time of rapid acceleration and normal driving | running | working." It is a figure shown with a flowchart about the process performed by ECU100 when a driving | running state is "at the time of deceleration and braking."

Explanation of symbols

1 Power management system 11 ON / OFF judgment IC
12 First power supply IC
13 Second power supply IC
14 ROM for judgment IC
15 Input Circuit for Decision IC 20 Internal Combustion Engine 21 First CPU Core 22 First ROM
23 1st input circuit 24 1st output circuit 30 Motor for driving 31 2nd CPU core 32 2nd ROM
33 Second input circuit 34 Second output circuit 40 RAM
50 Battery 51 Main relay 100 Vehicle ECU

Claims (5)

A power management system for a vehicle electronic control device having a plurality of processors,
The plurality of processors include: a processor to which a control calculation corresponding to the function of the internal combustion engine is assigned; and a processor to which a control calculation corresponding to the function of the drive motor is assigned.
Based on the start or stop state of the function, a power management means for executing processing for controlling operation corresponding to the function to start or stop the processors assigned,
The power management system for an electronic control unit for a vehicle , wherein the process for stopping the processor is a process for cutting off power supply to the processor . A power management system for a vehicle electronic control device having a plurality of processors,
The plurality of processors include: a processor assigned a control calculation corresponding to the function of the internal combustion engine of the vehicle; and a processor assigned a control calculation corresponding to the function of the drive motor of the vehicle;
It said function on the basis of the operating state of the vehicle to determine whether to start or stop, when the function is determined start or stop, and start the processor control operation is allocated corresponding to the function or Power management means for executing a process for stopping ,
The power management system for an electronic control unit for a vehicle , wherein the process for stopping the processor is a process for cutting off power supply to the processor .   3. The vehicle electronic control device according to claim 1, wherein the processor and a resource provided for the processor are started or stopped based on a process for starting or stopping the processor. Power management system.   4. The power management system for a vehicle electronic control device according to claim 3, wherein the resource includes at least one of an input circuit, an output circuit, and a read storage device.   5. The power management system for a vehicle electronic control device according to claim 1, wherein at least the plurality of processors and a bus to which the processors are connected are integrated on a common chip. .

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