JP4881591B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a manufacturing technique of a semiconductor device, and more particularly to a technique effective when applied to a process of forming a protruding electrode by a plating method.

  In JP-A-11-8210 (Patent Document 1), when an Au (gold) film is formed by a plating method, an oxide film on the surface of the base metal film is first removed by flowing an alternating current through the plating solution. Then, a technique for improving the adhesion between the Au film and the base metal film by forming an Au film on the base metal film by passing a direct current through the plating solution is disclosed.

  Japanese Patent Application Laid-Open No. 7-197299 (Patent Document 2) discloses a technique for forming a bump electrode having a uniform height on a wafer by appropriately switching the current output to the anode electrode in the plating apparatus. Yes.

  Japanese Patent Laid-Open No. 2002-146595 (Patent Document 3) discloses that when a plating film is formed on a wafer by an electrolytic plating method, an alternating current application electrode is provided on the side opposite to the side on which the plating film is formed. , And applying AC power to the AC application electrode, a technique for increasing the film thickness uniformity of the plating film in the wafer surface is disclosed.

  In JP-A-6-326113 (Patent Document 4), by performing a plating process using a constant voltage source for a predetermined time from the start of plating, and thereafter performing a plating process using a constant current source, A technique capable of performing the same plating process as in a steady state from the start of the plating process is disclosed.

Japanese Patent Application Laid-Open No. 2003-64479 (Patent Document 5) discloses a technique for removing negative charges on the surface of a substrate by applying AC power to the substrate (wafer) as a pretreatment for electroless plating. Yes.
Japanese Patent Laid-Open No. 11-8210 JP-A-7-197299 JP 2002-146595 A JP-A-6-326113 JP 2003-64479 A

  In a manufacturing process of a glass package diode formed by pressure-bonding an Ag (silver) bump electrode and a lead (Dumet wire), a plating method is used in forming the bump electrode. To form bump electrodes by plating, for example, a metal film that forms the base of the plating film is selectively formed using vapor deposition and lift-off, and then the plating film is grown on the base film using plating. Means are used. The present inventor has found that the following problems exist when the bump electrode is formed by such means.

  That is, a convex part may be formed on the surface of the base film formed by the vapor deposition method, and if a bump electrode is formed by a plating method in a situation where such a convex part exists, Since the plating film is formed following the base step, a convex portion is formed even on the surface of the bump electrode. If a bump is formed on the surface of the bump electrode, the contact area between the bump electrode and the jumet wire to which the bump electrode is connected will be reduced. There is a problem that the value increases and the voltage characteristics of the diode become different from the desired characteristics. Further, since the contact area between the bump electrode and the dumet line is reduced, there is a problem that the contact strength between the bump electrode and the dumet line is lowered.

  An object of the present invention is to provide a technique capable of preventing an undesirable protrusion from being formed on the surface of a bump electrode formed by a plating method.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

A method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device having a protruding electrode formed by plating,
(A) forming a first metal film selectively on the main surface of the semiconductor wafer;
(B) using the first metal film as a base film, and forming the protruding electrode on the first metal film by a plating method;
Including
The step (b)
(B1) performing a plating process by applying a first alternating current power of a first current value to the semiconductor wafer for a first time;
(B2) After the step (b1), the first polar component for growing the protruding electrode is larger than the second polar component opposite to the first polar component, and the first polar component is the second Applying a plating process by applying a second AC power of a current value to the semiconductor wafer for a second time;
Is included.

Further, a method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device having a protruding electrode formed by a plating method,
(A) forming a first metal film selectively on the main surface of the semiconductor wafer;
(B) using the first metal film as a base film, and forming the protruding electrode on the first metal film by a plating method;
Including
The step (b)
(B1) performing a plating process by applying a first alternating current power of a first current value to the semiconductor wafer for a first time;
(B2) After the step (b1), a step of performing a plating process by applying a first DC power having a second current value of a first polarity for growing the protruding electrode to the semiconductor wafer for a second time. ,
Is included.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  When the bump electrode (projection electrode) is formed by plating, it is possible to prevent an undesirable convex from being formed on the surface of the bump electrode.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  The semiconductor device of the present embodiment is a glass package diode formed by, for example, a bump electrode and a lead (Dumet wire) being crimped and connected. A manufacturing process of the semiconductor device according to the present embodiment will be described with reference to FIGS.

First, a wafer-like n-type high-concentration substrate (semiconductor wafer) 1 made of Si (silicon) doped with an n-type impurity (for example, Sb (antimony)) at a high concentration is prepared. For example, the concentration of the n-type impurity doped in the n-type high-concentration substrate 1 is, for example, about 1 × 10 ¹⁹ / cm ³ to 1 × 10 ²⁰ / cm ³ .

Subsequently, an n-type low concentration layer 2 is formed by epitaxially growing an n-type Si layer doped with an n-type impurity (for example, P (phosphorus)) on the main surface of the n-type high concentration substrate 1. The n-type low concentration layer 2 has a resistivity of about 100 Ωcm or more, a thickness of about 15 μm, for example, and a concentration of doped n-type impurities is 1 × 10 ¹⁶ / cm ³ to 1 ×. An example is about 10 ¹⁹ pieces / cm ³ .

  Subsequently, a thermal oxidation process is performed on the n-type high concentration substrate 1 to form a silicon oxide film 3 having a thickness of about 0.4 μm to 1 μm on the surface of the n-type low concentration layer 2.

  Next, as shown in FIG. 2, a photoresist film 4 is formed on the silicon oxide film 3 on the surface of the n-type low-concentration layer 2, and this photoresist film 4 is patterned by a photolithography technique so that the openings are formed. Form. Subsequently, the silicon oxide film 3 is etched using the photoresist film 4 as a mask, and an opening for forming a p-type diffusion layer to be formed in the next step on the silicon oxide film 3 on the surface of the n-type low concentration layer 2 6 is formed selectively.

Next, a doping material such as PBF (Poly Boron Film) is applied on the n-type low concentration layer 2 including the inside of the opening 6. Subsequently, by annealing the n-type high concentration substrate 1 in an atmosphere of about 900 ° C., the n-type low concentration layer 2 is doped with B (boron) as a p-type impurity, and the p-type diffusion layer 7 Form. Subsequently, in a N ₂ (nitrogen) atmosphere, the n-type high concentration substrate 1 is subjected to a heat treatment at about 1000 ° C., thereby forming a pn junction between the p-type diffusion layer 7 and the n-type low concentration layer 2. A diode element can be formed.

  Next, as shown in FIG. 3, a metal film (about 1.0 μm thick) made of Pd (palladium) and Ag (silver) is formed on the photoresist film 4 including the inside of the opening 6 by using, for example, a vapor deposition method. A first metal film 8) is deposited. Subsequently, as shown in FIG. 4, the photoresist film 4 is removed by a lift-off method, and the metal film 8 is left in the opening 6. Next, as shown in FIG. 5, a bump electrode (projection electrode) BMP having a height of about 35 μm is formed by, for example, growing an Ag film from the metal film 8 in the opening 6 by plating.

  By the way, as shown in FIG. 6, the convex part 8A about 1 micrometer-2 micrometers in height may be formed in the metal film 8 formed into a film by the vapor deposition method. When bump electrode BMP is formed by a plating method using a direct current power source in a situation where such a convex portion 8A is present on the surface of underlying metal film 8, the growth of Ag film to become bump electrode BMP is increased. The inventor has found that the outer shape is reflected and the convex portion T1 is formed on the surface of the bump electrode BMP (see FIG. 7). If such a convex portion T1 is formed, the contact area between the bump electrode BMP and the dumet line is reduced when the bump electrode BMP and the dumet line are connected in a later step. In addition, the resistance value increases at the connection portion between the bump electrode BMP and the dumet line, and there arises a problem that the voltage characteristics of the diode are different from the desired characteristics. In addition, since the contact area between the bump electrode BMP and the dumet line is reduced, there is a problem that the contact strength between the bump electrode and the dumet line is lowered.

  Here, the present inventor has found that the projection 8A on the surface of the metal film 8 can be etched when the bump electrode BMP is formed by a plating method using an AC power supply. That is, the alternating current acts so that one polar component (first polar component) grows the plating film and the other (second polar component) acts to etch. Therefore, in the present embodiment, the bump electrode BMP is formed by a plating method using an AC power supply having a current waveform as shown in FIG. That is, for about 7 minutes (first time) from the start of the plating process, for example, by applying an alternating current (first alternating current power) having a current value of about 60 mA (first current value), the metal film 8 is formed. Etching is about 1 μm to 2 μm. Thereby, the convex portion 8A on the surface of the metal film 8 is removed. Subsequently, an AC current (second AC power) having a waveform in which only a polar component for growing an Ag film serving as the bump electrode BMP rises to, for example, about 400 mA (second current value) in the current waveform. By applying for about 60 minutes (second time), a bump electrode BMP having a height of about 35 μm is formed. Thereby, it can prevent that convex part T1 will be formed in the surface of bump electrode BMP. According to an experiment conducted by the present inventor, the yield could be improved by about 10% compared to the case where the plating process was performed using only a direct current. As a result, it is possible to prevent the contact area between the bump electrode BMP and the dumet line from being reduced when the bump electrode BMP and the dumet line are connected in a later process. It is possible to prevent an increase in resistance value at the connection portion. That is, it is possible to prevent the voltage characteristics of the diode from becoming different from the desired characteristics. Moreover, since it can prevent that the contact area of bump electrode BMP and a dumet line shrinks, the fall of the contact strength of a bump electrode and a dumet line can be prevented.

  Further, instead of applying an alternating current having a waveform as shown in FIG. 8, a current having a waveform as shown in FIG. 9 may be applied. That is, the waveform until the protrusion 8A is removed by etching of the metal film 8 is the same as the waveform of the alternating current shown in the figure, but thereafter the polarity (first first) for growing the Ag film to be the bump electrode BMP Polarity) of about 400 mA DC current (first DC power) is applied for about 60 minutes (second time). The same effect can be acquired also by that.

  Next, as shown in FIG. 10, the back surface of the n-type high-concentration substrate 1 is ground by grinding, and the n-type high-concentration substrate 1 is thinned according to the package form described later. Subsequently, the back surface of the n-type high concentration substrate 1 is etched by, for example, a wet etching method using a spin etching apparatus.

  Subsequently, after cleaning the n-type high concentration substrate 1, an Ag (silver) film is deposited on the back surface of the n-type high concentration substrate 1 using, for example, a sputtering method to form the back electrode 17. Subsequently, the unit element of the diode formed on the n-type high concentration substrate 1 is divided by dicing to form the semiconductor chip 18 having the diode of the unit element.

  Next, as shown in FIG. 11, a comparatively long dumet line for forming a dumet electrode is prepared. This dumet wire is formed of, for example, a cylindrical core portion made of an alloy mainly composed of Fe (iron) and Ni, and a coating layer mainly composed of Cu formed on the outer periphery of the core portion. ing. Subsequently, the jumet line is cut into a predetermined length using, for example, a diamond cutter, etc., to form the jumet electrodes 21 and 22. The dumet electrode 22 is not shown in FIG. 11 because it is used in a later process.

  Next, the external lead 23 is connected (welded) to the center position of the end face of the dumet electrode 21 or its vicinity, and the external lead 24 is connected (crimped) to the center position of the end face of the dumet electrode 22 or its vicinity. For example, an arc welding method or a spot welding method can be applied to the connection between the external lead 23 and the dumet electrode 21 and the connection between the external lead 24 and the dumet electrode 22. In addition, after connecting (welding) the external lead 23 (external lead 24) to the cross section of the jumet wire for forming the jumet electrodes 21, 22, the dumet wire is cut and the external lead 23 (external lead 24) is connected (welded). ) Formed dumet electrode 21 (jumet electrode 22) can also be formed. Note that the external lead 24 and the dumet electrode 22 have substantially the same structure as the external lead 23 and the dumet electrode 21, and are not shown in FIG.

  Next, glass sealing is performed using the assembly jig 25. A plurality of circular holes are provided in a lattice shape on the upper surface of the assembly jig 25. The hole is formed in the upper surface of the assembly jig 25. The dumet electrode 21 to which the external lead 23 is connected as described above is inserted into each hole portion of the assembly jig 25 with the jumet electrode 21 side facing up (the external lead 23 side facing down).

  Next, the jumet electrode 21 is fitted in the glass tube 27 used as a glass sealing body.

  Next, as shown in FIG. 12, the semiconductor chip 18 is put into the glass tube 27. Thereby, the semiconductor chip 18 is disposed on the jumet electrode 21 in the hole of the glass tube 27. At this time, either the main surface (surface on the bump electrode BMP formation side) or the back surface (surface on the back electrode 17 formation side) of the semiconductor chip 18 may face upward.

  Next, as shown in FIG. 13, the jumet electrode 22 to which the external lead 24 is connected is placed in the hole of the assembly jig 25 with the jumet electrode 22 side facing down (the external lead 24 side facing up). Insert (insert). Thereby, the jumet electrode 22 is fitted in the hole of the glass tube 27. The semiconductor chip 18 is sandwiched between jumet electrodes 21 and 22. Then, if necessary, a load is applied to the dumet electrode 22 using a pressurizing device (not shown), thereby pressing the dumet electrodes 21 and 22 against the semiconductor chip 18.

  Next, the assembly jig 25 in which the jumet electrodes 21 and 22, the semiconductor chip 18 and the glass tube 27 are set is put into a glass sealing heating device (not shown) and heated at a predetermined temperature. Thereby, the glass tube 27 is melted and the glass tube 27 is fused to the outer peripheral surfaces of the jumet electrodes 21 and 22. After heating, it is cooled and the glass tube 27 is cured to form a glass sealed body. Thereby, each member is fixed and a diode package as shown in FIG. 14 is manufactured. Since the glass sealing body and the outer circumferences of the dumet electrodes 21 and 22 are bonded, the semiconductor chip 18 located between the dumet electrode 21 and the dumet electrode 22 is hermetically sealed. The manufactured package is taken out from the assembly jig 25, a test for examining the polarity of the package is performed, the anode side and the cathode side of the package are discriminated, and marking is performed as necessary. In the process of mounting the package on the wiring board, the external leads 23 and 24 are connected to the wiring pattern of the wiring board via solder or the like.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above-described embodiment, the case where the bump electrode of the diode is formed by the plating method has been described. However, a similar bump electrode forming process can be applied to other semiconductor devices having a bump electrode (for example, a liquid crystal display (LDC) driver). The bump electrode formed on the chip) can also be applied.

  The semiconductor device manufacturing method of the present invention can be applied, for example, in a manufacturing process of a diode having a bump electrode and electrically connected to the outside by the bump electrode.

It is principal part sectional drawing explaining the manufacturing method of the semiconductor device which is one embodiment of this invention. FIG. 2 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 1; FIG. 3 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 2; FIG. 4 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 3; FIG. 5 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 4; It is principal part sectional drawing explaining the convex part formed in the metal film formed into a film by the vapor deposition method. FIG. 7 is a cross-sectional view of a main part for explaining the convex portion formed on the bump electrode when the bump electrode is formed by plating in the presence of the convex portion shown in FIG. 6. FIG. 6 is an explanatory diagram showing a current waveform of an AC power supply used during the manufacturing process of the semiconductor device shown in FIG. 5. FIG. 6 is an explanatory diagram showing a current waveform of an AC power supply used during the manufacturing process of the semiconductor device shown in FIG. 5. It is principal part sectional drawing in the manufacturing process of the semiconductor device which is one embodiment of this invention. It is principal part sectional drawing in the manufacturing process of the semiconductor device which is one embodiment of this invention. FIG. 12 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 11; FIG. 13 is a fragmentary cross-sectional view of the semiconductor device during a manufacturing step following that of FIG. 12; FIG. 14 is an essential part cross sectional view of the semiconductor device during a manufacturing step following FIG. 13;

Explanation of symbols

1 n-type high concentration substrate (semiconductor wafer)
2 n-type low concentration layer 3 silicon oxide film 4 photoresist film 6 opening 7 p-type diffusion layer 8 metal film (first metal film)
8A Convex part 17 Back electrode 18 Semiconductor chip 21, 22 Jumet electrode 23, 24 External lead 25 Assembly jig 27 Glass tube BMP Bump electrode (projection electrode)
T1 convex part

Claims (4)

A method for manufacturing a semiconductor device having a protruding electrode formed by plating,
(A) forming a first metal film selectively on the main surface of the semiconductor wafer;
(B) using the first metal film as a base film, and forming the protruding electrode on the first metal film by a plating method;
Including
The step (b)
(B1) said first AC processing power you apply a first current value to the semiconductor wafer and the first time facilities, etching the first metal film process,
(B2) After the step (b1), the first polar component for growing the protruding electrode is larger than the second polar component opposite to the first polar component, and the first polar component is the second Applying a plating process by applying a second AC power of a current value to the semiconductor wafer for a second time;
A method for manufacturing a semiconductor device, comprising: In the manufacturing method of the semiconductor device according to claim 1,
In the step (b1), the protrusion on the surface of the first metal film is removed. A method for manufacturing a semiconductor device having a protruding electrode formed by plating,
(A) forming a first metal film selectively on the main surface of the semiconductor wafer;
(B) using the first metal film as a base film, and forming the protruding electrode on the first metal film by a plating method;
Including
The step (b)
(B1) said first AC processing power you apply a first current value to the semiconductor wafer and the first time facilities, etching the first metal film process,
(B2) After the step (b1), a step of performing a plating process by applying a first DC power having a second current value of a first polarity for growing the protruding electrode to the semiconductor wafer for a second time. ,
A method for manufacturing a semiconductor device, comprising: In the manufacturing method of the semiconductor device according to claim 3,
In the step (b1), the protrusion on the surface of the first metal film is removed.

Images