JP4862500B2 - Soft start circuit and semiconductor device - Google Patents

Description

  The present invention relates to a soft start circuit based on D / A (Digital to Analog) conversion technology and a semiconductor device using the soft start circuit.

  In a switching power supply, a soft start function may be provided for the purpose of preventing an inrush current or an overshoot generated in a power supply circuit when the power supply is activated. The soft start function is realized by limiting the reference voltage, the on-duty ratio (or simply the duty ratio, the ratio of the switching element on time and the switching period in the switching period) or the output current for a certain period from the start of startup. The

FIG. 4 shows an example of a switching power supply having a soft start function. FIG. 4 shows a PWM (pulse width modulation) step-down DC / DC converter that generates an output voltage Vo from a power supply voltage VDD and supplies the output voltage Vo to a load Z. This DC / DC converter includes an error amplifier 1, a soft start circuit (soft start signal generation circuit) for generating a soft start signal Vs 2, an oscillator 3 for generating a triangular wave Vosc 3, a PWM comparator 4, a P-channel MOSFET 5 as a switching element, and a synchronization Drive circuit 7 for driving P-channel MOSFET 5 and N-channel MOSFET 6 according to the output of N-channel MOSFET 6 and PWM comparator 4 as a commutation type commutator, inductor 8 and capacitor 9, and resistors 10 and 11 serving as feedback means for voltage setting , And an output terminal 12. A power supply line 13 is supplied with a power supply voltage VDD from an input power supply. A soft start signal Vs output from the soft start circuit 2 is input as a reference voltage to the non-inverting input terminal of the error amplifier 1, and a resistor 14 and a capacitor 15 are connected as a phase compensation element between the output terminal and the inverting input terminal. Has been. The initial value of the soft start signal Vs is the ground potential (GND). When the operation is started, the value is increased. When the maximum value Vref0 is reached, the maximum value is maintained and the error amplifier 1 is supplied with the reference voltage Vref0. Signal. An error signal Verr, which is an output signal of the error amplifier 1, is input to the non-inverting input terminal of the PWM comparator 4, and a triangular wave Vosc is input to the inverting input terminal. The PWM comparator 4 compares the error signal Verr and the triangular wave Vosc. When the error signal Verr is larger, H (high level) is selected. When the error signal Verr is smaller, L (low level) is converted to the PWM signal (PWM SIGNAL). ) To the drive circuit 7. The drains of the P-channel MOSFET 5 and the N-channel MOSFET 6 are connected to each other and to one end of the inductor 8. The sources of the P-channel MOSFET 5 and N-channel MOSFET 6 are connected to the power supply line 13 and GND, respectively. The other end of the inductor 8 is connected to the output terminal 12. A series circuit of a capacitor 9 and resistors 10 and 11 is connected between the output terminal 12 and GND. The potential at the connection point between the resistors 10 and 11 is input to the inverting input terminal of the error amplifier 1 as a feedback signal _VFB . A load 16 is connected to the output terminal 12 as a load of the DC / DC converter.

The operation of this DC / DC converter will be briefly described below. First, the steady state in which the soft start signal Vs is the reference voltage Vref0 having the maximum value will be described.
The error amplifier 1 inputs an error signal Verr obtained by amplifying the difference between the reference voltage Vref0 and the feedback signal _VFB to the PWM comparator 4. The PWM comparator 4 compares the error signal Verr with the triangular wave Vosc, thereby generating a square wave pulse (PWM signal) whose period is constant but the ratio of H and L in one period varies depending on the output of the error amplifier 1. 7 to the gate of the P-channel MOSFET 5. That is, as (Vref0−V _FB ) is larger (smaller), a square wave pulse is generated such that the period during which the P-channel MOSFET 71 is turned on in one cycle becomes longer (shorter), and the energy accumulated in the inductor 6 becomes larger (smaller). ) To keep the output voltage V _O constant. A square wave pulse is similarly output to the gate of the N-channel MOSFET 6. Basically, the square wave pulses output to the gates of the P-channel MOSFET 5 and the N-channel MOSFET 6 are in phase, but both are turned off so that the P-channel MOSFET 5 and the N-channel MOSFET 6 are simultaneously turned on and no through current flows. A dead time that is a period of

Next, consider when the power supply starts. Since the output voltage is insufficient immediately after the switching power supply is started, if the soft start signal Vs as the reference voltage is the reference voltage Vref0 from the beginning, the feedback signal _VFB is initially zero (ground potential). The error signal Verr becomes very large, and a drive pulse that maximizes the on-duty ratio (duty ratio) of the switching element (corresponding to the P-channel MOSFET 5 in the DC / DC converter of FIG. 4) is output. However, since the output capacitor (corresponding to the capacitor 9 in FIG. 4) is uncharged immediately after the start-up, the output current apparently becomes almost equal to the short-circuit state, so that the current flowing through the inductor (corresponding to the inductor 8 in FIG. 4) It grows indefinitely. Therefore, a large current flows through the inductor and the switching element, and these elements may be destroyed. Therefore, by gradually increasing the reference voltage applied to the error amplifier 1 by the soft start function, the current flowing through the inductor is gradually increased so that the error signal Verr and the duty ratio of the switching element do not become too large, and the output capacitor The system is gradually charged. The soft start circuit 2 will be further described with reference to FIGS.

  FIG. 5 is a circuit diagram of a conventional soft start circuit 2 that generates a soft start signal Vs by applying a D / A (Digital to Analog) conversion technique, and FIG. 6 is a timing chart showing its operation waveforms. In FIG. 5, Vin is an input terminal of the soft start circuit 2 and its input voltage is also set to Vin for convenience. A resistor string in which k resistors Rss1, Rss2,..., Rssk are connected in series is connected between the input terminal Vin and GND to constitute a voltage dividing circuit. Transmission gates TG1, TG2,... At the input terminal Vin, the connection point between the resistors Rss1 and Rss2, the connection point between the resistors Rss2 and Rss3,. One end of TGk is connected, and the other ends of these transmission gates are connected in common to one end of capacitor Css. The other end of the capacitor Css is grounded. One end of the capacitor Css is connected to the output terminal SoftStart of the soft start circuit 2, and the potential at one end of the capacitor Css (the voltage across the capacitor Css) becomes the soft start signal Vs. The operations (on / off) of the transmission gates TG1, TG2,..., TGk are controlled by the shift register SR and k inverters IV1,. That is, if the i-th output Qi of the shift register SR is H, the transmission gate TG (k−i + 1) is turned on, the connection point between the resistor Rss (k−i + 1) and the resistor Rss (k−i) and the capacitor Css. One end is connected (when i = k, the input voltage Vin and one end of the capacitor Css are connected). If the i-th output Qi of the shift register SR is L, the transmission gate TG (k−i + 1) is turned off. The initial value of the outputs Q1, Q2,..., Qk of the shift register SR is L.

  When the operation of the shift register SR starts, first, only the output Q1 becomes H. In the next operation, the state H of Q1 is shifted to Q2, and Q1 becomes L again. Hereinafter, when the state H is sequentially shifted from Q2 → Q3 →... → Qk and the state H is shifted to the last Qk, Qk keeps the state H thereafter. As a result, transmission gates TGk, TG (k-1),..., TG1 are sequentially turned on in this order (in these operations, only one transmission gate is turned on and the other transmission gates are turned on). Are all off). As a result, the divided voltage that increases as the operation of the shift register SR proceeds is connected to the capacitor Css, and the voltage across the capacitor Css also gradually increases. That is, after a while after the transmission gate TGi is turned on, the voltage across the capacitor Css reaches Vin × (Rssk +... + Rss (k−i + 1)) / (Rssk +. When TG (i-1) is turned on, this value is used as an initial value, and the operation of starting the charging operation of the CR circuit is repeated.

Eventually, the soft start circuit 2 continues to output the input voltage Vin. That is, the input voltage Vin becomes the reference voltage Vref0 which is a reference voltage in a steady state of the DC / DC converter. In the steady state, the DC / DC converter operates so as to virtually short-circuit the two inputs (Vref0 and _VFB ) of the error amplifier 1, so that the output voltage Vo is Vo = Vref0 × (R10 + R11) / R11. Here, R10 and R11 are resistance values of the resistors 10 and 11, respectively. As can be seen, since the value of the output voltage Vo is determined by the reference voltage Vref0, the accuracy of the reference voltage Vref0 is important. That is, since the variation in the reference voltage Vref0 is directly linked to the variation in the output voltage Vo, it is necessary to increase the accuracy of the input voltage Vin = the reference voltage Vref0.

  In order to generate a highly accurate reference voltage, once a constant voltage is generated, the constant voltage is divided or boosted by a voltage dividing / boosting circuit using an operational amplifier circuit and a resistor string, and the resistors constituting the resistor string are trimmed Then, a highly accurate divided voltage or boosted voltage may be obtained and used as a reference voltage (see, for example, Patent Documents 1 and 2). Such a circuit will be described below with reference to FIGS.

  FIG. 7 is a power control IC (semiconductor integrated circuit) that controls a switching power source such as a DC / DC converter by generalizing the voltage variable regulator disclosed in Patent Document 1 and further combining a soft start circuit 2. Applies to The power supply voltage supplied from the outside to the power supply control IC may not be stable, and as it is, the stable operation of the power supply control IC may be hindered. This is addressed by the internal power supply LDO shown in FIG. The internal power supply LDO is a low dropout type series regulator that generates an internal voltage Vreg from a power supply voltage VDD supplied from the outside and supplies it to an internal circuit of the power supply control IC. Even if the power supply voltage VDD fluctuates, the internal voltage Vreg maintains a constant value, so that the power supply control IC can continue a stable operation. Further, a reference voltage that does not require so much accuracy can be easily generated by dividing the internal voltage Vreg.

  The circuit shown in FIG. 7 operates using the internal voltage Vreg as a power source. The reference voltage generation circuit REFER, the operational amplifier circuit OPA, the first switch circuit SW1, the second switch circuit SW2, the P-channel MOS transistor PM1, the resistor Rn, R2,..., Rn and soft start circuit 2 are provided. The reference voltage generation circuit REFER generates the first reference voltage Vref, and a band gap reference circuit or the like can be used. However, the reference voltage generation circuit REFER is not limited to the band gap reference circuit. The output of the reference voltage generation circuit REFER is preferably stable (constant) with respect to temperature change. The first reference voltage Vref1, which is the output of the reference voltage generation circuit REFER, is input to the inverting input terminal of the operational amplifier circuit OPA. The output Vout of the operational amplifier circuit OPA is connected to the gate of the P channel MOS transistor PM1. The internal voltage Vreg is supplied to the reference voltage generation circuit REFER, the power supply of the operational amplifier circuit OPA, and the source of the P-channel MOS transistor PM1, respectively. Resistors R1, R2,..., Rn are connected in series between the drain of the P-channel MOS transistor PM1 and GND to form a resistor string. The connection point between the drain of the P-channel MOS transistor PM1 and the resistor R1, the connection point between the resistor R1 and the resistor R2,..., The connection point between the resistor R (n-1) and the resistor Rn are connected to the switch circuits SW1 and SW2, respectively. Has been. The switch circuit SW1 short-circuits both ends of the designated resistor among the resistors R1, R2,..., Rn, and further connects the designated connection point among the connection points to the non-inverting input terminal of the operational amplifier circuit OPA. It works to connect. The switch circuit SW2 selects a designated connection point from the above connection points, and connects the potential to the input of the soft start circuit 2. The connection point selected by the switch circuit SW1 and the connection point selected by the switch circuit SW2 may or may not match. It is possible to obtain the second reference voltage Vref2 whose voltage is precisely adjusted by trimming the resistor strings R1, R2,..., Rn by the switch circuits SW1 and SW2 and selecting a connection point to be taken out to the outside. it can. Thereby, the soft start circuit 2 can supply the error amplifier 1 with a highly accurate reference voltage.

  The P-channel MOS transistor PM1 in the circuit of FIG. 7 is provided in the power supply control IC to serve as an output buffer of the operational amplifier circuit OPA. In order to ensure a sufficient current capacity, The chip size often occupies a relatively large area. When emphasizing the chip size of the power supply control IC, the resistor strings R1, R2,..., Rn are directly driven by the operational amplifier circuit OPA (as a current is supplied), as described in Patent Document 2, without using a buffer transistor. Will be). The configuration in this case is shown in FIG. In the circuit shown in FIG. 8, the P-channel MOS transistor PM1 in FIG. 7 is eliminated, and one end of the resistor R1 connected to the P-channel MOS transistor PM1 in FIG. 7 is directly connected to the output terminal of the operational amplifier circuit OPA. is there. Since the logic is reversed without the P-channel MOS transistor PM1, the inverting input terminal and the non-inverting input terminal of the operational amplifier circuit OPA are interchanged with respect to FIG. The rest is the same as FIG. Since this circuit directly drives the resistor strings R1, R2,..., Rn with the output of the operational amplifier circuit OPA, the current that can be passed through the resistor string is limited.

  FIG. 9 shows a configuration example of the switch circuit SW2. In FIG. 9, the switch circuit SW2 includes switches S1 to S (n-1) as transmission gates, inverters IV11 to IV1 (n-1), and a selection circuit SEL. One end of each of the switches S1 to S (n-1) is connected to a connection point between the resistors R1 and R2,..., A connection point between the resistors R (n-1) and Rn, and the other end is connected in common. The output is Vref2. Outputs SE1 to SE (n-1) of the selection circuit SEL control on / off of the switches S1 to S (n-1) together with signals inverted by the inverters IV11 to IVI (n-1), respectively. The selection circuit SEL sets the corresponding output Sj to H so that only the switch Sj instructed from the outside is turned on, and sets all other outputs to L. As a result, the divided voltage obtained from the connection point between the resistors Rj and R (j−1) is output from the switch circuit SW2 as the reference voltage Vref2.

  On the other hand, in recent years, the number of small devices such as mobile phones that require a plurality of power supply voltages has increased, and the power supply control IC is also required to have a multi-output type that can handle a plurality of voltages. A power supply system using a multi-output type power supply control IC requires as many voltages as the circuit shown in FIG. 4 including the soft start circuit to support a plurality of voltages. 4, at least the error amplifier 1, the soft start circuit 2, the oscillator 3, the PWM comparator 4, and the drive circuit 7 that generate the triangular wave Vosc are integrated in the power supply control IC. The soft start circuit 2 and the error amplifier 1 to which the output of the soft start circuit 2 is input are also provided in the corresponding number of voltages, but it is difficult to accurately match the offset voltages of the plurality of error amplifiers. Usually each has a different value. Accordingly, the reference voltage value Vref2, which is the final value of the soft start signal, needs to be individually set so as to obtain an accurate output voltage by canceling the offset voltage of each error amplifier. The configuration of the soft start circuit of the multi-output type power supply control IC corresponding to this and the circuit for supplying the input voltage are shown in FIGS.

FIG. 10 shows a circuit configuration for generating input voltages (reference voltages) Vref21 to Vref2m to m soft-start circuits in a multi-output type power supply control IC corresponding to m types of output voltages. One switch circuit SW2 is replaced with a plurality of switch circuits SW21 to SW2m and connected in parallel to the resistor string. The switch circuits SW21 to SW2m output voltages Vref21 to Vref2m, respectively. The configuration of each of the switch circuits SW21 to SW2m is the same as that of the switch circuit SW2 shown in FIG. 9, but functions to select and output a voltage that can most cancel the offset voltage of the corresponding error amplifier. The output voltages Vref21 to Vref2m of the switch circuits SW21 to SW2m are input to m soft start circuits 21 to 2m, respectively, as shown in FIG. Each of the soft start circuits 21 to 2m has the same configuration as that of the soft start circuit 2 shown in FIG. Accordingly, each of the soft start circuits 2 applies the reference voltages Vref21 to Vref2m to the corresponding error amplifiers as the final values of the soft start signals Vs1 to Vsm, respectively.
JP 2003-330551 A JP-A-3-38706

  Since each soft start circuit provided in the multi-output type power supply control IC is provided with a resistor string between the input terminals Vin and GND as shown in FIG. 5, the input terminals as shown in FIG. Currents I1 to Im always flow from Vin to the start circuits 21 to 2m, respectively (Ij = Vref2j / (Rss1 +... + Rssk)). The currents I1 to Im are supplied from the drain of the P-channel MOS transistor PM1 through the switch circuits SW21 to SW2m shown in FIG.

On the other hand, in FIG. 10, since the plurality of reference voltages Vref21 to Vref2m are not the same value, some of the switch circuits SW21 to SW2m select connection points other than the connection point of the P-channel MOS transistor PM1 and the resistor R1. . Since the normal reference voltages Vref21 to Vref2m are obtained by stepping down Vref1, the connection points between the P-channel MOS transistor PM1 and the resistor R1 are often not selected by the switch circuits SW21 to SW2m. Accordingly, some or all of the currents I1 to Im flow through the resistor R1 in FIG. In particular, when the reference voltages Vref21 to Vref2m are generated by stepping down Vref1 as described above, all the currents I1 to Im flow through the resistor R1. The following problems occur from this state.
(1) The voltage drop at the resistor R1 becomes too large. Since the current flowing through the resistor R1 increases by the number of soft start circuits, the voltage drop increases accordingly. As a result, if the voltage VDD is not so high, the operational amplifier circuit OPA and the P-channel MOS transistor PM1 may be able to cope with the potential of the non-inverting input terminal of the operational amplifier circuit OPA virtually short-circuited to the voltage Vref1. When the voltage drop in the resistor R1 is considered, the drain potential of the P-channel MOS transistor PM1 needs to be higher than the voltage VDD). In other words, if the number of soft start circuits increases, these cannot be driven.
(2) The values of the reference voltages Vref21 to Vref2m become unstable. Each of the switch circuits SW21 to SW2m selects the divided voltage on the assumption that the currents flowing through the resistors R1 to Rn are equal or unchanged, but this condition is lost. In FIG. 9, the resistor R1 has a corresponding or all of the currents I1 to Im flowing to the maximum current, and the current flowing to the resistor Rn is irrelevant to the currents I1 to Im. The flowing currents are not equal. Further, the values of the currents I1 to Im change depending on whether or not the capacitor Css built in each soft start circuit 21 to 2m is being charged. That is, in the circuit of FIG. 5, if the voltage across the capacitor Css is equal to the voltage of the input Vin and charging is completed, the current flowing through the input terminal Vin is only that flowing through the resistor string Rss1 to Rssk. If present, a current for charging the capacitor Css is added thereto. The charging current of the capacitor Css increases as the voltage across the capacitor Css is lower than the final charging value. As a result, the currents I1 to Im vary, and the reference voltages Vref21 to Vref2m also vary. For example, even if the operation of the soft start circuit 2p (1 ≦ p ≦ m) is completed and the output voltage is maintained at a constant value Vref2p, if the operation of another soft start circuit starts thereafter, the influence is received. Thus, the reference voltage Vref2p varies.
(3) Not suitable for current saving. First, in order to reduce the voltage drop due to the resistor R1 described in (1), it is necessary to lower the resistance value of the resistor R1. In that case, in order to obtain an appropriate voltage division from the resistor string, it is necessary to reduce the resistance values of the other resistors R2 to Rn. As a result, the current flowing through the resistor strings R1 to Rn to the GND increases.

  If the P-channel MOS transistor PM1 is omitted in order to reduce the chip size of the power supply control IC as described above, the operational amplifier circuit OPA directly drives the resistor strings R1, R2,. The operational amplifier circuit OPA used here is often configured as an output unit shown in FIG. 12 in order to obtain a stable current supply. The output section of the operational amplifier OPA shown in FIG. 12 includes a constant current source Io and an N channel MOS transistor NM1 connected in series between the power supply Vreg and GND, and a connection point between the constant current source Io and the N channel MOS transistor NM1. Is the output signal Vout of the operational amplifier circuit OPA. CSIG is a control signal for controlling the N-channel MOS transistor NM1. By controlling the current flowing in the N-channel MOS transistor NM1 among the currents supplied from the constant current source Io by the signal CSIG, a predetermined current is supplied to the outside from the output Vout. Accordingly, the value of the constant current supplied from the constant current source Io (also referred to as Io for convenience) needs to be equal to or greater than the total value of the currents I1 to Im. If Io = I1 +... + Im, the output current does not increase any more and there is no margin for the operation of the operational amplifier circuit OPA. Therefore, the constant current source Io is set so that Io = (1 + α) (I1 +. Is set (α> 0). That is, in addition to the current I1 +... + Im flowing into the soft start circuits 21 to 2m, an extra current α (I1 +... + Im) is consumed. This current increases as the number of soft start circuits, that is, the number of output voltages corresponding to the power supply control IC increases.

  The present invention has been made in view of the above points, and an object of the present invention is to solve the above-described problems, provide a soft reference circuit capable of providing a stable reference voltage and saving current, and a semiconductor device using the same Is to provide.

  In order to solve the above problem, the invention according to claim 1 includes a plurality of resistors connected in series between the first reference voltage on the low potential side and the second reference voltage on the high potential side. A first resistor string, a plurality of switch means each connected to a connection point connecting two adjacent resistors in the plurality of first resistor strings, and one end connected to a third reference voltage; A capacitor having the other end commonly connected to the other ends of the plurality of switch means, and a first switch means having one end connected to the other end of the capacitor and the other end connected to a fourth reference voltage. And a soft start circuit having the other end of the capacitor as an output terminal.

The invention according to claim 2 is the invention according to claim 1, characterized in that the first reference voltage and the third reference voltage are the same.
According to a third aspect of the present invention, in the first or second aspect of the present invention, the second switch means is provided between the second reference voltage and the first resistor string, and the first switch means The second switch means is exclusively turned on / off.

Invention, the internal power supply for generating a second reference voltage, a fifth plurality reference voltage based on the previous SL fourth reference voltage as the internal power supply voltage than the voltage supplied from the external power source according to claim 4 And a plurality of soft start circuits of the invention according to any one of claims 1 to 3, wherein the plurality of fourth reference voltages are respectively set to the second reference voltages of the plurality of soft start circuits. It is a semiconductor device which performs.

The invention according to claim 5 is the invention according to claim 4, wherein the trimming circuit includes an operational amplifier circuit in which the fifth reference voltage is input to a first input terminal, an output of the operational amplifier circuit, and the A second resistor string composed of a plurality of resistors connected in series with the first reference voltage and one of connection points for connecting two adjacent resistors in the second resistor string are selected. A plurality of switch circuits for outputting the respective potentials, and either the output of the operational amplifier circuit or the connection point in the second resistor string is connected to the second input terminal of the operational amplifier circuit In addition, each of the outputs of the plurality of switch circuits is used as the fourth reference voltage.

  The invention according to claim 6 is the invention according to claim 4 or 5, wherein the outputs of the plurality of soft start circuits are respectively input to first input terminals of error amplifier circuits of the plurality of switching power supplies, and the error amplifier circuit is provided. The feedback voltage obtained by detecting the output voltage of the switching power supply is input to the second input terminal of the first input terminal, and the plurality of switching power supplies connect the input voltage to the switching power supply and the output terminal based on the output signal of each error amplifier. A plurality of output voltages corresponding to outputs of the plurality of soft start circuits are generated by performing on / off control of the switching means.

  The soft start circuit and the semiconductor device using the same according to the present invention are configured such that a power supply for driving a resistor string and a capacitor for charging a soft start signal and a power supply for supplying a reference voltage which is a final value of the soft start signal are separated By switching the circuit using a switch circuit, it is possible to provide a stable reference voltage and save current.

Hereinafter, the present invention will be described with reference to the drawings.
FIG. 1 shows a first embodiment of the soft start circuit SS of the present invention. The same parts as those in FIG. 5 are denoted by the same reference numerals, and detailed description thereof is omitted. The transmission gate TG1 is different from the soft start circuit 2 shown in FIG. 5 in that one end of the transmission gate TG1 is connected not to the input terminal Vin but to another input terminal Vref (for convenience, the input voltage to the input terminal Vref is also Vref). Other configurations and operations are the same as those of the soft start circuit 2 shown in FIG. With this configuration, the power supply Vin that charges the capacitor to drive the resistor strings Rss1,..., Rssk and raises the soft start signal is separated from the power supply Vref that provides the reference voltage that is the final value of the soft start signal. Can be a thing. The ON state of the transmission gates TGk, TG (K-1),..., TG2 is sequentially shifted in this order so that the voltage across the capacitor Css is equal to or close to the input voltage Vref, and then the transmission gate TG1 is set. Since it is turned on (other transmission gates are turned off), the input voltage Vref consumes little current (or is zero).

  In order to apply the soft start circuit of the present invention to a power supply control IC of a multi-output type (number of output voltages m), as shown in FIG. 2, input voltages Vref21 to Vref2m and input voltages are applied to m soft start circuits SS1 to SSm. What is necessary is just to input Vreg. Here, the configurations of the soft start circuits SS1 to SSm are the same as those of the soft start circuit SS shown in FIG. 1, and the input voltage Vreg input to the input terminals Vin of the soft start circuits SS1 to SSm is shown in FIGS. It is an internal voltage that is an output of the internal power supply LDO shown. Further, the input voltages Vref21 to Vref2m inputted to the input terminals Vref of the soft start circuits SS1 to SSm are generated by the circuit of FIG. As described above, almost no current flows through the Vref terminals of the respective soft start circuits SS1 to SSm, or zero, so that the voltage drop of the resistor R1 due to the current flowing through each Vref terminal is negligible. Accordingly, the above problems (1) to (3) can be solved. The current flowing through the input terminal Vin of each soft start circuit SS1 to SSm is supplied by the internal power supply LDO. Since the internal power supply LDO originally has a certain amount of current capacity, the layout area occupied in the IC chip does not increase even when a current supplied to each input terminal Vin is applied. Further, since the unnecessary current of α times (> 0) is not required unlike the circuit shown in FIG. 12, the loss of the internal power supply LDO can be made smaller than the conventional one.

  If the soft start signals Vs1 to Vsm output from the output terminals SoftStart of the soft start circuits SS1 to SSm are respectively input to the non-inverting input terminals of the error amplifier 1 of the corresponding switching power supply (the configuration is the same as that in FIG. 4). (The soft start circuit 2 in FIG. 4 is replaced with the soft start circuit SSi in FIG. 2 (1 ≦ i ≦ m)), and a power supply system that outputs m kinds of voltages can be configured.

  FIG. 3 shows a second embodiment of the soft start circuit SS of the present invention. The same parts as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof is omitted. The transmission gate TG0 is inserted between the input terminal Vin and the resistor Rss1, and the transmission gates TG0 and TG1 are turned on and off in a complementary manner. In other words, transmission gates TG0 and TG1 are both turned on / off by the output Qk of the shift register SR, but the connection of signals obtained by inverting the outputs Qk and Qk by the inverters IV0 and IV1 is reversed between the transmission gates TG0 and TG1. It has become. Thereby, when Qk = L, the transmission gate TG0 is turned on and TG1 is turned off. The operation in this case is the same as the operation of the soft start circuit shown in FIG. On the other hand, when Qk = H, transmission gate TG0 is turned off and TG1 is turned on. The difference from the operation of the soft start circuit shown in FIG. 1 is that when Qk = H, the transmission gate TG0 is turned off, and the current flowing from the input terminal Vin to the resistor strings Rss1,..., Rssk can be cut. . Thereby, the current consumed by the soft start circuit SS and the power supply control IC to which the soft start circuit SS is applied can be further reduced.

  The soft start circuit of the second embodiment is also applied to a multi-output type (number of output voltages m) power supply control IC as in the soft start circuit of the first embodiment, and a power supply system that outputs m kinds of voltages. It goes without saying that it can be configured.

FIG. 3 is a circuit diagram showing a first embodiment of the soft start circuit of the present invention. It is a figure for demonstrating the case where the soft start circuit of this invention is applied to multi-output type power supply control IC. It is a circuit diagram which shows the 2nd Example of the soft start circuit of this invention. It is a circuit block diagram which shows the structural example of the switching power supply which has a soft start function. It is a circuit diagram which shows the structure of the conventional soft start circuit. 6 is a timing chart showing operation waveforms of the soft start circuit shown in FIG. 5. It is an example of a reference voltage generation circuit having an internal power supply. It is another example of the reference voltage generation circuit with an internal power supply. FIG. 9 is a circuit diagram showing a configuration of a switch circuit SW2 of FIGS. It is a figure which shows the structure of the circuit which produces | generates the reference voltage given to the soft start circuit in a multi-output type power supply control IC. It is a figure for demonstrating the case where the conventional soft start circuit is applied to a multi-output type power supply control IC. It is a figure which shows the structure of the output part of operational amplifier circuit OPA.

Explanation of symbols

1 Error Amplifier 2 Soft Start Circuit 3 Oscillator 4 PWM Comparator 5 P-Channel MOSFET
6 N-channel MOSFET
7 Drive circuit 8 Inductor 9, 15 Capacitor 10, 11, 14 Resistor Css Capacitor Io Constant current source IV0 to IVk Inverter IV11 to IV1 (n-1) Inverter LDO Internal power supply NM1 N channel MOS transistor OPA Operational amplifier circuit PM1 P channel MOS Transistors R1 to Rn Resistor REFER Reference voltage generation circuit Rss1 to Rssk Resistors S1 to S (n-1) Transmission gate SEL selection circuit SS1 to SSm Soft start circuit SoftStart output terminal of soft start circuit SR Shift register SW1, SW2 Switch circuit TG0 TGk Transmission gate Vin Input terminal of the soft start circuit or its input voltage Vref Input terminal of the soft start circuit or its input voltage Vref0 reference voltage Vref1, Vref2 reference voltage Vref21~Vref2m reference voltage Vreg internal voltage Vs which is an output of the internal power supply LDO, Vs1~Vsm soft start signal

Claims (6)

A first resistor string composed of a plurality of resistors connected in series between a first reference voltage on the low potential side and a second reference voltage on the high potential side, and one end in the plurality of first resistor strings A plurality of switch means respectively connected to a connection point connecting two adjacent resistors, and a capacitor having one end connected to the third reference voltage and the other end connected in common to the other ends of the plurality of switch means And first switch means having one end connected to the other end of the capacitor and the other end connected to a fourth reference voltage,
A soft start circuit characterized in that the other end of the capacitor is used as an output terminal. The soft start circuit according to claim 1, wherein the first reference voltage and the third reference voltage are the same. A second switch means is provided between the second reference voltage and the first resistor string, and the first switch means and the second switch means are exclusively turned on / off. The soft start circuit according to claim 1 or 2. 2. An internal power supply that generates the second reference voltage as an internal power supply voltage from a voltage supplied from an external power supply, a trimming circuit that outputs a plurality of the fourth reference voltages based on a fifth reference voltage, and A plurality of soft start circuits according to any one of 3 to 3;
The semiconductor device, wherein the plurality of fourth reference voltages are used as the second reference voltages of the plurality of soft start circuits, respectively. The trimming circuit includes an operational amplifier circuit in which the fifth reference voltage is input to a first input terminal, and a plurality of serially connected circuits between an output of the operational amplifier circuit and the first reference voltage. A plurality of switch circuits for selecting one of connection points connecting the two adjacent resistors in the second resistor row and outputting the potential thereof, respectively;
Either the output of the operational amplifier circuit or the connection point in the second resistor string is connected to the second input terminal of the operational amplifier circuit, and the outputs of the plurality of switch circuits are respectively connected to the fourth input terminal . The semiconductor device according to claim 4, wherein the semiconductor device is a reference voltage. Outputs of the plurality of soft start circuits are respectively input to first input terminals of error amplifier circuits of the plurality of switching power supplies, and a feedback voltage obtained by detecting the output voltage of the switching power supply is input to the second input terminal of the error amplifier circuits. And the plurality of switching power supplies perform on / off control of switching means for connecting an input voltage to the switching power supply and an output terminal based on an output signal of each error amplifier. The semiconductor device according to claim 4, wherein a plurality of output voltages corresponding to the output of is generated.

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