JP4852052B2

JP4852052B2 - DBF receiver

Info

Publication number: JP4852052B2
Application number: JP2008011862A
Authority: JP
Inventors: 正一郎安達
Original assignee: Toshiba Corp
Current assignee: Toshiba Corp
Priority date: 2008-01-22
Filing date: 2008-01-22
Publication date: 2012-01-11
Anticipated expiration: 2028-01-22
Also published as: JP2009177346A

Description

本発明は、受信信号をデジタル変換してデジタル信号処理を施したのちビームパターンを形成するＤＢＦ（Digital Beamforming）受信器に関する。 The present invention relates to a DBF (Digital Beamforming) receiver that forms a beam pattern after digitally converting a received signal and performing digital signal processing.

一般に、ＤＢＦレーダ装置は、フェーズドアレイアンテナとＤＢＦ受信器とを備える。ＤＢＦ受信器は、フェーズドアレイアンテナの各送受信モジュールで受信された信号を、各モジュールに対応して設けられた受信回路に入力してそれぞれ所定の演算処理をする。そして、ＤＢＦ受信器は、演算処理された信号に基づいてビーム形成器でフェーズドアレイアンテナにおける受信ビームを指定方向に形成する。 In general, a DBF radar apparatus includes a phased array antenna and a DBF receiver. The DBF receiver inputs a signal received by each transmitting / receiving module of the phased array antenna to a receiving circuit provided corresponding to each module, and performs a predetermined calculation process. Then, the DBF receiver forms a reception beam in the phased array antenna in a specified direction by a beam former based on the arithmetically processed signal.

ここで、上記ＤＢＦレーダ装置では、各送受信モジュールの位相を合わせる為の波面調整を行う。この波面調整では、フェーズドアレイアンテナに対して連続信号を注入し、各送受信モジュールの受信信号をＤＢＦ受信器に入力する。ＤＢＦ受信器では、各モジュールに対応する受信回路において、デジタルとなったＩ／Ｑ信号を収集する。ＤＢＦ受信器は、この収集されたＩ／Ｑ信号から各送受信モジュールの受信波面に対応した振幅／位相を求め、送受信モジュール間の振幅／位相を揃えるための補正値を算出する。そして、ＤＢＦ受信器は、補正値を記憶しておき、運用時にその補正値を読み出してＩ／Ｑ信号に複素乗算することで、各送受信モジュールの波面調整を行うようにしている。 Here, in the DBF radar apparatus, wavefront adjustment is performed to match the phases of the respective transmission / reception modules. In this wavefront adjustment, a continuous signal is injected into the phased array antenna, and the reception signal of each transmission / reception module is input to the DBF receiver. In the DBF receiver, digital I / Q signals are collected in a receiving circuit corresponding to each module. The DBF receiver obtains the amplitude / phase corresponding to the reception wavefront of each transmission / reception module from the collected I / Q signals, and calculates a correction value for aligning the amplitude / phase between the transmission / reception modules. The DBF receiver stores the correction value, reads out the correction value during operation, and performs complex wave multiplication on the I / Q signal to adjust the wavefront of each transmission / reception module.

しかしながら、上記キャリブレーションの手法では、ＤＢＦ受信器において、各モジュール対応の受信回路におけるＩ／Ｑ信号の収集、収集したＩ／Ｑ信号からの補正値の算出及び、補正値の記憶・読み出しという煩雑な調整作業を要するため、調整に時間がかかりすぎるという問題があった。
「適応フィルタ理論」、鈴木訳、科学技術出版、Ｐ．４１４−４３１。「ＭａｔｌａｂによるＤＳＰ入門」、荒訳、ピアゾンエデュケーション、Ｐ．８３−９４。 "Digital Techniques for Wideband Receivers", James Tsui, Artech House, P. 229-261。 However, in the calibration method described above, in the DBF receiver, it is complicated to collect I / Q signals in the receiving circuit corresponding to each module, calculate correction values from the collected I / Q signals, and store / read correction values. This requires a lot of adjustment work, so there is a problem that adjustment takes too much time.
"Adaptive filter theory", Suzuki translation, Science and Technology Publishing, P.I. 414-431. “Introduction to DSP by Matlab”, rough translation, Piazon Education, P.A. 83-94. "Digital Techniques for Wideband Receivers", James Tsui, Artech House, P. 229-261.

以上のように、従来のＤＢＦレーダ装置に用いられるＤＢＦ受信器では、フェーズドアレイアンテナにおける各送受信モジュールの波面調整をする際に、各モジュール対応の受信回路におけるＩ／Ｑ信号を収集し、収集したＩ／Ｑ信号から補正値を算出し、その補正値の設定の実施を行う必要があり、その煩雑な調整作業に時間がかかるという問題があった。 As described above, in the DBF receiver used in the conventional DBF radar apparatus, when the wavefront adjustment of each transmitting / receiving module in the phased array antenna is performed, the I / Q signals in the receiving circuit corresponding to each module are collected and collected. There is a problem that it is necessary to calculate a correction value from the I / Q signal and to set the correction value, and this complicated adjustment work takes time.

本発明は上記事情によりなされたもので、その目的は、Ｉ／Ｑ信号の収集、補正値の算出及び、補正値の設定の実施をしなくても、自動的にフェーズドアレイアンテナにおける各送受信モジュールの波面調整を行うことが可能なＤＢＦ受信器を提供することにある。 The present invention has been made in view of the above circumstances, and an object of the present invention is to automatically transmit / receive modules in a phased array antenna without collecting I / Q signals, calculating correction values, and setting correction values. An object of the present invention is to provide a DBF receiver capable of performing the wavefront adjustment.

上記目的を達成するため、本発明に係るＤＢＦ受信器は、フェーズドアレイアンテナにおける複数系統の受信モジュールで受信された複数の受信信号を、中間周波数帯のＩＦ信号にそれぞれ変換する周波数変換部と、前記複数のＩＦ信号をそれぞれデジタル信号に変換するアナログ−デジタル変換部と、前記複数のデジタル信号のうちいずれかを基準信号とし、前記複数のデジタル信号のうち前記基準信号以外を対象信号とし、前記対象信号それぞれに対応した処理回路群を備え、前記複数の処理回路群により、前記複数の対象信号を、前記複数の対象信号の信号成分毎に、前記基準信号に適応等化させる適応等化処理部と、前記基準信号と、前記適応等化後の複数の対象信号とをそれぞれ直交検波し、複数の直交検波信号を生成する直交検波部と、前記複数の直交検波信号を用いて前記フェーズドアレイアンテナにおける受信ビームを指定方向に形成するビーム形成部とを具備し、前記適応等化処理部は、波面調整時に放射された雑音信号が前記複数の受信モジュールで受信された場合、前記複数の処理回路群により、前記雑音信号由来の複数のデジタル信号における基準信号に、このデジタル信号における対象信号を、信号成分毎に適応等化させることで、全体の受信波面を揃えることを特徴とする。 To achieve the above object, DBF receiver according to the present invention, a plurality of received signals received by the receiving module of a plurality of systems in a phased array antenna, a frequency conversion unit for converting each of the IF signal of an intermediate frequency band, The analog-to-digital converter that converts each of the plurality of IF signals into a digital signal, and any one of the plurality of digital signals as a reference signal, and other than the reference signal among the plurality of digital signals as a target signal, An adaptive equalization process including a processing circuit group corresponding to each target signal, and adaptively equalizing the plurality of target signals to the reference signal for each signal component of the plurality of target signals by the plurality of processing circuit groups parts and the reference signal and the quadrature detection to said adaptive equalizer and each quadrature detection plurality of target signal and the post-reduction, to generate a plurality of orthogonal detection signal And parts, comprising a beam forming portion that forms the designated direction receive beams in the phased array antenna using a plurality of quadrature detection signals, the adaptive equalization processing section, noise signals emitted when the wavefront adjustment When received by the plurality of receiving modules, the plurality of processing circuit groups adaptively equalize the target signal in the digital signal for each signal component to the reference signal in the plurality of digital signals derived from the noise signal. Thus, the entire received wavefront is aligned.

上記構成によるＤＢＦ受信器の適応等化処理部は、対象信号毎に複数の処理回路を備える。適応等化処理部は、複数のデジタル信号が供給されると、複数の処理回路により、対象信号を、対象信号の信号成分毎に、基準信号に適応等化させるようにしている。そして、波面調整時に放射された雑音信号が複数の受信モジュールで受信された場合には、適応等化処理部は、複数の処理回路により、雑音信号由来の対象信号を、この信号成分毎に、雑音信号由来の基準信号に適応等化させることで、受信モジュールの受信波面を揃えるようにしている。これにより、雑音信号をレーダ装置に放射するだけで、受信波面を揃えることが可能となる。 The adaptive equalization processing unit of the DBF receiver having the above configuration includes a plurality of processing circuits for each target signal. When a plurality of digital signals are supplied, the adaptive equalization processing unit adaptively equalizes the target signal to the reference signal for each signal component of the target signal by a plurality of processing circuits. And when the noise signal radiated at the time of wavefront adjustment is received by a plurality of receiving modules, the adaptive equalization processing unit, by a plurality of processing circuits, the target signal derived from the noise signal, for each signal component, By adaptively equalizing the reference signal derived from the noise signal, the reception wavefronts of the reception modules are made uniform . As a result, it is possible to align the received wavefronts simply by radiating noise signals to the radar apparatus .

本発明によれば、フェーズドアレイアンテナにおける送受信モジュールの波面調整を自動的に行うことが可能なＤＢＦ受信器を提供することができる。 ADVANTAGE OF THE INVENTION According to this invention, the DBF receiver which can perform the wave front adjustment of the transmission / reception module in a phased array antenna automatically can be provided.

以下、図面を参照しながら本発明の実施の形態について詳細に説明する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

（第１の実施形態）
図１は、本発明の第１の実施形態に係るＤＢＦ受信器３０を備えるＤＢＦレーダ装置の機能構成を示すブロック図である。図１において、信号発生器１０から出力された信号は、フェーズドアレイアンテナ２０の送受信モジュール２１−１〜２１−Ｎそれぞれで受信され、ＤＢＦ受信器３０へ出力される。 (First embodiment)
FIG. 1 is a block diagram showing a functional configuration of a DBF radar apparatus including a DBF receiver 30 according to the first embodiment of the present invention. In FIG. 1, the signal output from the signal generator 10 is received by each of the transmission / reception modules 21-1 to 21 -N of the phased array antenna 20 and output to the DBF receiver 30.

ＤＢＦ受信器３０は、受信処理部３１とビーム形成器３２とを備える。送受信モジュール２１−１〜２１−Ｎで得られた複数系統の信号は、各送受信モジュール２１−１〜２１−Ｎに対応して設けられた受信回路３３−１〜３３−Ｎに入力される。受信回路３３−１〜３３−Ｎに入力された信号は、周波数変換器３４−１〜３４−ＮでＩＦ信号（Intermediate Frequency）に周波数変換され、アナログ−デジタル（Ａ／Ｄ）変換器３５−１〜３５−Ｎでデジタル信号に変換される。 The DBF receiver 30 includes a reception processing unit 31 and a beam former 32. Signals of a plurality of systems obtained by the transmission / reception modules 21-1 to 21-N are input to reception circuits 33-1 to 33-N provided corresponding to the transmission / reception modules 21-1 to 21-N. The signals input to the receiving circuits 33-1 to 33-N are frequency converted into IF signals (Intermediate Frequency) by the frequency converters 34-1 to 34-N, and the analog-digital (A / D) converter 35- 1 to 35-N are converted into digital signals.

Ａ／Ｄ変換器３５−１で得られるデジタル信号は、適応等化処理を行う際の基準信号として設定されており、適応フィルタ３６−２〜３６−Ｎ及び、直交検波器３７−１に出力される。また、Ａ／Ｄ変換器３５−２〜３５−Ｎで得られるデジタル信号は、それぞれ適応フィルタ３６−２〜３６−Ｎに出力される。適応フィルタ３６−２〜３６−Ｎは、入力された基準信号にＡ／Ｄ変換器３５−２〜３５−Ｎで得られたデジタル信号を適応等化させる。適応フィルタ３６−２〜３６−Ｎで適応等化されたデジタル信号は、直交検波器３７−２〜３７−Ｎにそれぞれ出力される。 The digital signal obtained by the A / D converter 35-1 is set as a reference signal for performing adaptive equalization processing, and is output to the adaptive filters 36-2 to 36-N and the quadrature detector 37-1. Is done. The digital signals obtained by the A / D converters 35-2 to 35-N are output to the adaptive filters 36-2 to 36-N, respectively. The adaptive filters 36-2 to 36-N adaptively equalize the digital signals obtained by the A / D converters 35-2 to 35-N to the input reference signal. The digital signals adaptively equalized by the adaptive filters 36-2 to 36-N are output to the quadrature detectors 37-2 to 37-N, respectively.

直交検波器３７−１〜３７−Ｎは、受け取ったデジタル信号を直交検波し、ビーム形成器３２へ出力する。ビーム形成器３２は、直交検波器３７−１〜３７−Ｎで得られる複数系統のＩ／Ｑ信号を用いて、フェーズドアレイアンテナ２０における受信ビームを指定方向に形成する。 The quadrature detectors 37-1 to 37-N perform quadrature detection on the received digital signal and output to the beamformer 32. The beam former 32 forms a reception beam in the phased array antenna 20 in a specified direction by using a plurality of I / Q signals obtained by the orthogonal detectors 37-1 to 37-N.

上記適応フィルタ３６−２〜３６−Ｎは、基準信号であるＡ／Ｄ変換器３５−１で得られたデジタル信号に、Ａ／Ｄ変換器３５−２〜３５−Ｎで得られたデジタル信号を適応等化することで、その振幅及び位相を基準信号のものと一致させる。本実施例では、適応フィルタの原理のうち、以下に示すＬＭＳ（Least Mean Square）アルゴリズムを一例として用いる（例えば、非特許文献１参照。）。
ｅ（ｎ）＝ｄ（ｎ）−Ｗｎ^ＴＸｎ
＝ｄ（ｎ）−Ｘｎ^ＴＷｎ
Ｗｎ＋１＝Ｗｎ＋μｅ（ｎ）Ｘｎ
なお、
Ｘｎ＝［ｘ（ｎ），ｘ（ｎ−１），…，ｘ（ｎ−Ｍ）］^Ｔ
Ｗｎ＝［Ｗｎ（０），Ｗｎ（１），…，Ｗｎ（Ｍ）］^Ｔ
Ｙ（ｎ）＝Ｗｎ^ＴＸｎ＝Ｘｎ^ＴＷｎ
である。ここで、ｎは時刻、ｅ（ｎ）は残差、ｄ（ｎ）は基準信号（Ａ／Ｄ変換器３５−１からのデジタル信号）、Ｘｎは入力ベクトル（Ａ／Ｄ変換部３５−２〜３５−Ｎからのデジタル信号の列）、Ｗｎは時刻ｎでの係数ベクトル（時刻ｎでの適応フィルタ係数）、Ｙ（ｎ）は適応フィルタ出力ベクトル、Ｔは転置を示す。 The adaptive filters 36-2 to 36-N convert the digital signal obtained by the A / D converters 35-2 to 35-N into the digital signal obtained by the A / D converter 35-1 that is the reference signal. Is made equal to that of the reference signal by adaptive equalization. In the present embodiment, the LMS (Least Mean Square) algorithm shown below is used as an example of the principle of the adaptive filter (for example, see Non-Patent Document 1).
e (n) = d (n) −Wn ^T Xn
= D (n) -Xn ^T Wn
Wn + 1 = Wn + μe (n) Xn
In addition,
Xn = [x (n), x (n−1),..., X (n−M)] ^T
Wn = [Wn (0), Wn (1),..., Wn (M)] ^T
Y (n) = Wn ^T Xn = Xn ^T Wn
It is. Here, n is a time, e (n) is a residual, d (n) is a reference signal (digital signal from the A / D converter 35-1), and Xn is an input vector (A / D converter 35-2). ˜35-N), Wn is a coefficient vector at time n (adaptive filter coefficient at time n), Y (n) is an adaptive filter output vector, and T is transposed.

図２は、本発明の第１の実施形態に係る適応フィルタ３６−２をＬＭＳアルゴリズムを用いて実現した際の機能構成を示すブロック図である。図２において、加算部３６１には、Ａ／Ｄ変換器３５−１から出力される基準信号ｄ（ｎ）と、適応フィルタ３６−２からの出力Ｙ（ｎ）によるフィードバック信号とが入力される。加算部３６１は、基準信号ｄ（ｎ）からフィードバック信号Ｙ（ｎ）を減じ、残差ｅ（ｎ）として各タップ１〜Ｍ＋１の乗算部３６２−１〜３６２−Ｍ＋１に出力する。 FIG. 2 is a block diagram showing a functional configuration when the adaptive filter 36-2 according to the first embodiment of the present invention is realized using the LMS algorithm. In FIG. 2, the adder 361 receives the reference signal d (n) output from the A / D converter 35-1 and the feedback signal based on the output Y (n) from the adaptive filter 36-2. . The adder 361 subtracts the feedback signal Y (n) from the reference signal d (n), and outputs it as a residual e (n) to the multipliers 362-1 to 362-M + 1 of the taps 1 to M + 1 .

ここで、タップ１〜Ｍ＋１における信号の処理手順は同一であるため、以下では、タップ１における信号の処理を説明する。タップ１において、ｅ（ｎ）は、乗算部３６２−１でＡ／Ｄ変換器３５−２からのデジタル信号Ｘ（ｎ）を乗算され、乗算部３６３−１で関数μを乗算されたのち加算部３６４−１に出力される。乗算部３６３−１で得られた信号は、加算部３６４−１で、遅延部３６５−１からのフィードバック信号Ｗｎ（０）を加算されてＷｎ＋１（０）となり、遅延部３６５−１に出力される。Ｗｎ＋１（０）は、遅延部３６５−１で遅延されてＷｎ（０）となり、乗算部３６６−１に出力される。また、Ｗｎ（０）は、加算部３６４−１にフィードバックされる。Ｗｎ（０）は、乗算部３６６−１でＸ（ｎ）を乗算された後、加算部３６７でタップ２〜Ｍ＋１からの信号と加算されて出力Ｙ（ｎ）となり、直交検波部３７−２に出力される。 Here, since the signal processing procedure in taps 1 to M + 1 is the same, the signal processing in tap 1 will be described below. In the tap 1, e (n) is added after the multiplication unit 362-1 is multiplied by the digital signal X (n) from the A / D converter 35-2 and the multiplication unit 363-1 is multiplied by the function μ. Is output to the unit 364-1. The signal obtained by the multiplication unit 363-1 is added to the feedback signal Wn (0) from the delay unit 365-1 by the addition unit 364-1 to become Wn + 1 (0), and is output to the delay unit 365-1. The Wn + 1 (0) is delayed by delay unit 365-1 to become Wn (0), and is output to multiplication unit 366-1. Further, Wn (0) is fed back to the adding unit 364-1. Wn (0) is multiplied by X (n) by the multiplication unit 366-1, and then added to the signal from the taps 2 to M + 1 by the addition unit 367 to become the output Y (n), and the quadrature detection unit 37- 2 is output.

以上のように、上記第１の実施形態では、信号発生器１０からの信号を送受信モジュール２１−１〜２１−Ｎで受信し、各信号をＤＢＦ受信器３０に出力する。ＤＢＦ受信器３０は、受信回路３３−１〜３３−Ｎにおいて、入力信号を周波数変換器３４−１〜３４−Ｎで周波数変換し、Ａ／Ｄ変換器３５−１〜３５−Ｎでデジタル信号に変換する。ＤＢＦ受信器３０は、Ａ／Ｄ変換器３５−１で得られるデジタル信号を基準信号とし、適応フィルタ３６−２〜３６−Ｎにおいて、Ａ／Ｄ変換器３５−２〜３５−Ｎで得られるデジタル信号をこの基準信号に適応等化させるようにしている。そして、ＤＢＦ受信器３０は、適応フィルタ３６−２〜３６−Ｎで適応等化されたデジタル信号及び、Ａ／Ｄ変換器３５−１からのデジタル信号を、直交検波器３７−１〜３７−Ｎで直交検波したのち、ビーム形成器３２でビーム形成を行う。 As described above, in the first embodiment, signals from the signal generator 10 are received by the transmission / reception modules 21-1 to 21 -N, and each signal is output to the DBF receiver 30. The DBF receiver 30 performs frequency conversion of the input signal by the frequency converters 34-1 to 34-N in the reception circuits 33-1 to 33-N, and the digital signals by the A / D converters 35-1 to 35-N. Convert to The DBF receiver 30 uses the digital signal obtained by the A / D converter 35-1 as a reference signal, and is obtained by the A / D converters 35-2 to 35-N in the adaptive filters 36-2 to 36-N. The digital signal is adaptively equalized with this reference signal. Then, the DBF receiver 30 converts the digital signal adaptively equalized by the adaptive filters 36-2 to 36-N and the digital signal from the A / D converter 35-1 into quadrature detectors 37-1 to 37-. After orthogonal detection at N, beam forming is performed by the beam former 32.

これにより、上記第１の実施形態に係るＤＢＦ受信器３０は、適応フィルタ３６−２〜３６−ＮにおいてＡ／Ｄ変換器３５−２〜３５−Ｎで得られるデジタル信号を基準信号に適応等化することが可能になる。 Thereby, the DBF receiver 30 according to the first embodiment adapts the digital signal obtained by the A / D converters 35-2 to 35-N to the reference signal in the adaptive filters 36-2 to 36-N, etc. It becomes possible to become.

また、ＤＢＦレーダ装置では、各送受信モジュール２１−１〜２１−Ｎの位相を合わせる為の波面調整が行われる。この波面調整時には、信号発生器１０は、フェーズドアレイアンテナ２０に対して雑音信号を放射する。ここで、雑音信号を利用する理由は、送受信モジュール２１−１〜２１−Ｎの周波数特性を一度に補正するためである。フェーズドアレイアンテナ２０の送受信モジュール２１−１〜２１−Ｎでそれぞれ受信された雑音信号は、周波数変換器３４−１〜３４−ＮでＩＦ帯の信号に周波数変換され、Ａ／Ｄ変換器３５−１〜３５−Ｎでデジタル信号に変換される。Ａ／Ｄ変換器３５−２〜３５−Ｎで得られる各デジタル信号は、適応フィルタ３６−２〜３６−ＮにおいてＡ／Ｄ変換器３５−１で得られた基準信号に適応等化される。 In the DBF radar apparatus, wavefront adjustment is performed to match the phases of the transmission / reception modules 21-1 to 21-N. During the wavefront adjustment, the signal generator 10 radiates a noise signal to the phased array antenna 20. Here, the reason for using the noise signal is to correct the frequency characteristics of the transmission / reception modules 21-1 to 21-N at a time. The noise signals respectively received by the transmission / reception modules 21-1 to 21-N of the phased array antenna 20 are frequency-converted to IF band signals by the frequency converters 34-1 to 34-N, and the A / D converter 35- 1 to 35-N are converted into digital signals. Each digital signal obtained by the A / D converters 35-2 to 35-N is adaptively equalized to the reference signal obtained by the A / D converter 35-1 in the adaptive filters 36-2 to 36-N. .

これにより、上記第１の実施形態に係るＤＢＦ受信器３０は、送受信モジュール２１−１〜２１−Ｎの固有位相を揃え、波面調整を行うことが可能となる。 Thus, the DBF receiver 30 according to the first embodiment can perform wavefront adjustment by aligning the natural phases of the transmission / reception modules 21-1 to 21-N.

これらのことにより、本実施形態に係るＤＢＦ受信器３０は、従来のようにＩ／Ｑ信号の収集、補正値の算出及び、補正値の設定の実施をしなくても、自動的にフェーズドアレイアンテナにおける各送受信モジュールの波面調整を行うことができる。 As a result, the DBF receiver 30 according to the present embodiment automatically performs phased array without collecting I / Q signals, calculating correction values, and setting correction values as in the prior art. Wavefront adjustment of each transmission / reception module in the antenna can be performed.

なお、上記実施形態では、ＬＭＳアルゴリズムを利用して適応フィルタを構築する例について説明していたが、適応フィルタを構築するアルゴリズムはＬＭＳアルゴリズムに限定される訳ではない。 In the above embodiment, an example in which an adaptive filter is constructed using an LMS algorithm has been described. However, an algorithm for constructing an adaptive filter is not limited to the LMS algorithm.

また、上記実施形態では、Ａ／Ｄ変換器３５−１で得られるデジタル信号を基準信号とする例について説明しているが、Ａ／Ｄ変換器３５−１以外からのデジタル信号を基準信号とする場合であっても同様に実施可能である。 Moreover, although the said embodiment demonstrated the example which uses the digital signal obtained by A / D converter 35-1 as a reference signal, the digital signal from other than A / D converter 35-1 is made into a reference signal. Even in this case, it can be similarly implemented.

（第２の実施形態）
図３は、本発明の第２の実施形態に係るＤＢＦ受信器４０の機能構成を示すブロック図である。なお、一般にＤＢＦ受信器は、複数の受信ビームを備えることが可能であるが、本実施形態では、受信ビームが２つの場合を説明する。 (Second Embodiment)
FIG. 3 is a block diagram showing a functional configuration of the DBF receiver 40 according to the second embodiment of the present invention. In general, a DBF receiver can include a plurality of reception beams. However, in this embodiment, a case where there are two reception beams will be described.

図３において、フェーズドアレイアンテナにおける複数系統の受信モジュールで受信された、互いに周波数の異なる第１信号と第２信号とを含む到来信号が、ＤＢＦ受信器４０に入力される。到来信号は、周波数変換器４４−１〜４４−Ｎで中間周波数帯に周波数変換され、含まれる第１及び第２信号はそれぞれ、周波数ｆ_ＩＦ１±α（αは受信帯域）の第１のＩＦ信号及び、周波数ｆ_ＩＦ２±αの第２のＩＦ信号となり、Ａ／Ｄ変換器４５−１〜４５−Ｎに出力される。 In FIG. 3, incoming signals including first and second signals having different frequencies, received by a plurality of receiving modules in the phased array antenna, are input to the DBF receiver 40. The incoming signal is frequency-converted to an intermediate frequency band by frequency converters 44-1 to 44 -N, and the first and second signals included are first IFs having a frequency f _IF1 ± α (α is a reception band), respectively. The signal and the second IF signal having the frequency f _IF2 ± α are output to the A / D converters 45-1 to 45 -N.

Ａ／Ｄ変換器４５−１〜４５−Ｎは、Ａ／Ｄ変換に伴うデータのサンプリングが１周期当たり２回以下となる任意のＡ／Ｄ変換クロック周波数ｆ_ＡＤが設定されている（例えば、非特許文献２参照。）。このクロック周波数を用いてＡ／Ｄ変換することにより、第１のＩＦ信号は周波数ｆ_Ｄ１±αの第１のデジタル信号となり、第２のＩＦ信号は周波数ｆ_Ｄ２±αの第２のデジタル信号となる。ここで、ｆ_Ｄ１及びｆ_Ｄ２は以下のように示される。
ｆ_Ｄ１＝ｆ_ＩＦ１−ｆ_ＡＤ
ｆ_Ｄ２＝ｆ_ＩＦ２−ｆ_ＡＤ
Ａ／Ｄ変換器４５−１〜４５−Ｎにより得られた第１のデジタル信号と第２のデジタル信号とを含むデジタル信号は、分配器４６−１〜４６−Ｎにより２系統に分配される。分配器４６−１で分配されたデジタル信号は、適応等化処理を行う際の基準信号として設定されており、適応フィルタ４７−２〜４７−Ｎ及び直交検波回路４９−１と、適応フィルタ４８−２〜４８−Ｎ及び直交検波回路４１０−１とにそれぞれ出力される。分配器４６−２〜４６−Ｎで分配されたデジタル信号は、適応フィルタ４７−２〜４７−Ｎと適応フィルタ４８−２〜４８−Ｎとにそれぞれ出力され、各適応フィルタ４７−２〜４７−Ｎ，４８−２〜４８−Ｎで基準信号に基づいて適応等化される。適応フィルタ４７−２〜４７−Ｎで適応等化されたデジタル信号は、直交検波回路４９−２〜４９−Ｎにそれぞれ出力され、適応フィルタ４８−２〜４８−Ｎで適応等化されたデジタル信号は、直交検波回路４１０−２〜４１０−Ｎにそれぞれ出力される。 In the A / D converters 45-1 to 45 -N, an arbitrary A / D conversion clock frequency f _{AD at} which sampling of data associated with A / D conversion is less than twice per cycle is set (for example, (Refer nonpatent literature 2.). By performing A / D conversion using this clock frequency, the first IF signal becomes a first digital signal having a frequency f _D1 ± α, and the second IF signal is a second digital signal having a frequency f _D2 ± α. It becomes. Here, f _D1 and f _D2 are expressed as follows.
f _D1 = f _IF1 −f _AD
f _D2 = f _IF2 -f _AD
The digital signal including the first digital signal and the second digital signal obtained by the A / D converters 45-1 to 45-N is distributed into two systems by the distributors 46-1 to 46-N. . The digital signal distributed by the distributor 46-1 is set as a reference signal for performing adaptive equalization processing. The adaptive filter 47-2 to 47-N, the quadrature detection circuit 49-1, and the adaptive filter 48 are set. -2 to 48-N and the quadrature detection circuit 410-1. The digital signals distributed by the distributors 46-2 to 46-N are output to the adaptive filters 47-2 to 47-N and the adaptive filters 48-2 to 48-N, respectively. -N and 48-2 to 48-N are adaptively equalized based on the reference signal. The digital signals adaptively equalized by the adaptive filters 47-2 to 47-N are respectively output to the quadrature detection circuits 49-2 to 49-N, and the digital signals adaptively equalized by the adaptive filters 48-2 to 48-N. The signals are output to quadrature detection circuits 410-2 to 410-N, respectively.

直交検波回路４９−１〜４９−Ｎは、入力されるデジタル信号を直交検波し、このＩ／Ｑ信号から第１信号の成分を抽出してビーム形成器４２−１へ出力する。ビーム形成器４２−１は、直交検波器４９−１〜４９−Ｎで得られる複数系統のＩ／Ｑ信号を用いて、フェーズドアレイアンテナにおける第１信号の受信ビームを指定方向に形成する。 The quadrature detection circuits 49-1 to 49-N perform quadrature detection on the input digital signal, extract the first signal component from the I / Q signal, and output it to the beamformer 42-1. The beam former 42-1 forms the reception beam of the first signal in the phased array antenna in the designated direction using the multiple systems of I / Q signals obtained by the quadrature detectors 49-1 to 49-N.

直交検波回路４１０−１〜４１０−Ｎは、入力されるデジタル信号を直交検波し、このＩ／Ｑ信号から第２信号の成分を抽出してビーム形成器４２−２へ出力する。ビーム形成器４２−２は、直交検波器４１０−１〜４１０−Ｎで得られる複数系統のＩ／Ｑ信号を用いてフェーズドアレイアンテナにおける第２信号の受信ビームを指定方向に形成する。 The quadrature detection circuits 410-1 to 410 -N perform quadrature detection on the input digital signal, extract the component of the second signal from this I / Q signal, and output it to the beamformer 42-2. The beamformer 42-2 forms a second signal reception beam in the phased array antenna in a specified direction by using a plurality of systems of I / Q signals obtained by the quadrature detectors 410-1 to 410-N.

図４は、本発明の第２の実施形態に係る受信回路４３−２の機能構成を示すブロック図である。図４において、直交検波回路４９−２は乗算器４１１と、ＮＣＯ（Numerically Controlled Oscillator）４１２と、デジタルフィルタ４１３とを備え、直交検波回路４１０−２は乗算器４１４と、ＮＣＯ４１５と、デジタルフィルタ４１６とを備える。 FIG. 4 is a block diagram showing a functional configuration of the reception circuit 43-2 according to the second embodiment of the present invention. 4, the quadrature detection circuit 49-2 includes a multiplier 411, an NCO (Numerically Controlled Oscillator) 412, and a digital filter 413. The quadrature detection circuit 410-2 includes a multiplier 414, an NCO 415, and a digital filter 416. With.

直交検波回路４９−２は、適応フィルタ４７−２で適応等化されたデジタル信号を受け取り、乗算器４１１に入力する。また、乗算器４１１には、ＮＣＯ４１２から出力されるローカル信号Ｓ_ＮＣＯ１が入力されている。信号Ｓ_ＮＣＯ１は、
Ｓ_ＮＣＯ１＝ｃｏｓ（２π×ｆ_ＮＣＯ１ｔ）−ｓｉｎ（２π×ｆ_ＮＣＯ１ｔ）
と表され、ここでの周波数はｆ_ＮＣＯ１＝ｆ_Ｄ１となっている。乗算器４１１は、適応フィルタ４７−２からのデジタル信号に信号Ｓ_ＮＣＯ１を乗じてＩ_ＮＣＯ１及びＱ_ＮＣＯ１を算出し、これらをデジタルフィルタ４１３に出力する。ここで、Ｉ_ＮＣＯ１は、

The quadrature detection circuit 49-2 receives the digital signal adaptively equalized by the adaptive filter 47-2 and inputs the digital signal to the multiplier 411. In addition, a local signal S _NCO1 output from the NCO ₄₁₂ is input to the multiplier 411. The signal S _NCO1 is
S _NCO1 = cos (2π × f _NCO1 t) −sin (2π × f _NCO1 t)
The frequency here is f _NCO1 = f _D1 . The multiplier 411 calculates the _{I NCO 1} and _{Q NCO 1} by multiplying the signal _{S NCO 1} to a digital signal from the adaptive filter 47-2, and outputs them to the digital filter 413. Here, I _NCO1 is

と表され、Ｑ_ＮＣＯ１は、

Q _NCO1 is expressed as

と表される（例えば、非特許文献３参照。）。 (For example, refer nonpatent literature 3.).

デジタルフィルタ４１３は、周波数（ｆ_Ｄ１±α−ｆ_ＮＣＯ１）のみを帯域通過させるようになっており、乗算器４１１で算出されたＩ_ＮＣＯ１及びＱ_ＮＣＯ１を透過させることにより、ｃｏｓ２πｔ（ｆ_Ｄ１±α−ｆ_ＮＣＯ１）とｓｉｎ２πｔ（ｆ_Ｄ１±α−ｆ_ＮＣＯ１）のみを抽出し、ビーム形成器４２−１へ出力する。 The digital filter 413 allows only the frequency (f _D1 ± α−f _NCO1 ) to pass through the band. By passing the I _NCO1 and Q _NCO1 calculated by the multiplier 411, the digital filter 413 transmits cos2πt (f _D1 ± α _{-F NCO1} ) and sin2πt (f _D1 ± α-f _NCO1 ) are extracted and output to the beamformer 42-1.

直交検波回路４１０−２は、適応フィルタ４８−２で適応等化されたデジタル信号を受け取り、乗算器４１４に入力する。また、乗算器４１４には、ＮＣＯ４１５から出力されるローカル信号Ｓ_ＮＣＯ２が入力されている。信号Ｓ_ＮＣＯ２は、
Ｓ_ＮＣＯ２＝ｃｏｓ（２π×ｆ_ＮＣＯ２ｔ）−ｓｉｎ（２π×ｆ_ＮＣＯ２ｔ）
と表され、ここでの周波数はｆ_ＮＣＯ２＝ｆ_Ｄ２となっている。乗算器４１４は、適応フィルタ４８−２からのデジタル信号に信号Ｓ_ＮＣＯ２を乗じてＩ_ＮＣＯ２及びＱ_ＮＣＯ２を算出し、これらをデジタルフィルタ４１６に出力する。ここで、Ｉ_ＮＣＯ２は、

The quadrature detection circuit 410-2 receives the digital signal adaptively equalized by the adaptive filter 48-2 and inputs the digital signal to the multiplier 414. The multiplier 414 receives the local signal S _NCO2 output from the NCO 415. The signal S _NCO2 is
S _NCO2 = cos (2π × f _NCO2 t) −sin (2π × f _NCO2 t)
The frequency here is f _NCO2 = f _D2 . The multiplier 414 calculates the _{I NCO 2} and _{Q NCO 2} by multiplying the signal _{S NCO 2} to a digital signal from the adaptive filter 48-2, and outputs them to the digital filter 416. Here, I _NCO2 is

と表され、Ｑ_ＮＣＯ２は、

Q _NCO2 is expressed as

と表される。 It is expressed.

デジタルフィルタ４１６は、周波数（ｆ_Ｄ２±α−ｆ_ＮＣＯ２）のみを帯域通過させるようになっており、乗算器４１４で算出されたＩ_ＮＣＯ２及びＱ_ＮＣＯ２を透過させることにより、ｃｏｓ２πｔ（ｆ_Ｄ２±α−ｆ_ＮＣＯ２）とｓｉｎ２πｔ（ｆ_Ｄ２±α−ｆ_ＮＣＯ２）のみを抽出し、ビーム形成器４２−２へ出力する。 Digital filter 41 6, only the frequency _{_{(f D2 ± α-f NCO2}} ) is adapted to band pass, by passing the _{I NCO 2} and _{Q NCO 2} calculated by the multiplier 414, cos2πt _{(f D2} ± _Only α−f _NCO2 ) and sin 2πt (f _D2 ± α−f _NCO2 ) are extracted and output to the beam former 42-2.

以上のように、上記第２の実施形態に係るＤＢＦ受信器４０は、互いに周波数の異なる第１信号と第２信号とを含む複数系統の到来信号を受信し、周波数変換器４４−１〜４４−Ｎで周波数変換してＩＦ信号に変換する。ＤＢＦ受信器４０は、このＩＦ信号をＡ／Ｄ変換器４５−１〜４５−Ｎでエイリアシングを行うことにより、デジタル信号に変換すると共に、含まれている信号の周波数をｆ_Ｄ１±αとｆ_Ｄ２±αとに変換する。このデジタル信号は、２系統ずつに分配されて、一方は適応フィルタ４７−２〜４７−Ｎで基準信号に適応等化される。適応等化されたデジタル信号は、乗算器４１１でＮＣＯ４１２から出力される周波数ｆ_ＮＣＯ１＝ｆ_Ｄ１のローカル信号を乗算されることにより直交検波されてＩ／Ｑ信号に変換される。そして、ＤＢＦ受信器４０は、このＩ／Ｑ信号をデジタルフィルタ４１３で必要情報のみを抽出する。２系統に分配されたうちの他方のデジタル信号は、適応フィルタ４８−２〜４８−Ｎで基準信号に適応等化される。適応等化されたデジタル信号は、乗算器４１４でＮＣＯ４１５から出力される周波数ｆ_ＮＣＯ２＝ｆ_Ｄ２のローカル信号を乗算されることにより直交検波されてＩ／Ｑ信号に変換される。そして、ＤＢＦ受信器４０は、このＩ／Ｑ信号をデジタルフィルタ４１６で必要情報のみを抽出する。 As described above, the DBF receiver 40 according to the second embodiment receives a plurality of systems of incoming signals including the first signal and the second signal having different frequencies, and the frequency converters 44-1 to 44. The frequency is converted at -N and converted to an IF signal. The DBF receiver 40 converts the IF signal into a digital signal by performing aliasing in the A / D converters 45-1 to 45 -N, and converts the frequency of the included signal to f _D1 ± α and f Convert to _D2 ± α. This digital signal is distributed into two systems, one of which is adaptively equalized to a reference signal by adaptive filters 47-2 to 47-N. The adaptively equalized digital signal is quadrature-detected by being multiplied by a local signal of frequency f _NCO1 = f _D1 output from the NCO 412 by the multiplier 411 and converted into an I / Q signal. Then, the DBF receiver 40 extracts only necessary information from the I / Q signal by the digital filter 413. The other digital signal distributed to the two systems is adaptively equalized to the reference signal by the adaptive filters 48-2 to 48-N. The adaptively equalized digital signal is quadrature-detected by being multiplied by a local signal of frequency f _NCO2 = f _D2 output from the NCO 415 by the multiplier 414 and converted into an I / Q signal. Then, DBF receiver 40 extracts only the necessary information to the I / Q signal by the digital filter 41 6.

これにより、上記第１の実施形態に係るＤＢＦ受信器４０は、適応フィルタ４７−２〜４７−Ｎ，４８−２〜４８−ＮにおいてＡ／Ｄ変換器４５−２〜４５−Ｎで得られるデジタル信号を基準信号に適応等化することが可能になる。また、ＤＢＦ受信器４０は、受信される複数系統の到来信号を、直交検波回路４９−１〜４９−Ｎ，４１０−１〜４１０−Ｎで第１信号成分と第２信号成分とに分離すると共に直交検波することが可能となる。 Thereby, the DBF receiver 40 according to the first embodiment is obtained by the A / D converters 45-2 to 45-N in the adaptive filters 47-2 to 47-N and 48-2 to 48-N. It becomes possible to adaptively equalize the digital signal with the reference signal. Further, the DBF receiver 40 separates the received signals of a plurality of systems into the first signal component and the second signal component by the quadrature detection circuits 49-1 to 49-N and 410-1 to 410-N. At the same time, quadrature detection can be performed.

また、ＤＢＦ受信器４０では、雑音信号を受信して受信モジュールの位相を合わせる為の波面調整が行われる。ＤＢＦ受信器４０は、受信した雑音信号を周波数変換器４４−１〜４４−Ｎで周波数変換し、Ａ／Ｄ変換器４５−１〜４５−Ｎでデジタル信号に変換する。そして、ＤＢＦ受信器４０は、このデジタル信号を適応フィルタ４７−２〜４７−Ｎ，４８−２〜４８−Ｎで基準信号に適応等化する。 The DBF receiver 40 performs wavefront adjustment for receiving a noise signal and matching the phase of the receiving module. The DBF receiver 40 frequency-converts the received noise signal with the frequency converters 44-1 to 44-N, and converts them into digital signals with the A / D converters 45-1 to 45-N. Then, the DBF receiver 40 adaptively equalizes this digital signal to the reference signal by the adaptive filters 47-2 to 47-N and 48-2 to 48-N.

これにより、上記第２の実施形態に係るＤＢＦ受信器４０は、受信モジュールの受信波面を揃えることが可能となる。 Thereby, the DBF receiver 40 according to the second embodiment can make the reception wavefronts of the reception modules uniform.

これらのことにより、本実施形態に係るＤＢＦ受信器４０では、従来のようにＩ／Ｑ信号の収集、補正値の算出及び、補正値の設定の実施をしなくても、自動的に受信モジュールの波面調整を行うことができる。また、周波数の異なる信号を含む信号をデジタル回路により分離すると共に直交検波することが可能であるため、回路規模を縮小させ、コストを抑えることができる。 As a result, the DBF receiver 40 according to the present embodiment automatically receives the reception module without performing I / Q signal collection, correction value calculation, and correction value setting as in the prior art. Can be adjusted. In addition, since signals including signals having different frequencies can be separated and orthogonally detected by a digital circuit, the circuit scale can be reduced and costs can be reduced.

なお、本実施形態では、周波数の異なる２つの信号を含む到来信号入力される場合について説明したが、到来信号が含む信号は２つ以上であっても良い。ただし、到来信号が２以上の信号を含む際には、分配部４６−１〜４６−Ｎにおける信号の分配数を信号の入力数に併せて増やし、各系統に適応フィルタ及び直交検波回路を設置する必要がある。 In the present embodiment, the case where an incoming signal including two signals having different frequencies is input has been described. However, the incoming signal may include two or more signals. However, when the incoming signal contains two or more signals, the number of signal distribution in the distribution units 46-1 to 46-N is increased in accordance with the number of signal inputs, and an adaptive filter and a quadrature detection circuit are installed in each system. There is a need to.

（その他の実施形態）
なお、本発明は上記実施形態そのままに限定されるものではなく、実施段階ではその要旨を逸脱しない範囲で構成要素を変形して具体化できる。また、上記実施形態に開示されている複数の構成要素の適宜な組み合わせにより、種々の発明を形成できる。例えば、実施形態に示される全構成要素から幾つかの構成要素を削除してもよい。さらに、異なる実施形態にわたる構成要素を適宜組み合わせてもよい。 (Other embodiments)
Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. In addition, various inventions can be formed by appropriately combining a plurality of components disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

本発明の第１の実施形態に係るＤＢＦ受信器を備えるＤＢＦレーダ装置の機能構成を示すブロック図。The block diagram which shows the function structure of the DBF radar apparatus provided with the DBF receiver which concerns on the 1st Embodiment of this invention. 上記第１の実施形態の適応フィルタの機能構成を示すブロック図。The block diagram which shows the function structure of the adaptive filter of the said 1st Embodiment. 本発明に係るＤＢＦ受信器の第２の実施形態の構成を示すブロック図。The block diagram which shows the structure of 2nd Embodiment of the DBF receiver which concerns on this invention. 上記第２の実施形態の受信回路の構成を示すブロック図。The block diagram which shows the structure of the receiving circuit of the said 2nd Embodiment.

Explanation of symbols

１０…信号発生器、２０…フェーズドアレイアンテナ、２１−１〜２１−Ｎ…送受信モジュール、３０，４０…ＤＢＦ受信器、３１，４１…受信処理部、３２，４２−１，４２−２…ビーム形成器、３３−１〜３３−Ｎ，４３−１〜４３−Ｎ…受信処理部、３４−１〜３４−Ｎ，４４−１〜４４−Ｎ…周波数変換器、３５−１〜３５−Ｎ，４５−１〜４５−Ｎ…Ａ／Ｄ変換器、３６−２〜３６−Ｎ，４７−２〜４７−Ｎ，４８−２〜４８−Ｎ…適応フィルタ、３６１…加算部、３６２−１〜３６２−Ｍ…乗算部、３６３−１〜３６３−Ｍ…乗算部、３６４−１〜３６４−Ｍ…加算部、３６５−１〜３６５−Ｍ…遅延部、３６６−１〜３６６−Ｍ…乗算部、３６７…加算部、３７−１〜３７−Ｎ…直交検波器、４０…ＤＢＦ受信器、４９−１〜４９−Ｎ，４１０−１〜４１０−Ｎ…直交検波回路、４１１，４１４…乗算器、４１２，４１５…ＮＣＯ、４１３，４１６…デジタルフィルタ。 DESCRIPTION OF SYMBOLS 10 ... Signal generator, 20 ... Phased array antenna, 21-1 to 21-N ... Transmission / reception module, 30, 40 ... DBF receiver, 31, 41 ... Reception processing part, 32, 42-1, 42-2 ... Beam Forming unit, 33-1 to 33-N, 43-1 to 43-N, reception processing unit, 34-1 to 34-N, 44-1 to 44-N, frequency converter, 35-1 to 35-N , 45-1 to 45 -N ... A / D converter, 36-2 to 36 -N, 47-2 to 47 -N, 48-2 to 48 -N ... adaptive filter, 361 ... adder, 362-1 362-M ... multiplier, 363-1 to 363-M ... multiplier, 364-1 to 364-M ... adder, 365-1 to 365-M ... delay, 366-1 to 366-M ... multiplier. Part, 367 ... addition part, 37-1 to 37 -N ... quadrature detector, 40 ... DBF receiver, 49-1 9-N, 410-1~410-N ... quadrature detection circuit, 411 and 414 ... multipliers, 412 and 415 ... NCO, 413, 416 ... digital filter.

Claims

A frequency conversion unit for a plurality of received signals received by the plural systems of reception module to convert each IF signal of an intermediate frequency band in the phased array antenna,
An analog-to-digital converter that converts each of the plurality of IF signals into a digital signal;
Any one of the plurality of digital signals is used as a reference signal, and among the plurality of digital signals, a signal other than the reference signal is used as a target signal, and a processing circuit group corresponding to each of the target signals is provided. An adaptive equalization processing unit that adaptively equalizes the plurality of target signals to the reference signal for each signal component of the plurality of target signals ;
A quadrature detection unit that quadrature-detects each of the reference signal and the plurality of target signals after the adaptive equalization, and generates a plurality of quadrature detection signals ;
A beam forming unit that forms a reception beam in the phased array antenna in a specified direction using the plurality of orthogonal detection signals,
The adaptive equalization processing unit, when a noise signal radiated at the time of wavefront adjustment is received by the plurality of reception modules, by the plurality of processing circuit group, to a reference signal in a plurality of digital signals derived from the noise signal, A DBF (Digital Beamforming) receiver characterized in that the entire received wavefront is made uniform by adaptively equalizing the target signal in this digital signal for each signal component .

2. The DBF receiver according to claim 1, wherein the plurality of processing circuit groups adapt the plurality of target signals to the reference signal using an LMS (Least Mean Square) algorithm.

Phase received at a plurality of systems of reception modules in phased array antenna, a frequency converter for a plurality of incoming signals and converts each IF signal of an intermediate frequency band including the first and second signals having different frequencies from each other,
A digital converting unit, - analog downsampling, converting said plurality of IF signals into digital signals to said plurality of IF signals
A distribution unit that distributes the plurality of digital signals to first and second digital signals, respectively;
Any one of the plurality of first digital signals is set as a first reference signal, and other than the first reference signal among the plurality of first digital signals is set as a first target signal, and the first target signal is set. A first processing circuit group corresponding to each of the signals, the plurality of first processing circuit groups, the plurality of first target signals for each signal component of the plurality of first target signals, A first adaptive equalization processing unit for adaptive equalization to the first reference signal ;
Wherein the first reference signal and a plurality of first object signal after the adaptive equalization, and quadrature detection by multiplying the first digital local signal with a frequency corresponding to the component of the first signal, the quadrature A first reception processing unit for extracting a component of the first signal from the detection signal;
A first beam forming unit that forms a first reception beam in the phased array antenna in a specified direction using the extracted component of the first signal;
Any one of the plurality of second digital signals is set as a second reference signal, and other than the second reference signal among the plurality of second digital signals is set as a second target signal, and the second target signal is set. A second processing circuit group corresponding to each of the signals, the plurality of second processing circuit groups, the plurality of second target signals for each signal component of the plurality of second target signals, A second adaptive equalization processing unit that adaptively equalizes the second reference signal;
Wherein the second reference signal and a plurality of second object signals after the adaptive equalization, and quadrature detection by multiplying the second digital local signals of the frequency corresponding to the components of the second signal, the quadrature A second reception processing unit for extracting a component of the second signal from the detection signal;
A second beam forming unit that forms a second reception beam in the phased array antenna in a specified direction using the extracted second signal component ;
When the noise signals radiated at the time of wavefront adjustment are received by the plurality of receiving modules, the first adaptive equalization processing unit uses the plurality of first processing circuit groups to generate a plurality of first signals derived from the noise signals. The first reference signal in one digital signal is adaptively equalized for each signal component with the first target signal in the first digital signal, and the second adaptive equalization processing unit the processing circuit group, the second reference signal at a plurality of second digital signals from said noise signal, in Rukoto the second target signal by an adaptive equalization for each signal component in the second digital signal A DBF receiver characterized by aligning the entire reception wavefront.

The plurality of first and second processing circuit groups adapt the plurality of first and second target signals to the first and second reference signals , respectively , using an LMS (Least Mean Square) algorithm. The DBF receiver according to claim 3.

4. The DBF receiver according to claim 3, wherein the first and second reception processing units perform two-frequency separation using only a digital signal by using two types of NCO (Numerically Controlled Oscillator) simultaneously.